+
+ * aclocal.m4, configure: Regenerate.
+
+
+ * v850.igen (LDSR): Accept but ignore a selID parameter.
+
+
+ * configure: Rebuild.
+
+
+ * simops.c (v850_rotl): New function.
+ (v850_bins): New function.
+ * simops.h: Add prototypes fir v850_rotl and v850_bins.
+ * v850-dc: Add entries for V850e3v5.
+ * v850.igen: Add support for v850e3v5.
+ (ld.dw, st.dw, rotl, bins): New patterns.
+
+
+ * interp.c (sim_open): Add support for bfd_arch_v850_rh850
+ architecture type. Add support for bfd_mach_v850e2 and
+ bfd_mach_v850e2v3 machine numbers.
+ * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
+ (cmpf.d): Correct order of operands.
+ (cmpf.s): Likewise.
+ (trncf.dul): New pattern.
+ (trncf.duw): New pattern.
+ (trncf.sul): New pattern.
+ (trncf.suw): New pattern.
+ * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
+
+
+ * v850.igen (W,WWWW): Correct computation of register number.
+ (JR32): Remove unnecessary comma.
+ (cmovf.s): Register 0 is an invalid source register.
+ (maddf.s): Remove bogus intermediary rounding.
+ (nmaddf.s): Likewise.
+ (trncf.sl): Remove bogus initial rounding.
+ (trncf.dw): Likewise.
+ (trncf.sl): Likewise.
+ (trncf.sw): Likewise.
+
+
+ * config.in, configure: Regenerate.
+
+
+ * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs,
+ mpu1_sregs, and fpu_sregs.
+ (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields
+ in _v850_regs struct.
+ (SP_REGNO): Define.
+ (SP): Redefine using SP_REGNO.
+ (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV)
+ (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC)
+ (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM)
+ (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV)
+ (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV)
+ (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV)
+ (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE)
+ (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV)
+ (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV)
+ (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC)
+ (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID)
+ (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L)
+ (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U)
+ (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP)
+ (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE)
+ (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW)
+ (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2)
+ (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR)
+ (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1)
+ (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR)
+ (PPC_PPC, PPC_PPE, PPC_PPM): New macros.
+ (FPU_COMPARE): New enum.
+ (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3)
+ (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2)
+ (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros.
+ * simops.c (Add32): Update prototype.
+ (update_fpsr): New function.
+ (SignalException): New function.
+ (SignalExceptionFPE): New function.
+ (check_invalid_snan): New function.
+ (v850_float_compare): New function.
+ (v850_div): New function.
+ (v850_divu): New function.
+ (v850_sar): New function.
+ (v850_shl): New function.
+ (v850_shr): New function.
+ (v850_satadd): New function.
+ (v850_satsub): New function.
+ (load_data_mem): New function.
+ (store_data_mem): New function.
+ (mpu_load_mem_test): New function.
+ (mpu_store_mem_test): New function.
+ * simops.h: Add function prototype for above mentioned functions.
+ (check_cvt_fi, check_cvt_if, check_cvt_ff): Define.
+ * v850-dc: Add entry for v850e2 and v850e2v3.
+ * v850.igen: Add support for v850e2 and v850e2v3.
+
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+
+ * aclocal.m4: New file.
+ * configure: Regenerate.
+
+
+ * configure.ac: Change include to common/acinclude.m4.
+
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+
+ * interp.c (sim_do_command): Delete.
+
+
+ * simops (OP_10007E0): Update errno handling as most traps
+ do not invoke the host's functionality directly. Invoke
+ sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
+ Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
+
+
+ * simops.c (OP_10007E0): Change zfree to free.
+
+
+ * interp.c (sim_store_register): Update return value to
+ match new API.
+
+
+ * interp.c (interrupt_names): Add const to pointer type.
+ (do_interrupt): Add const to interrupt_name.
+
+
+ * configure: Regenerate.
+
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate to track ../common/common.m4 changes.
+ * config.in: Ditto.
+
+
+ * configure: Regenerate.
+
+
+ * simops.c (OP_1C007E0): Compensate for 64 bit hosts.
+ (OP_18007E0): Likewise.
+ (OP_2C007E0): Likewise.
+ (OP_28007E0): Likewise.
+ * v850.igen (divh): Likewise.
+
+ * simops.c (OP_C0): Correct saturation logic.
+ (OP_220): Likewise.
+ (OP_A0): Likewise.
+ (OP_660): Likewise.
+ (OP_80): Likewise.
+
+ * simops.c (OP_2A0): If the shift count is zero, clear the
+ carry.
+ (OP_A007E0): Likewise.
+ (OP_2C0): Likewise.
+ (OP_C007E0): Likewise.
+ (OP_280): Likewise.
+ (OP_8007E0): Likewise.
+
+ * simops.c (OP_2C207E0): Correct PSW flags for special divu
+ conditions.
+ (OP_2C007E0): Likewise, for div.
+ (OP_28207E0): Likewise, for divhu.
+ (OP_28007E0): Likewise, for divh. Also, sign-extend the correct
+ operand.
+ * v850.igen (divh): Likewise, for 2-op divh.
+
+ * v850.igen (bsh): Fix carry logic.
+
+
+ * Makefile.in (interp.o): Uncomment and update.
+
+
+ * acconfig.h: Remove.
+ * config.in: Regenerate.
+
+
+ * configure: Regenerated.
+
+
+ * configure: Regenerated.
+
+
+ * configure: Regenerated.
+
+
+ * configure: Regenerate.
+
+
+ * configure.ac: Sinclude aclocal.m4 before common.m4. Add
+ explicit call to AC_CONFIG_HEADER.
+ * configure: Regenerate.
+
+
+ * configure.ac: Update to use ../common/common.m4.
+ * configure: Re-generate.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+
+ * simops.c: Include <sys/types.h>.
+
+
+ * interp.c (sim_open): Accept bfd_mach_v850e1.
+ * v850-dc: Add entry for v850e1.
+ * v850.igen: Add support for v850e1.
+ Add code for DBTRAP and DBRET instructions.
+ (dbtrap): Create a separate v850e1 specific instruction.
+ Only generate a trap if the target is not the v850e1.
+ Otherwise treat it as a special kind of branch.
+ (break): Mark as v850/v850e specific.
+
+
+ * Makefile.in (SHELL): Make sure this is defined.
+ (tmp-igen): Use $(SHELL) whenever we invoke move-if-change.
+
+
+ * simops.c (OP_40): Delete. Move code to...
+ * v850-igen.c (): ...Here. Sign extend the first operand.
+ * simops.h (OP_40): Remove prototype.
+
+
+ * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
+
+
+ * simops.c: Use int, 1, 0 instead of boolean, true and false.
+ * sim-main.h: Ditto.
+
+
+ * simops.c (OP_E6077E0): And op1 with 7 after reading register, not
+ before.
+ (BIT_CHANGE_OP): Likewise.
+
+
+ * simops (OP_10007E0): Don't subtract 4 from PC.
+
+
+ * interp.c (sim_open): Remove reference to v850ea.
+ (sim_create_inferior): Likewise.
+ * v850-dc: Likewise.
+ * v850.igen: Remove all references to v850ea, including v850ea
+ specific instructions.
+
+
+
+ * Makefile.in: Add gen-zero-r0 option.
+ * sim-main.h (GPR_SET, GPR_CLEAR): Define.
+ * simops.c (OP_24007E0): Sign extend the imm9
+ operand of a mul instruction.
+
+
+ * simops.c (trace_result): Fix printf formatting.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * Makefile.in (simops.h, table.c): Delete targets.
+ (tmp-gencode, gencode.o, gencode): Delete targets.
+ (simops.h): New file.
+ ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
+ * gencode.c: Delete file.
+
+
+ * Makefile.in (simops.o): Add simops.h to dependency list.
+
+
+ * Makefile.in (gencode): Link with libintl.
+
+
+ * Makefile.in (gencode): Link with libopcodes in build tree rather
+ than building source files from there.
+
+
+ * v850.igen: Remove illegal instruction pattern, since it is the
+ same as the breakpoint pattern.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * v850.igen: Define 'br *' as illegal since this is the only
+ way to provide a breakpoint on some v850 family processors.
+
+
+ * v850.igen (ilgop): New insn pattern for four-byte breakpoints.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
+
+
+ * Makefile.in (simops.o): Depends on targ-vals.h
+ * simops.c: Include targ-vals.h instead of
+ libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*.
+ (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0):
+ Replace signed long int with signed32.
+
+
+ * interp.c: #include "itable.h".
+ (get_insn_name): New function.
+ (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
+ * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
+
+
+ * sim-main.h (INSN_NAME): New arg `cpu'.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+
+ * acconfig.h: New file.
+ * configure.in: Reverted change of Apr 24; use sinclude again.
+
+Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+
+ * configure.in: Don't call sinclude.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * sim-main.h (SIM_MAIN_H): Wrap header.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * interp.c (sim_stop): Delete, second attempt.
+
+
+ * interp.c (sim_info): Delete.
+
+
+ * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc].
+
+ * simops.c (trace_result): Call trace_generic instead of
+ trace_one_insn.
+ (trace_module): Change variable type to integer.
+ (trace_input): Initialize trace_module with TRACE_ALU_IDX.
+
+ * sim-main.h (trace_module): Change variable decl to integer type.
+ (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
+
+
+ * interp.c (sim_store_register, sim_fetch_register): Pass in
+ length parameter. Return -1.
+
+
+ * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and
+ IMEM_IMMED. To match recent igen change.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * sim-main.h (CPU_CIA): Delete, replaced by.
+ (CIA_SET, CIA_SET): Define.
+
+Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+
+ * v850.igen: Revert break value back to its old value.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * v850.igen: Make break have a zero first field, since otherwise
+ it clashes with the DIVH instruction.
+
+
+ * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give
+ sim_stopped instead of sim_signalled.
+
+ * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
+ SIM_SIGTRAP.
+ (illegal): Rename SIGILL to SIM_SIGILL.
+
+ * sim-main.h, simops.c, interp.c: Do not include signal.h.
+
+ * sim-main.h: Include sim-signal.h instead of signal.h.
+ (SIGTRAP, SIGQUIT): Delete definition.
+ (SIG_V850_EXIT): Delete definition.
+
+
+ * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
+
+
+ * interp.c (sim_open): Check state magic number.
+ (sim-assert.h): Include.
+
+
+ * v850.igen: Add model filter field to records.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
+ SIM_ENGINE_RESTART_HOOK.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * sim-main.h (WITH_TARGET_WORD_MSB): Delete.
+
+ * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit
+ architecture with MSB == 31.
+
+
+ * v850.igen: Make divh insn with RRRRR==0 breakpoint.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+
+ * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
+ SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
+ (SIM_EXTRA_CFLAGS): Update.
+
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * configure.in: Really specify NONSTRICT_ALIGNMENT as the default.
+
+
+ * configure.in: Specify NONSTRICT_ALIGNMENT as the default.
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
* v850.igen (disp16): Use EXTEND16 to sign extend disp.
* simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
"sld.w" insns to v850.igen. Fix tracing.
-start-sanitize-v850eq
(OP_70): Ditto for "sld.hu".
-end-sanitize-v850eq
* v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
-end-sanitize-v850eq
* simops.c (condition_met): Make global.
* sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
TRACE_ST): Define.
-start-sanitize-v850eq
(TRACE_LD_NAME): Define.
-end-sanitize-v850eq
-start-sanitize-v850e
* simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
-end-sanitize-v850e
* simops.c: Move "mov", "reti", to v850.igen, fix tracing.
before.
* v850.igen (reti): Return to current PC not previous.
-start-sanitize-v850e
* simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing.
(stsr, ldsr): Correct src, dest fields. Fix tracing.
(ctret): Force alignment. Fix tracing.
-end-sanitize-v850e
* simops.c (trace_output): Add result argument.
(GR, SR): Define.
v850.insn (movea, stsr): Use.
-start-sanitize-v850e
(sxb, sxh, zxb, zxh): Ditto.
-end-sanitize-v850e
(uimm16): Define, no sign extension.
(addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
-start-sanitize-v850e
* simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
"mov32" from here.
* v850.igen: To here.
(switch): Fix off by two error in NIA calc.
-end-sanitize-v850e
* simops.c (trace_pc, trace_name, trace_values, trace_num_values):
-start-sanitize-v850e
* v850-dc: Add rule to diferentiate between breakpoint and divh.
* v850.igen (break): New instruction, breakpoint simulator.
-
-end-sanitize-v850e
* v850.igen (breakpoint): Enable. Change to a 32bit instruction.
-start-sanitize-v850e
* simops.c (Multiply64): Don't store into register zero.
-end-sanitize-v850e
* Makefile.in (semantics.o): Add dependency.
-start-sanitize-v850eq
* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
* interp.c (sim_create_inferior): For v850eq set US bit by
default.
-end-sanitize-v850eq
-start-sanitize-v850e
* interp.c (sim_open): Don't set arch, now set by
sim_analyze_program.
-end-sanitize-v850e
* configure: Regenerated to track ../common/aclocal.m4 changes.
* simops.c (OP_60): Move "jmp" code from here.
* v850.igen (jmp): To here.
-start-sanitize-v850eq
* simops.c (OP_60): Move "sld.bu" code from here.
* v850.igen (sld.bu): To here.
-end-sanitize-v850eq
-start-sanitize-v850eq
* v850.igen (prepare, ...): Add to v850eq architecture.
-end-sanitize-v850eq
-start-sanitize-v850e
* interp.c (sim_open): Default to v850eq.
-end-sanitize-v850e
-start-sanitize-v850eq
-
* interp.c (sim_open): Default to v850e.
-end-sanitize-v850eq
* sim-main.h (signal.h): Include.
* v850.igen (illegal): Report/halt illegal instructions.
* interp.c (sim_open): Add ABFD argument.
-start-sanitize-v850e
* simops.c (bsh): Only set CY flag if either of the bottom
* simops.c (unsigned divide instructions): S bit set if result has
top bit set.
-start-sanitize-v850eq
* simops.c (pushml, pushmh, popml, popmh): Lower numbered
registers go to higher numbered address.
-end-sanitize-v850eq
-end-sanitize-v850e
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
interpretation of SR bit in list18 structure.
-start-sanitize-v850eq
(divn, divun): New functions to perform N step divide functions.
-end-sanitize-v850eq
-start-sanitize-v850eq
* simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
with US bit set in the PSW.
-end-sanitize-v850eq
* simops.c: Opcode functions return amount to be added to PC.
-start-sanitize-v850e
* v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
* simops.c: Add support for v850e instructions.
-end-sanitize-v850e
-
-start-sanitize-v850eq
* simops.c: Add support for v850eq instructions.
-end-sanitize-v850eq
projects / binutils.git / blobdiff