+
+ PR 10169
+ * gas/tc-arm.c (do_t_ssat): Move common code from here...
+ (do_t_usat): ... and here to...
+ (do_t_ssat_usat): New function: ... here. Add code to check that
+ the shift value, if present, is in range.
+
+
+ Merge cegcc and mingw32ce target name changes
+ from CeGCC project:
+
+
+ * configure.tgt: Add arm*-*-cegcc* target.
+
+
+ * configure.tgt: Add arm-*-mingw32ce* target.
+
+
+ * config/tc-vax.c (md_estimate_size_before_relax): Accept
+ indirect symbol references in the PIC mode and emit a
+ PC-relative relocation instead of a GOT/PLT one. Likewise
+ for symbols known to be hidden at this point.
+
+
+ PR 10186
+ * config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
+ instruction.
+
+
+ PR ld/10269
+ * config/tc-i386.c (md_apply_fix): Use TC_FORCE_RELOCATION
+ instead of generic_force_reloc.
+
+ * config/tc-i386.h (TC_FORCE_RELOCATION): New.
+
+
+ * config/tc-moxie.c (md_chars_to_number): Define.
+ (md_begin): Populate opcode hashtable with more form 3 opcodes.
+ (md_assemble): Assemble MOXIE_F3_PCREL encoded instructions.
+ (md_apply_fix): Handle BFD_RELOC_MOXIE_10_PCREL relocations.
+ (tc_gen_reloc): Ditto.
+ (md_pcrel_from): Ditto.
+ (md_chars_to_number): New function.
+
+
+ * config/tc-moxie.c (md_assemble): Handle MOXIE_F1_M encoded
+ opcodes.
+
+
+ PR gas/10255
+ * dw2gencfi.c (output_cfi_insn): Initialize fragment before rs_cfa
+ to DW_CFA_advance_loc4.
+
+
+ PR gas/977
+ * config/tc-i386.c (md_estimate_size_before_relax): Don't relax
+ branches to weak symbols.
+ (md_apply_fix): Don't convert fixes against weak symbols to
+ section-relative offsets, but save addend for later reloc emission.
+ (tc_gen_reloc): When emitting reloc against weak symbol, adjust
+ addend to pre-compensate for bfd_install_relocation.
+
+
+ * dep-in.sed: Don't use \n in replacement part of s command.
+ * Makefile.am (DEP1, DEPTC, DEPOBJ, DEP2): LC_ALL for uniq.
+ * Makefile.in: Regenerate.
+
+
+ PR gas/10198
+ * config/tc-i386-intel.c (i386_intel_operand): Check '$' as '.'.
+
+
+ * config/tc-mips.c (check_for_24k_errata): Remove.
+ (md_mips_end): Remove call to check_for_24k_errata.
+ (start_noreorder): Likewise.
+ (s_change_sec): Likewise.
+ (s_change_section): Likewise.
+ (insns_between): Add 24k errata checks.
+ (append_insn): Remove declaration and references to nhdx_24k.
+ Remove calls to check_for_24k_errata.
+
+
+ * po/id.po: Updated Indonesian translation.
+ * po/gas.pot: Updated template file.
+
+
+ PR 10143
+ * config/bfin-parse.y (error): Use "%s" as format string for error
+ message.
+
+
+ * dep-in.sed: Output one filename per line with all lines having
+ continuation backslash. Prefix first line with "A", following
+ lines with "B".
+ * Makefile.am (DEP): Don't use dep.sed here.
+ (DEP1): Run $MKDEP on single files, use dep.sed here on dependencies,
+ sort and uniq.
+ (DEPTC, DEPOBJ, DEP2): Use dep.sed on dependencies, sort and uniq.
+ Emit multi dependencies on one line.
+ * Makefile.in: Regenerate.
+
+
+ * makefile.vms: New file to compile gas on VMS.
+
+ * configure.com: New file to do configuration on VMS with DCL.
+
+
+ * config/tc-mips.c (nops_for_vr4130): Don't check noreorder_p.
+ (nops_for_insn): Likewise.
+
+
+ * symbols.c (COPIED_SYMFLAGS): Add BSF_GNU_INDIRECT_FUNCTION.
+
+
+ * config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
+ (build_modrm_byte): Remove DREX handling support.
+ (DREX_*): Delete.
+ (drex_byte): Delete.
+ (md_assemble): Remove DREX handling support.
+ (process_operands): Remove DREX, SSE5 support.
+ (i386_insn): Remove DREX.
+
+
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+
+ * config/obj-coff.h: Include "coff/x86_64.h" for x86 pe-coff.
+ (TARGET_FORMAT): Removed for x86 pe-coff.
+ (COFF_TARGET_FORMAT): Likewise.
+
+ * config/tc-i386.c (md_longopts): Allow --64 for x86 pe-coff.
+ (md_parse_option): Likewise.
+ (md_show_usage): Show option --32/--64 for x86 pe-coff.
+ (i386_target_format): Use also for x86 pe-coff.
+
+ * config/tc-i386.h (TARGET_FORMAT): Defined as i386_target_format
+ for x86 pe-coff.
+
+
+ * config/tc-mep.c (mep_machine): Only check CPU flags, not COP flags.
+ (mep_process_saved_insns): Remove debugging printfs.
+
+
+ * NEWS: Mention new feature.
+ * config/obj-coff.c (obj_coff_common_parse): New function.
+ (obj_coff_comm): Likewise.
+ (coff_pseudo_table): Override default ".comm" definition on PE.
+ * doc/as.texinfo: Document new feature.
+
+
+ * config/obj-coff.c (obj_coff_section): Add 'y' as
+ specifier for SEC_COFF_NOREAD section flag.
+ * doc/as.texinfo: Add documentation about .section flag 'y'.
+
+
+ * cgen.c (gas_cgen_parse_operand): Guard against NULL pointers.
+
+
+ * config/tc-arm.c: Move as.h to start of file.
+
+
+ * config/tc-arm.h: Fix typo in comment.
+ (ARM_IS_FUNC): New macro.
+ (MD_APPLY_SYM_VALUE): Define.
+
+ * config/tc-arm.c (do_blx): Retain BFD_RELOC_ARM_PCREL_BLX for
+ all versions of EABI.
+ (relax_branch): Do not relax for branches to ARM functions.
+ (md_pcrel_from_section): Set up base correctly for
+ BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_THUMB_PCREL_CALL,
+ BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_ARM_PCREL_BLX
+ BFD_RELOC_ARM_PCREL_CALL.
+ (md_apply_fix): Flip bl to blx where possible.
+ Flip blx to bl where possible.
+ (arm_force_relocation): Force relocations for
+ BFD_RELOC_ARM_PCREL_JUMP, BFD_RELOC_ARM_PCREL_JUMP,
+ BFD_RELOC_ARM_PCREL_BLX, BFD_RELOC_THUMB_PCREL_BLX,
+ BFD_RELOC_THUMB_PCREL_BRANCH20, BFD_RELOC_THUMB_PCREL_BRANCH23,
+ BFD_RELOC_THUMB_PCREL_BRANCH25.
+ (arm_apply_sym_value): New function.
+
+
+ * config/tc-alpha.c: Also declare alpha_prologue_label for OBJ_EVAX.
+
+
+ * config/tc-armlinux-eabi.h (FPU_DEFAULT): Default to plain VFP.
+ * config/tc-armeabi.h (FPU_DEFAULT): Likewise.
+ * config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
+ the default FPU from the processor.
+
+
+ * config/tc-arm.c (do_t_blx): Always use BFD_RELOC_THUMB_PCREL_BLX.
+ (md_pcrel_from_section): Align address for BLX.
+ (tc_gen_reloc): Change BFD_RELOC_THUMB_PCREL_BLX relocations to
+ BFD_RELOC_THUMB_PCREL_BRANCH23 for EABI v4+.
+
+
+ * config/tc-mep.c (md_begin): Check coprocessor type.
+ (md_check_parallel64_scheduling): Use memset to initialize the buffer.
+ (md_check_parallel32_scheduling): Likewise.
+ (slot_ok): New.
+ (mep_check_ivc2_scheduling): New.
+ (mep_check_parallel_scheduling): Call it.
+ (mep_process_saved_insns): Add IVC2 slot support.
+ (md_assemble): Likewise.
+
+
+ * config/obj-elf.c (obj_elf_type): Add support for a
+ gnu_indirect_function type.
+ * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
+ against indirect function symbols.
+ * doc/as.texinfo (.type): Document the support for the
+ gnu_indirect_function symbol type.
+ * NEWS: Mention the new feature.
+
+
+ * NEWS: Add item about discriminator support.
+ * dwarf2dbg.h (struct dwarf2_line_info): Add discriminator field.
+ * dwarf2dbg.c (current): Add discriminator field.
+ (dwarf2_where): Copy discriminator value.
+ (dwarf2_consume_line_info): Set discriminator to 0.
+ (dwarf2_directive_loc): Process discriminator sub-op.
+ (out_leb128): New function.
+ (process_entries): Output DW_LNE_set_discriminator.
+ * doc/as.texinfo: Add discriminator operand to .loc directive.
+
+
+ * config/tc-mips.c (macro_end, md_convert_frag): Use '%s' for
+ as_bad calls to silence compiler warning.
+
+
+ * config/tc-i386-intel.c (O_XXX): Reorder.
+
+
+ * Makefile.am: Add explicit dependency of tc-i386.o on
+ tc-i386-intel.c.
+ * Makefile.in: Likewise.
+ * config/tc-i386.c (i386_finalize_immediate): Declare, broken
+ out from i386_immediate.
+ (i386_immediate): Slightly re-arrange, call
+ i386_finalize_immediate.
+ (i386_finalize_displacement): Declare, broken out from
+ i386_displacement.
+ (i386_displacement): Slightly re-arrange, call
+ i386_finalize_displacement.
+ (i386_intel_simplify, i386_intel_parse_name): Declare.
+ (this_operand): Initialize to -1.
+ (set_intel_syntax): Set expression rank for O_full_ptr.
+ (md_assemble): Set this_operand back to -1 after parsing
+ operands.
+ (x86_cons): Negate intel_syntax to indicate state. Call
+ i386_intel_simplify.
+ (md_operand): Convert if to switch. Handle '[' for Intel
+ syntax.
+ (i386_intel_operand): Delete, including all helper functions
+ and data.
+ * config/tc-i386-intel.c: New file, all new code.
+ * config/tc-i386.h (i386_operator): Declare.
+ (md_operator): Define to i386_operator.
+ (i386_need_index_operator): Declare.
+ (md_need_index_operator): Define to i386_need_index_operator.
+ (O_full_ptr): Define.
+
+
+ * expr.c (operand): Call md_need_index_operator() and
+ md_operator() if defined. Add unary label.
+ (operator): Call md_operator() if defined.
+ (expr): Adjust assertions on range and rank of op_left and
+ op_right. Don't abort on unhandled operators when reducing
+ expressions with both operands being constant.
+ (expr_set_rank): New.
+ * expr.h (expr_set_rank): Declare.
+
+
+ * config/tc-moxie.h: New file.
+ * config/tc-moxie.c: New file.
+ * configure: Add support for moxie.
+ * configure.tgt: Add support for moxie.
+
+
+ * expr.c: Include limits.h if available, and #define CHAR_BITS
+ otherwise.
+ (expr): Check range of shift count when evaluating a constant
+ expression.
+
+
+ * config/tc-i386.c (process_operands): Print operands in
+ correct order depending on intel_syntax.
+
+
+ * config/tc-mips.c (mips_fix_24k): Declare.
+ (check_for_24k_errata): New.
+ (mips_cleanup): Call check_for_24k_errata.
+ (start_noreorder): Likewise.
+ (md_mips_end): Likewise.
+ (s_change_sec): Likewise.
+ (s_change_section): Likewise.
+ (append_insn): Call check_for_24k_errata. Prevent
+ ERET/DERET instructions from being moved into delay
+ slots.
+ (OPTION_FIX_24K): New.
+ (OPTION_NO_FIX_24k) New.
+ (md_longopts): Add "mfix-24k" and "mno-fix-24k".
+ (md_parse_option): Handle fix-24k options.
+ (md_show_usage): Display fix-24k options.
+ * doc/c-mips.texi: Document.
+
+
+ * config/tc-mips.c (mips_dwarf2_addr_size): Use HAVE_64BIT_OBJECTS
+ instead of HAVE_64BIT_SYMBOLS.
+
+
+ * config/tc-mep.c: Add UCI/DSP instruction support. Add C5 support.
+ (md_show_usage): Change default endian to little.
+ * config/tc-mep.h (TARGET_BYTES_BIG_ENDIAN): Change default to little.
+
+
+ * tc-h8300.c (do_a_fix_imm): Pass the insn, force relocs for MOVA
+ immediates.
+ (build_bytes): Pass insn to do_a_fix_imm.
+
+
+ * config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-M0.
+ * doc/c-arm.texi: Added codes for processors ARM Cortex-M0 and
+ Cortex-M1.
+
+
+ * config/tc-vax.c (synthetic_votstrs): add "jbbcci" and "jbbssi"
+ (md_assemble): emit symbol name when used as immediate in PIC mode.
+ (md_assemble): fix LP64 bug (use sizeof (valueT) instead 4).
+
+
+ * config/tc-xtensa.c (parse_arguments): call demand_empty_rest_of_line
+
+
+ * config/tc-arm.c (arm_validate_fix): Define only for OBJ_COFF.
+ (find_real_start): Likewise.
+ * config/tc-arm.h (TC_VALIDATE_FIX): Likewise
+
+
+ * config/tc-arm.c (do_nop): Generate v6k nops whenever possible.
+ (arm_handle_align): Generate v6k ARM, thumb2 wide & narrow nops
+ whenever possible.
+
+
+ * config/tc-ppc.c (ppc_handle_align): Handle power7's group ending nop.
+
+
+ * doc/internals.texi: Fix trivial syntax errors.
+
+
+ PR 10005
+ * config/tc-i386.c (reloc): Don't abort on lack of required
+ reloc type.
+
+
+ * config/tc-i386.c (parse_insn): Use default_arch on unsupported
+ arch.
+
+
+ PR gas/9966
+ * listing.c (listing_newline): Properly handle `\\"' and ';'.
+
+ * read.c (is_end_of_line): Update comments for line separator.
+ (read_begin): Set line separator in is_end_of_line to 2.
+
+
+ * config/tc-sparc.c (md_parse_option): If the user gives
+ us '--64' make sure max_architecture is at least V9.
+
+
+ * config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
+ BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
+ Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
+
+
+ * as.h: Include alloca-conf.h instead of config.h and remove
+ existing #if's handling alloca.
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+
+
+ * config/tc-ppc.c (ppc_frob_symbol): Add csect information for
+ C_AIX_WEAKEXT too.
+
* config/tc-ppc.c (md_apply_fix): On COFF targets, always reread
qdsub in Thumb-2 mode.
* config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
of MUL when possible.
projects / binutils.git / blobdiff