+
+ * configure: Regenerate.
+
+
+ * interp.c: Include sim-syscall.h.
+ (syscall_read_mem, syscall_write_mem): Delete.
+ (bfin_syscall): Change syscall_read_mem/syscall_write_mem to
+ sim_syscall_read_mem/sim_syscall_write_mem.
+
+
+ * linux-targ-map.h: Update example comments.
+ (cb_linux_syscall_map): Fill out name field.
+ (cb_linux_errno_map, cb_linux_open_map, cb_linux_signal_map):
+ Likewise.
+
+
+ * interp.c: Expand comment on CB_SYS_xxx defines.
+
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * bfin-sim.c (hwloop_get_next_pc): Change TRACE_BRANCH to
+ BFIN_TRACE_BRANCH.
+ (decode_ProgCtrl_0, decode_BRCC_0, decode_UJUMP_0, decode_CALLa_0):
+ Likewise.
+ * bfin-sim.h (__PUT_MEM, __GET_MEM): Change TRACE_CORE to
+ BFIN_TRACE_CORE.
+ * dv-bfin_cec.c (_cec_raise, cec_latch, cec_return): Change
+ TRACE_BRANCH to BFIN_TRACE_BRANCH.
+ * interp.c (syscall_read_mem, syscall_write_mem): Change MAYBE_TRACE
+ to TRACE_CORE.
+ * sim-main.h (MAYBE_TRACE, TRACE_INSN, TRACE_DECODE, TRACE_EXTRACT,
+ TRACE_SYSCALL, TRACE_EVENTS): Delete.
+ (TRACE_CORE): Rename to ...
+ (BFIN_TRACE_CORE): ... this. Change MAYBE_TRACE to TRACE_CORE.
+ (TRACE_BRANCH): Rename to ...
+ (BFIN_TRACE_BRANCH): ... this. Change MAYBE_TRACE to TRACE_BRANCH.
+
+
+ PR 18273
+ * bfin-sim.c (decode_dsp32alu_0): Remove spurious check for
+ s == 1.
+
+
+ * sim-main.h (SIM_CPU): Add note to clean this up.
+
+
+ * sim-main.h (sim_cia): Delete.
+
+
+ * sim-main.h (CIA_GET, CIA_SET): Delete.
+
+
+ * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
+ * sim-main.h (STATE_CPU): Delete.
+
+
+ * configure: Regenerate.
+
+
+ * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o.
+
+
+ * Makefile.in (SIM_OBJS): Delete $(SIM_EXTRA_OBJS).
+
+
+ * config.in, configure: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+ * configure.ac (BFIN_SIM_EXTRA_OBJS): Delete.
+ * Makefile.in (SIM_OBJS): Delete @BFIN_SIM_EXTRA_OBJS@.
+
+
+ * dv-bfin_uart.c [!HAVE_DV_SOCKSER] (dv_sockser_status,
+ dv_sockser_write, dv_sockser_read): Delete.
+
+
+ * sim-main.h: Delete run-sim.h include.
+
+
+ * aclocal.m4, config.in, configure: Regenerate.
+ * tconfig.in: Rename file ...
+ * tconfig.h: ... here.
+
+
+ * tconfig.in: Delete includes.
+ [HAVE_DV_SOCKSER]: Delete.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Change v to bu32.
+
+
+ * Makefile.in (SIM_RUN_OBJS): Delete.
+
+
+ PR sim/13160
+ * Makefile.in ($(srcdir)/linux-fixed-code.h): Put a ; after the
+ print sed command for BSD compatibility.
+
+
+ PR sim/13160
+ * Makefile.in ($(srcdir)/linux-fixed-code.h): Specify the asm input
+ directly rather than use $<. Move the file name to the end of the
+ sed command to be POSIX compliant.
+
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+ * config.in: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Add note about broken handling of
+ SEARCH with parallel insns.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Make sure HLs is 0 after last
+ insn that uses it.
+ (decode_dsp32shiftimm_0): Likewise.
+ Require HLs be less than 2 for accumulator shift insns.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Check more opcode fields before
+ decoding various insns.
+
+
+ * TODO: Add more notes.
+
+
+ * Makefile.in ($(srcdir)/linux-fixed-code.h): Add
+ @MAINTAINER_MODE_TRUE@ as the first item in the dependency list.
+
+
+ * aclocal.m4, configure: Regenerate.
+
+
+ * configure: Rebuild.
+
+
+ * aclocal.m4, configure: Regenerate.
+
+
+ * configure.ac: Use $SIM_DV_SOCKSER_O.
+ * configure: Regenerated.
+
+
+ * aclocal.m4: Revert the previous change changing
+ the license from GPL v2 or later to GPL v3 or later
+ (this file was generated).
+
+
+ * linux-fixed-code.s: Revert the previous change changing
+ the license from GPL v2 or later to GPL v3 or later.
+
+
+ * machs.c (bf54x_roms): Pass 0x1000 to alias field of BFROM, and
+ 0x10000 to the alias field of BFROMA.
+ (bf561_roms): Pass 0x1000 to alias field of BFROM.
+ (bf59x_roms): Pass 0x10000 to alias field of BFROMA.
+
+
+ * machs.c (bfin_reg_fetch): Change return 0 to return -1, and
+ return -1 to return 4.
+ (bfin_reg_store): Likewise.
+
+
+ * config.in, configure: Regenerate.
+
+
+ * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pint.
+ * configure: Regenerate.
+ * dv-bfin_pint.c, dv-bfin_pint.h: New device model.
+ * machs.c (bf542_dev): Add PINT register blocks.
+ (bf544_dev, bf547_dev): Likewise.
+ (PINT_PIQS): Define.
+ (bf54x_port): Add pint/gpio routing.
+ * machs.h (BFIN_MMR_PINT_SIZE): Define.
+
+
+ * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio2.
+ * configure: Regenerate.
+ * dv-bfin_gpio2.c, dv-bfin_gpio2.h: New device model.
+ * machs.c (bf54x_mem): Delete GPIO mem stub.
+ (bf542_dev): Add GPIO register blocks.
+ (bf544_dev, bf547_dev): Likewise.
+ * machs.h (BFIN_MMR_GPIO2_SIZE): Define.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Extract the sign for ASHIFT
+ and LSHIFT, and set ASTAT based on the before/after values.
+ Rename "val" to "acc" to be consistent with other code branches.
+
+
+ * bfin-sim.c (sgn_extend): New helper.
+ (decode_dsp32shiftimm_0): Call lshift when newimmag is more
+ than 16, otherwise call ashiftrt. Set ASTAT fields as needed.
+ For accumulator shifts, call new sgn_extend helper.
+
+
+ * bfin-sim.c (illegal_instruction_or_combination): New helper.
+ (decode_ProgCtrl_0): Call illegal_instruction_or_combination instead
+ of illegal_instruction.
+ (decode_PushPopReg_0, decode_CCflag_0, decode_CC2dreg_0,
+ decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
+ decode_dspLDST_0, decode_LDST_0, _interp_insn_bfin): Likewise.
+ (decode_PushPopMultiple_0): Call illegal_instruction_combination when
+ PARALLEL_GROUP is not BFIN_PARALLEL_NONE.
+ (decode_CCflag_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0,
+ decode_COMPI2opD_0, decode_COMPI2opP_0): Likewise.
+ (decode_CC2stat_0): Check PARALLEL_GROUP before cbit.
+ (decode_LDSTpmod_0): Call illegal_instruction_combination when
+ PARALLEL_GROUP is BFIN_PARALLEL_GROUP2.
+ (decode_dagMODim_0, decode_dagMODik_0, decode_LDST_0,
+ decode_LDSTiiFP_0, decode_LDSTii_0): Likewise.
+
+
+ * bfin-sim.h (bfin_parallel_group): New enum.
+ (bfin_cpu_state): Add new "group" member.
+ (PARALLEL_GROUP): Define.
+ * bfin-sim.c (decode_ProgCtrl_0): Change INSN_LEN check to
+ PARALLEL_GROUP.
+ (decode_CaCTRL_0, decode_PushPopReg_0, decode_ccMV_0, decode_CCflag_0,
+ decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
+ decode_LOGI2op_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
+ decode_CALLa_0, decode_linkage_0): Likewise.
+ (_interp_insn_bfin): Set PARALLEL_GROUP.
+ (interp_insn_bfin): Likewise.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Delete extra space in TRACE_INSN.
+
+
+ * bfin-sim.c (_interp_insn_bfin): Call illegal_instruction_combination
+ when INSN_LEN is non-zero before 32bit decode.
+
+
+ * bfin-dis.c (fmtconst): Replace decimal handling with a single
+ sprintf call and the '*' field width.
+
+
+ * machs.c (bfin_model_map_bfrom): Return when mnum is 535.
+
+
+ * interp.c (bfin_user_init): Move auxvt_size decl from top to
+ inside of auxvt check.
+
+
+ * dv-bfin_sic.c (bfin_sic_finish): Change iwr1 to iwr2.
+
+
+ * devices.c: Include devices.h.
+
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+
+ * bfin-sim.c (lshift): Add an overflow flag. Delete now unused
+ i, j, and tmp vars. Add a new v_i var. Split the overflow logic
+ out from the saturate logic. Do not set V ASTAT bits when working
+ with accumulators.
+ (decode_ALU2op_0): Add new argument to lshift call.
+ (decode_LOGI2op_0, decode_dsp32shift_0, decode_dsp32shiftimm_0):
+ Likewise.
+
* dv-bfin_ebiu_amc.c (struct bfin_ebiu_amc): Add bank_base.
projects / binutils.git / blobdiff