+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+
+ * bfin-sim.c (lshift): Add an overflow flag. Delete now unused
+ i, j, and tmp vars. Add a new v_i var. Split the overflow logic
+ out from the saturate logic. Do not set V ASTAT bits when working
+ with accumulators.
+ (decode_ALU2op_0): Add new argument to lshift call.
+ (decode_LOGI2op_0, decode_dsp32shift_0, decode_dsp32shiftimm_0):
+ Likewise.
+
+
+ * dv-bfin_ebiu_amc.c (struct bfin_ebiu_amc): Add bank_base.
+ (bfin_ebiu_amc_write_amgctl): Replace BFIN_EBIU_AMC_BASE with
+ amc->bank_base.
+ (bfin_ebiu_amc_finish): Assign BFIN_EBIU_AMC_BASE to amc->bank_base.
+
+
+ * dv-bfin_ebiu_amc.c (bfin_ebiu_amc_attach_address_callback): Use
+ ARRAY_SIZE rather than hardcoded constant.
+
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+ * configure.ac: Add linux/types.h to AC_CHECK_HEADERS.
+ * dv-eth_phy.c: Check for HAVE_LINUX_TYPES_H, and delete __u16 and
+ _LINUX_TYPES_H defines.
+
+
+ * interp.c (bfin_syscall): Increase _tbuf storage. Declare new local
+ tstr buffer. Call cb_get_string on tstr when handling CB_SYS_stat64,
+ CB_SYS_lstat64, CB_SYS_open, CB_SYS_write, CB_SYS_unlink,
+ CB_SYS_truncate, CB_SYS_rename, CB_SYS_stat, CB_SYS_lstat. Include
+ tstr in the tbuf output.
+
+
+ * Makefile.in: Delete all dependency rules.
+ * aclocal.m4, configure: Regenerate.
+
+
+ * configure: Regenerate after common/acinclude.m4 update.
+
+
+ * configure.ac: Change include to common/acinclude.m4.
+ * aclocal.m4, configure: Regenerate.
+
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Use STORE() for VIT_MAX insns.
+
+
+ * interp.c (sim_do_command): Delete.
+
+
+ * interp.c (cb_linux_stat_map_32, cb_linux_stat_map_64): Rename from
+ stat_map_32 and stat_map_64.
+ (cb_libgloss_stat_map_32): New stat map.
+ (stat_map_32, stat_map_64): New stat map pointers.
+ (bfin_user_init): Assign stat_map_32 to cb_linux_stat_map_32 and
+ stat_map_64 to cb_linux_stat_map_64.
+ (bfin_virtual_init): New function.
+ (sim_create_inferior): Call bfin_virtual_init for all other envs.
+
+
+ * interp.c (bfin_syscall): Delete old comment. Set dreg 1 to
+ sc.result2 and dreg 2 to sc.errcode.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Clear ASTAT[AV] if val is 0,
+ else set it. Set ASTAT[AVS] if val is 0. Do this for LSHIFT and
+ ASHIFT accumulator insns.
+
+
+ * bfin-sim.c (ashiftrt): If size is 40, do not call SET_ASTATREG.
+ (lshiftrt): Likewise.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Use get_unextended_acc
+ rather than get_extended_acc in LSHIFT insns.
+
+
+ * bfin-sim.c (decode_macfunc): Handle MM when mmod is M_TFU.
+ Check MM once when mmod is M_FU to match M_TFU better.
+
+
+ * bfin-sim.c (decode_dsp32shiftimm_0): When shift is greater than
+ 32, perform a left shift. Update the corresponding AV bit. Set
+ AZ when the low 32bits are also zero.
+
+
+ * bfin-sim.c (decode_dsp32shiftimm_0): With left shift vector insns,
+ call lshift only when count is positive. Otherwise, call ashiftrt.
+ With arithmetic right shift insns, call ashiftrt when the value is
+ small enough, otherwise call lshift.
+
+
+ * bfin-sim.c (extract_mult): Call saturate_s16 directly when
+ mmod is M_IH rather than computing the result by hand.
+
+
+ * bfin-sim.c (decode_macfunc): Add nosat_acc to track acc value
+ before saturation, set sat when more cases saturate, and set the
+ overflow bit based on these results. For M_TFU, M_IU, M_FU, and
+ M_W32, change the max values compared against.
+ (decode_dsp32mac_0): Delete v_i and add v_0 and v_1. Pass v_1
+ when processing MAC1 and pass v_0 when processing MAC0. Combine
+ the results into the V/VS ASTAT bits.
+
+
+ * bfin-sim.c (extract_mult): Call saturate_s32 when MM is set
+ and mmod is M_IU. Call saturate_s16 when MM is set and mmod
+ is M_TFU.
+
+
+ * bfin-sim.c (decode_multfunc): Call new is_macmod_signed, and
+ allow MM to sign extend all the time.
+ (decode_macfunc): Likewise. Drop sign extension of unsigned
+ values.
+
+
+ * bfin-sim.c (saturate_s40_astat): Change ">=" to ">".
+ (decode_macfunc): Likewise when mmod is M_IH.
+
+
+ * interp.c (sim_create_inferior): Change free to freeargv.
+
+
+ * machs.c (bf534_dev, bf537_dev): Add glue-or devices.
+ (bf537_port): Define applicable devices with PORT to the glue-or
+ devices instead of SIC.
+ (bfin_model_hw_tree_init): Drop old sim_hw_parse call for bfin_sic.
+ Only parse reg/type when the device has an address. Move the call
+ to dv_bfin_hw_port_parse up before slash check.
+
+
+ * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Move above the
+ BFIN_SIC_TO_CEC_PORTS definition.
+ (SIC_PORTS): New define.
+ (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
+ bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
+ bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
+ Delete old layouts.
+ (bfin_sic1_ports, bfin_sic2_ports, bfin_sic3_ports,
+ bfin_sic_561_ports): Define new layouts with SIC_PORTS().
+ (bfin_sic_finish): Change reference to bfin_sic_50x_ports,
+ bfin_sic_51x_ports, bfin_sic_52x_ports, and bfin_sic_538_ports
+ to bfin_sic2_ports. Change reference to bfin_sic_533_ports,
+ bfin_sic_537_ports, and bfin_sic_59x_ports to bfin_sic1_ports.
+ Change reference to bfin_sic_54x_ports to bfin_sic3_ports.
+ * machs.c (bfin_port_layout): New structure.
+ (bfin_model_data): Add new "port" and "port_count" members.
+ (PORT, SIC): New defines.
+ (bf000_port, bf50x_port, bf51x_port, bf52x_port, bf533_port,
+ bf537_port, bf538_port, bf54x_port, bf561_port, bf592_port):
+ Move and redefine port layout from dv-bfin_sic.c to here.
+ (bf504_port, bf506_port, bf512_port, bf514_port, bf516_port,
+ bf518_port, bf522_port, bf523_port, bf524_port, bf525_port,
+ bf526_port, bf527_port, bf531_port, bf532_port, bf534_port,
+ bf536_port, bf539_port, bf542_port, bf544_port, bf547_port,
+ bf548_port, bf549_port): New defines.
+ (bfin_model_data): Link in new bfin_port_layout.port member.
+ (dv_bfin_hw_port_parse): New function.
+ (dv_bfin_hw_parse): Call new dv_bfin_hw_port_parse function.
+ (bfin_model_hw_tree_init): Replace calls to sim_hw_parse for
+ bfin_sic links with new dv_bfin_hw_port_parse function.
+
+
+ * dv-bfin_dma.c (bfin_dma_io_write_buffer): Fix indentation.
+
+
+ * sim-main.h (TRACE_SYSCALL): Change EVENTS to SYSCALL.
+
+
+ * dv-bfin_cec.h (BFIN_COREMMR_CEC_{BASE,SIZE}): Move to ...
+ * dv-bfin_ctimer.h (BFIN_COREMMR_CTIMER_{BASE,SIZE}): Move to ...
+ * dv-bfin_dma.h (BFIN_MMR_DMA_SIZE): Move to ...
+ * dv-bfin_dmac.h (BFIN_MMR_DMAC{0,1}_BASE): Move to ...
+ * dv-bfin_ebiu_amc.h (BF{IN,50X,54X}_MMR_EBIU_AMC_SIZE): Move to ...
+ * dv-bfin_ebiu_ddrc.h (BFIN_MMR_EBIU_DDRC_SIZE): Move to ...
+ * dv-bfin_ebiu_sdc.h (BFIN_MMR_EBIU_SDC_SIZE): Move to ...
+ * dv-bfin_emac.h (BFIN_MMR_EMAC_{BASE,SIZE}): Move to ...
+ * dv-bfin_eppi.h (BFIN_MMR_EPPI_SIZE): Move to ...
+ * dv-bfin_evt.h (BFIN_COREMMR_EVT_{BASE,SIZE}): Move to ...
+ * dv-bfin_gpio.h (BFIN_MMR_GPIO_SIZE): Move to ...
+ * dv-bfin_gptimer.h (BFIN_MMR_GPTIMER_SIZE): Move to ...
+ * dv-bfin_jtag.h (BFIN_COREMMR_JTAG_{BASE,SIZE}): Move to ...
+ * dv-bfin_mmu.h (BFIN_COREMMR_MMU_{BASE,SIZE}): Move to ...
+ * dv-bfin_nfc.h (BFIN_MMR_NFC_SIZE): Move to ...
+ * dv-bfin_otp.h (BFIN_MMR_OTP_SIZE): Move to ...
+ * dv-bfin_pfmon.h (BFIN_COREMMR_PFMON_{BASE,SIZE}): Move to ...
+ * dv-bfin_pll.h (BFIN_MMR_PLL_{BASE,SIZE}): Move to ...
+ * dv-bfin_ppi.h (BFIN_MMR_PPI_SIZE): Move to ...
+ * dv-bfin_rtc.h (BFIN_MMR_RTC_SIZE): Move to ...
+ * dv-bfin_sic.h (BFIN_MMR_SIC_{BASE,SIZE}): Move to ...
+ * dv-bfin_spi.h (BFIN_MMR_SPI_SIZE): Move to ...
+ * dv-bfin_trace.h (BFIN_COREMMR_TRACE_{BASE,SIZE}): Move to ...
+ * dv-bfin_twi.h (BFIN_MMR_TWI_SIZE): Move to ...
+ * dv-bfin_uart.h (BFIN_MMR_UART_SIZE): Move to ...
+ * dv-bfin_uart2.h (BFIN_MMR_UART2_SIZE): Move to ...
+ * dv-bfin_wdog.h (BFIN_MMR_WDOG_SIZE): Move to ...
+ * dv-bfin_wp.h (BFIN_COREMMR_WP_{BASE,SIZE}): Move to ...
+ * machs.h: ... here.
+ * machs.c: Delete all dv-bfin_*.h includes except for cec/dmac.
+
+
+ * Makefile.in (dv-bfin_pfmon.o): New target.
+ * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pfmon.
+ * configure: Regenerated.
+ * dv-bfin_pfmon.c, dv-bfin_pfmon.h: New files.
+ * machs.c: Add include new bfin_pfmon.h.
+ (bfin_core_dev): Add pfmon.
+
+
+ * machs.c (bf526_roms): Add a region with rev of 2.
+ (bf54x_roms): Add regions with rev of 4.
+ * bfroms/all.h: Include new bf526-0.2.h, bf54x-0.4.h, and
+ bf54x_l1-0.4.h headers.
+ * bfroms/bf526-0.2.h, bfroms/bf54x-0.4.h, bfroms/bf54x_l1-0.4.h:
+ New header files.
+
+
+ * bfin-sim.c (decode_PushPopReg_0): Delete (grp == 1 && reg == 6)
+ check for SP reg.
+
+
+ * dv-bfin_uart.c (bfin_uart_write_byte): Add a mcr arg. Declare a
+ local uart. When LOOP_ENA is set in mcr, write to the saved byte
+ and count fields of the uart.
+ (bfin_uart_io_write_buffer): Pass uart->mcr to bfin_uart_write_byte
+ and bfin_uart_get_next_byte.
+ (bfin_uart_get_next_byte): Add a mcr arg. Move uart->saved_count
+ check first, and skip the remaining code when LOOP_ENA is set in mcr.
+ * dv-bfin_uart.h (bfin_uart_write_byte): Add an mcr argument.
+ (bfin_uart_get_next_byte): Likewise.
+ (XOFF, MRTS, RFIT, RFRT, LOOP_ENA, FCPOL, ARTS, ACTS): Define.
+ * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Padd uart->mcr when
+ calling bfin_uart_write_byte and bfin_uart_get_next_byte.
+
+
+ * dv-bfin_uart2.c (bfin_uart_io_read_buffer): Clear DR/THRE/TEMT bits
+ from uart->lsr before setting them.
+
+
+ * dv-bfin_dmac.c (bfin_dmac): Constify pmap array.
+ (bfin_dmac_50x_pmap, bfin_dmac_51x_pmap, bfin_dmac_52x_pmap,
+ bfin_dmac_533_pmap, bfin_dmac_537_pmap, bfin_dmac0_538_pmap,
+ bfin_dmac1_538_pmap, bfin_dmac0_54x_pmap, bfin_dmac1_54x_pmap,
+ bfin_dmac0_561_pmap, bfin_dmac1_561_pmap, bfin_dmac_59x_pmap):
+ Likewise.
+
+
+ * dv-bfin_gpio.c (bfin_gpio_forward_ouput): New function.
+ (bfin_gpio_io_write_buffer): Store the current port state into
+ "data", and call bfin_gpio_forward_ouput when the data or dir
+ MMRs are updated.
+ (bfin_gpio_ports): Change p0..p15 to bidirect_port.
+
+
+ * dv-bfin_gpio.c (bfin_gpio): Add "int_state" member.
+ (bfin_gpio_forward_int, bfin_gpio_forward_ints): New functions.
+ (bfin_gpio_io_write_buffer): Call bfin_gpio_forward_int when the
+ mask a or mask b MMRs are written.
+ (bfin_gpio_port_event): When handling edge gpios, set the bit in
+ int_state, call bfin_gpio_forward_ints, and then clear the bit.
+ When handling level gpios, clear/set the bit in int_state rather
+ than returning immediately. Call bfin_gpio_forward_ints instead
+ of checking mask[ab] and calling HW_TRACE/hw_port_event directly.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Call STORE instead of SET_DREG for
+ BYTEOP2P, BYTEOP3P, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK, and
+ BYTEUNPACK.
+ (decode_dsp32shift_0): Call STORE instead of SET_DREG for PACK,
+ BITMUX, EXTRACT, DEPOSIT, ALIGN8, ALIGN16, and ALIGN24.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Set DIS_ALGN_EXPT when handling
+ BYTEOP2P, BYTEOP3P, SAA, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK,
+ and BYTEUNPACK insns.
+
+
+ * dv-bfin_sic.c (bfin_sic_port_event): New helper function.
+ (bfin_sic_52x_port_event, bfin_sic_537_port_event,
+ bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
+ in the trace output, and call the new bfin_sic_port_event func.
+
+
+ * dv-bfin_gpio.c (bfin_gpio_ports): Add p15.
+
+
+ * dv-bfin_otp.c (bfin_otp_ports): Declare.
+ (bfin_otp_finish): Call set_hw_ports with bfin_otp_ports.
+
+
+ * configure: Regenerate after common/aclocal.m4 changes.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Cast high 16bits of A0.W to bs16
+ and add to casted low 16bits of A0.L and store in val0. Cast high
+ 16bits of A1.W to bs16 and add to casted low 16bits of A1.L and
+ store in val1. Delete bit checks of val0 and val1.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Set result to 0x7FFFFFFF when
+ the result was 0x80000000 for RND12 subtraction.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
+
+
+ * dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every
+ major code flow point.
+ * dv-bfin_sic.c (bfin_sic_forward_interrupts): Call HW_TRACE just
+ before calling hw_port_event on ourselves.
+ (bfin_sic_52x_port_event, bfin_sic_537_port_event,
+ bfin_sic_54x_port_event, bfin_sic_561_port_event): Call HW_TRACE
+ at the start of the function.
+
+
+ * dv-bfin_gpio.c (bfin_gpio_port_event): Split dir/inen bit checking.
+ Normalize "level" to 0/1 values. Shift "level" over by "my_port".
+ Invert port->both bit check.
+
+
+ * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Subtract 2 from the
+ valuep pointer for clear MMRs, 4 for set MMRs, and 6 for toggle MMRs.
+
+
+ * TODO: Document some known SIC issues.
+
+
+ * devices.h (dv_w1c): Fix typos in documentation of "bits" arg.
+ * dv-bfin_cec.c (bfin_cec_io_write_buffer): Pass 0xffee to dv_w1c_4.
+ * dv-bfin_emac.c (bfin_emac_io_write_buffer): Pass 0xe1 to dv_w1c_4
+ for systat MMR and -1 to dv_w1c_4 for [rt]x_stky/mmc_[rt]irqs MMRs.
+ * dv-bfin_eppi.c (bfin_eppi_io_write_buffer): Pass 0x1ff to dv_w1c_2.
+ * dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4.
+ * dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2.
+ * dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2.
+
+
+ * dv-bfin_uart.h (TFI, BI, FE, PE, OE): Define.
+
+
+ * dv-bfin_twi.h (LOSTARB): Rename from LOSTARG.
+
+
+ * bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended
+ value for the VIT_MAX insn, and mask off the result when done.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false,
+ and set A0 to a0_lo when up_lo is false.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
+ saturate_s40, and use the v parameter to update the AV bit. Set the
+ AC bit only when the final result is 0.
+
+
+ * dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Define.
+ (bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
+ bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
+ bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
+ Encode ids with the ENC macro.
+ (bfin_sic_52x_port_event, bfin_sic_537_port_event,
+ bfin_sic_54x_port_event, bfin_sic_561_port_event): Set idx
+ from my_port with DEC_SIC, and set bit from my_port with DEC_PIN.
+ (bfin_sic_533_port_event): Delete.
+ (bfin_sic_finish): Call set_hw_port_event with
+ bfin_sic_537_port_event for BF533 and BF59x targets.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Drop the src0/src1 check for
+ BYTEOP1P, BYTEOP2P, and BYTEOP3P insns.
+
+
+ * machs.c (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev,
+ bf533_dev, bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev):
+ Change bfin_gpio addresses from f/g/h to 5/6/7.
+ (bfin_model_hw_tree_init): Add the bfin_gpio address base to 'a'.
+
+
+ * configure.ac (AC_CHECK_FUNCS): Check for kill and pread.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * interp.c (bfin_syscall): Check for HAVE_{KILL,PREAD} before using
+ kill or pread.
+
+
+ * Makefile.in (dv-bfin_gpio.o): New target.
+ * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio.
+ * configure: Regenerate.
+ * dv-bfin_gpio.c, dv-bfin_gpio.h: New files.
+ * machs.c: Include dv-bfin_gpio.h.
+ (bf50x_mem, bf51x_mem, bf52x_mem, bf531_mem, bf532_mem, bf533_mem,
+ bf534_mem, bf536_mem, bf537_mem, bf538_mem, bf561_mem, bf592_mem):
+ Delete GPIO memory stubs.
+ (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev, bf533_dev,
+ bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev): Add GPIO
+ peripheral devices.
+ (bfin_model_hw_tree_init): Hook up GPIO interrupts to SIC.
+
+
+ * bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h, bfroms/bf51x-0.1.h,
+ bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h, bfroms/bf526-0.1.h,
+ bfroms/bf527-0.0.h, bfroms/bf527-0.1.h, bfroms/bf527-0.2.h,
+ bfroms/bf533-0.1.h, bfroms/bf533-0.2.h, bfroms/bf533-0.3.h,
+ bfroms/bf537-0.0.h, bfroms/bf537-0.1.h, bfroms/bf537-0.3.h,
+ bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h, bfroms/bf54x-0.1.h,
+ bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h, bfroms/bf54x_l1-0.1.h,
+ bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h, bfroms/bf59x-0.0.h,
+ bfroms/bf59x_l1-0.1.h, dv-bfin_cec.c, dv-bfin_ctimer.c,
+ dv-bfin_dma.c, dv-bfin_dmac.c, dv-bfin_ebiu_amc.c,
+ dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_sdc.c, dv-bfin_emac.c,
+ dv-bfin_eppi.c, dv-bfin_evt.c, dv-bfin_gptimer.c, dv-bfin_jtag.c,
+ dv-bfin_mmu.c, dv-bfin_nfc.c, dv-bfin_otp.c, dv-bfin_pll.c,
+ dv-bfin_ppi.c, dv-bfin_rtc.c, dv-bfin_sic.c, dv-bfin_spi.c,
+ dv-bfin_trace.c, dv-bfin_twi.c, dv-bfin_uart.c, dv-bfin_uart2.c,
+ dv-bfin_wdog.c, dv-bfin_wp.c, dv-eth_phy.c, gui.c,
+ linux-fixed-code.h, linux-targ-map.h, machs.c, Makefile.in: Fix style.
+
+
+ * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds
+ and subs.
+
+
+ * bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check.
+
* bfin-sim.c (decode_macfunc): New neg parameter. Set when the
projects / binutils.git / blobdiff