+
+ * MAINTAINERS: Add rl78 to target ISA section.
+ * Makefile.in (ALL_TARGET_OBS): Add rl78-tdep.o.
+ (ALLDEPFILES): Add rl78-tdep.c.
+ * NEWS: Mention rl78 as a new target.
+
+
+ * frame.c (find_frame_sal): Initialize sal->pspace field from frame
+ data.
+ * stack.c (set_last_displayed_sal): Validate that PSPACE is not NULL.
+
+
+ PR gdb/12659:
+ * infcmd.c (registers_info): Print just the current register's
+ name.
+
+
+ * python/py-symbol.c (sympy_value): Use _().
+
+
+ * remote.c (remote_detach_1, extended_remote_attach_1): Tweak
+ output to be like native targets'.
+ (remote_pid_to_str): Special case the null ptid.
+
+
+ * NEWS: Mention enable count command.
+ * breakpoint.h (struct breakpoint): New field enable_count.
+ * breakpoint.c (enable_breakpoint_disp): Add count argument.
+ (enable_breakpoint): Add arg to call.
+ (struct disp_data): New struct.
+ (do_enable_breakpoint_disp): Interp arg as disp_data and unpack.
+ (do_map_enable_once_breakpoint): Create a struct and pass it.
+ (do_map_enable_delete_breakpoint): Ditto.
+ (do_map_enable_count_breakpoint): New function.
+ (enable_count_command): New function.
+ (bpstat_stop_status): Decrement enable_count.
+ (print_one_breakpoint_location): Report enable count.
+ (_initialize_breakpoint): Add enable count command.
+
+
+ * rl78-tdep.c (reggroups.h): Include.
+ (RL78_RAW_BANK0_R0_REGNUM, RL78_RAW_BANK0_R1_REGNUM)
+ (RL78_RAW_BANK0_R2_REGNUM, RL78_RAW_BANK0_R3_REGNUM)
+ (RL78_RAW_BANK0_R4_REGNUM, RL78_RAW_BANK0_R5_REGNUM)
+ (RL78_RAW_BANK0_R6_REGNUM, RL78_RAW_BANK0_R7_REGNUM)
+ (RL78_RAW_BANK1_R0_REGNUM, RL78_RAW_BANK1_R1_REGNUM)
+ (RL78_RAW_BANK1_R2_REGNUM, RL78_RAW_BANK1_R3_REGNUM)
+ (RL78_RAW_BANK1_R4_REGNUM, RL78_RAW_BANK1_R5_REGNUM)
+ (RL78_RAW_BANK1_R6_REGNUM, RL78_RAW_BANK1_R7_REGNUM)
+ (RL78_RAW_BANK2_R0_REGNUM, RL78_RAW_BANK2_R1_REGNUM)
+ (RL78_RAW_BANK2_R2_REGNUM, RL78_RAW_BANK2_R3_REGNUM)
+ (RL78_RAW_BANK2_R4_REGNUM, RL78_RAW_BANK2_R5_REGNUM)
+ (RL78_RAW_BANK2_R6_REGNUM, RL78_RAW_BANK2_R7_REGNUM)
+ (RL78_RAW_BANK3_R0_REGNUM, RL78_RAW_BANK3_R1_REGNUM)
+ (RL78_RAW_BANK3_R2_REGNUM, RL78_RAW_BANK3_R3_REGNUM)
+ (RL78_RAW_BANK3_R4_REGNUM, RL78_RAW_BANK3_R5_REGNUM)
+ (RL78_RAW_BANK3_R6_REGNUM, RL78_RAW_BANK3_R7_REGNUM): Add to
+ beginning of register list.
+ (RL78_BANK0_R0_REGNUM, RL78_BANK0_R1_REGNUM, RL78_BANK0_R2_REGNUM)
+ (RL78_BANK0_R3_REGNUM, RL78_BANK0_R4_REGNUM, RL78_BANK0_R5_REGNUM)
+ (RL78_BANK0_R6_REGNUM, RL78_BANK0_R7_REGNUM, RL78_BANK1_R0_REGNUM)
+ (RL78_BANK1_R1_REGNUM, RL78_BANK1_R2_REGNUM, RL78_BANK1_R3_REGNUM)
+ (RL78_BANK1_R4_REGNUM, RL78_BANK1_R5_REGNUM, RL78_BANK1_R6_REGNUM)
+ (RL78_BANK1_R7_REGNUM, RL78_BANK2_R0_REGNUM, RL78_BANK2_R1_REGNUM)
+ (RL78_BANK2_R2_REGNUM, RL78_BANK2_R3_REGNUM, RL78_BANK2_R4_REGNUM)
+ (RL78_BANK2_R5_REGNUM, RL78_BANK2_R6_REGNUM, RL78_BANK2_R7_REGNUM)
+ (RL78_BANK3_R0_REGNUM, RL78_BANK3_R1_REGNUM, RL78_BANK3_R2_REGNUM)
+ (RL78_BANK3_R3_REGNUM, RL78_BANK3_R4_REGNUM, RL78_BANK3_R5_REGNUM)
+ (RL78_BANK3_R6_REGNUM, RL78_BANK3_R7_REGNUM): Move these into
+ the pseudo registers. Rearrange other pseudo registers too so
+ that the bank registers appear at the end.
+ (rl78_register_type): Account for the fact that the byte sized
+ bank registers are now pseudo-registers.
+ (rl78_register_name): Rearrange the register name array. Make
+ initial set of raw banked registers inaccessible.
+ (rl78_register_reggroup_p, rl78_register_sim_regno): New functions.
+ (rl78_pseudo_register_read, rl78_pseudo_register_write): Add
+ case for copying bytes back and forth between raw and pseudo
+ versions of the banked registers. Update other cases to reflect
+ the changed names.
+ (rl78_return_value): Update to account for changed names of
+ raw registers.
+ (rl78_gdbarch_init): Register rl78_register_reggroup_p() and
+ rl78_register_sim_regno().
+
+
+ * rl78-tdep.c (rl78_skip_prologue): Make `const' the type of
+ the name parameter being passed to find_pc_partial_function().
+
* MAINTAINERS: Step down from being ia64 target maintainer.