/* BFD support for handling relocation entries.
- Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 97, 98, 1999
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2000, 2001
Free Software Foundation, Inc.
Written by Cygnus Support.
BFD maintains relocations in much the same way it maintains
symbols: they are left alone until required, then read in
- en-mass and translated into an internal form. A common
+ en-masse and translated into an internal form. A common
routine <<bfd_perform_relocation>> acts upon the
canonical form to do the fixup.
to the relocation offset. Its interpretation is dependent upon
the howto. For example, on the 68k the code:
-
| char foo[];
| main()
| {
| unlk fp
| rts
-
This could create a reloc pointing to <<foo>>, but leave the
offset in the data, something like:
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000006 32 _foo
|0000000c 4e5e ; unlk fp
|0000000e 4e75 ; rts
-
Using coff and an 88k, some instructions don't have enough
space in them to represent the full address range, and
pointers have to be loaded in two parts. So you'd get something like:
-
| or.u r13,r0,hi16(_foo+0x12345678)
| ld.b r2,r13,lo16(_foo+0x12345678)
| jmp r1
-
This should create two relocs, both pointing to <<_foo>>, and with
0x12340000 in their addend field. The data would consist of:
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000002 HVRT16 _foo+0x12340000
|00000004 1c4d5678 ; ld.b r2,r13,0x5678
|00000008 f400c001 ; jmp r1
-
The relocation routine digs out the value from the data, adds
it to the addend to get the original offset, and then adds the
value of <<_foo>>. Note that all 32 bits have to be kept around
Both relocs contain a pointer to <<foo>>, and the offsets
contain junk.
-
|RELOCATION RECORDS FOR [.text]:
|offset type value
|00000004 HI22 _foo+0x12345678
|0000000c 81c7e008 ; ret
|00000010 81e80000 ; restore
-
o <<howto>>
The <<howto>> field can be imagined as a
. {* The textual name of the relocation type. *}
. char *name;
.
-. {* When performing a partial link, some formats must modify the
-. relocations rather than the data - this flag signals this.*}
+. {* Some formats record a relocation addend in the section contents
+. rather than with the relocation. For ELF formats this is the
+. distinction between USE_REL and USE_RELA (though the code checks
+. for USE_REL == 1/0). The value of this field is TRUE if the
+. addend is recorded with the section contents; when performing a
+. partial link (ld -r) the section contents (the data) will be
+. modified. The value of this field is FALSE if addends are
+. recorded with the relocation (in arelent.addend); when performing
+. a partial link the relocation will be modified.
+. All relocations for all ELF USE_RELA targets should set this field
+. to FALSE (values of TRUE should be looked on with suspicion).
+. However, the converse is not true: not all relocations of all ELF
+. USE_REL targets set this field to TRUE. Why this is so is peculiar
+. to each particular target. For relocs that aren't used in partial
+. links (e.g. GOT stuff) it doesn't matter what this is set to. *}
. boolean partial_inplace;
.
. {* The src_mask selects which parts of the read in data
. are to be used in the relocation sum. E.g., if this was an 8 bit
-. bit of data which we read and relocated, this would be
+. byte of data which we read and relocated, this would be
. 0x000000ff. When we have relocs which have an addend, such as
. sun4 extended relocs, the value in the offset part of a
. relocating field is garbage so we never use it. In this case
DESCRIPTION
The HOWTO define is horrible and will go away.
-
.#define HOWTO(C, R,S,B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
. {(unsigned)C,R,S,B, P, BI, O,SF,NAME,INPLACE,MASKSRC,MASKDST,PC}
And will be replaced with the totally magic way. But for the
moment, we are compatible, so do it this way.
-
.#define NEWHOWTO( FUNCTION, NAME,SIZE,REL,IN) HOWTO(0,0,SIZE,0,REL,0,complain_overflow_dont,FUNCTION, NAME,false,0,0,IN)
.
case complain_overflow_bitfield:
/* Bitfields are sometimes signed, sometimes unsigned. We
- overflow if the value has some, but not all, bits set outside
- the field, or if it has any bits set outside the field but
- the sign bit is not set. */
+ explicitly allow an address wrap too, which means a bitfield
+ of n bits is allowed to store -2**n to 2**n-1. Thus overflow
+ if the value has some, but not all, bits set outside the
+ field. */
a >>= rightshift;
- if ((a & ~ fieldmask) != 0)
- {
- signmask = (fieldmask >> 1) + 1;
- ss = (signmask << rightshift) - 1;
- if ((ss | relocation) != ~ (bfd_vma) 0)
- flag = bfd_reloc_overflow;
- }
+ ss = a & ~ fieldmask;
+ if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
+ flag = bfd_reloc_overflow;
break;
default:
*/
-
bfd_reloc_status_type
bfd_perform_relocation (abfd, reloc_entry, data, input_section, output_bfd,
error_message)
else
relocation = symbol->value;
-
reloc_target_output_section = symbol->section->output_section;
/* Convert input-section-relative symbol value to absolute. */
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
- && strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
- && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
R result
Do this:
- i i i i i o o o o o from bfd_get<size>
- and S S S S S to get the size offset we want
- + r r r r r r r r r r to get the final value to place
+ (( i i i i i o o o o o from bfd_get<size>
+ and S S S S S) to get the size offset we want
+ + r r r r r r r r r r) to get the final value to place
and D D D D D to chop to right size
-----------------------
- A A A A A
+ = A A A A A
And this:
- ... i i i i i o o o o o from bfd_get<size>
- and N N N N N get instruction
+ ( i i i i i o o o o o from bfd_get<size>
+ and N N N N N ) get instruction
-----------------------
- ... B B B B B
+ = B B B B B
And then:
- B B B B B
- or A A A A A
+ ( B B B B B
+ or A A A A A)
-----------------------
- R R R R R R R R R R put into bfd_put<size>
+ = R R R R R R R R R R put into bfd_put<size>
*/
#define DOIT(x) \
*/
-
bfd_reloc_status_type
bfd_install_relocation (abfd, reloc_entry, data_start, data_start_offset,
input_section, error_message)
if (howto->special_function)
{
bfd_reloc_status_type cont;
-
+
/* XXX - The special_function calls haven't been fixed up to deal
with creating new relocations and section contents. */
cont = howto->special_function (abfd, reloc_entry, symbol,
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
- && strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
- && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
R result
Do this:
- i i i i i o o o o o from bfd_get<size>
- and S S S S S to get the size offset we want
- + r r r r r r r r r r to get the final value to place
+ (( i i i i i o o o o o from bfd_get<size>
+ and S S S S S) to get the size offset we want
+ + r r r r r r r r r r) to get the final value to place
and D D D D D to chop to right size
-----------------------
- A A A A A
+ = A A A A A
And this:
- ... i i i i i o o o o o from bfd_get<size>
- and N N N N N get instruction
+ ( i i i i i o o o o o from bfd_get<size>
+ and N N N N N ) get instruction
-----------------------
- ... B B B B B
+ = B B B B B
And then:
- B B B B B
- or A A A A A
+ ( B B B B B
+ or A A A A A)
-----------------------
- R R R R R R R R R R put into bfd_put<size>
+ = R R R R R R R R R R put into bfd_put<size>
*/
#define DOIT(x) \
{
int size;
bfd_vma x = 0;
- boolean overflow;
+ bfd_reloc_status_type flag;
unsigned int rightshift = howto->rightshift;
unsigned int bitpos = howto->bitpos;
which we don't check for. We must either check at every single
operation, which would be tedious, or we must do the computations
in a type larger than bfd_vma, which would be inefficient. */
- overflow = false;
+ flag = bfd_reloc_ok;
if (howto->complain_on_overflow != complain_overflow_dont)
{
bfd_vma addrmask, fieldmask, signmask, ss;
signmask = ~ (fieldmask >> 1);
ss = a & signmask;
if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
- overflow = true;
+ flag = bfd_reloc_overflow;
/* We only need this next bit of code if the sign bit of B
is below the sign bit of A. This would only happen if
trouble; we would need to verify that B is in range, as
we do for A above. */
signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
- if ((b & signmask) != 0)
- {
- /* Set all the bits above the sign bit. */
- b -= signmask <<= 1;
- }
+
+ /* Set all the bits above the sign bit. */
+ b = (b ^ signmask) - signmask;
b = (b & addrmask) >> bitpos;
*/
signmask = (fieldmask >> 1) + 1;
if (((~ (a ^ b)) & (a ^ sum)) & signmask)
- overflow = true;
+ flag = bfd_reloc_overflow;
break;
b = (b & addrmask) >> bitpos;
sum = (a + b) & addrmask;
if ((a | b | sum) & ~ fieldmask)
- overflow = true;
+ flag = bfd_reloc_overflow;
break;
case complain_overflow_bitfield:
- /* Much like unsigned, except no trimming with addrmask. In
- addition, the sum overflows if there is a carry out of
- the bfd_vma, i.e., the sum is less than either input
- operand. */
+ /* Much like the signed check, but for a field one bit
+ wider, and no trimming inputs with addrmask. We allow a
+ bitfield to represent numbers in the range -2**n to
+ 2**n-1, where n is the number of bits in the field.
+ Note that when bfd_vma is 32 bits, a 32-bit reloc can't
+ overflow, which is exactly what we want. */
a >>= rightshift;
- b >>= bitpos;
- /* Bitfields are sometimes used for signed numbers; for
- example, a 13-bit field sometimes represents values in
- 0..8191 and sometimes represents values in -4096..4095.
- If the field is signed and a is -4095 (0x1001) and b is
- -1 (0x1fff), the sum is -4096 (0x1000), but (0x1001 +
- 0x1fff is 0x3000). It's not clear how to handle this
- everywhere, since there is not way to know how many bits
- are significant in the relocation, but the original code
- assumed that it was fully sign extended, and we will keep
- that assumption. */
- signmask = (fieldmask >> 1) + 1;
-
- if ((a & ~ fieldmask) != 0)
- {
- /* Some bits out of the field are set. This might not
- be a problem: if this is a signed bitfield, it is OK
- iff all the high bits are set, including the sign
- bit. We'll try setting all but the most significant
- bit in the original relocation value: if this is all
- ones, we are OK, assuming a signed bitfield. */
- ss = (signmask << rightshift) - 1;
- if ((ss | relocation) != ~ (bfd_vma) 0)
- overflow = true;
- a &= fieldmask;
- }
+ signmask = ~ fieldmask;
+ ss = a & signmask;
+ if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
+ flag = bfd_reloc_overflow;
- /* We just assume (b & ~ fieldmask) == 0. */
+ signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
+ b = (b ^ signmask) - signmask;
- /* We explicitly permit wrap around if this relocation
- covers the high bit of an address. The Linux kernel
- relies on it, and it is the only way to write assembler
- code which can run when loaded at a location 0x80000000
- away from the location at which it is linked. */
- if (howto->bitsize + rightshift
- == bfd_arch_bits_per_address (input_bfd))
- break;
+ b >>= bitpos;
sum = a + b;
- if (sum < a || (sum & ~ fieldmask) != 0)
- {
- /* There was a carry out, or the field overflow. Test
- for signed operands again. Here is the overflow test
- is as for complain_overflow_signed. */
- if (((~ (a ^ b)) & (a ^ sum)) & signmask)
- overflow = true;
- }
+
+ /* We mask with addrmask here to explicitly allow an address
+ wrap-around. The Linux kernel relies on it, and it is
+ the only way to write assembler code which can run when
+ loaded at a location 0x80000000 away from the location at
+ which it is linked. */
+ signmask = fieldmask + 1;
+ if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
+ flag = bfd_reloc_overflow;
break;
break;
}
- return overflow ? bfd_reloc_overflow : bfd_reloc_ok;
+ return flag;
}
/*
handled specially, because the value the register will have is
decided relatively late.
-
ENUM
BFD_RELOC_I960_CALLJ
ENUMDOC
BFD_RELOC_SPARC_JMP_SLOT
ENUMX
BFD_RELOC_SPARC_RELATIVE
+ENUMX
+ BFD_RELOC_SPARC_UA16
ENUMX
BFD_RELOC_SPARC_UA32
+ENUMX
+ BFD_RELOC_SPARC_UA64
ENUMDOC
SPARC ELF relocations. There is probably some overlap with other
relocation types already defined.
BFD_RELOC_MIPS_GOT_OFST
ENUMX
BFD_RELOC_MIPS_GOT_DISP
+ENUMX
+ BFD_RELOC_MIPS_SHIFT5
+ENUMX
+ BFD_RELOC_MIPS_SHIFT6
+ENUMX
+ BFD_RELOC_MIPS_INSERT_A
+ENUMX
+ BFD_RELOC_MIPS_INSERT_B
+ENUMX
+ BFD_RELOC_MIPS_DELETE
+ENUMX
+ BFD_RELOC_MIPS_HIGHEST
+ENUMX
+ BFD_RELOC_MIPS_HIGHER
+ENUMX
+ BFD_RELOC_MIPS_SCN_DISP
+ENUMX
+ BFD_RELOC_MIPS_REL16
+ENUMX
+ BFD_RELOC_MIPS_RELGOT
+ENUMX
+ BFD_RELOC_MIPS_JALR
COMMENT
ENUMDOC
MIPS ELF relocations.
ENUMDOC
i386/elf relocations
+ENUM
+ BFD_RELOC_X86_64_GOT32
+ENUMX
+ BFD_RELOC_X86_64_PLT32
+ENUMX
+ BFD_RELOC_X86_64_COPY
+ENUMX
+ BFD_RELOC_X86_64_GLOB_DAT
+ENUMX
+ BFD_RELOC_X86_64_JUMP_SLOT
+ENUMX
+ BFD_RELOC_X86_64_RELATIVE
+ENUMX
+ BFD_RELOC_X86_64_GOTPCREL
+ENUMX
+ BFD_RELOC_X86_64_32S
+ENUMDOC
+ x86-64/elf relocations
+
ENUM
BFD_RELOC_NS32K_IMM_8
ENUMX
ENUMDOC
ns32k relocations
+ENUM
+ BFD_RELOC_PDP11_DISP_8_PCREL
+ENUMX
+ BFD_RELOC_PDP11_DISP_6_PCREL
+ENUMDOC
+ PDP11 relocations
+
ENUM
BFD_RELOC_PJ_CODE_HI16
ENUMX
BFD_RELOC_PJ_CODE_REL32
ENUMDOC
Picojava relocs. Not all of these appear in object files.
-
+
ENUM
BFD_RELOC_PPC_B26
ENUMX
ENUMDOC
Power(rs6000) and PowerPC relocations.
+ENUM
+ BFD_RELOC_I370_D12
+ENUMDOC
+ IBM 370/390 relocations
+
ENUM
BFD_RELOC_CTOR
ENUMDOC
ENUMDOC
ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
not stored in the instruction.
+ENUM
+ BFD_RELOC_ARM_PCREL_BLX
+ENUMDOC
+ ARM 26 bit pc-relative branch. The lowest bit must be zero and is
+ not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+ field in the instruction.
+ENUM
+ BFD_RELOC_THUMB_PCREL_BLX
+ENUMDOC
+ Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
+ not stored in the instruction. The 2nd lowest bit comes from a 1 bit
+ field in the instruction.
ENUM
BFD_RELOC_ARM_IMMEDIATE
ENUMX
BFD_RELOC_SH_DATA
ENUMX
BFD_RELOC_SH_LABEL
+ENUMX
+ BFD_RELOC_SH_LOOP_START
+ENUMX
+ BFD_RELOC_SH_LOOP_END
+ENUMX
+ BFD_RELOC_SH_COPY
+ENUMX
+ BFD_RELOC_SH_GLOB_DAT
+ENUMX
+ BFD_RELOC_SH_JMP_SLOT
+ENUMX
+ BFD_RELOC_SH_RELATIVE
+ENUMX
+ BFD_RELOC_SH_GOTPC
ENUMDOC
Hitachi SH relocs. Not all of these appear in object files.
ENUM
BFD_RELOC_ARC_B22_PCREL
ENUMDOC
- Argonaut RISC Core (ARC) relocs.
+ ARC Cores relocs.
ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
not stored in the instruction. The high 20 bits are installed in bits 26
through 7 of the instruction.
ENUM
BFD_RELOC_D30V_9_PCREL
ENUMDOC
- This is a 6-bit pc-relative reloc with
- the right 3 bits assumed to be 0.
+ This is a 6-bit pc-relative reloc with
+ the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_9_PCREL_R
ENUMDOC
- This is a 6-bit pc-relative reloc with
+ This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
- of the container.
+ of the container.
ENUM
BFD_RELOC_D30V_15
ENUMDOC
- This is a 12-bit absolute reloc with the
- right 3 bitsassumed to be 0.
+ This is a 12-bit absolute reloc with the
+ right 3 bitsassumed to be 0.
ENUM
BFD_RELOC_D30V_15_PCREL
ENUMDOC
- This is a 12-bit pc-relative reloc with
- the right 3 bits assumed to be 0.
+ This is a 12-bit pc-relative reloc with
+ the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_15_PCREL_R
ENUMDOC
- This is a 12-bit pc-relative reloc with
+ This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
- of the container.
+ of the container.
ENUM
BFD_RELOC_D30V_21
ENUMDOC
- This is an 18-bit absolute reloc with
+ This is an 18-bit absolute reloc with
the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_21_PCREL
ENUMDOC
- This is an 18-bit pc-relative reloc with
+ This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0.
ENUM
BFD_RELOC_D30V_21_PCREL_R
ENUMDOC
- This is an 18-bit pc-relative reloc with
+ This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side
of the container.
significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode.
+ENUM
+ BFD_RELOC_TIC54X_PARTLS7
+ENUMDOC
+ This is a 7bit reloc for the tms320c54x, where the least
+ significant 7 bits of a 16 bit word are placed into the least
+ significant 7 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_PARTMS9
+ENUMDOC
+ This is a 9bit DP reloc for the tms320c54x, where the most
+ significant 9 bits of a 16 bit word are placed into the least
+ significant 9 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_23
+ENUMDOC
+ This is an extended address 23-bit reloc for the tms320c54x.
+
+ENUM
+ BFD_RELOC_TIC54X_16_OF_23
+ENUMDOC
+ This is a 16-bit reloc for the tms320c54x, where the least
+ significant 16 bits of a 23-bit extended address are placed into
+ the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_MS7_OF_23
+ENUMDOC
+ This is a reloc for the tms320c54x, where the most
+ significant 7 bits of a 23-bit extended address are placed into
+ the opcode.
+
ENUM
BFD_RELOC_FR30_48
ENUMDOC
ENUMDOC
This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
short offset into 11 bits.
-
+
ENUM
BFD_RELOC_MCORE_PCREL_IMM8BY4
ENUMX
BFD_RELOC_MCORE_RVA
ENUMDOC
Motorola Mcore relocations.
-
+
+ENUM
+ BFD_RELOC_AVR_7_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit pc relative
+ short offset into 7 bits.
+ENUM
+ BFD_RELOC_AVR_13_PCREL
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 13 bit pc relative
+ short offset into 12 bits.
+ENUM
+ BFD_RELOC_AVR_16_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 17 bit value (usually
+ program memory address) into 16 bits.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+ data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+ of data memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+ of program memory address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (usually data memory address) into 8 bit immediate value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 8 bit of data memory address) into 8 bit immediate value of
+ SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (most high 8 bit of program memory address) into 8 bit immediate value
+ of LDI or SUBI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+ command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
+ of command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_PM
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
+ of command address) into 8 bit immediate value of LDI insn.
+ENUM
+ BFD_RELOC_AVR_LO8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (usually command address) into 8 bit immediate value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HI8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 8 bit of 16 bit command address) into 8 bit immediate value
+ of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_HH8_LDI_PM_NEG
+ENUMDOC
+ This is a 16 bit reloc for the AVR that stores negated 8 bit value
+ (high 6 bit of 22 bit command address) into 8 bit immediate
+ value of SUBI insn.
+ENUM
+ BFD_RELOC_AVR_CALL
+ENUMDOC
+ This is a 32 bit reloc for the AVR that stores 23 bit value
+ into 22 bits.
+
+ENUM
+ BFD_RELOC_390_12
+ENUMDOC
+ Direct 12 bit.
+ENUM
+ BFD_RELOC_390_GOT12
+ENUMDOC
+ 12 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT32
+ENUMDOC
+ 32 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_COPY
+ENUMDOC
+ Copy symbol at runtime.
+ENUM
+ BFD_RELOC_390_GLOB_DAT
+ENUMDOC
+ Create GOT entry.
+ENUM
+ BFD_RELOC_390_JMP_SLOT
+ENUMDOC
+ Create PLT entry.
+ENUM
+ BFD_RELOC_390_RELATIVE
+ENUMDOC
+ Adjust by program base.
+ENUM
+ BFD_RELOC_390_GOTPC
+ENUMDOC
+ 32 bit PC relative offset to GOT.
+ENUM
+ BFD_RELOC_390_GOT16
+ENUMDOC
+ 16 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PC16DBL
+ENUMDOC
+ PC relative 16 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT16DBL
+ENUMDOC
+ 16 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_PC32DBL
+ENUMDOC
+ PC relative 32 bit shifted by 1.
+ENUM
+ BFD_RELOC_390_PLT32DBL
+ENUMDOC
+ 32 bit PC rel. PLT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOTPCDBL
+ENUMDOC
+ 32 bit PC rel. GOT shifted by 1.
+ENUM
+ BFD_RELOC_390_GOT64
+ENUMDOC
+ 64 bit GOT offset.
+ENUM
+ BFD_RELOC_390_PLT64
+ENUMDOC
+ 64 bit PC relative PLT address.
+ENUM
+ BFD_RELOC_390_GOTENT
+ENUMDOC
+ 32 bit rel. offset to GOT entry.
+
ENUM
BFD_RELOC_VTABLE_INHERIT
ENUMX
BFD_RELOC_VTABLE_ENTRY
ENUMDOC
- These two relocations are used by the linker to determine which of
+ These two relocations are used by the linker to determine which of
the entries in a C++ virtual function table are actually used. When
the --gc-sections option is given, the linker will zero out the entries
that are not used, so that the code for those functions need not be
VTABLE_ENTRY is a zero-space relocation that describes the use of a
virtual function table entry. The reloc's symbol should refer to the
table of the class mentioned in the code. Off of that base, an offset
- describes the entry that is being used. For Rela hosts, this offset
+ describes the entry that is being used. For Rela hosts, this offset
is stored in the reloc's addend. For Rel hosts, we are forced to put
this offset in the reloc's section offset.
+ENUM
+ BFD_RELOC_IA64_IMM14
+ENUMX
+ BFD_RELOC_IA64_IMM22
+ENUMX
+ BFD_RELOC_IA64_IMM64
+ENUMX
+ BFD_RELOC_IA64_DIR32MSB
+ENUMX
+ BFD_RELOC_IA64_DIR32LSB
+ENUMX
+ BFD_RELOC_IA64_DIR64MSB
+ENUMX
+ BFD_RELOC_IA64_DIR64LSB
+ENUMX
+ BFD_RELOC_IA64_GPREL22
+ENUMX
+ BFD_RELOC_IA64_GPREL64I
+ENUMX
+ BFD_RELOC_IA64_GPREL32MSB
+ENUMX
+ BFD_RELOC_IA64_GPREL32LSB
+ENUMX
+ BFD_RELOC_IA64_GPREL64MSB
+ENUMX
+ BFD_RELOC_IA64_GPREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF22
+ENUMX
+ BFD_RELOC_IA64_LTOFF64I
+ENUMX
+ BFD_RELOC_IA64_PLTOFF22
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64I
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64MSB
+ENUMX
+ BFD_RELOC_IA64_PLTOFF64LSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64I
+ENUMX
+ BFD_RELOC_IA64_FPTR32MSB
+ENUMX
+ BFD_RELOC_IA64_FPTR32LSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64MSB
+ENUMX
+ BFD_RELOC_IA64_FPTR64LSB
+ENUMX
+ BFD_RELOC_IA64_PCREL21B
+ENUMX
+ BFD_RELOC_IA64_PCREL21BI
+ENUMX
+ BFD_RELOC_IA64_PCREL21M
+ENUMX
+ BFD_RELOC_IA64_PCREL21F
+ENUMX
+ BFD_RELOC_IA64_PCREL22
+ENUMX
+ BFD_RELOC_IA64_PCREL60B
+ENUMX
+ BFD_RELOC_IA64_PCREL64I
+ENUMX
+ BFD_RELOC_IA64_PCREL32MSB
+ENUMX
+ BFD_RELOC_IA64_PCREL32LSB
+ENUMX
+ BFD_RELOC_IA64_PCREL64MSB
+ENUMX
+ BFD_RELOC_IA64_PCREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR22
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64I
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64MSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_FPTR64LSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL32MSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL32LSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL64MSB
+ENUMX
+ BFD_RELOC_IA64_SEGREL64LSB
+ENUMX
+ BFD_RELOC_IA64_SECREL32MSB
+ENUMX
+ BFD_RELOC_IA64_SECREL32LSB
+ENUMX
+ BFD_RELOC_IA64_SECREL64MSB
+ENUMX
+ BFD_RELOC_IA64_SECREL64LSB
+ENUMX
+ BFD_RELOC_IA64_REL32MSB
+ENUMX
+ BFD_RELOC_IA64_REL32LSB
+ENUMX
+ BFD_RELOC_IA64_REL64MSB
+ENUMX
+ BFD_RELOC_IA64_REL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTV32MSB
+ENUMX
+ BFD_RELOC_IA64_LTV32LSB
+ENUMX
+ BFD_RELOC_IA64_LTV64MSB
+ENUMX
+ BFD_RELOC_IA64_LTV64LSB
+ENUMX
+ BFD_RELOC_IA64_IPLTMSB
+ENUMX
+ BFD_RELOC_IA64_IPLTLSB
+ENUMX
+ BFD_RELOC_IA64_COPY
+ENUMX
+ BFD_RELOC_IA64_TPREL22
+ENUMX
+ BFD_RELOC_IA64_TPREL64MSB
+ENUMX
+ BFD_RELOC_IA64_TPREL64LSB
+ENUMX
+ BFD_RELOC_IA64_LTOFF_TP22
+ENUMX
+ BFD_RELOC_IA64_LTOFF22X
+ENUMX
+ BFD_RELOC_IA64_LDXMOV
+ENUMDOC
+ Intel IA64 Relocations.
+
+ENUM
+ BFD_RELOC_M68HC11_HI8
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 8 bits high part of an absolute address.
+ENUM
+ BFD_RELOC_M68HC11_LO8
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 8 bits low part of an absolute address.
+ENUM
+ BFD_RELOC_M68HC11_3B
+ENUMDOC
+ Motorola 68HC11 reloc.
+ This is the 3 bits of a value.
+
+ENUM
+ BFD_RELOC_CRIS_BDISP8
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_5
+ENUMX
+ BFD_RELOC_CRIS_SIGNED_6
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_6
+ENUMX
+ BFD_RELOC_CRIS_UNSIGNED_4
+ENUMDOC
+ These relocs are only used within the CRIS assembler. They are not
+ (at present) written to any object files.
+ENUM
+ BFD_RELOC_CRIS_COPY
+ENUMX
+ BFD_RELOC_CRIS_GLOB_DAT
+ENUMX
+ BFD_RELOC_CRIS_JUMP_SLOT
+ENUMX
+ BFD_RELOC_CRIS_RELATIVE
+ENUMDOC
+ Relocs used in ELF shared libraries for CRIS.
+ENUM
+ BFD_RELOC_CRIS_32_GOT
+ENUMDOC
+ 32-bit offset to symbol-entry within GOT.
+ENUM
+ BFD_RELOC_CRIS_16_GOT
+ENUMDOC
+ 16-bit offset to symbol-entry within GOT.
+ENUM
+ BFD_RELOC_CRIS_32_GOTPLT
+ENUMDOC
+ 32-bit offset to symbol-entry within GOT, with PLT handling.
+ENUM
+ BFD_RELOC_CRIS_16_GOTPLT
+ENUMDOC
+ 16-bit offset to symbol-entry within GOT, with PLT handling.
+ENUM
+ BFD_RELOC_CRIS_32_GOTREL
+ENUMDOC
+ 32-bit offset to symbol, relative to GOT.
+ENUM
+ BFD_RELOC_CRIS_32_PLT_GOTREL
+ENUMDOC
+ 32-bit offset to symbol with PLT entry, relative to GOT.
+ENUM
+ BFD_RELOC_CRIS_32_PLT_PCREL
+ENUMDOC
+ 32-bit offset to symbol with PLT entry, relative to this relocation.
+
+ENUM
+ BFD_RELOC_860_COPY
+ENUMX
+ BFD_RELOC_860_GLOB_DAT
+ENUMX
+ BFD_RELOC_860_JUMP_SLOT
+ENUMX
+ BFD_RELOC_860_RELATIVE
+ENUMX
+ BFD_RELOC_860_PC26
+ENUMX
+ BFD_RELOC_860_PLT26
+ENUMX
+ BFD_RELOC_860_PC16
+ENUMX
+ BFD_RELOC_860_LOW0
+ENUMX
+ BFD_RELOC_860_SPLIT0
+ENUMX
+ BFD_RELOC_860_LOW1
+ENUMX
+ BFD_RELOC_860_SPLIT1
+ENUMX
+ BFD_RELOC_860_LOW2
+ENUMX
+ BFD_RELOC_860_SPLIT2
+ENUMX
+ BFD_RELOC_860_LOW3
+ENUMX
+ BFD_RELOC_860_LOGOT0
+ENUMX
+ BFD_RELOC_860_SPGOT0
+ENUMX
+ BFD_RELOC_860_LOGOT1
+ENUMX
+ BFD_RELOC_860_SPGOT1
+ENUMX
+ BFD_RELOC_860_LOGOTOFF0
+ENUMX
+ BFD_RELOC_860_SPGOTOFF0
+ENUMX
+ BFD_RELOC_860_LOGOTOFF1
+ENUMX
+ BFD_RELOC_860_SPGOTOFF1
+ENUMX
+ BFD_RELOC_860_LOGOTOFF2
+ENUMX
+ BFD_RELOC_860_LOGOTOFF3
+ENUMX
+ BFD_RELOC_860_LOPC
+ENUMX
+ BFD_RELOC_860_HIGHADJ
+ENUMX
+ BFD_RELOC_860_HAGOT
+ENUMX
+ BFD_RELOC_860_HAGOTOFF
+ENUMX
+ BFD_RELOC_860_HAPC
+ENUMX
+ BFD_RELOC_860_HIGH
+ENUMX
+ BFD_RELOC_860_HIGOT
+ENUMX
+ BFD_RELOC_860_HIGOTOFF
+ENUMDOC
+ Intel i860 Relocations.
+
+ENUM
+ BFD_RELOC_OPENRISC_ABS_26
+ENUMX
+ BFD_RELOC_OPENRISC_REL_26
+ENUMDOC
+ OpenRISC Relocations.
+
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT
.typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
*/
-
/*
FUNCTION
bfd_reloc_type_lookup
*/
-
reloc_howto_type *
bfd_reloc_type_lookup (abfd, code)
bfd *abfd;
static reloc_howto_type bfd_howto_32 =
HOWTO (0, 00, 2, 32, false, 0, complain_overflow_bitfield, 0, "VRT32", false, 0xffffffff, 0xffffffff, true);
-
/*
INTERNAL_FUNCTION
bfd_default_reloc_type_lookup
DESCRIPTION
Provides a default relocation lookup routine for any architecture.
-
*/
reloc_howto_type *
return true;
}
+/*
+INTERNAL_FUNCTION
+ bfd_generic_merge_sections
+
+SYNOPSIS
+ boolean bfd_generic_merge_sections
+ (bfd *, struct bfd_link_info *);
+
+DESCRIPTION
+ Provides default handling for SEC_MERGE section merging for back ends
+ which don't have SEC_MERGE support -- i.e., does nothing.
+*/
+
+/*ARGSUSED*/
+boolean
+bfd_generic_merge_sections (abfd, link_info)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
+{
+ return true;
+}
+
/*
INTERNAL_FUNCTION
bfd_generic_get_relocated_section_contents
case bfd_reloc_undefined:
if (!((*link_info->callbacks->undefined_symbol)
(link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- input_bfd, input_section, (*parent)->address)))
+ input_bfd, input_section, (*parent)->address,
+ true)))
goto error_return;
break;
case bfd_reloc_dangerous:
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