Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "defs.h"
-#include "tm.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "target.h"
#include "gdbcore.h"
+#include "gdbcmd.h"
#include "symfile.h"
#include "objfiles.h"
#include "xcoffsolib.h"
-extern struct obstack frame_cache_obstack;
-
extern int errno;
-/* Nonzero if we just simulated a single step break. */
-int one_stepped;
-
/* Breakpoint shadows for the single step instructions will be kept here. */
static struct sstep_breaks {
static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
CORE_ADDR safety));
-static void frame_get_cache_fsr PARAMS ((struct frame_info *fi,
- struct rs6000_framedata *fdatap));
+static void frame_get_saved_regs PARAMS ((struct frame_info *fi,
+ struct rs6000_framedata *fdatap));
static void pop_dummy_frame PARAMS ((void));
+static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *));
+
+CORE_ADDR
+rs6000_skip_prologue (pc)
+ CORE_ADDR pc;
+{
+ struct rs6000_framedata frame;
+ pc = skip_prologue (pc, &frame);
+ return pc;
+}
+
+
+/* Fill in fi->saved_regs */
+
+struct frame_extra_info
+{
+ /* Functions calling alloca() change the value of the stack
+ pointer. We need to use initial stack pointer (which is saved in
+ r31 by gcc) in such cases. If a compiler emits traceback table,
+ then we should use the alloca register specified in traceback
+ table. FIXME. */
+ CORE_ADDR initial_sp; /* initial stack pointer. */
+};
+
+void
+rs6000_init_extra_frame_info (fromleaf, fi)
+ int fromleaf;
+ struct frame_info *fi;
+{
+ fi->extra_info = (struct frame_extra_info*)
+ frame_obstack_alloc (sizeof (struct frame_extra_info));
+ fi->extra_info->initial_sp = 0;
+ if (fi->next != (CORE_ADDR) 0
+ && fi->pc < TEXT_SEGMENT_BASE)
+ /* We're in get_prev_frame */
+ /* and this is a special signal frame. */
+ /* (fi->pc will be some low address in the kernel, */
+ /* to which the signal handler returns). */
+ fi->signal_handler_caller = 1;
+}
+
+
+void
+rs6000_frame_init_saved_regs (fi)
+ struct frame_info *fi;
+{
+ frame_get_saved_regs (fi, NULL);
+}
+
+CORE_ADDR
+rs6000_frame_args_address (fi)
+ struct frame_info *fi;
+{
+ if (fi->extra_info->initial_sp != 0)
+ return fi->extra_info->initial_sp;
+ else
+ return frame_initial_stack_address (fi);
+}
+
+
/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
static CORE_ADDR
}
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
+#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
+
+unsigned char *
+rs6000_breakpoint_from_pc (bp_addr, bp_size)
+ CORE_ADDR *bp_addr;
+ int *bp_size;
+{
+ static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
+ static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
+ *bp_size = 4;
+ if (TARGET_BYTE_ORDER == BIG_ENDIAN)
+ return big_breakpoint;
+ else
+ return little_breakpoint;
+}
+
/* AIX does not support PT_STEP. Simulate it. */
void
-single_step (signal)
- enum target_signal signal;
+rs6000_software_single_step (signal, insert_breakpoints_p)
+ unsigned int signal;
+ int insert_breakpoints_p;
{
#define INSNLEN(OPCODE) 4
CORE_ADDR breaks[2];
int opcode;
- if (!one_stepped) {
+ if (insert_breakpoints_p) {
+
loc = read_pc ();
insn = read_memory_integer (loc, 4);
stepBreaks[ii].address = breaks[ii];
}
- one_stepped = 1;
} else {
/* remove step breakpoints. */
write_memory
(stepBreaks[ii].address, stepBreaks[ii].data, 4);
- one_stepped = 0;
}
errno = 0; /* FIXME, don't ignore errors! */
/* What errors? {read,write}_memory call error(). */
/* return pc value after skipping a function prologue and also return
information about a function frame.
- in struct rs6000_frameinfo fdata:
+ in struct rs6000_framedata fdata:
- frameless is TRUE, if function does not have a frame.
- nosavedpc is TRUE, if function does not save %pc value in its frame.
- - offset is the number of bytes used in the frame to save registers.
+ - offset is the initial size of this stack frame --- the amount by
+ which we decrement the sp to allocate the frame.
- saved_gpr is the number of the first saved gpr.
- saved_fpr is the number of the first saved fpr.
- alloca_reg is the number of the register used for alloca() handling.
Otherwise -1.
- - gpr_offset is the offset of the saved gprs
- - fpr_offset is the offset of the saved fprs
+ - gpr_offset is the offset of the first saved gpr from the previous frame.
+ - fpr_offset is the offset of the first saved fpr from the previous frame.
- lr_offset is the offset of the saved lr
- cr_offset is the offset of the saved cr
- */
+*/
#define SIGNED_SHORT(x) \
((sizeof (short) == 2) \
pc = read_register(PC_REGNUM);
store_address (pc_targ, 4, pc);
- skip_prologue (get_pc_function_start (pc) + FUNCTION_START_OFFSET, &fdata);
+ skip_prologue (get_pc_function_start (pc), &fdata);
dummy_frame_addr [dummy_frame_count++] = sp;
/* so far, 32*2 + 32 words = 384 bytes have been written.
7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
- for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
+ for (ii=1; ii <= (LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii) {
write_memory (sp-384-(ii*4),
®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
}
}
/* restore the rest of the registers. */
- for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
+ for (ii=1; ii <=(LAST_UISA_SP_REGNUM-FIRST_UISA_SP_REGNUM+1); ++ii)
read_memory (sp-384-(ii*4),
®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
if (stop_stack_dummy)
{
-#ifdef USE_GENERIC_DUMMY_FRAMES
- generic_pop_dummy_frame ();
- flush_cached_frames ();
- return;
-#else
- if (dummy_frame_count)
- pop_dummy_frame ();
- return;
-#endif
+ if (USE_GENERIC_DUMMY_FRAMES)
+ {
+ generic_pop_dummy_frame ();
+ flush_cached_frames ();
+ return;
+ }
+ else
+ {
+ if (dummy_frame_count)
+ pop_dummy_frame ();
+ return;
+ }
}
/* Make sure that all registers are valid. */
still in the link register, otherwise walk the frames and retrieve the
saved %pc value in the previous frame. */
- addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
+ addr = get_pc_function_start (frame->pc);
(void) skip_prologue (addr, &fdata);
if (fdata.frameless)
write_register (PC_REGNUM, lr);
/* reset register values if any was saved earlier. */
- addr = prev_sp - fdata.offset;
if (fdata.saved_gpr != -1)
- for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
- read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4);
- addr += 4;
+ {
+ addr = prev_sp + fdata.gpr_offset;
+ for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
+ read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4);
+ addr += 4;
+ }
}
if (fdata.saved_fpr != -1)
- for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
- read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
- addr += 8;
- }
+ {
+ addr = prev_sp + fdata.fpr_offset;
+ for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
+ read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
+ addr += 8;
+ }
+ }
write_register (SP_REGNUM, prev_sp);
target_store_registers (-1);
CORE_ADDR saved_sp;
-#ifndef USE_GENERIC_DUMMY_FRAMES
- if ( dummy_frame_count <= 0)
- printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
-#endif /* GENERIC_DUMMY_FRAMES */
+ if (!USE_GENERIC_DUMMY_FRAMES)
+ {
+ if (dummy_frame_count <= 0)
+ printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
+ }
/* The first eight words of ther arguments are passed in registers. Copy
them appropriately.
ran_out_of_registers_for_arguments:
-#ifdef USE_GENERIC_DUMMY_FRAMES
- saved_sp = read_sp ();
-#else
- /* location for 8 parameters are always reserved. */
- sp -= 4 * 8;
+ if (USE_GENERIC_DUMMY_FRAMES)
+ {
+ saved_sp = read_sp ();
+ }
+ else
+ {
+ /* location for 8 parameters are always reserved. */
+ sp -= 4 * 8;
+
+ /* another six words for back chain, TOC register, link register, etc. */
+ sp -= 24;
+ }
- /* another six words for back chain, TOC register, link register, etc. */
- sp -= 24;
-#endif /* GENERIC_DUMMY_FRAMES */
/* if there are more arguments, allocate space for them in
the stack, then push them starting from the ninth one. */
/* Secure stack areas first, before doing anything else. */
write_register (SP_REGNUM, sp);
-#ifndef USE_GENERIC_DUMMY_FRAMES
-/* we want to copy 24 bytes of target's frame to dummy's frame,
- then set back chain to point to new frame. */
-
- saved_sp = dummy_frame_addr [dummy_frame_count - 1];
- read_memory (saved_sp, tmp_buffer, 24);
- write_memory (sp, tmp_buffer, 24);
-#endif /* GENERIC_DUMMY_FRAMES */
+ if (!USE_GENERIC_DUMMY_FRAMES)
+ {
+ /* we want to copy 24 bytes of target's frame to dummy's frame,
+ then set back chain to point to new frame. */
+
+ saved_sp = dummy_frame_addr [dummy_frame_count - 1];
+ read_memory (saved_sp, tmp_buffer, 24);
+ write_memory (sp, tmp_buffer, 24);
+ }
/* set back chain properly */
store_address (tmp_buffer, 4, saved_sp);
return 0;
}
- func_start += FUNCTION_START_OFFSET;
(void) skip_prologue (func_start, &fdata);
return fdata.frameless;
}
if (fi->signal_handler_caller)
return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
-#ifdef USE_GENERIC_DUMMY_FRAMES
- if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
- return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM);
-#endif /* GENERIC_DUMMY_FRAMES */
+ if (USE_GENERIC_DUMMY_FRAMES)
+ {
+ if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
+ return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM);
+ }
- func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
+ func_start = get_pc_function_start (fi->pc);
/* If we failed to find the start of the function, it is a mistake
to inspect the instructions. */
in which case the framedata are read. */
static void
-frame_get_cache_fsr (fi, fdatap)
+frame_get_saved_regs (fi, fdatap)
struct frame_info *fi;
struct rs6000_framedata *fdatap;
{
CORE_ADDR frame_addr;
struct rs6000_framedata work_fdata;
- if (fi->cache_fsr)
+ if (fi->saved_regs)
return;
- if (fdatap == NULL) {
- fdatap = &work_fdata;
- (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
- }
+ if (fdatap == NULL)
+ {
+ fdatap = &work_fdata;
+ (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
+ }
- fi->cache_fsr = (struct frame_saved_regs *)
- obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
- memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
+ frame_saved_regs_zalloc (fi);
- if (fi->prev && fi->prev->frame)
+ /* If there were any saved registers, figure out parent's stack
+ pointer. */
+ /* The following is true only if the frame doesn't have a call to
+ alloca(), FIXME. */
+
+ if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
+ && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
+ frame_addr = 0;
+ else if (fi->prev && fi->prev->frame)
frame_addr = fi->prev->frame;
else
frame_addr = read_memory_integer (fi->frame, 4);
/* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
All fpr's from saved_fpr to fp31 are saved. */
- if (fdatap->saved_fpr >= 0) {
- int fpr_offset = frame_addr + fdatap->fpr_offset;
- for (ii = fdatap->saved_fpr; ii < 32; ii++) {
- fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset;
- fpr_offset += 8;
+ if (fdatap->saved_fpr >= 0)
+ {
+ int i;
+ int fpr_offset = frame_addr + fdatap->fpr_offset;
+ for (i = fdatap->saved_fpr; i < 32; i++)
+ {
+ fi->saved_regs [FP0_REGNUM + i] = fpr_offset;
+ fpr_offset += 8;
+ }
}
- }
/* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
All gpr's from saved_gpr to gpr31 are saved. */
-
- if (fdatap->saved_gpr >= 0) {
- int gpr_offset = frame_addr + fdatap->gpr_offset;
- for (ii = fdatap->saved_gpr; ii < 32; ii++) {
- fi->cache_fsr->regs [ii] = gpr_offset;
- gpr_offset += 4;
+
+ if (fdatap->saved_gpr >= 0)
+ {
+ int i;
+ int gpr_offset = frame_addr + fdatap->gpr_offset;
+ for (i = fdatap->saved_gpr; i < 32; i++)
+ {
+ fi->saved_regs [i] = gpr_offset;
+ gpr_offset += 4;
+ }
}
- }
/* If != 0, fdatap->cr_offset is the offset from the frame that holds
the CR. */
if (fdatap->cr_offset != 0)
- fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
+ fi->saved_regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
/* If != 0, fdatap->lr_offset is the offset from the frame that holds
the LR. */
if (fdatap->lr_offset != 0)
- fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
+ fi->saved_regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
}
/* Return the address of a frame. This is the inital %sp value when the frame
was first allocated. For functions calling alloca(), it might be saved in
an alloca register. */
-CORE_ADDR
+static CORE_ADDR
frame_initial_stack_address (fi)
struct frame_info *fi;
{
/* if the initial stack pointer (frame address) of this frame is known,
just return it. */
- if (fi->initial_sp)
- return fi->initial_sp;
+ if (fi->extra_info->initial_sp)
+ return fi->extra_info->initial_sp;
/* find out if this function is using an alloca register.. */
/* if saved registers of this frame are not known yet, read and cache them. */
- if (!fi->cache_fsr)
- frame_get_cache_fsr (fi, &fdata);
+ if (!fi->saved_regs)
+ frame_get_saved_regs (fi, &fdata);
/* If no alloca register used, then fi->frame is the value of the %sp for
this frame, and it is good enough. */
- if (fdata.alloca_reg < 0) {
- fi->initial_sp = fi->frame;
- return fi->initial_sp;
- }
+ if (fdata.alloca_reg < 0)
+ {
+ fi->extra_info->initial_sp = fi->frame;
+ return fi->extra_info->initial_sp;
+ }
/* This function has an alloca register. If this is the top-most frame
(with the lowest address), the value in alloca register is good. */
if (!fi->next)
- return fi->initial_sp = read_register (fdata.alloca_reg);
+ return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
/* Otherwise, this is a caller frame. Callee has usually already saved
registers, but there are exceptions (such as when the callee
for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
- if (!callee_fi->cache_fsr)
- frame_get_cache_fsr (callee_fi, NULL);
+ if (!callee_fi->saved_regs)
+ frame_get_saved_regs (callee_fi, NULL);
/* this is the address in which alloca register is saved. */
- tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
+ tmpaddr = callee_fi->saved_regs [fdata.alloca_reg];
if (tmpaddr) {
- fi->initial_sp = read_memory_integer (tmpaddr, 4);
- return fi->initial_sp;
+ fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4);
+ return fi->extra_info->initial_sp;
}
/* Go look into deeper levels of the frame chain to see if any one of
/* If alloca register was not saved, by the callee (or any of its callees)
then the value in the register is still good. */
- return fi->initial_sp = read_register (fdata.alloca_reg);
+ fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
+ return fi->extra_info->initial_sp;
}
CORE_ADDR
{
CORE_ADDR fp;
-#ifdef USE_GENERIC_DUMMY_FRAMES
- if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
- return thisframe->frame; /* dummy frame same as caller's frame */
-#endif /* GENERIC_DUMMY_FRAMES */
+ if (USE_GENERIC_DUMMY_FRAMES)
+ {
+ if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
+ return thisframe->frame; /* dummy frame same as caller's frame */
+ }
if (inside_entry_file (thisframe->pc) ||
thisframe->pc == entry_point_address ())
else
fp = read_memory_integer ((thisframe)->frame, 4);
-#ifdef USE_GENERIC_DUMMY_FRAMES
- {
- CORE_ADDR fpp, lr;
+ if (USE_GENERIC_DUMMY_FRAMES)
+ {
+ CORE_ADDR fpp, lr;
+
+ lr = read_register (LR_REGNUM);
+ if (lr == entry_point_address ())
+ if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
+ if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
+ return fpp;
+ }
- lr = read_register (LR_REGNUM);
- if (lr == entry_point_address ())
- if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
- if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
- return fpp;
- }
-#endif /* GENERIC_DUMMY_FRAMES */
return fp;
}
\f
}
#endif
-/* Function: get_saved_register
- Just call the generic_get_saved_register function. */
+\f
+/* Handling the various PowerPC/RS6000 variants. */
+
+
+/* The arrays here called register_names_MUMBLE hold names that
+ the rs6000_register_name function returns.
+
+ For each family of PPC variants, I've tried to isolate out the
+ common registers and put them up front, so that as long as you get
+ the general family right, GDB will correctly identify the registers
+ common to that family. The common register sets are:
+
+ For the 60x family: hid0 hid1 iabr dabr pir
+
+ For the 505 and 860 family: eie eid nri
+
+ For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
+ tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
+ pbu1 pbl2 pbu2
+
+ Most of these register groups aren't anything formal. I arrived at
+ them by looking at the registers that occurred in more than one
+ processor. */
+
+/* UISA register names common across all architectures, including POWER. */
+
+#define COMMON_UISA_REG_NAMES \
+ /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+ /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \
+ /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \
+ /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \
+ /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+ /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \
+ /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \
+ /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \
+ /* 64 */ "pc", "ps"
+
+/* UISA-level SPR names for PowerPC. */
+#define PPC_UISA_SPR_NAMES \
+ /* 66 */ "cr", "lr", "ctr", "xer", ""
+
+/* Segment register names, for PowerPC. */
+#define PPC_SEGMENT_REG_NAMES \
+ /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \
+ /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15"
+
+/* OEA SPR names for 32-bit PowerPC implementations.
+ The blank space is for "asr", which is only present on 64-bit
+ implementations. */
+#define PPC_32_OEA_SPR_NAMES \
+ /* 87 */ "pvr", \
+ /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \
+ /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \
+ /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \
+ /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \
+ /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\
+ /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear"
+
+/* For the RS6000, we only cover user-level SPR's. */
+char *register_names_rs6000[] =
+{
+ COMMON_UISA_REG_NAMES,
+ /* 66 */ "cnd", "lr", "cnt", "xer", "mq"
+};
-#ifdef USE_GENERIC_DUMMY_FRAMES
-void
-get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
- char *raw_buffer;
- int *optimized;
- CORE_ADDR *addrp;
- struct frame_info *frame;
- int regnum;
- enum lval_type *lval;
+/* a UISA-only view of the PowerPC. */
+char *register_names_uisa[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES
+};
+
+char *register_names_403[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
+ /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
+ /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2"
+};
+
+char *register_names_403GC[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
+ /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
+ /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2",
+ /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu"
+};
+
+char *register_names_505[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "eie", "eid", "nri"
+};
+
+char *register_names_860[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr",
+ /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph",
+ /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat",
+ /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr",
+ /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid",
+ /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw",
+ /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0",
+ /* 165 */ "md_dbram1"
+};
+
+/* Note that the 601 has different register numbers for reading and
+ writing RTCU and RTCL. However, how one reads and writes a
+ register is the stub's problem. */
+char *register_names_601[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu",
+ /* 126 */ "rtcl"
+};
+
+char *register_names_602[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr",
+ /* 128 */ "ser", "sp", "lt"
+};
+
+char *register_names_603[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1",
+ /* 127 */ "hash2", "imiss", "icmp", "rpa"
+};
+
+char *register_names_604[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2",
+ /* 127 */ "sia", "sda"
+};
+
+char *register_names_750[] =
+{
+ COMMON_UISA_REG_NAMES,
+ PPC_UISA_SPR_NAMES,
+ PPC_SEGMENT_REG_NAMES,
+ PPC_32_OEA_SPR_NAMES,
+ /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2",
+ /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2",
+ /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2",
+ /* 142 */ "thrm3"
+};
+
+
+/* Information about a particular processor variant. */
+struct variant
{
- generic_get_saved_register (raw_buffer, optimized, addrp,
- frame, regnum, lval);
+ /* Name of this variant. */
+ char *name;
+
+ /* English description of the variant. */
+ char *description;
+
+ /* Table of register names; registers[R] is the name of the register
+ number R. */
+ int num_registers;
+ char **registers;
+};
+
+#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
+
+
+/* Information in this table comes from the following web sites:
+ IBM: http://www.chips.ibm.com:80/products/embedded/
+ Motorola: http://www.mot.com/SPS/PowerPC/
+
+ I'm sure I've got some of the variant descriptions not quite right.
+ Please report any inaccuracies you find to GDB's maintainer.
+
+ If you add entries to this table, please be sure to allow the new
+ value as an argument to the --with-cpu flag, in configure.in. */
+
+static struct variant
+variants[] =
+{
+ { "ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code",
+ num_registers (register_names_uisa), register_names_uisa },
+ { "rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view",
+ num_registers (register_names_rs6000), register_names_rs6000 },
+ { "403", "IBM PowerPC 403",
+ num_registers (register_names_403), register_names_403 },
+ { "403GC", "IBM PowerPC 403GC",
+ num_registers (register_names_403GC), register_names_403GC },
+ { "505", "Motorola PowerPC 505",
+ num_registers (register_names_505), register_names_505 },
+ { "860", "Motorola PowerPC 860 or 850",
+ num_registers (register_names_860), register_names_860 },
+ { "601", "Motorola PowerPC 601",
+ num_registers (register_names_601), register_names_601 },
+ { "602", "Motorola PowerPC 602",
+ num_registers (register_names_602), register_names_602 },
+ { "603", "Motorola/IBM PowerPC 603 or 603e",
+ num_registers (register_names_603), register_names_603 },
+ { "604", "Motorola PowerPC 604 or 604e",
+ num_registers (register_names_604), register_names_604 },
+ { "750", "Motorola/IBM PowerPC 750 or 750",
+ num_registers (register_names_750), register_names_750 },
+ { 0, 0, 0, 0 }
+};
+
+
+static struct variant *current_variant;
+
+char *
+rs6000_register_name (int i)
+{
+ if (i < 0 || i >= NUM_REGS)
+ error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number");
+
+ return ((i < current_variant->num_registers)
+ ? current_variant->registers[i]
+ : "");
+}
+
+
+static void
+install_variant (struct variant *v)
+{
+ current_variant = v;
+}
+
+
+/* Look up the variant named NAME in the `variants' table. Return a
+ pointer to the struct variant, or null if we couldn't find it. */
+static struct variant *
+find_variant_by_name (char *name)
+{
+ int i;
+
+ for (i = 0; variants[i].name; i++)
+ if (! strcmp (name, variants[i].name))
+ return &variants[i];
+
+ return 0;
+}
+
+
+/* Install the PPC/RS6000 variant named NAME in the `variants' table.
+ Return zero if we installed it successfully, or a non-zero value if
+ we couldn't do it.
+
+ This might be useful to code outside this file, which doesn't want
+ to depend on the exact indices of the entries in the `variants'
+ table. Just make it non-static if you want that. */
+static int
+install_variant_by_name (char *name)
+{
+ struct variant *v = find_variant_by_name (name);
+
+ if (v)
+ {
+ install_variant (v);
+ return 0;
+ }
+ else
+ return 1;
+}
+
+
+static void
+list_variants ()
+{
+ int i;
+
+ printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n");
+
+ for (i = 0; variants[i].name; i++)
+ printf_filtered (" %-8s %s\n",
+ variants[i].name, variants[i].description);
+}
+
+
+static void
+show_current_variant ()
+{
+ printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n",
+ current_variant->name);
}
-#endif
+static void
+set_processor (char *arg, int from_tty)
+{
+ int i;
+
+ if (! arg || arg[0] == '\0')
+ {
+ list_variants ();
+ return;
+ }
+
+ if (install_variant_by_name (arg))
+ {
+ error_begin ();
+ fprintf_filtered (gdb_stderr,
+ "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg);
+ list_variants ();
+ return_to_top_level (RETURN_ERROR);
+ }
+
+ show_current_variant ();
+}
+
+static void
+show_processor (char *arg, int from_tty)
+{
+ show_current_variant ();
+}
+
+
+\f
+/* Initialization code. */
+
void
_initialize_rs6000_tdep ()
{
#else
tm_print_insn = print_insn_rs6000;
#endif
+
+ /* I don't think we should use the set/show command arrangement
+ here, because the way that's implemented makes it hard to do the
+ error checking we want in a reasonable way. So we just add them
+ as two separate commands. */
+ add_cmd ("processor", class_support, set_processor,
+ "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\
+If you set this, GDB will know about the special-purpose registers that are\n\
+available on the given variant.\n\
+Type `set processor' alone for a list of recognized variant names.",
+ &setlist);
+ add_cmd ("processor", class_support, show_processor,
+ "Show the variant of the PowerPC or RS6000 processor in use.\n\
+Use `set processor' to change this.",
+ &showlist);
+
+ /* Set the current PPC processor variant. */
+ {
+ int status = 1;
+
+#ifdef TARGET_CPU_DEFAULT
+ status = install_variant_by_name (TARGET_CPU_DEFAULT);
+#endif
+
+ if (status)
+ {
+#ifdef GDB_TARGET_POWERPC
+ install_variant_by_name ("ppc-uisa");
+#else
+ install_variant_by_name ("rs6000");
+#endif
+ }
+ }
}
projects / binutils.git / blobdiff