x86: Don't display eiz with no scale

[binutils.git] / opcodes / fr30-dis.c

diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index 6f82bd73379f41f99ea72306c179f0f108b8105d..ed89926cef1dd1aa528b8b5b079b4b880aa4e2f5 100644 (file)
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -1,11 +1,11 @@
+/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
 /* Disassembler interface for targets using CGEN. -*- C -*-
    CGEN: Cpu tools GENerator
 
    THIS FILE IS MACHINE GENERATED WITH CGEN.
    - the resultant file is machine generated, cgen-dis.in isn't
 
-   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
-   2008  Free Software Foundation, Inc.
+   Copyright (C) 1996-2020 Free Software Foundation, Inc.
 
    This file is part of libopcodes.
 
@@ -29,7 +29,7 @@
 #include "sysdep.h"
 #include <stdio.h>
 #include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
 #include "bfd.h"
 #include "symcat.h"
 #include "libiberty.h"
@@ -67,7 +67,7 @@ print_register_list (void * dis_info,
 {
   disassemble_info *info = dis_info;
   int mask;
-  int index = 0;
+  int reg_index = 0;
   char * comma = "";
 
   if (load_store)
@@ -77,11 +77,11 @@ print_register_list (void * dis_info,
 
   if (value & mask)
     {
-      (*info->fprintf_func) (info->stream, "r%li", index + offset);
+      (*info->fprintf_func) (info->stream, "r%li", reg_index + offset);
       comma = ",";
     }
-    
-  for (index = 1; index <= 7; ++index)
+
+  for (reg_index = 1; reg_index <= 7; ++reg_index)
     {
       if (load_store)
        mask >>= 1;
@@ -90,7 +90,7 @@ print_register_list (void * dis_info,
 
       if (value & mask)
        {
-         (*info->fprintf_func) (info->stream, "%sr%li", comma, index + offset);
+         (*info->fprintf_func) (info->stream, "%sr%li", comma, reg_index + offset);
          comma = ",";
        }
     }
@@ -296,13 +296,14 @@ fr30_cgen_print_operand (CGEN_CPU_DESC cd,
 
     default :
       /* xgettext:c-format */
-      fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
-              opindex);
-    abort ();
+      opcodes_error_handler
+       (_("internal error: unrecognized field %d while printing insn"),
+        opindex);
+      abort ();
   }
 }
 
-cgen_print_fn * const fr30_cgen_print_handlers[] = 
+cgen_print_fn * const fr30_cgen_print_handlers[] =
 {
   print_insn_normal,
 };
@@ -330,10 +331,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
-#ifdef CGEN_PRINT_NORMAL
-  CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
-#endif
-
   /* Print the operand as directed by the attributes.  */
   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
     ; /* nothing to do */
@@ -355,10 +352,6 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
-#ifdef CGEN_PRINT_ADDRESS
-  CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
-#endif
-
   /* Print the operand as directed by the attributes.  */
   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
     ; /* Nothing to do.  */
@@ -479,7 +472,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call
@@ -500,7 +493,7 @@ print_insn (CGEN_CPU_DESC cd,
       int length;
       unsigned long insn_value_cropped;
 
-#ifdef CGEN_VALIDATE_INSN_SUPPORTED 
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
       /* Not needed as insn shouldn't be in hash lists if not supported.  */
       /* Supported by this cpu?  */
       if (! fr30_cgen_insn_supported (cd, insn))
@@ -518,7 +511,7 @@ print_insn (CGEN_CPU_DESC cd,
          relevant part from the buffer. */
       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
          (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
-       insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
+       insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
                                           info->endian == BFD_ENDIAN_BIG);
       else
        insn_value_cropped = insn_value;
@@ -610,6 +603,7 @@ typedef struct cpu_desc_list
   CGEN_BITSET *isa;
   int mach;
   int endian;
+  int insn_endian;
   CGEN_CPU_DESC cd;
 } cpu_desc_list;
 
@@ -622,12 +616,16 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
   static CGEN_BITSET *prev_isa;
   static int prev_mach;
   static int prev_endian;
+  static int prev_insn_endian;
   int length;
   CGEN_BITSET *isa;
   int mach;
   int endian = (info->endian == BFD_ENDIAN_BIG
                ? CGEN_ENDIAN_BIG
                : CGEN_ENDIAN_LITTLE);
+  int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
+                     ? CGEN_ENDIAN_BIG
+                     : CGEN_ENDIAN_LITTLE);
   enum bfd_architecture arch;
 
   /* ??? gdb will set mach but leave the architecture as "unknown" */
@@ -637,7 +635,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
   arch = info->arch;
   if (arch == bfd_arch_unknown)
     arch = CGEN_BFD_ARCH;
-   
+
   /* There's no standard way to compute the machine or isa number
      so we leave it to the target.  */
 #ifdef CGEN_COMPUTE_MACH
@@ -657,7 +655,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
   }
 #else
-  isa = info->insn_sets;
+  isa = info->private_data;
 #endif
 
   /* If we've switched cpu's, try to find a handle we've used before */
@@ -678,7 +676,7 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
              break;
            }
        }
-    } 
+    }
 
   /* If we haven't initialized yet, initialize the opcode table.  */
   if (! cd)
@@ -693,9 +691,11 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
       prev_isa = cgen_bitset_copy (isa);
       prev_mach = mach;
       prev_endian = endian;
+      prev_insn_endian = insn_endian;
       cd = fr30_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
                                 CGEN_CPU_OPEN_BFDMACH, mach_name,
                                 CGEN_CPU_OPEN_ENDIAN, prev_endian,
+                                 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
                                 CGEN_CPU_OPEN_END);
       if (!cd)
        abort ();