+
+ * bfdlink.h (struct bfd_link_callbacks): Update comments.
+ Return void from multiple_definition, multiple_common,
+ add_to_set, constructor, warning, undefined_symbol,
+ reloc_overflow, reloc_dangerous and unattached_reloc.
+
+
+ * opcode/metag.h: wrap declarations in extern "C".
+
+
+ * opcode/arc.h (insn_subclass_t): Add COND.
+ (flag_class_t): Add F_CLASS_EXTEND.
+
+
+ * opcode/arc.h (struct arc_opcode): Renamed attribute class to
+ insn_class.
+ (struct arc_flag_class): Renamed attribute class to flag_class.
+
+
+ * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
+ plain symbol.
+
+
+ * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
+ DW_LANG_Rust_old>: New constants.
+
+
+ * elf/mips.h (AFL_ASE_DSPR3): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
+ * opcode/mips.h (ASE_DSPR3): New macro.
+
+
+ * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
+ enumerator.
+ (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
+ (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
+ (ARM_SYM_BRANCH_TYPE): Replace by ...
+ (ARM_GET_SYM_BRANCH_TYPE): This and ...
+ (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
+ BFD_ASSERT is defined or not.
+
+
+ * elf/arm.h (Tag_DSP_extension): Define.
+
+
+ * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
+
+
+ * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
+ (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
+ (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
+ for the high core bits.
+
+
+ * opcode/arc.h (ARC_SYNTAX_1OP): Declare
+ (ARC_SYNTAX_NOP): Likewsie.
+ (ARC_OP1_MUST_BE_IMM): Update defined value.
+ (ARC_OP1_IMM_IMPLIED): Likewise.
+ (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
+
+
+ PR target/19722
+ * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
+
+
+ * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
+ undef. Formatting.
+
+
+ * bfdlink.h: Add prototype for bfd_link_check_relocs.
+
+
+ * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
+
+
+ * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
+
+
+ * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
+
+
+ * opcode/arc.h (insn_class_t): Add NET and ACL class.
+
+
+ * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
+ * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
+
+
+ * opcode/arc.h (flag_class_t): Update.
+ (ARC_OPCODE_NONE): Define.
+ (ARC_OPCODE_ARCALL): Likewise.
+ (ARC_OPCODE_ARCFPX): Likewise.
+ (ARC_REGISTER_READONLY): Likewise.
+ (ARC_REGISTER_WRITEONLY): Likewise.
+ (ARC_REGISTER_NOSHORT_CUT): Likewise.
+ (arc_aux_reg): Add cpu.
+
+
+ * opcode/arc.h (arc_num_opcodes): Remove.
+ (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
+ (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
+ (ARC_SUFFIX_FLAG): Define.
+ (flags_none, flags_f, flags_cc, flags_ccf): Declare.
+ (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
+ (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
+ (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
+ (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
+ (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
+ (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
+ (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
+ (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
+ (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
+
+
+ * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
+ (ARC_FPUDA): Define.
+ (arc_aux_reg): Add new field.
+
+
+ * opcode/arc-func.h (replace_bits24): Changed.
+ (replace_bits24_be): Created.
+
+
+ * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
+ (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
+ (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
+ (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
+ (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
+ (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
+ (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
+ (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
+ (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
+ (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
+ (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
+ (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
+ (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
+ (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
+
+
+ * opcode/i960.h: Add const qualifiers.
+ * opcode/tic4x.h (struct tic4x_inst): Likewise.
+
+
+ * opcodes/arc.h (insn_class_t): Add BITOP type.
+
+
+ * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
+ new classes instead.
+
+
+ * elf/arc.h (E_ARC_MACH_NPS400): Define.
+ * opcode/arc.h (ARC_OPCODE_NPS400): Define.
+
+
+ * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
+
+
+ * elf/arc.h (EF_ARC_MACH): Delete.
+ (EF_ARC_MACH_MSK): Remove out of date comment.
+
+
+ * opcode/arc.h (ARC_OPCODE_BASE): Delete.
+
+
+ PR ld/19807
+ * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
+
+
+ * elf/arc-reloc.def: Add a call to ME within the formula for each
+ relocation that requires middle-endian correction.
+
+
+ * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
+ * opcode/h8300.h (struct h8_opcode): Likewise.
+ * opcode/hppa.h (struct pa_opcode): Likewise.
+ * opcode/msp430.h: Likewise.
+ * opcode/spu.h (struct spu_opcode): Likewise.
+ * opcode/tic30.h (struct _register): Likewise.
+ * opcode/tic4x.h (struct tic4x_register): Likewise.
+ (struct tic4x_cond): Likewise.
+ (struct tic4x_indirect): Likewise.
+ (struct tic4x_inst): Likewise.
+ * opcode/visium.h (struct reg_entry): Likewise.
+
* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
(ARM_CPU_HAS_FEATURE): Add comment.
+
+ * plugin-api.h: Add new hooks to the plugin transfer vector to
+ to support querying section alignment and section size.
+ (ld_plugin_get_input_section_alignment): New hook.
+ (ld_plugin_get_input_section_size): New hook.
+ (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
+ and LDPT_GET_INPUT_SECTION_SIZE.
+ (ld_plugin_tv): Add tv_get_input_section_alignment and
+ tv_get_input_section_size.
+
* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
- * opcode/arc.h (arc_opcode arc_relax_opcodes, arc_num_relax_opcodes):
- Declare.
+ * opcode/arc.h (arc_opcode arc_relax_opcodes)
+ (arc_num_relax_opcodes): Declare.
projects / binutils.git / blobdiff