/* Target-dependent code for GDB, the GNU debugger.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001
+ 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
This file is part of GDB.
#include "objfiles.h"
#include "arch-utils.h"
#include "regcache.h"
+#include "doublest.h"
+#include "value.h"
+#include "parser-defs.h"
-#include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
+#include "libbfd.h" /* for bfd_default_set_arch_mach */
#include "coff/internal.h" /* for libcoff.h */
-#include "bfd/libcoff.h" /* for xcoff_data */
+#include "libcoff.h" /* for xcoff_data */
+#include "coff/xcoff.h"
+#include "libxcoff.h"
#include "elf-bfd.h"
+#include "solib-svr4.h"
#include "ppc-tdep.h"
/* If the kernel has to deliver a signal, it pushes a sigcontext
the frame */
int saved_gpr; /* smallest # of saved gpr */
int saved_fpr; /* smallest # of saved fpr */
+ int saved_vr; /* smallest # of saved vr */
int alloca_reg; /* alloca register number (frame ptr) */
char frameless; /* true if frameless functions. */
char nosavedpc; /* true if pc not saved. */
int gpr_offset; /* offset of saved gprs from prev sp */
int fpr_offset; /* offset of saved fprs from prev sp */
+ int vr_offset; /* offset of saved vrs from prev sp */
int lr_offset; /* offset of saved lr */
int cr_offset; /* offset of saved cr */
+ int vrsave_offset; /* offset of saved vrsave register */
};
/* Description of a single register. */
unsigned char fpr; /* whether register is floating-point */
};
-/* Private data that this module attaches to struct gdbarch. */
-
-struct gdbarch_tdep
- {
- int wordsize; /* size in bytes of fixed-point word */
- int osabi; /* OS / ABI from ELF header */
- int *regoff; /* byte offsets in register arrays */
- const struct reg *regs; /* from current variant */
- };
-
/* Return the current architecture's gdbarch_tdep structure. */
#define TDEP gdbarch_tdep (current_gdbarch)
static CORE_ADDR
rs6000_saved_pc_after_call (struct frame_info *fi)
{
- return read_register (PPC_LR_REGNUM);
+ return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
}
/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
if (ext_op == 16) /* br conditional register */
{
- dest = read_register (PPC_LR_REGNUM) & ~3;
+ dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
/* If we are about to return from a signal handler, dest is
something like 0x3c90. The current frame is a signal handler
else if (ext_op == 528) /* br cond to count reg */
{
- dest = read_register (PPC_CTR_REGNUM) & ~3;
+ dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
/* If we are about to execute a system call, dest is something
like 0x22fc or 0x3b00. Upon completion the system call
will return to the address in the link register. */
if (dest < TEXT_SEGMENT_BASE)
- dest = read_register (PPC_LR_REGNUM) & ~3;
+ dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
}
else
return -1;
#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
-static unsigned char *
+const static unsigned char *
rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
{
static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
*bp_size = 4;
- if (TARGET_BYTE_ORDER == BIG_ENDIAN)
+ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
return big_breakpoint;
else
return little_breakpoint;
rs6000_software_single_step (enum target_signal signal,
int insert_breakpoints_p)
{
-#define INSNLEN(OPCODE) 4
-
- static char le_breakp[] = LITTLE_BREAKPOINT;
- static char be_breakp[] = BIG_BREAKPOINT;
- char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
+ CORE_ADDR dummy;
+ int breakp_sz;
+ const char *breakp = rs6000_breakpoint_from_pc (&dummy, &breakp_sz);
int ii, insn;
CORE_ADDR loc;
CORE_ADDR breaks[2];
insn = read_memory_integer (loc, 4);
- breaks[0] = loc + INSNLEN (insn);
+ breaks[0] = loc + breakp_sz;
opcode = insn >> 26;
breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
/* ignore invalid breakpoint. */
if (breaks[ii] == -1)
continue;
-
- read_memory (breaks[ii], stepBreaks[ii].data, 4);
-
- write_memory (breaks[ii], breakp, 4);
+ target_insert_breakpoint (breaks[ii], stepBreaks[ii].data);
stepBreaks[ii].address = breaks[ii];
}
/* remove step breakpoints. */
for (ii = 0; ii < 2; ++ii)
if (stepBreaks[ii].address != 0)
- write_memory
- (stepBreaks[ii].address, stepBreaks[ii].data, 4);
-
+ target_remove_breakpoint (stepBreaks[ii].address,
+ stepBreaks[ii].data);
}
errno = 0; /* FIXME, don't ignore errors! */
/* What errors? {read,write}_memory call error(). */
which we decrement the sp to allocate the frame.
- saved_gpr is the number of the first saved gpr.
- saved_fpr is the number of the first saved fpr.
+ - saved_vr is the number of the first saved vr.
- alloca_reg is the number of the register used for alloca() handling.
Otherwise -1.
- gpr_offset is the offset of the first saved gpr from the previous frame.
- fpr_offset is the offset of the first saved fpr from the previous frame.
+ - vr_offset is the offset of the first saved vr from the previous frame.
- lr_offset is the offset of the saved lr
- cr_offset is the offset of the saved cr
+ - vrsave_offset is the offset of the saved vrsave register
*/
#define SIGNED_SHORT(x) \
{
CORE_ADDR orig_pc = pc;
CORE_ADDR last_prologue_pc = pc;
+ CORE_ADDR li_found_pc = 0;
char buf[4];
unsigned long op;
long offset = 0;
+ long vr_saved_offset = 0;
int lr_reg = -1;
int cr_reg = -1;
+ int vr_reg = -1;
+ int vrsave_reg = -1;
int reg;
int framep = 0;
int minimal_toc_loaded = 0;
memset (fdata, 0, sizeof (struct rs6000_framedata));
fdata->saved_gpr = -1;
fdata->saved_fpr = -1;
+ fdata->saved_vr = -1;
fdata->alloca_reg = -1;
fdata->frameless = 1;
fdata->nosavedpc = 1;
break;
}
- else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
- in V.4 -mrelocatable */
- op == 0x7fc0f214) && /* add r30,r0,r30, used
- in V.4 -mrelocatable */
- lr_reg == 0x901e0000)
- {
- continue;
-
- }
- else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
- in V.4 -mminimal-toc */
+ else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
+ in V.4 -mminimal-toc */
(op & 0xffff0000) == 0x3bde0000)
{ /* addi 30,30,foo@l */
continue;
to save fprs??? */
fdata->frameless = 0;
- /* Don't skip over the subroutine call if it is not within the first
- three instructions of the prologue. */
+ /* Don't skip over the subroutine call if it is not within
+ the first three instructions of the prologue. */
if ((pc - orig_pc) > 8)
break;
op = read_memory_integer (pc + 4, 4);
- /* At this point, make sure this is not a trampoline function
- (a function that simply calls another functions, and nothing else).
- If the next is not a nop, this branch was part of the function
- prologue. */
+ /* At this point, make sure this is not a trampoline
+ function (a function that simply calls another functions,
+ and nothing else). If the next is not a nop, this branch
+ was part of the function prologue. */
if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
break; /* don't skip over
/* store parameters in stack */
}
- else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
- (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
+ else if ((op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
(op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
(op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
{
framep = 1;
fdata->alloca_reg = (op & ~0x38010000) >> 21;
continue;
-
}
+ /* AltiVec related instructions. */
+ /* Store the vrsave register (spr 256) in another register for
+ later manipulation, or load a register into the vrsave
+ register. 2 instructions are used: mfvrsave and
+ mtvrsave. They are shorthand notation for mfspr Rn, SPR256
+ and mtspr SPR256, Rn. */
+ /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
+ mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
+ else if ((op & 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
+ {
+ vrsave_reg = GET_SRC_REG (op);
+ continue;
+ }
+ else if ((op & 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
+ {
+ continue;
+ }
+ /* Store the register where vrsave was saved to onto the stack:
+ rS is the register where vrsave was stored in a previous
+ instruction. */
+ /* 100100 sssss 00001 dddddddd dddddddd */
+ else if ((op & 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
+ {
+ if (vrsave_reg == GET_SRC_REG (op))
+ {
+ fdata->vrsave_offset = SIGNED_SHORT (op) + offset;
+ vrsave_reg = -1;
+ }
+ continue;
+ }
+ /* Compute the new value of vrsave, by modifying the register
+ where vrsave was saved to. */
+ else if (((op & 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
+ || ((op & 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
+ {
+ continue;
+ }
+ /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
+ in a pair of insns to save the vector registers on the
+ stack. */
+ /* 001110 00000 00000 iiii iiii iiii iiii */
+ else if ((op & 0xffff0000) == 0x38000000) /* li r0, SIMM */
+ {
+ li_found_pc = pc;
+ vr_saved_offset = SIGNED_SHORT (op);
+ }
+ /* Store vector register S at (r31+r0) aligned to 16 bytes. */
+ /* 011111 sssss 11111 00000 00111001110 */
+ else if ((op & 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
+ {
+ if (pc == (li_found_pc + 4))
+ {
+ vr_reg = GET_SRC_REG (op);
+ /* If this is the first vector reg to be saved, or if
+ it has a lower number than others previously seen,
+ reupdate the frame info. */
+ if (fdata->saved_vr == -1 || fdata->saved_vr > vr_reg)
+ {
+ fdata->saved_vr = vr_reg;
+ fdata->vr_offset = vr_saved_offset + offset;
+ }
+ vr_saved_offset = -1;
+ vr_reg = -1;
+ li_found_pc = 0;
+ }
+ }
+ /* End AltiVec related instructions. */
else
{
/* Not a recognized prologue instruction.
else
prev_sp = read_memory_addr (sp, wordsize);
if (fdata.lr_offset == 0)
- lr = read_register (PPC_LR_REGNUM);
+ lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
else
lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
static void
rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
- int nargs, value_ptr *args, struct type *type,
+ int nargs, struct value **args, struct type *type,
int gcc_p)
{
-#define TOC_ADDR_OFFSET 20
-#define TARGET_ADDR_OFFSET 28
-
int ii;
CORE_ADDR target_addr;
if (rs6000_find_toc_address_hook != NULL)
{
CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
- write_register (PPC_TOC_REGNUM, tocvalue);
+ write_register (gdbarch_tdep (current_gdbarch)->ppc_toc_regnum,
+ tocvalue);
}
}
starting from r4. */
static CORE_ADDR
-rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
+rs6000_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
int ii;
int f_argno = 0; /* current floating point argno */
int wordsize = TDEP->wordsize;
- value_ptr arg = 0;
+ struct value *arg = 0;
struct type *type;
CORE_ADDR saved_sp;
}
else
{ /* Argument can fit in one register. No problem. */
- int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0;
+ int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0;
memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size);
memcpy ((char *)®isters[REGISTER_BYTE (ii + 3)] + adj,
VALUE_CONTENTS (arg), len);
ran_out_of_registers_for_arguments:
saved_sp = read_sp ();
-#ifndef ELF_OBJECT_FORMAT
+
/* location for 8 parameters are always reserved. */
sp -= wordsize * 8;
/* stack pointer must be quadword aligned */
sp &= -16;
-#endif
/* if there are more arguments, allocate space for them in
the stack, then push them starting from the ninth one. */
for (; jj < nargs; ++jj)
{
- value_ptr val = args[jj];
+ struct value *val = args[jj];
space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
}
static CORE_ADDR
ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
{
- write_register (PPC_LR_REGNUM, CALL_DUMMY_ADDRESS ());
+ write_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum,
+ CALL_DUMMY_ADDRESS ());
return sp;
}
rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
{
int offset = 0;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
{
memcpy (valbuf, &ff, sizeof (float));
}
}
+ else if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
+ && TYPE_LENGTH (valtype) == 16
+ && TYPE_VECTOR (valtype))
+ {
+ memcpy (valbuf, regbuf + REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
+ TYPE_LENGTH (valtype));
+ }
else
{
/* return value is copied starting from r3. */
- if (TARGET_BYTE_ORDER == BIG_ENDIAN
+ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
{
CORE_ADDR func_start;
struct rs6000_framedata fdata;
- int wordsize = TDEP->wordsize;
+ struct gdbarch_tdep *tdep = TDEP;
+ int wordsize = tdep->wordsize;
if (fi->signal_handler_caller)
return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize);
return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET,
wordsize);
else
- return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE,
+ return read_memory_addr (FRAME_CHAIN (fi) + tdep->lr_frame_offset,
wordsize);
}
if (fdata.lr_offset == 0)
- return read_register (PPC_LR_REGNUM);
+ return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
}
{
CORE_ADDR frame_addr;
struct rs6000_framedata work_fdata;
- int wordsize = TDEP->wordsize;
+ struct gdbarch_tdep * tdep = gdbarch_tdep (current_gdbarch);
+ int wordsize = tdep->wordsize;
if (fi->saved_regs)
return;
/* The following is true only if the frame doesn't have a call to
alloca(), FIXME. */
- if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
- && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
+ if (fdatap->saved_fpr == 0
+ && fdatap->saved_gpr == 0
+ && fdatap->saved_vr == 0
+ && fdatap->lr_offset == 0
+ && fdatap->cr_offset == 0
+ && fdatap->vr_offset == 0)
frame_addr = 0;
- else if (fi->prev && fi->prev->frame)
- frame_addr = fi->prev->frame;
else
- frame_addr = read_memory_addr (fi->frame, wordsize);
+ /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
+ address of the current frame. Things might be easier if the
+ ->frame pointed to the outer-most address of the frame. In the
+ mean time, the address of the prev frame is used as the base
+ address of this frame. */
+ frame_addr = FRAME_CHAIN (fi);
/* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
All fpr's from saved_fpr to fp31 are saved. */
}
}
+ /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
+ All vr's from saved_vr to vr31 are saved. */
+ if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
+ {
+ if (fdatap->saved_vr >= 0)
+ {
+ int i;
+ CORE_ADDR vr_addr = frame_addr + fdatap->vr_offset;
+ for (i = fdatap->saved_vr; i < 32; i++)
+ {
+ fi->saved_regs[tdep->ppc_vr0_regnum + i] = vr_addr;
+ vr_addr += REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
+ }
+ }
+ }
+
/* If != 0, fdatap->cr_offset is the offset from the frame that holds
the CR. */
if (fdatap->cr_offset != 0)
- fi->saved_regs[PPC_CR_REGNUM] = frame_addr + fdatap->cr_offset;
+ fi->saved_regs[tdep->ppc_cr_regnum] = frame_addr + fdatap->cr_offset;
/* If != 0, fdatap->lr_offset is the offset from the frame that holds
the LR. */
if (fdatap->lr_offset != 0)
- fi->saved_regs[PPC_LR_REGNUM] = frame_addr + fdatap->lr_offset;
+ fi->saved_regs[tdep->ppc_lr_regnum] = frame_addr + fdatap->lr_offset;
+
+ /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
+ the VRSAVE. */
+ if (fdatap->vrsave_offset != 0)
+ fi->saved_regs[tdep->ppc_vrsave_regnum] = frame_addr + fdatap->vrsave_offset;
}
/* Return the address of a frame. This is the inital %sp value when the frame
return fi->extra_info->initial_sp;
}
- /* This function has an alloca register. If this is the top-most frame
- (with the lowest address), the value in alloca register is good. */
-
- if (!fi->next)
- return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
-
- /* Otherwise, this is a caller frame. Callee has usually already saved
- registers, but there are exceptions (such as when the callee
- has no parameters). Find the address in which caller's alloca
- register is saved. */
-
- for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
- {
-
- if (!callee_fi->saved_regs)
- frame_get_saved_regs (callee_fi, NULL);
-
- /* this is the address in which alloca register is saved. */
-
- tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
- if (tmpaddr)
- {
- fi->extra_info->initial_sp =
- read_memory_addr (tmpaddr, TDEP->wordsize);
- return fi->extra_info->initial_sp;
- }
-
- /* Go look into deeper levels of the frame chain to see if any one of
- the callees has saved alloca register. */
- }
-
- /* If alloca register was not saved, by the callee (or any of its callees)
- then the value in the register is still good. */
-
- fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
+ /* There is an alloca register, use its value, in the current frame,
+ as the initial stack pointer. */
+ {
+ char *tmpbuf = alloca (MAX_REGISTER_RAW_SIZE);
+ if (frame_register_read (fi, fdata.alloca_reg, tmpbuf))
+ {
+ fi->extra_info->initial_sp
+ = extract_unsigned_integer (tmpbuf,
+ REGISTER_RAW_SIZE (fdata.alloca_reg));
+ }
+ else
+ /* NOTE: cagney/2002-04-17: At present the only time
+ frame_register_read will fail is when the register isn't
+ available. If that does happen, use the frame. */
+ fi->extra_info->initial_sp = fi->frame;
+ }
return fi->extra_info->initial_sp;
}
else
fp = read_memory_addr ((thisframe)->frame, wordsize);
- lr = read_register (PPC_LR_REGNUM);
+ lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum);
if (lr == entry_point_address ())
if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0)
if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
/* Return the name of register number N, or null if no such register exists
in the current architecture. */
-static char *
+static const char *
rs6000_register_name (int n)
{
struct gdbarch_tdep *tdep = TDEP;
return regsize (reg, tdep->wordsize);
}
-/* Number of bytes of storage in the program's representation
- for register N. */
-
-static int
-rs6000_register_virtual_size (int n)
-{
- return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n));
-}
-
/* Return the GDB type object for the "standard" data type
of data in register N. */
struct gdbarch_tdep *tdep = TDEP;
const struct reg *reg = tdep->regs + n;
- return reg->fpr ? builtin_type_double :
- regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 :
- builtin_type_int32;
+ if (reg->fpr)
+ return builtin_type_double;
+ else
+ {
+ int size = regsize (reg, tdep->wordsize);
+ switch (size)
+ {
+ case 8:
+ return builtin_type_int64;
+ break;
+ case 16:
+ return builtin_type_vec128;
+ break;
+ default:
+ return builtin_type_int32;
+ break;
+ }
+ }
}
/* For the PowerPC, it appears that the debug info marks float parameters as
memcpy (to, from, REGISTER_RAW_SIZE (n));
}
+int
+altivec_register_p (int regno)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ if (tdep->ppc_vr0_regnum < 0 || tdep->ppc_vrsave_regnum < 0)
+ return 0;
+ else
+ return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
+}
+
+static void
+rs6000_do_altivec_registers (int regnum)
+{
+ int i;
+ char *raw_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
+ char *virtual_buffer = (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ for (i = tdep->ppc_vr0_regnum; i <= tdep->ppc_vrsave_regnum; i++)
+ {
+ /* If we want just one reg, check that this is the one we want. */
+ if (regnum != -1 && i != regnum)
+ continue;
+
+ /* If the register name is empty, it is undefined for this
+ processor, so don't display anything. */
+ if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0')
+ continue;
+
+ fputs_filtered (REGISTER_NAME (i), gdb_stdout);
+ print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), gdb_stdout);
+
+ /* Get the data in raw format. */
+ if (!frame_register_read (selected_frame, i, raw_buffer))
+ {
+ printf_filtered ("*value not available*\n");
+ continue;
+ }
+
+ /* Convert raw data to virtual format if necessary. */
+ if (REGISTER_CONVERTIBLE (i))
+ REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i),
+ raw_buffer, virtual_buffer);
+ else
+ memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (i));
+
+ /* Print as integer in hex only. */
+ val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
+ gdb_stdout, 'x', 1, 0, Val_pretty_default);
+ printf_filtered ("\n");
+ }
+}
+
+static void
+rs6000_altivec_registers_info (char *addr_exp, int from_tty)
+{
+ int regnum, numregs;
+ register char *end;
+
+ if (!target_has_registers)
+ error ("The program has no registers now.");
+ if (selected_frame == NULL)
+ error ("No selected frame.");
+
+ if (!addr_exp)
+ {
+ rs6000_do_altivec_registers (-1);
+ return;
+ }
+
+ numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ do
+ {
+ if (addr_exp[0] == '$')
+ addr_exp++;
+ end = addr_exp;
+ while (*end != '\0' && *end != ' ' && *end != '\t')
+ ++end;
+
+ regnum = target_map_name_to_register (addr_exp, end - addr_exp);
+ if (regnum < 0)
+ {
+ regnum = numregs;
+ if (*addr_exp >= '0' && *addr_exp <= '9')
+ regnum = atoi (addr_exp); /* Take a number */
+ if (regnum >= numregs) /* Bad name, or bad number */
+ error ("%.*s: invalid register", end - addr_exp, addr_exp);
+ }
+
+ rs6000_do_altivec_registers (regnum);
+
+ addr_exp = end;
+ while (*addr_exp == ' ' || *addr_exp == '\t')
+ ++addr_exp;
+ }
+ while (*addr_exp != '\0');
+}
+
+static void
+rs6000_do_registers_info (int regnum, int fpregs)
+{
+ register int i;
+ int numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ char *raw_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE);
+ char *virtual_buffer = (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE);
+
+ for (i = 0; i < numregs; i++)
+ {
+ /* Decide between printing all regs, nonfloat regs, or specific reg. */
+ if (regnum == -1)
+ {
+ if ((TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT && !fpregs)
+ || (altivec_register_p (i) && !fpregs))
+ continue;
+ }
+ else
+ {
+ if (i != regnum)
+ continue;
+ }
+
+ /* If the register name is empty, it is undefined for this
+ processor, so don't display anything. */
+ if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0')
+ continue;
+
+ fputs_filtered (REGISTER_NAME (i), gdb_stdout);
+ print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), gdb_stdout);
+
+ /* Get the data in raw format. */
+ if (!frame_register_read (selected_frame, i, raw_buffer))
+ {
+ printf_filtered ("*value not available*\n");
+ continue;
+ }
+
+ /* Convert raw data to virtual format if necessary. */
+ if (REGISTER_CONVERTIBLE (i))
+ REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i),
+ raw_buffer, virtual_buffer);
+ else
+ memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (i));
+
+ /* If virtual format is floating, print it that way, and in raw hex. */
+ if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT)
+ {
+ register int j;
+
+ val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
+ gdb_stdout, 0, 1, 0, Val_pretty_default);
+
+ printf_filtered ("\t(raw 0x");
+ for (j = 0; j < REGISTER_RAW_SIZE (i); j++)
+ {
+ register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
+ : REGISTER_RAW_SIZE (i) - 1 - j;
+ printf_filtered ("%02x", (unsigned char) raw_buffer[idx]);
+ }
+ printf_filtered (")");
+ }
+ else
+ {
+ /* Print the register in hex. */
+ val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
+ gdb_stdout, 'x', 1, 0, Val_pretty_default);
+ /* If not a vector register, print it also in decimal. */
+ if (!altivec_register_p (i))
+ {
+ printf_filtered ("\t");
+ val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0,
+ gdb_stdout, 0, 1, 0, Val_pretty_default);
+ }
+ }
+ printf_filtered ("\n");
+ }
+}
+
+/* Convert a dbx stab register number (from `r' declaration) to a gdb
+ REGNUM. */
+static int
+rs6000_stab_reg_to_regnum (int num)
+{
+ int regnum;
+ switch (num)
+ {
+ case 64:
+ regnum = gdbarch_tdep (current_gdbarch)->ppc_mq_regnum;
+ break;
+ case 65:
+ regnum = gdbarch_tdep (current_gdbarch)->ppc_lr_regnum;
+ break;
+ case 66:
+ regnum = gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum;
+ break;
+ case 76:
+ regnum = gdbarch_tdep (current_gdbarch)->ppc_xer_regnum;
+ break;
+ default:
+ regnum = num;
+ break;
+ }
+ return regnum;
+}
+
/* Store the address of the place in which to copy the structure the
subroutine will return. This is called from call_function.
static void
rs6000_store_return_value (struct type *type, char *valbuf)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
if (TYPE_CODE (type) == TYPE_CODE_FLT)
/* Floating point values are returned starting from FPR1 and up.
write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
TYPE_LENGTH (type));
+ else if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
+ {
+ if (TYPE_LENGTH (type) == 16
+ && TYPE_VECTOR (type))
+ write_register_bytes (REGISTER_BYTE (tdep->ppc_vr0_regnum + 2),
+ valbuf, TYPE_LENGTH (type));
+ }
else
/* Everything else is returned in GPR3 and up. */
- write_register_bytes (REGISTER_BYTE (PPC_GP0_REGNUM + 3), valbuf,
- TYPE_LENGTH (type));
+ write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3),
+ valbuf, TYPE_LENGTH (type));
}
/* Extract from an array REGBUF containing the (raw) register state
Most of these register groups aren't anything formal. I arrived at
them by looking at the registers that occurred in more than one
- processor. */
+ processor.
+
+ Note: kevinb/2002-04-30: Support for the fpscr register was added
+ during April, 2002. Slot 70 is being used for PowerPC and slot 71
+ for Power. For PowerPC, slot 70 was unused and was already in the
+ PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
+ slot 70 was being used for "mq", so the next available slot (71)
+ was chosen. It would have been nice to be able to make the
+ register numbers the same across processor cores, but this wasn't
+ possible without either 1) renumbering some registers for some
+ processors or 2) assigning fpscr to a really high slot that's
+ larger than any current register number. Doing (1) is bad because
+ existing stubs would break. Doing (2) is undesirable because it
+ would introduce a really large gap between fpscr and the rest of
+ the registers for most processors. */
/* Convenience macros for populating register arrays. */
systems. */
#define R8(name) { STR(name), 8, 8, 0 }
+/* Return a struct reg defining register NAME that's 128 bits on all
+ systems. */
+#define R16(name) { STR(name), 16, 16, 0 }
+
/* Return a struct reg defining floating-point register NAME. */
#define F(name) { STR(name), 8, 8, 1 }
/* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
/* 64 */ R(pc), R(ps)
+#define COMMON_UISA_NOFP_REGS \
+ /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
+ /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
+ /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
+ /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
+ /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
+ /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
+ /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
+ /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
+ /* 64 */ R(pc), R(ps)
+
/* UISA-level SPRs for PowerPC. */
#define PPC_UISA_SPRS \
- /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
+ /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
/* Segment registers, for PowerPC. */
#define PPC_SEGMENT_REGS \
/* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
/* 116 */ R4(dec), R(dabr), R4(ear)
+/* AltiVec registers */
+#define PPC_ALTIVEC_REGS \
+ /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
+ /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
+ /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
+ /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
+ /*151*/R4(vscr), R4(vrsave)
+
/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
user-level SPR's. */
static const struct reg registers_power[] =
{
COMMON_UISA_REGS,
- /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq)
+ /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq),
+ /* 71 */ R4(fpscr)
};
/* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
static const struct reg registers_powerpc[] =
{
COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_ALTIVEC_REGS
+};
+
+/* PowerPC UISA - a PPC processor as viewed by user-level
+ code, but without floating point registers. */
+static const struct reg registers_powerpc_nofp[] =
+{
+ COMMON_UISA_NOFP_REGS,
PPC_UISA_SPRS
};
};
+/* Motorola PowerPC 7400. */
+static const struct reg registers_7400[] =
+{
+ /* gpr0-gpr31, fpr0-fpr31 */
+ COMMON_UISA_REGS,
+ /* ctr, xre, lr, cr */
+ PPC_UISA_SPRS,
+ /* sr0-sr15 */
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* vr0-vr31, vrsave, vscr */
+ PPC_ALTIVEC_REGS
+ /* FIXME? Add more registers? */
+};
+
/* Information about a particular processor variant. */
struct variant
bfd_mach_ppc_860, num_registers (registers_860), registers_860},
{"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
bfd_mach_ppc_750, num_registers (registers_750), registers_750},
+ {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc,
+ bfd_mach_ppc_7400, num_registers (registers_7400), registers_7400},
- /* FIXME: I haven't checked the register sets of the following. */
+ /* 64-bit */
+ {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc,
+ bfd_mach_ppc64, num_registers (registers_powerpc), registers_powerpc},
{"620", "Motorola PowerPC 620", bfd_arch_powerpc,
bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc},
+ {"630", "Motorola PowerPC 630", bfd_arch_powerpc,
+ bfd_mach_ppc_630, num_registers (registers_powerpc), registers_powerpc},
{"a35", "PowerPC A35", bfd_arch_powerpc,
bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc},
+ {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc,
+ bfd_mach_ppc_rs64ii, num_registers (registers_powerpc), registers_powerpc},
+ {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc,
+ bfd_mach_ppc_rs64iii, num_registers (registers_powerpc), registers_powerpc},
+
+ /* FIXME: I haven't checked the register sets of the following. */
{"rs1", "IBM POWER RS1", bfd_arch_rs6000,
bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power},
{"rsc", "IBM POWER RSC", bfd_arch_rs6000,
#undef num_registers
-/* Look up the variant named NAME in the `variants' table. Return a
- pointer to the struct variant, or null if we couldn't find it. */
-
-static const struct variant *
-find_variant_by_name (char *name)
-{
- const struct variant *v;
-
- for (v = variants; v->name; v++)
- if (!strcmp (name, v->name))
- return v;
-
- return NULL;
-}
-
/* Return the variant corresponding to architecture ARCH and machine number
MACH. If no such variant exists, return null. */
return NULL;
}
-
-
-
\f
-static void
-process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
-{
- int *os_ident_ptr = obj;
- const char *name;
- unsigned int sectsize;
-
- name = bfd_get_section_name (abfd, sect);
- sectsize = bfd_section_size (abfd, sect);
- if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
- {
- unsigned int name_length, data_length, note_type;
- char *note = alloca (sectsize);
-
- bfd_get_section_contents (abfd, sect, note,
- (file_ptr) 0, (bfd_size_type) sectsize);
-
- name_length = bfd_h_get_32 (abfd, note);
- data_length = bfd_h_get_32 (abfd, note + 4);
- note_type = bfd_h_get_32 (abfd, note + 8);
-
- if (name_length == 4 && data_length == 16 && note_type == 1
- && strcmp (note + 12, "GNU") == 0)
- {
- int os_number = bfd_h_get_32 (abfd, note + 16);
-
- /* The case numbers are from abi-tags in glibc */
- switch (os_number)
- {
- case 0 :
- *os_ident_ptr = ELFOSABI_LINUX;
- break;
- case 1 :
- *os_ident_ptr = ELFOSABI_HURD;
- break;
- case 2 :
- *os_ident_ptr = ELFOSABI_SOLARIS;
- break;
- default :
- internal_error (__FILE__, __LINE__,
- "process_note_abi_sections: unknown OS number %d",
- os_number);
- break;
- }
- }
- }
-}
-
-/* Return one of the ELFOSABI_ constants for BFDs representing ELF
- executables. If it's not an ELF executable or if the OS/ABI couldn't
- be determined, simply return -1. */
-
-static int
-get_elfosabi (bfd *abfd)
-{
- int elfosabi = -1;
-
- if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
- {
- elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
-
- /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
- that we're on a SYSV system. However, GNU/Linux uses a note section
- to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
- have to check the note sections too. */
- if (elfosabi == 0)
- {
- bfd_map_over_sections (abfd,
- process_note_abi_tag_sections,
- &elfosabi);
- }
- }
-
- return elfosabi;
-}
-
-\f
-
/* Initialize the current architecture based on INFO. If possible, re-use an
architecture from ARCHES, which is a list of architectures already created
during this debugging session.
enum bfd_architecture arch;
unsigned long mach;
bfd abfd;
- int osabi, sysv_abi;
+ int sysv_abi;
+ enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
+ gdbarch_print_insn_ftype *print_insn;
from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
- osabi = get_elfosabi (info.abfd);
+ if (info.abfd)
+ osabi = gdbarch_lookup_osabi (info.abfd);
- /* Check word size. If INFO is from a binary file, infer it from that,
- else use the previously-inferred size. */
+ /* Check word size. If INFO is from a binary file, infer it from
+ that, else choose a likely default. */
if (from_xcoff_exec)
{
- if (xcoff_data (info.abfd)->xcoff64)
+ if (bfd_xcoff_is_xcoff64 (info.abfd))
wordsize = 8;
else
wordsize = 4;
}
else
{
- tdep = TDEP;
- if (tdep)
- wordsize = tdep->wordsize;
+ if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
+ wordsize = info.bfd_arch_info->bits_per_word /
+ info.bfd_arch_info->bits_per_byte;
else
wordsize = 4;
}
gdbarch = gdbarch_alloc (&info, tdep);
power = arch == bfd_arch_rs6000;
- /* Select instruction printer. */
- tm_print_insn = arch == power ? print_insn_rs6000 :
- info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc :
- print_insn_little_powerpc;
-
/* Choose variant. */
v = find_variant_by_arch (arch, mach);
if (!v)
- v = find_variant_by_name (power ? "power" : "powerpc");
+ return NULL;
+
tdep->regs = v->regs;
- /* Calculate byte offsets in raw register array. */
+ tdep->ppc_gp0_regnum = 0;
+ tdep->ppc_gplast_regnum = 31;
+ tdep->ppc_toc_regnum = 2;
+ tdep->ppc_ps_regnum = 65;
+ tdep->ppc_cr_regnum = 66;
+ tdep->ppc_lr_regnum = 67;
+ tdep->ppc_ctr_regnum = 68;
+ tdep->ppc_xer_regnum = 69;
+ if (v->mach == bfd_mach_ppc_601)
+ tdep->ppc_mq_regnum = 124;
+ else if (power)
+ tdep->ppc_mq_regnum = 70;
+ else
+ tdep->ppc_mq_regnum = -1;
+ tdep->ppc_fpscr_regnum = power ? 71 : 70;
+
+ if (v->arch == bfd_arch_powerpc)
+ switch (v->mach)
+ {
+ case bfd_mach_ppc:
+ tdep->ppc_vr0_regnum = 71;
+ tdep->ppc_vrsave_regnum = 104;
+ break;
+ case bfd_mach_ppc_7400:
+ tdep->ppc_vr0_regnum = 119;
+ tdep->ppc_vrsave_regnum = 153;
+ break;
+ default:
+ tdep->ppc_vr0_regnum = -1;
+ tdep->ppc_vrsave_regnum = -1;
+ break;
+ }
+
+ /* Set lr_frame_offset. */
+ if (wordsize == 8)
+ tdep->lr_frame_offset = 16;
+ else if (sysv_abi)
+ tdep->lr_frame_offset = 4;
+ else
+ tdep->lr_frame_offset = 8;
+
+ /* Calculate byte offsets in raw register array. */
tdep->regoff = xmalloc (v->nregs * sizeof (int));
for (i = off = 0; i < v->nregs; i++)
{
off += regsize (v->regs + i, wordsize);
}
+ /* Select instruction printer. */
+ if (arch == power)
+ print_insn = print_insn_rs6000;
+ else if (info.byte_order == BFD_ENDIAN_BIG)
+ print_insn = print_insn_big_powerpc;
+ else
+ print_insn = print_insn_little_powerpc;
+ set_gdbarch_print_insn (gdbarch, print_insn);
+
set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
- set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
set_gdbarch_register_bytes (gdbarch, off);
set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
- set_gdbarch_max_register_raw_size (gdbarch, 8);
- set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size);
- set_gdbarch_max_register_virtual_size (gdbarch, 8);
+ set_gdbarch_max_register_raw_size (gdbarch, 16);
+ set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
+ set_gdbarch_max_register_virtual_size (gdbarch, 16);
set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
+ set_gdbarch_do_registers_info (gdbarch, rs6000_do_registers_info);
set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+ set_gdbarch_char_signed (gdbarch, 0);
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
set_gdbarch_call_dummy_length (gdbarch, 0);
set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
set_gdbarch_call_dummy_p (gdbarch, 1);
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
- set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
+ set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
+ set_gdbarch_stab_reg_to_regnum (gdbarch, rs6000_stab_reg_to_regnum);
- set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value);
+ set_gdbarch_deprecated_extract_return_value (gdbarch, rs6000_extract_return_value);
- if (sysv_abi)
+ /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
+ is correct for the SysV ABI when the wordsize is 8, but I'm also
+ fairly certain that ppc_sysv_abi_push_arguments() will give even
+ worse results since it only works for 32-bit code. So, for the moment,
+ we're better off calling rs6000_push_arguments() since it works for
+ 64-bit code. At some point in the future, this matter needs to be
+ revisited. */
+ if (sysv_abi && wordsize == 4)
set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments);
else
set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value);
- set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
- set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention);
-
+ set_gdbarch_deprecated_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
/* Not sure on this. FIXMEmgo */
set_gdbarch_frame_args_skip (gdbarch, 8);
- set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
- if (osabi == ELFOSABI_LINUX)
- {
- set_gdbarch_frameless_function_invocation (gdbarch,
- ppc_linux_frameless_function_invocation);
- set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain);
- set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc);
-
- set_gdbarch_frame_init_saved_regs (gdbarch,
- ppc_linux_frame_init_saved_regs);
- set_gdbarch_init_extra_frame_info (gdbarch,
- ppc_linux_init_extra_frame_info);
-
- set_gdbarch_memory_remove_breakpoint (gdbarch,
- ppc_linux_memory_remove_breakpoint);
- }
+ if (sysv_abi)
+ set_gdbarch_use_struct_convention (gdbarch,
+ ppc_sysv_abi_use_struct_convention);
else
- {
- set_gdbarch_frameless_function_invocation (gdbarch,
- rs6000_frameless_function_invocation);
- set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
- set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
+ set_gdbarch_use_struct_convention (gdbarch,
+ generic_use_struct_convention);
- set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
- set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
+ set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
+
+ set_gdbarch_frameless_function_invocation (gdbarch,
+ rs6000_frameless_function_invocation);
+ set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
+ set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
- /* Handle RS/6000 function pointers. */
+ set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
+ set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
+
+ if (!sysv_abi)
+ {
+ /* Handle RS/6000 function pointers (which are really function
+ descriptors). */
set_gdbarch_convert_from_func_ptr_addr (gdbarch,
rs6000_convert_from_func_ptr_addr);
}
now that the C compiler delays popping them. */
set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
+ /* Hook in ABI-specific overrides, if they have been registered. */
+ gdbarch_init_osabi (info, gdbarch, osabi);
+
return gdbarch;
}
+static void
+rs6000_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+
+ if (tdep == NULL)
+ return;
+
+ fprintf_unfiltered (file, "rs6000_dump_tdep: OS ABI = %s\n",
+ gdbarch_osabi_name (tdep->osabi));
+}
+
+static struct cmd_list_element *info_powerpc_cmdlist = NULL;
+
+static void
+rs6000_info_powerpc_command (char *args, int from_tty)
+{
+ help_list (info_powerpc_cmdlist, "info powerpc ", class_info, gdb_stdout);
+}
+
/* Initialization code. */
void
_initialize_rs6000_tdep (void)
{
- register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init);
- register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init);
+ gdbarch_register (bfd_arch_rs6000, rs6000_gdbarch_init, rs6000_dump_tdep);
+ gdbarch_register (bfd_arch_powerpc, rs6000_gdbarch_init, rs6000_dump_tdep);
+
+ /* Add root prefix command for "info powerpc" commands */
+ add_prefix_cmd ("powerpc", class_info, rs6000_info_powerpc_command,
+ "Various POWERPC info specific commands.",
+ &info_powerpc_cmdlist, "info powerpc ", 0, &infolist);
+
+ add_cmd ("altivec", class_info, rs6000_altivec_registers_info,
+ "Display the contents of the AltiVec registers.",
+ &info_powerpc_cmdlist);
}
projects / binutils.git / blobdiff