* rx-decode.opc (MOV): Do not sign-extend immediates which are

[binutils.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4c8ad0161e2f09479a85375c4f9c7ae890c09590..371d8f603470741dd8589059328d665691fe6a1d 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,120 @@
+2012-04-30  DJ Delorie  <[email protected]>
+
+       * rx-decode.opc (MOV): Do not sign-extend immediates which are
+       already the maximum bit size.
+       * rx-decode.c: Regenerate.
+
+2012-04-27  David S. Miller  <[email protected]>
+
+       * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
+       * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
+
+       * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
+       * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
+
+       * sparc-opc.c (CBCOND): New define.
+       (CBCOND_XCC): Likewise.
+       (cbcond): New helper macro.
+       (sparc_opcodes): Add compare-and-branch instructions.
+
+       * sparc-dis.c (print_insn_sparc): Handle ')'.
+       * sparc-opc.c (sparc_opcodes): Add crypto instructions.
+
+       * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
+       into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
+
+2012-04-12  David S. Miller  <[email protected]>
+
+       * sparc-dis.c (X_DISP10): Define.
+       (print_insn_sparc): Handle '='.
+
+2012-04-01  Mike Frysinger  <[email protected]>
+
+       * bfin-dis.c (fmtconst): Replace decimal handling with a single
+       sprintf call and the '*' field width.
+
+2012-03-23  Maxim Kuvyrkov  <[email protected]>
+
+       * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
+
+2012-03-16  Alan Modra  <[email protected]>
+
+       * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
+       (powerpc_opcd_indices): Bump array size.
+       (disassemble_init_powerpc): Set powerpc_opcd_indices entries
+       corresponding to unused opcodes to following entry.
+       (lookup_powerpc): New function, extracted and optimised from..
+       (print_insn_powerpc): ..here.
+
+2012-03-15  Alan Modra  <[email protected]>
+           James Lemke  <[email protected]>
+
+       * disassemble.c (disassemble_init_for_target): Handle ppc init.
+       * ppc-dis.c (private): New var.
+       (powerpc_init_dialect): Don't return calloc failure, instead use
+       private.
+       (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
+       (powerpc_opcd_indices): New array.
+       (disassemble_init_powerpc): New function.
+       (print_insn_big_powerpc): Don't init dialect here.
+       (print_insn_little_powerpc): Likewise.
+       (print_insn_powerpc): Start search using powerpc_opcd_indices.
+
+2012-03-10  Edmar Wienskoski  <[email protected]>
+
+       * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
+       * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
+       (PPCVEC2, PPCTMR, E6500): New short names.
+       (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
+       mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
+       lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
+       lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
+       lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
+       optional operands on sync instruction for E6500 target.
+
+2012-03-08  Andreas Krebbel  <[email protected]>
+
+       * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
+
+2012-02-27  Alan Modra  <[email protected]>
+
+       * mt-dis.c: Regenerate.
+
+2012-02-27  Alan Modra  <[email protected]>
+
+       * v850-opc.c (extract_v8): Rearrange to make it obvious this
+       is the inverse of corresponding insert function.
+       (extract_d22, extract_u9, extract_r4): Likewise.
+       (extract_d9): Correct sign extension.
+       (extract_d16_15): Don't assume "long" is 32 bits, and don't
+       rely on implementation defined behaviour for shift right of
+       signed types.
+       (extract_d16_16, extract_d17_16, extract_i9): Likewise.
+       (extract_d23): Likewise, and correct mask.
+
+2012-02-27  Alan Modra  <[email protected]>
+
+       * crx-dis.c (print_arg): Mask constant to 32 bits.
+       * crx-opc.c (cst4_map): Use int array.
+
+2012-02-27  Alan Modra  <[email protected]>
+
+       * arc-dis.c (BITS): Don't use shifts to mask off bits.
+       (FIELDD): Sign extend with xor,sub.
+
+2012-02-25  Walter Lee  <[email protected]>
+
+       * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
+       * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
+       TILEPRO_OPC_LW_TLS_SN.
+
+2012-02-21  H.J. Lu  <[email protected]>
+
+       * i386-opc.h (HLEPrefixNone): New.
+       (HLEPrefixLock): Likewise.
+       (HLEPrefixAny): Likewise.
+       (HLEPrefixRelease): Likewise.
+
 2012-02-08  H.J. Lu  <[email protected]>
 
        * i386-dis.c (HLE_Fixup1): New.