* vx-share/README, nindy-share/README: New files describing

[binutils.git] / gdb / ns32k-opcode.h

diff --git a/gdb/ns32k-opcode.h b/gdb/ns32k-opcode.h
index 2d5ff30099787be1bbe8dd487ab7bba7ab3119d4..c41ff414b7f90634ef0f48223aa5fd84e4297eb2 100644 (file)
--- a/gdb/ns32k-opcode.h
+++ b/gdb/ns32k-opcode.h
@@ -19,6 +19,25 @@ struct not                   /* ns32k opcode text */
   struct not_wot    detail;    /* rest of opcode table          [datum] */
 };
 
+/* Instructions look like this:
+    
+   basic instruction--1, 2, or 3 bytes
+   index byte for operand A, if operand A is indexed--1 byte
+   index byte for operand B, if operand B is indexed--1 byte
+   addressing extension for operand A
+   addressing extension for operand B
+   implied operands
+
+   Operand A is the operand listed first in the following opcode table.
+   Operand B is the operand listed second in the following opcode table.
+   All instructions have at most 2 general operands, so this is enough.
+   The implied operands are associated with operands other than A and B.
+
+   Each operand has a digit and a letter.
+   
+   The digit gives the position in the assembly language.  The letter,
+   one of the following, tells us what kind of operand it is.  */
+
 /* F : 32 bit float
  * L : 64 bit float
  * B : byte
@@ -40,6 +59,8 @@ notstrs[] =
   { "absw",    14,24,  0x314e, "1W2W" },
   { "absd",    14,24,  0x334e, "1D2D" },
   { "acbb",     7,16,  0x4c,   "2B1q3p" },
+  { "acbw",      7,16,  0x4d,   "2W1q3p" },
+  { "acbd",      7,16,  0x4f,   "2D1q3p" },
   { "addf",    14,24,  0x01be, "1F2F" },
   { "addl",    14,24,  0x00be, "1L2L" },
   { "addb",     6,16,  0x00,   "1B2B" },
@@ -122,8 +143,8 @@ notstrs[] =
   { "cxp",      8,8,   0x22,   "1p" },
   { "cxpd",    11,16,  0x07f,  "1D" },
   { "deib",    14,24,  0x2cce, "1B2W" },
-  { "deiw",    14,24,  0x2cce, "1W2D" },
-  { "deid",    14,24,  0x2cce, "1D2Q" },
+  { "deiw",    14,24,  0x2dce, "1W2D" },
+  { "deid",    14,24,  0x2fce, "1D2Q" },
   { "dia",      8,8,   0xc2,   "" },
   { "divf",    14,24,  0x21be, "1F2F" },
   { "divl",    14,24,  0x20be, "1L2L" },
@@ -190,8 +211,8 @@ notstrs[] =
   { "movfl",   14,24,  0x1b3e, "1F2L" },
   { "movlf",   14,24,  0x163e, "1L2F" },
   { "movmb",   14,24,  0x00ce, "1D2D3d" },
-  { "movmw",   14,24,  0x00de, "1D2D3d" },
-  { "movmd",   14,24,  0x00fe, "1D2D3d" },
+  { "movmw",   14,24,  0x01ce, "1D2D3d" },
+  { "movmd",   14,24,  0x03ce, "1D2D3d" },
   { "movqb",    7,16,  0x5c,   "2B1q" },
   { "movqw",    7,16,  0x5d,   "2B1q" },
   { "movqd",    7,16,  0x5f,   "2B1q" },
@@ -227,7 +248,7 @@ notstrs[] =
   { "notd",    14,24,  0x274e, "1D2D" },
   { "orb",      6,16,  0x18,   "1B1B" },
   { "orw",      6,16,  0x19,   "1W1W" },
-  { "ord",      6,16,  0x1b,   "1D1D" },
+  { "ord",      6,16,  0x1b,   "1D2D" },
   { "quob",    14,24,  0x30ce, "1B2B" },
   { "quow",    14,24,  0x31ce, "1W2W" },
   { "quod",    14,24,  0x33ce, "1D2D" },
@@ -260,7 +281,7 @@ notstrs[] =
   { "sbitiw",  14,24,  0x1d4e, "1W2A" },
   { "sbitid",  14,24,  0x1f4e, "1D2A" },
   { "setcfg",  15,24,  0x0b0e, "5D1q" },
-  { "sfsr",    14,24,  0x673e, "5D1D" },
+  { "sfsr",    14,24,  0x373e, "5D1D" },
   { "skpsb",   16,16,  0x0c0e, "1i" },
   { "skpsw",   16,16,  0x0d0e, "1i" },
   { "skpsd",   16,16,  0x0f0e, "1i" },
@@ -280,7 +301,7 @@ notstrs[] =
   { "subpb",   14,24,  0x2c4e, "1B2B" },
   { "subpw",   14,24,  0x2d4e, "1W2W" },
   { "subpd",   14,24,  0x2f4e, "1D2D" },
-#ifndef NS32K_SVC_IMMED_OPERANDS
+#ifdef NS32K_SVC_IMMED_OPERANDS
   { "svc",      8,8,   0xe2,   "2i1i" }, /* not really, but unix uses it */
 #else
   { "svc",      8,8,   0xe2,   "" }, /* not really, but unix uses it */