+
+ * config/obj-som.c (obj_pseudo_table): Add "weak".
+ (obj_som_weak): New routine.
+
+
+ * config/tc-i386.c (union i386_op): New.
+ (struct _i386_insn): Delete disps[], imms[], regs[]. Add op[].
+ Throughout file replace occurences of disps[n], imms[n], regs[n]
+ with equivalent op[n].disps, op[n].imms, op[n].regs. Simplify
+ intel mode operand swapping. Add assert in regKludge and
+ fake_zero_displacement code. Test i.types[n] when outputting
+ displacements and immediates. Combine output of Disp16 with
+ Disp32.
+ (md_assemble): Don't try to fix broken UNIXWARE_COMPAT opcodes
+ when in intel mode by (not) reversing fsub and fdiv operands
+ before the template search. This fails for single operand
+ shorthand forms of the instruction, and if UNIXWARE_COMPAT is
+ undefined. Instead fix the base_opcode after we've found the
+ template. Move base_opcode xor with found_reverse_match from
+ opcode output code to before this fix so we test for the correct
+ opcodes.
+ (md_assemble): Don't use strcmp when deciding to ignore the suffix
+ check in intel mode. Instead compare opcodes.
+
+ * config/tc-i386.h (TC_RELOC): Delete.
+ * config/tc-i386.c (TC_RELOC): Delete. Replace usage of TC_RELOC
+ with equivalent call to reloc.
+
+ * as.h (flag_m68k_mri): Move declaration after target include, and
+ only declare when TC_M68K defined. Define as zero otherwise.
+ (LABELS_WITHOUT_COLONS, NO_PSEUDO_DOT): If undefined, define as 0.
+ * app.c (scrub_m68k_mri): Declare only when TC_M68K defined.
+ Define as zero otherwise.
+ (do_scrub_begin): Use m68k_mri parameter only when TC_M68K defined.
+ (struct app_save): Declare scrub_m68k_mri only when TC_M68K.
+ (app_push, app_pop): Save scrub_m68k_mri only when TC_M68K.
+ (do_scrub_chars): Use LABELS_WITHOUT_COLONS directly rather than
+ testing whether defined.
+ * cond.c (ignore_input): Use NO_PSEUDO_DOT directly.
+ * expr.c (operand): #ifdef unused case labels when TC_M68K undefined.
+ * read.c: Use LABELS_WITHOUT_COLONS and NO_PSEUDO_DOT directly
+ rather than testing whether defined.
+ (s_mri): Set flag_m68k_mri only when TC_M68K defined.
+ (parse_mri_cons): Declare and use only when TC_M68K.
+ * config/tc-hppa.h (LABELS_WITHOUT_COLONS): Define as 1.
+ * config/tc-m68k.h (NO_PSEUDO_DOT): Define as 1.
+ * config/tc-m88k.h (NO_PSEUDO_DOT): Define as 1.
+
+ * NEWS: Mention IBM 370 support.
+
+
+ * config/tc-i386.c (md_assemble): When swapping operands for
+ intel_syntax, assume everything that's not Imm or Disp is a
+ register.
+
+
+ * config/tc-i370.c, config/tc-i370.h: New files.
+ * Makefile.am: Add support for Linux/IBM 370.
+ * configure.in: Likewise.
+ * app.c (do_scrub_begin): Don't lex single quote when TC_I370.
+ * config/obj-elf.c: Include elf/i370.h
+ (obj_elf_section): Don't do anything special for flag_mri if TC_I370.
+
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+
+ * doc/c-i370.texi: New file.
+ * doc/all.texi: Include it.
+ * doc/as.texinfo: And here.
+ * doc/Makefile.am(CPU_DOCS): Add c-i370.texi.
+ * doc/Makefile.in: Regenerate.
+
+
+ * config/tc-d30v.c (parallel_ok): Use FLAG_NOT_WITH_ADDSUBppp to
+ determine if an instruction can be used in parallel with an ADDppp
+ or SUBppp instruction.
+
+
+ * doc/c-mips.texi (MIPS Opts): Document -mgp32 and -mgp64.
+
+
+ * config/tc-mips.c (mips_gp32): New variable.
+ (macro_build) Use mips_gp32.
+ (mips_ip): Ditto.
+ (md_longopts): Add "-mgp32" and "-mgp64".
+ (md_parse_option): Add OPTION_GP32 and OPTION_GP64.
+
+
+ * config/obj-coff.c (add_lineno): Accept non-positive lineno with
+ warning, and bump it to 1.
+
+
+ * dwarf2dbg.c (print_stats): Add cast to force printf argument to
+ match format.
+
+
+ * config/tc-mips.c (MF_HILO_INSN): Define.
+ (mips_7000_hilo_fix): Declare.
+ (append_insn): Conditionally insert nops after an mfhi/mflo insn.
+ (md_parse_option): Check for 7000_HILO_FIX options.
+ (OPTION_M7000_HILO_FIX): Define.
+ (OPTION_NO_M7000_HILO_FIX): Define.
+ * doc/c-mips.texi (-mfix7000): Describe.
+
+
+ * listing.c (print_lines): Remove unused variable `end'.
+
+ * config/tc-i386.c (md_assemble): Use `reloc()' to select reloc
+ type for JumpInterSegment output. Use enum bfd_reloc_code_real for
+ reloc_type when BFD_ASSEMBLER.
+ (md_estimate_size_before_relax): Use enum bfd_reloc_code_real for
+ reloc_type when BFD_ASSEMBLER. Move common code out of switch
+ statement and quell signed vs. unsigned comparison warning.
+
+
+ * config/tc-d10v.c (find_opcode): Add a symbol's value to
+ the computed frag offset, rather than overwriting it.
+
+
+ * config/tc-sh.c ("elf/sh.h"): Include.
+ (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
+ (md.begin): Initialize target_arch.
+ Only include opcodes in has table that match selected architecture.
+ (parse_reg): Recognize register names for sh-dsp.
+ (parse_at): Recognize post-modify addressing.
+ (get_operands): The leading space is now optional.
+ (get_specific): Remove FDREG_N support. Add support for sh-dsp
+ arguments. Update valid_arch.
+ (build_Mytes): Add support for SDT_REG_N.
+ (find_cooked_opcode): New function, broken out of md_assemble.
+ (assemble_ppi, sh_elf_final_processing): New functions.
+ (md_assemble): Use find_cooked_opcode and assemble_ppi.
+ (md_longopts, md_parse_option): New option: -dsp.
+ * config/tc-sh.h (elf_tc_final_processing): Define.
+ (sh_elf_final_processing): Declare.
+
+
+ * config/tc-hppa.c (pa_build_unwind_subspace): Use subseg_new to create
+ the unwinder subspace. Save the current seg/subseg before creating
+ the new seg/subseg.
+
+
+ * config/tc-mcore.c (INST_BYTE0): Redefine to handle big and
+ little endian targets.
+ (INST_BYTE1): Redefine to handle big and little endian
+ targets.
+ (cpu_type): New type: Select between M340 and M210.
+ (parse_psrmod): New function: Parse the PSRCLR and PSRSET
+ instructions of the M340.
+ (md_assemble): Add support for the MULSH and OPSR classes of
+ instructions.
+ (md_atof): Add support for little endian targets.
+ (md_parse_option): Add support for -EL, -EB and -mcpu command
+ line switches.
+ (md_convert_frag): Add support for little endian targets.
+ (md_apply_fix3): Add support for little endian targets.
+ (md_number_to_chars): Add support for little endian targets.
+
+
+ * read.c (read_a_source_file): If TC_START_LABEL_WITHOUT_COLON is
+ defined, use it to verify the symbol just read should be a label.
+
+
+ * app.c (do_scrub_chars): Handle "||" for parallel instructions
+ when DOUBLEBAR_PARALLEL is defined. Avoid stripping whitespace
+ around colons when KEEP_WHITE_AROUND_COLON is defined.
+ * doc/internals.texi (CPU backend): Document DOUBLEBAR_PARALLEL
+ and KEEP_WHITE_AROUND_COLON.
+
+
+ * read.c (s_rept): Call do_repeat, which abstracts the repeat
+ logic.
+ (do_repeat): New. Abstract repeat logic so that a "break" can be
+ implemented.
+ (end_repeat): New. Provide support for a "break" out of the
+ repeat loop.
+ * read.h: Add prototypes for new functions.
+
+
+ * doc/internals.texi: Document NUMBERS_WITH_SUFFIX macro.
+ * as.h: Provide a default NUMBERS_WITH_SUFFIX definition (zero).
+ * expr.c: Handle numbers with suffixes if NUMBERS_WITH_SUFFIX is
+ non-zero.
+
+
+ * read.c: Added elseif to directives table.
+ * read.h: Added prototype for s_elseif.
+ * doc/as.texinfo: Added description for elseif.
+ * cond.c (s_elseif): New function
+
+
+ * listing.c (print_lines): Remove conditionals causing bug in
+ listings.
+
+
+ * as.h: Define OCTETS_PER_BYTE and OCTETS_PER_BYTE_POWER
+ default values.
+ * frags.c (frag_new): Calculate fr_fix in octets
+ (frag_now_fix) Return offset as target address offset (bytes).
+ (frag_now_fix_octets) New - Return offset in octets (8-bit
+ quantities).
+ * frags.h: Added prototype for frag_now_fix_octets().
+ Distinguish between octets and bytes in field descriptions.
+ * listing.c (calc_hex): Account for octets vs bytes when
+ printing addresses/offsets.
+ (print_lines) Ditto. Also, if LISTING_WORD_SIZE is not 1, and
+ target is little-endian, print the octets in a word in big-endian
+ order so that the display looks like a proper hexadecimal number,
+ instead of having the octets reversed.
+ * read.c (do_align): When recording alignment, alignment power
+ should be in terms of target bytes (minimum addressible unit)
+ instead of octets.
+ (do_org) Convert ORG target address (byte) argument into an
+ octet offset when generating a variable fragment.
+ * symbols.c (resolve_symbol_value): Symbol final value
+ converted to a target address offset (bytes) from its octet offset.
+ * config/obj-coff.c (coff_frob_symbol): Symbol target address
+ offset (bytes) is adjusted by the frag offset (octets) converted
+ to bytes.
+ (coff_frob_section) Section alignment power is in terms of bytes;
+ convert it to an octet alignment power when calculating size (and
+ size mask) in octets. Don't modify the section size in order to
+ "align" it for TI COFF, since that format has a different method
+ for storing alignment information.
+
+
+ * stabs.c (generate_asm_file): Escape backslashes in stabs file
+ entries, matching the way GCC generates them. If not escaped, the
+ filename is encoded incorrectly.
+
+ * config/tc-arm.c (reg_table): Add support for ATPCS register
+ naming conventions.
+
+
+ * config/obj-coff.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Don't define if
+ already defined.
+ * config/tc-ppc.h [OBJ_XCOFF] (OBJ_COPY_SYMBOL_ATTRIBUTES):
+ New macro.
+ * config/tc-ppc.c (ppc_fix_adjustable): Don't look at the frag
+ of a symbol when we really care about its value.
+
+
+ * config/tc-mcore.c (md_assemble): Give warning message if
+ operands passes to instruction are more than the spec.
+
* config/tc-arm.c (armadjust_symtab): If the assembler is in
projects / binutils.git / blobdiff