]> Git Repo - binutils.git/blobdiff - sim/mips/configure.in
2003-01-04 Chris Demetriou <[email protected]>
[binutils.git] / sim / mips / configure.in
index bff4bc35cc4e6bf9bdbf42740f0fdaad181a3e65..b24225470db4aec403d72667107465e8d6a9b313 100644 (file)
@@ -10,6 +10,7 @@ SIM_AC_OPTION_INLINE()
 SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
 SIM_AC_OPTION_HOSTENDIAN
 SIM_AC_OPTION_WARNINGS
+SIM_AC_OPTION_RESERVED_BITS(1)
 
 # DEPRECATED
 #
@@ -19,6 +20,8 @@ SIM_AC_OPTION_WARNINGS
 #
 case "${target}" in
   mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
+  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
+  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
   *)                    SIM_SUBTARGET="";;
 esac
 AC_SUBST(SIM_SUBTARGET)
@@ -35,6 +38,8 @@ case "${target}" in
   mips64vr*el-*-*)      default_endian=LITTLE_ENDIAN ;;
   mips64*-*-*)          default_endian=BIG_ENDIAN ;;
   mips16*-*-*)          default_endian=BIG_ENDIAN ;;
+  mipsisa32*-*-*)       default_endian=BIG_ENDIAN ;;
+  mipsisa64*-*-*)       default_endian=BIG_ENDIAN ;;
   mips*-*-*)            default_endian=BIG_ENDIAN ;;
   *)                    default_endian=BIG_ENDIAN ;;
 esac
@@ -49,6 +54,8 @@ mips_addr_bitsize=
 case "${target}" in
   mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
   mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
+  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
+  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
   mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
   *)                    mips_bitsize=64 ; mips_msb=63 ;;
 esac
@@ -67,6 +74,8 @@ case "${target}" in
                        ;;
   mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
   mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
+  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
+  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
   mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
   *)                    mips_fpu=HARD_FLOATING_POINT ;;
 esac
@@ -116,6 +125,18 @@ case "${target}" in
                        sim_igen_filter="32,64,f"
                        sim_m16_filter="16"
                        ;;
+  mipsisa32*-*-*)      sim_gen=IGEN
+                       sim_igen_machine="-M mips32"
+                       sim_igen_filter="32,f"
+                       ;;
+  mipsisa64sb1*-*-*)   sim_gen=IGEN
+                       sim_igen_machine="-M mips64,sb1"
+                       sim_igen_filter="32,64,f"
+                       ;;
+  mipsisa64*-*-*)      sim_gen=IGEN
+                       sim_igen_machine="-M mips64,mips3d"
+                       sim_igen_filter="32,64,f"
+                       ;;
   mips*lsi*)           sim_gen=M16
                        sim_igen_machine="-M mipsIII,mips16"
                        sim_m16_machine="-M mips16,mipsIII"
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