+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate.
+
+
+ * aclocal.m4, configure: Regenerate.
+
+
+ * configure: Rebuild.
+
+
+ * configure: Regenerate.
+
+
+ * configure.ac: Address use of dv-sockser.o.
+ * tconfig.in: Conditionalize use of dv_sockser_install.
+ * configure: Regenerated.
+ * config.in: Regenerated.
+
+
+ * mips/mips3264r2.igen (rdhwr): New.
+
+
+ * configure.ac: Always link against dv-sockser.o.
+ * configure: Regenerate.
+
+
+ * config.in, configure: Regenerate.
+
+
+ PR 14072
+ * interp.c: Include config.h before system header files.
+
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+
+ * aclocal.m4: New file.
+ * configure: Regenerate.
+
+
+ * configure: Regenerate after common/acinclude.m4 update.
+
+
+ * configure.ac: Change include to common/acinclude.m4.
+
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+
+ * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
+ $(SIM_EXTRA_DEPS).
+ (tmp-mach-multi): Exit early when igen fails.
+
+
+ * interp.c (sim_do_command): Delete.
+
+
+ * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
+ (tx3904sio_fifo_reset): Likewise.
+ * interp.c (sim_monitor): Likewise.
+
+
+ * interp.c (sim_write): Add const to buffer arg.
+
+
+ * interp.c: Don't include sysdep.h
+
+
+ * configure: Regenerate.
+
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+
+ * configure: Regenerate.
+
+
+ * configure: Regenerate to track ../common/common.m4 changes.
+ * config.in: Ditto.
+
+
+ * configure: Regenerate.
+
+
+ * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
+ that unconditionally allows fmt_ps.
+ (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
+ (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
+ (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
+ filter from 64,f to 32,f.
+ (PREFX): Change filter from 64 to 32.
+ (LDXC1, LUXC1): Provide separate mips32r2 implementations
+ that use do_load_double instead of do_load. Make both LUXC1
+ versions unpredictable if SizeFGR () != 64.
+ (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
+ instead of do_store. Remove unused variable. Make both SUXC1
+ versions unpredictable if SizeFGR () != 64.
+
+
+ * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
+ (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
+ shifts for that case.
+
+
+ * interp.c (options enum): Add OPTION_INFO_MEMORY.
+ (display_mem_info): New static variable.
+ (mips_option_handler): Handle OPTION_INFO_MEMORY.
+ (mips_options): Add info-memory and memory-info.
+ (sim_open): After processing the command line and board
+ specification, check display_mem_info. If it is set then
+ call the real handler for the --memory-info command line
+ switch.
+
+
+ * configure.ac: Change license of multi-run.c to GPL version 3.
+ * configure: Regenerate.
+
+
+ * configure.ac, configure: Revert last patch.
+
+
+ * configure.ac (sim_mipsisa3264_configs): New variable.
+ (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
+ every configuration support all four targets, using the triplet to
+ determine the default.
+ * configure: Regenerate.
+
+
+ * Makefile.in (m16run.o): New rule.
+
+
+ * mips3264r2.igen (DSHD): Fix compile warning.
+
+
+ * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
+ CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
+ NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
+ RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
+ for mips32r2.
+
+
+ * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
+ and mips64.
+
+
+ * dsp.igen: Update copyright notice.
+ * dsp2.igen: Fix copyright notice.
+
+
+ * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
+ * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
+ Add dsp2 to sim_igen_machine.
+ * configure: Regenerate.
+ * dsp.igen (do_ph_op): Add MUL support when op = 2.
+ (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
+ (mulq_rs.ph): Use do_ph_mulq.
+ (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
+ * mips.igen: Add dsp2 model and include dsp2.igen.
+ (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
+ for *mips32r2, *mips64r2, *dsp.
+ (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
+ for *mips32r2, *mips64r2, *dsp2.
+ * dsp2.igen: New file for MIPS DSP REV 2 ASE.
+
+
+ * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
+ jumps with hazard barrier.
+
+
+ * interp.c (sim_monitor): Flush stdout and stderr file descriptors
+ after each call to sim_io_write.
+
+
+ * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
+ supported by this simulator.
+ (decode_coproc): Recognise additional CP0 Config registers
+ correctly.
+
+
+ * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
+ uninterpreted formats. If fmt is one of the uninterpreted types
+ don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
+ fmt_word, and fmt_uninterpreted_64 like fmt_long.
+ (store_fpr): When writing an invalid odd register, set the
+ matching even register to fmt_unknown, not the following register.
+ * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
+ the the memory window at offset 0 set by --memory-size command
+ line option.
+ (sim_store_register): Handle storing 4 bytes to an 8 byte floating
+ point register.
+ (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
+ register.
+ (sim_monitor): When returning the memory size to the MIPS
+ application, use the value in STATE_MEM_SIZE, not an arbitrary
+ hardcoded value.
+ (cop_lw): Don' mess around with FPR_STATE, just pass
+ fmt_uninterpreted_32 to StoreFPR.
+ (cop_sw): Similarly.
+ (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
+ (cop_sd): Similarly.
+ * mips.igen (not_word_value): Single version for mips32, mips64
+ and mips16.
+
+
+ * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
+ MBytes.
+
+
+ * configure.ac (mips*-sde-elf*): Move in front of generic machine
+ configuration.
+ * configure: Regenerate.
+
+
+ * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
+ Add mdmx to sim_igen_machine.
+ (mipsisa64*-*-*): Likewise. Remove dsp.
+ (mipsisa32*-*-*): Remove dsp.
+ * configure: Regenerate.
+
+
+ * configure.ac: Add mips*-sde-elf* target.
+ * configure: Regenerate.
+
+
+ * acconfig.h: Remove.
+ * config.in, configure: Regenerate.
+
+
+ * dsp.igen (do_w_op): Fix compiler warning.
+
+
+ * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
+ sim_igen_machine.
+ * configure: Regenerate.
+ * mips.igen (model): Add smartmips.
+ (MADDU): Increment ACX if carry.
+ (do_mult): Clear ACX.
+ (ROR,RORV): Add smartmips.
+ (include): Include smartmips.igen.
+ * sim-main.h (ACX): Set to REGISTERS[89].
+ * smartmips.igen: New file.
+
+
+ * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
+ mips3264r2.igen. Add missing dependency rules.
+ * m16e.igen: Support for mips16e save/restore instructions.
+
+
+ * configure: Regenerated.
+
+
+ * configure: Regenerated.
+
+
+ * configure: Regenerated.
+
+
+ * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
+
+
+ * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
+ statement.
+
+
+ * configure: Regenerate.
+
+
+ * Makefile.in (SIM_OBJS): Add dsp.o.
+ (dsp.o): New dependency.
+ (IGEN_INCLUDE): Add dsp.igen.
+ * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
+ mipsisa64*-*-*): Add dsp to sim_igen_machine.
+ * configure: Regenerate.
+ * mips.igen: Add dsp model and include dsp.igen.
+ (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
+ because these instructions are extended in DSP ASE.
+ * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
+ adding 6 DSP accumulator registers and 1 DSP control register.
+ (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
+ AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
+ DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
+ DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
+ DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
+ DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
+ DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
+ DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
+ DSPCR_CCOND_SMASK): New define.
+ (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
+ * dsp.c, dsp.igen: New files for MIPS DSP ASE.
+
* tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
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