+CODE_FRAGMENT
+.
+.typedef enum bfd_reloc_code_real
+.{
+. {* Basic absolute relocations *}
+. BFD_RELOC_64,
+. BFD_RELOC_32,
+. BFD_RELOC_26,
+. BFD_RELOC_16,
+. BFD_RELOC_14,
+. BFD_RELOC_8,
+.
+. {* PC-relative relocations *}
+. BFD_RELOC_64_PCREL,
+. BFD_RELOC_32_PCREL,
+. BFD_RELOC_24_PCREL, {* used by i960 *}
+. BFD_RELOC_16_PCREL,
+. BFD_RELOC_8_PCREL,
+.
+. {* Linkage-table relative *}
+. BFD_RELOC_32_BASEREL,
+. BFD_RELOC_16_BASEREL,
+. BFD_RELOC_8_BASEREL,
+.
+. {* The type of reloc used to build a contructor table - at the moment
+. probably a 32 bit wide abs address, but the cpu can choose. *}
+. BFD_RELOC_CTOR,
+.
+. {* 8 bits wide, but used to form an address like 0xffnn *}
+. BFD_RELOC_8_FFnn,
+.
+. {* 32-bit pc-relative, shifted right 2 bits (i.e., 30-bit
+. word displacement, e.g. for SPARC) *}
+. BFD_RELOC_32_PCREL_S2,
+. {* signed 16-bit pc-relative, shifted right 2 bits (e.g. for MIPS) *}
+. BFD_RELOC_16_PCREL_S2,
+. {* this is used on the Alpha *}
+. BFD_RELOC_23_PCREL_S2,
+.
+. {* High 22 bits of 32-bit value, placed into lower 22 bits of
+. target word; simple reloc. *}
+. BFD_RELOC_HI22,
+. {* Low 10 bits. *}
+. BFD_RELOC_LO10,
+.
+. {* For systems that allocate a Global Pointer register, these are
+. displacements off that register. These relocation types are
+. handled specially, because the value the register will have is
+. decided relatively late. *}
+. BFD_RELOC_GPREL16,
+. BFD_RELOC_GPREL32,
+.
+. {* Reloc types used for i960/b.out. *}
+. BFD_RELOC_I960_CALLJ,
+.
+. {* now for the sparc/elf codes *}
+. BFD_RELOC_NONE, {* actually used *}
+. BFD_RELOC_SPARC_WDISP22,
+. BFD_RELOC_SPARC22,
+. BFD_RELOC_SPARC13,
+. BFD_RELOC_SPARC_GOT10,
+. BFD_RELOC_SPARC_GOT13,
+. BFD_RELOC_SPARC_GOT22,
+. BFD_RELOC_SPARC_PC10,
+. BFD_RELOC_SPARC_PC22,
+. BFD_RELOC_SPARC_WPLT30,
+. BFD_RELOC_SPARC_COPY,
+. BFD_RELOC_SPARC_GLOB_DAT,
+. BFD_RELOC_SPARC_JMP_SLOT,
+. BFD_RELOC_SPARC_RELATIVE,
+. BFD_RELOC_SPARC_UA32,
+.
+. {* these are a.out specific? *}
+. BFD_RELOC_SPARC_BASE13,
+. BFD_RELOC_SPARC_BASE22,
+.
+. {* start-sanitize-v9 *}
+. BFD_RELOC_SPARC_10,
+. BFD_RELOC_SPARC_11,
+.#define BFD_RELOC_SPARC_64 BFD_RELOC_64
+. BFD_RELOC_SPARC_OLO10,
+. BFD_RELOC_SPARC_HH22,
+. BFD_RELOC_SPARC_HM10,
+. BFD_RELOC_SPARC_LM22,
+. BFD_RELOC_SPARC_PC_HH22,
+. BFD_RELOC_SPARC_PC_HM10,
+. BFD_RELOC_SPARC_PC_LM22,
+. BFD_RELOC_SPARC_WDISP16,
+. BFD_RELOC_SPARC_WDISP19,
+. BFD_RELOC_SPARC_GLOB_JMP,
+. BFD_RELOC_SPARC_LO7,
+. {* end-sanitize-v9 *}
+.
+. {* Alpha ECOFF relocations. Some of these treat the symbol or "addend"
+. in some special way. *}
+. {* For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
+. writing; when reading, it will be the absolute section symbol. The
+. addend is the displacement in bytes of the "lda" instruction from
+. the "ldah" instruction (which is at the address of this reloc). *}
+. BFD_RELOC_ALPHA_GPDISP_HI16,
+. {* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
+. with GPDISP_HI16 relocs. The addend is ignored when writing the
+. relocations out, and is filled in with the file's GP value on
+. reading, for convenience. *}
+. BFD_RELOC_ALPHA_GPDISP_LO16,
+.
+. {* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
+. the assembler turns it into a LDQ instruction to load the address of
+. the symbol, and then fills in a register in the real instruction.
+.
+. The LITERAL reloc, at the LDQ instruction, refers to the .lita
+. section symbol. The addend is ignored when writing, but is filled
+. in with the file's GP value on reading, for convenience, as with the
+. GPDISP_LO16 reloc.
+.
+. The LITUSE reloc, on the instruction using the loaded address, gives
+. information to the linker that it might be able to use to optimize
+. away some literal section references. The symbol is ignored (read
+. as the absolute section symbol), and the "addend" indicates the type
+. of instruction using the register:
+. 1 - "memory" fmt insn
+. 2 - byte-manipulation (byte offset reg)
+. 3 - jsr (target of branch)
+.
+. The GNU linker currently doesn't do any of this optimizing. *}
+. BFD_RELOC_ALPHA_LITERAL,
+. BFD_RELOC_ALPHA_LITUSE,
+.
+. {* The HINT relocation indicates a value that should be filled into the
+. "hint" field of a jmp/jsr/ret instruction, for possible branch-
+. prediction logic which may be provided on some processors. *}
+. BFD_RELOC_ALPHA_HINT,
+.
+. {* Bits 27..2 of the relocation address shifted right 2 bits;
+. simple reloc otherwise. *}
+. BFD_RELOC_MIPS_JMP,
+.
+. {* High 16 bits of 32-bit value; simple reloc. *}
+. BFD_RELOC_HI16,
+. {* High 16 bits of 32-bit value but the low 16 bits will be sign
+. extended and added to form the final result. If the low 16
+. bits form a negative number, we need to add one to the high value
+. to compensate for the borrow when the low bits are added. *}
+. BFD_RELOC_HI16_S,
+. {* Low 16 bits. *}
+. BFD_RELOC_LO16,
+.
+. {* relocation relative to the global pointer. *}
+.#define BFD_RELOC_MIPS_GPREL BFD_RELOC_GPREL16
+.
+. {* Relocation against a MIPS literal section. *}
+. BFD_RELOC_MIPS_LITERAL,
+.
+. {* MIPS ELF relocations. *}
+. BFD_RELOC_MIPS_GOT16,
+. BFD_RELOC_MIPS_CALL16,
+.#define BFD_RELOC_MIPS_GPREL32 BFD_RELOC_GPREL32
+.
+. {* These are, so far, specific to HPPA processors. I'm not sure that some
+. don't duplicate other reloc types, such as BFD_RELOC_32 and _32_PCREL.
+. Also, many more were in the list I got that don't fit in well in the
+. model BFD uses, so I've omitted them for now. If we do make this reloc
+. type get used for code that really does implement the funky reloc types,
+. they'll have to be added to this list. *}
+. BFD_RELOC_HPPA_32,
+. BFD_RELOC_HPPA_11,
+. BFD_RELOC_HPPA_14,
+. BFD_RELOC_HPPA_17,
+.
+. BFD_RELOC_HPPA_L21,
+. BFD_RELOC_HPPA_R11,
+. BFD_RELOC_HPPA_R14,
+. BFD_RELOC_HPPA_R17,
+. BFD_RELOC_HPPA_LS21,
+. BFD_RELOC_HPPA_RS11,
+. BFD_RELOC_HPPA_RS14,
+. BFD_RELOC_HPPA_RS17,
+. BFD_RELOC_HPPA_LD21,
+. BFD_RELOC_HPPA_RD11,
+. BFD_RELOC_HPPA_RD14,
+. BFD_RELOC_HPPA_RD17,
+. BFD_RELOC_HPPA_LR21,
+. BFD_RELOC_HPPA_RR14,
+. BFD_RELOC_HPPA_RR17,
+.
+. BFD_RELOC_HPPA_GOTOFF_11,
+. BFD_RELOC_HPPA_GOTOFF_14,
+. BFD_RELOC_HPPA_GOTOFF_L21,
+. BFD_RELOC_HPPA_GOTOFF_R11,
+. BFD_RELOC_HPPA_GOTOFF_R14,
+. BFD_RELOC_HPPA_GOTOFF_LS21,
+. BFD_RELOC_HPPA_GOTOFF_RS11,
+. BFD_RELOC_HPPA_GOTOFF_RS14,
+. BFD_RELOC_HPPA_GOTOFF_LD21,
+. BFD_RELOC_HPPA_GOTOFF_RD11,
+. BFD_RELOC_HPPA_GOTOFF_RD14,
+. BFD_RELOC_HPPA_GOTOFF_LR21,
+. BFD_RELOC_HPPA_GOTOFF_RR14,
+.
+. BFD_RELOC_HPPA_DLT_32,
+. BFD_RELOC_HPPA_DLT_11,
+. BFD_RELOC_HPPA_DLT_14,
+. BFD_RELOC_HPPA_DLT_L21,
+. BFD_RELOC_HPPA_DLT_R11,
+. BFD_RELOC_HPPA_DLT_R14,
+.
+. BFD_RELOC_HPPA_ABS_CALL_11,
+. BFD_RELOC_HPPA_ABS_CALL_14,
+. BFD_RELOC_HPPA_ABS_CALL_17,
+. BFD_RELOC_HPPA_ABS_CALL_L21,
+. BFD_RELOC_HPPA_ABS_CALL_R11,
+. BFD_RELOC_HPPA_ABS_CALL_R14,
+. BFD_RELOC_HPPA_ABS_CALL_R17,
+. BFD_RELOC_HPPA_ABS_CALL_LS21,
+. BFD_RELOC_HPPA_ABS_CALL_RS11,
+. BFD_RELOC_HPPA_ABS_CALL_RS14,
+. BFD_RELOC_HPPA_ABS_CALL_RS17,
+. BFD_RELOC_HPPA_ABS_CALL_LD21,
+. BFD_RELOC_HPPA_ABS_CALL_RD11,
+. BFD_RELOC_HPPA_ABS_CALL_RD14,
+. BFD_RELOC_HPPA_ABS_CALL_RD17,
+. BFD_RELOC_HPPA_ABS_CALL_LR21,
+. BFD_RELOC_HPPA_ABS_CALL_RR14,
+. BFD_RELOC_HPPA_ABS_CALL_RR17,
+.
+. BFD_RELOC_HPPA_PCREL_CALL_11,
+. BFD_RELOC_HPPA_PCREL_CALL_12,
+. BFD_RELOC_HPPA_PCREL_CALL_14,
+. BFD_RELOC_HPPA_PCREL_CALL_17,
+. BFD_RELOC_HPPA_PCREL_CALL_L21,
+. BFD_RELOC_HPPA_PCREL_CALL_R11,
+. BFD_RELOC_HPPA_PCREL_CALL_R14,
+. BFD_RELOC_HPPA_PCREL_CALL_R17,
+. BFD_RELOC_HPPA_PCREL_CALL_LS21,
+. BFD_RELOC_HPPA_PCREL_CALL_RS11,
+. BFD_RELOC_HPPA_PCREL_CALL_RS14,
+. BFD_RELOC_HPPA_PCREL_CALL_RS17,
+. BFD_RELOC_HPPA_PCREL_CALL_LD21,
+. BFD_RELOC_HPPA_PCREL_CALL_RD11,
+. BFD_RELOC_HPPA_PCREL_CALL_RD14,
+. BFD_RELOC_HPPA_PCREL_CALL_RD17,
+. BFD_RELOC_HPPA_PCREL_CALL_LR21,
+. BFD_RELOC_HPPA_PCREL_CALL_RR14,
+. BFD_RELOC_HPPA_PCREL_CALL_RR17,
+.
+. BFD_RELOC_HPPA_PLABEL_32,
+. BFD_RELOC_HPPA_PLABEL_11,
+. BFD_RELOC_HPPA_PLABEL_14,
+. BFD_RELOC_HPPA_PLABEL_L21,
+. BFD_RELOC_HPPA_PLABEL_R11,
+. BFD_RELOC_HPPA_PLABEL_R14,
+.
+. BFD_RELOC_HPPA_UNWIND_ENTRY,
+. BFD_RELOC_HPPA_UNWIND_ENTRIES,
+.
+. {* i386/elf relocations *}
+. BFD_RELOC_386_GOT32,
+. BFD_RELOC_386_PLT32,
+. BFD_RELOC_386_COPY,
+. BFD_RELOC_386_GLOB_DAT,
+. BFD_RELOC_386_JUMP_SLOT,
+. BFD_RELOC_386_RELATIVE,
+. BFD_RELOC_386_GOTOFF,
+. BFD_RELOC_386_GOTPC,
+.
+. {* PowerPC/POWER (RS/6000) relocs. *}
+. {* 26 bit relative branch. Low two bits must be zero. High 24
+. bits installed in bits 6 through 29 of instruction. *}
+. BFD_RELOC_PPC_B26,
+. {* 26 bit absolute branch, like BFD_RELOC_PPC_B26 but absolute. *}
+. BFD_RELOC_PPC_BA26,
+. {* 16 bit TOC relative reference. *}
+. BFD_RELOC_PPC_TOC16,
+.
+. {* this must be the highest numeric value *}
+. BFD_RELOC_UNUSED
+. } bfd_reloc_code_real_type;
+*/