2003-07-09 Michael Snyder <[email protected]>

[binutils.git] / sim / sh / ChangeLog

diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index e4f72ae89bcbfb2d2d567ed47fd066eef35ce8a0..6d449ba20989e9f40b7fdb523e5bb2baf2e7f3f5 100644 (file)
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,26 @@
+2003-07-09  Michael Snyder  <[email protected]>
+
+       * gencode.c (pmuls): Expression is mis-parenthesized.
+       * gencode.c (ppi_gensim): For a conditional ppi insn, if the
+       condition is false, we want to return (not break).  A break
+       will take us to the end of the function where registers will
+       be updated, whereas the desired outcome is for nothing to change.
+
+2003-07-03  Michael Snyder  <[email protected]>
+
+       * gencode.c (movs): Fix a couple of text transpositions.
+
+2003-06-27  Michael Snyder  <[email protected]>
+
+       * gencode.c (op tab): Some fix-ups of refs and defs.
+       (ocbi, ocbp): Cache not simulated, but may cause memory fault.
+       (gensym_caselist): Add default case to switch statement.
+       (expand_ppi_code): Add default case to switch statement.
+       * gencode.c (op tab): Implement movca.l.
+       * gencode.c (op movsxy_tab): Fix an error in the bit pattern.
+       * gencode.c (gensim_caselist): The movy instructions use
+       registers R6 and R7 (not R4 and R5 like the movx insns).
+
 2003-06-27  Michael Snyder  <[email protected]>
 
        * gencode.c (op movsxy_tab): Fix up some copy/paste errors