3 * makefile.vms: Update CFLAGS, add clean target.
7 * mips-opc.c: Add "wait". From Ralf Baechle
10 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
11 * configure, config.in: Rebuild.
12 * sysdep.h: Include <stdlib.h> if it exists.
13 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
15 * Makefile.in: Rebuild dependencies.
19 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
22 * mips-opc.c: Add cast when setting mips_opcodes.
27 * v850-dis.c (disassemble): Fix sign extension problem.
28 * v850-opc.c (extract_d*): Fix sign extension problems to make
29 disassembly calculate branch offsets correctly.
34 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
36 * mips-opc.c: Add dctr and dctw.
41 * d30v-dis.c (print_insn): Change the way signed constants
46 * Makefile.in (BFD_H): New variable.
47 (HFILES): New variable.
48 (CFILES): Add all C files.
49 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
50 Delete old dependencies, and build new ones.
51 * dep-in.sed: New file.
55 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
57 start-sanitize-coldfire
60 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
66 * mn10200-opc.c: Change "trap" to "syscall".
67 * mn10300-opc.c: Add new "syscall" instruction.
71 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
72 mulul insns on the coldfire.
76 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
77 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
78 (print_insn_little_arm): Likewise.
83 * i386-dis.c (fetch_data): Add prototype.
84 * m68k-dis.c (fetch_data): Add prototype.
85 (dummy_print_address): Add prototype. Make static.
86 * ppc-opc.c (valid_bo): Add prototype.
87 * sparc-dis.c (build_hash_table): Add prototype.
88 (is_delayed_branch, compute_arch_mask): Add prototypes.
89 (print_insn_sparc): Make several local variables const.
90 (compare_opcodes): Change arguments to const PTR. Add prototype.
91 * sparc-opc.c (arg): Change name field to be const.
92 (lookup_name, lookup_value): Add prototypes. Change table and
93 name parameters to be const.
94 (sparc_encode_asi): Change name parameter to be const.
95 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
96 (sparc_encode_sparclet_cpreg): Likewise.
97 (sparc_decode_asi): Change return type to be const.
98 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
99 (sparc_decode_sparclet_cpreg): Likewise.
103 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
104 Solaris doesn't like the combined options, and the -f is
106 (stamp-tshlink, install): Likewise.
110 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
115 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
119 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
124 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
129 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
133 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
138 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
139 floatformat_to_double to make portable.
140 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
145 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
146 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
150 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
151 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
156 * tic80-opc.c (LSI_SCALED): Renamed from this ...
157 (OFF_SL_BR_SCALED): ... to this, and added the flag
158 TIC80_OPERAND_BASEREL to the flags word.
159 (tic80_opcodes): Replace all occurances of LSI_SCALED with
165 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
166 Change mips_opcodes from const array to a pointer,
167 and change bfd_mips_num_opcodes from const int to int,
168 so that we can increase the size of the mips opcodes table
174 * tic80-opc.c (tic80_predefined_symbols): Revert change to
175 store BITNUM values in the table in one's complement form
176 to match behavior when assembler is given a raw numeric
177 value for a BITNUM operand.
178 * tic80-dis.c (print_operand_bitnum): Ditto.
184 * d30v-opc.c: Removed references to FLAG_X.
189 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
194 * Makefile.in: Added d30v object files.
195 * configure: (bfd_d30v_arch) Rebuilt.
196 * configure.in: (bfd_d30v_arch) Added new case.
197 * d30v-dis.c: New file.
198 * d30v-opc.c: New file.
199 * disassemble.c (disassembler) Add entry for d30v.
205 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
206 representations for the floating point BITNUM values.
210 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
211 in the table in one's complement form, as they appear in the
213 (tic80_symbol_to_value): Use macros to access predefined
215 (tic80_value_to_symbol): Ditto.
216 (tic80_next_predefined_symbol): New function.
217 * tic80-dis.c (print_operand_bitnum): Remove code that did
218 one's complement for BITNUM values.
224 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
229 * makefile.vms: Remove 8 bit characters. Update to latest
234 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
238 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
239 (IMM24_PCREL): Likewise.
243 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
244 address for an extended PC relative instruction that is not a
249 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
255 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
256 (tic80_opcodes): Sort entries so that long immediate forms
257 come after short immediate forms, making it easier for
258 assembler to select the right one for a given operand.
263 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
265 (print_insn_mips16): Likewise.
270 * mips-opc.c: add r5900.
276 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
277 a symbol class that restricts translation to just that
278 class (general register, condition code, etc).
282 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
283 and REG_DEST_E for register operands that have to be
284 an even numbered register. Add REG_FPA for operands that
285 are one of the floating point accumulator registers.
286 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
287 (tic80_opcodes): Change entries that need even numbered
288 register operands to use the new operand table entries.
289 Add "or" entries that are identical to "or.tt" entries.
294 * mips16-opc.c: Add new cases of exit instruction for
296 * mips-dis.c (print_mips16_insn_arg): Display floating point
297 registers in operands of exit instruction. Print `$' before
298 register names in operands of entry and exit instructions.
303 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
304 pairs for all predefined symbols recognized by the assembler.
305 Also used by the disassembling routines.
306 (tic80_symbol_to_value): New function.
307 (tic80_value_to_symbol): New function.
308 * tic80-dis.c (print_operand_control_register,
309 print_operand_condition_code, print_operand_bitnum):
310 Remove private tables and use tic80_value_to_symbol function.
315 * d10v-dis.c (print_operand): Change address printing
316 to correctly handle PC wrapping. Fixes PR11490.
320 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
325 * mips-dis.c (print_insn_mips16): Set insn_info information.
326 (print_mips16_insn_arg): Likewise.
328 * mips-dis.c (print_insn_mips16): Better handling of an extend
329 opcode followed by an instruction which can not be extended.
333 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
334 coldfire moveb instruction to not allow an address register as
335 destination. Although the documentation does not indicate that
336 this is invalid, experiments uncovered unexpected behavior.
337 Added a comment explaining the situation. Thanks to Andreas
338 Schwab for pointing this out to me.
343 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
344 entries are presorted so that entries with the same mnemonic are
345 adjacent to each other in the table. Sort the entries for each
346 instruction so that this is true.
351 * m68k-dis.c: Include <libiberty.h>.
352 (print_insn_m68k): Sort the opcode table on the most significant
353 nibble of the opcode.
358 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
359 "vsub", "vst", "xnor", and "xor" instructions.
360 (V_a1): Renamed from V_a, msb of accumulator reg number.
361 (V_a0): Add macro, lsb of accumulator reg number.
365 * tic80-dis.c (print_insn_tic80): Broke excessively long
366 function up into several smaller ones and arranged for
367 the instruction printing function to be callable recursively
368 to print vector instructions that have both a load and a
369 math instruction packed into a single opcode.
370 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
371 to explain why it comes after the other vector opcodes.
376 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
377 move insns to handle immediate operands.
381 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
382 fix operand mask in the "moveml" entries for the coldfire.
387 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
388 New macros for building vector instruction opcodes.
389 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
390 FMT_LI, which were unused. The field is now a flags field.
391 Remove some opcodes that are possible, but illegal, such
392 as long immediate instructions with doubles for immediate
393 values. Add "vadd" and "vld" instructions.
397 * tic80-opc.c (tic80_operands): Reorder some table entries to make
398 the order more logical. Move the shift alias instructions ("rotl",
399 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
400 interspersed with the regular sr.x and sl.x instructions. Add
401 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
402 "sub", "subu", "swcr", and "trap".
406 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
407 (OFF_SL_PC): Renamed from OFF_SL.
408 (OFF_SS_BR): New operand type for base relative operand.
409 (OFF_SL_BR): New operand type for base relative operand.
410 (REG_BASE): New operand type for base register operand.
411 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
412 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
413 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
415 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
416 10 char field, padded with spaces on rhs, rather than a string
417 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
418 than old TIC80_OPERAND_RELATIVE. Add support for new
419 TIC80_OPERAND_BASEREL flag bit.
423 * tic80-dis.c (print_insn_tic80): Print floating point operands
425 * tic80-opc.c (SPFI): Add single precision floating point
426 immediate operand type.
427 (ROTATE): Add rotate operand type for shifts.
428 (ENDMASK): Add for shifts.
429 (n): Macro for the 'n' bit.
430 (i): Macro for the 'i' bit.
431 (PD): Macro for the 'PD' field.
432 (P2): Macro for the 'P2' field.
433 (P1): Macro for the 'P1' field.
434 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
440 * mn10200-dis.c (disassemble): Mask off unwanted bits after
441 adding in current address for pc-relative operands.
446 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
447 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
448 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
449 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
450 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
451 REG_BASE_M_SI, REG_BASE_M_LI respectively.
452 (REG_SCALED, LSI_SCALED): New operand types.
453 (E): New macro for 'E' bit at bit 27.
454 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
455 opcodes, including the various size flavors (b,h,w,d) for
456 the direct load and store instructions.
460 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
462 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
463 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
464 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
465 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
466 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
467 masks with "MASK_* & ~M_*" to get the M bit reset.
468 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
472 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
473 correctly. Add support for printing TIC80_OPERAND_BITNUM and
474 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
476 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
477 CC, SICR, and LICR table entries.
478 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
479 "bcnd", and "brcr" opcodes.
484 * ppc-opc.c (powerpc_operands): Make comment match the
485 actual fields (no shift field).
486 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
488 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
489 partial implementation, work in progress.
490 * tic80-opc.c (tic80_operands): Begin construction operands table.
491 (tic80_opcodes): Continue populating opcodes table and start
492 filling in the operand indices.
493 (tic80_num_opcodes): Add this.
498 * m68k-opc.c: Add #B case for moveq.
502 * mn10300-dis.c (disassemble): Make sure all variables are initialized
503 before they are used.
508 * v850-opc.c (v850_opcodes): Put curly-braces around operands
509 for "breakpoint" instruction.
514 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
515 (dep): Use ALL_CFLAGS rather than CFLAGS.
520 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
526 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
528 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
533 * mips16-opc.c: Add "abs".
538 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
539 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
540 (disassembler): Add bfd_arch_tic80 support to set disassemble
542 * tic80-dis.c (print_insn_tic80): Add stub.
546 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
547 * configure: Regenerate with autoconf.
548 * tic80-dis.c: Add file.
549 * tic80-opc.c: Add file.
554 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
558 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
559 (mn10200_opcodes): Use it for some logicals and btst insns.
560 Add "break" and "trap" instructions.
562 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
564 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
568 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
569 relative load or add now depends upon whether the instruction is
574 * mn10200-dis.c: Finish writing disassembler.
575 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
576 Fix mask for "jmp (an)".
578 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
579 handle endianness issues for mn10300.
581 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
585 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
586 instruction. Fix opcode field for "movb (imm24),dn".
588 * mn10200-opc.c (mn10200_operands): Fix insertion position
593 * mn10200-opc.c: Create mn10200 opcode table.
594 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
595 but moving along nicely.
599 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
603 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
604 specifiers for fmovem* instructions.
608 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
612 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
617 * mn10300-opc.c: Add some comments explaining the various
620 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
624 * m68k-dis.c (print_insn_arg): Handle new < and > operand
627 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
628 operand specifiers in fmovm* instructions.
632 * ppc-opc.c (insert_li): Give an error if the offset has the two
633 least significant bits set.
637 * mips-dis.c (print_insn_mips16): Separate the instruction from
638 the arguments with a tab, not a space.
642 * mn10300-dis.c (disasemble): Finish conversion to '$' as
645 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
650 * configure: Rebuild with autoconf 2.12.
652 Add support for mips16 (16 bit MIPS implementation):
653 * mips16-opc.c: New file.
654 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
655 (mips16_reg_names): New static array.
656 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
657 after seeing a 16 bit symbol.
658 (print_insn_little_mips): Likewise.
659 (print_insn_mips16): New static function.
660 (print_mips16_insn_arg): New static function.
661 * mips-opc.c: Add jalx instruction.
662 * Makefile.in (mips16-opc.o): New target.
663 * configure.in: Use mips16-opc.o for bfd_mips_arch.
664 * configure: Rebuild.
668 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
669 operand specifiers in *save, *restore and movem* instructions.
671 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
674 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
675 register operands for immediate arithmetic, not, neg, negx, and
676 set according to condition instructions.
678 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
679 specifier of the effective-address operand in immediate forms of
680 arithmetic instructions. The specifier for the immediate operand
681 notes how and where the constant will be stored.
685 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
688 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
691 * mn10300-dis.c (disassemble): Prefix registers with '%'.
695 * mn10300-dis.c (disassemble): Handle register lists.
697 * mn10300-opc.c: Fix handling of register list operand for
698 "call", "ret", and "rets" instructions.
700 * mn10300-dis.c (disassemble): Print PC-relative and memory
701 addresses symbolically if possible.
702 * mn10300-opc.c: Distinguish between absolute memory addresses,
703 pc-relative offsets & random immediates.
705 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
707 (disassemble): Handle SPLIT and EXTENDED operands.
711 * mn10300-dis.c: Rough cut at printing some operands.
713 * mn10300-dis.c: Start working on disassembler support.
714 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
716 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
718 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
722 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
726 * mn10300-opc.c (mn10300_opcodes): Demand parens around
727 register argument is calls and jmp instructions.
731 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
732 getx operand. Fix opcode for mulqu imm,dn.
736 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
737 in MN10300_OPERAND_SPLIT operands for how many bits
738 appear in the basic insn word. Add IMM32_HIGH24,
739 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
740 (mn10300_opcodes): Use new operands as needed.
742 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
743 for bset, bclr, btst instructions.
744 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
746 * mn10300-opc.c (mn10300_operands): Remove many redundant
747 operands. Update opcode table as appropriate.
748 (IMM32): Add MN10300_OPERAND_SPLIT flag.
749 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
753 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
754 operands (for indexed load/stores). Fix bitpos for DI
755 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
756 few instructions that insert immediates/displacements in the
757 middle of the instruction. Add IMM8E for 8 bit immediate in
758 the extended part of an instruction.
759 (mn10300_operands): Use new opcodes as appropriate.
763 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
764 sequential so the assembler never parallelizes it with
769 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
770 a data/address register that appears in register field 0
771 and register field 1.
772 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
776 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
777 standard disassembly.
779 * alpha-opc.c (alpha_operands): Rearrange flags slot.
780 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
781 Recategorize PALcode instructions.
786 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
791 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
792 there are no operand types.
797 * v850-opc.c (D9_RELAX): Renamed from D9, all references
799 (v850_operands): Make sure D22 immediately follows D9_RELAX.
804 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
809 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
810 and sst.w instructions.
812 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
818 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
823 * ppc-opc.c (PPCPWR2): Define.
824 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
829 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
830 field for movhu instruction.
833 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
834 cast value to "long" not "signed long" to keep hpux10
840 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
843 * mn10300-opc.c (FMT*): Remove definitions.
845 * mn10300-opc.c (mn10300_opcodes): Fix destination register
846 for shift-by-register opcodes.
848 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
849 into [AD][MN][01] for encoding the position of the register
854 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
855 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
859 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
860 Fix various typos. Add "PAREN" operand.
862 (mn10300_opcodes): Surround all memory addresses with "PAREN"
863 operands. Fix several typos.
865 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
870 * mn10300-opc.c (FMT_XX): Renumber starting at one.
871 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
873 (mn10300_opcodes): Break opcode format out into its own field.
874 Update many operand fields to deal with signed vs unsigned
875 issues. Fix one or two typos in the "mov" instruction
876 opcode, mask and/or operand fields.
880 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
885 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
886 all opcodes. Very rough cut at operands for all opcodes.
888 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
893 * mn10200-opc.c, mn10300-opc.c: New files.
894 * mn10200-dis.c, mn10300-dis.c: New files.
895 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
896 * disassemble.c: Break mn10x00 support into 10200 and 10300
898 * configure.in: Likewise.
899 * configure: Rebuilt.
903 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
907 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
909 * disassemble (ARCH_mn10x00): Define.
910 (disassembler): Handle bfd_arch_mn10x00.
911 * configure.in: Recognize bfd_mn10x00_arch.
912 * configure: Rebuilt.
916 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
917 accordingly. Don't declare functions using op_rtn.
922 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
923 params to be more standard.
924 * (disassemble): Print absolute addresses and symbolic names for
925 branch and jump targets.
926 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
928 * (v850_opcodes): Add breakpoint insn.
933 * m68k-opc.c: Move the fmovemx data register cases before the
934 other cases, so that they get recognized before the data register
935 does gets treated as a degenerate register list.
939 * mips-opc.c: Add a case for "div" and "divu" with two registers
940 and a destination of $0.
944 * mips-dis.c (print_insn_arg): Add prototype.
945 (_print_insn_mips): Ditto.
949 * mips-dis.c (print_insn_arg): Print condition code registers as
954 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
959 * v850-dis.c (disassemble): Make static. Provide prototype.
963 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
968 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
969 ']' characters into the output stream.
970 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
971 Add "memop" field to all opcodes (for the disassembler).
972 Reorder opcodes so that "nop" comes before "mov" and "jr"
975 * v850-dis.c (print_insn_v850): Fix typo in last change.
977 * v850-dis.c (print_insn_v850): Properly handle disassembling
978 a two byte insn at the end of a memory region when the memory
979 region's size is only two byte aligned.
981 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
983 * v850-dis.c (v850_reg_names): Define.
984 (v850_sreg_names, v850_cc_names): Likewise.
985 (disassemble): Very rough cut at printing operands (unformatted).
987 * v850-opc.c (BOP_MASK): Fix.
988 (v850_opcodes): Fix mask for jarl and jr.
990 * v850-dis.c: New file. Skeleton for disassembler support.
991 * Makefile.in Remove v850 references, they're not needed here
992 and they weren't being sanitized away.
993 * configure.in: Add v850-dis.o when building v850 toolchains.
994 * configure: Rebuilt.
995 * disassemble.c (disassembler): Call v850 disassembler.
997 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
998 (insert_d8_6, extract_d8_6): New functions.
999 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
1000 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
1002 (IF4A, IF4B): Use "D7" instead of "D7S".
1003 (IF4C, IF4D): Use "D8_7" instead of "D8".
1004 (IF4E, IF4F): New. Use "D8_6".
1005 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
1006 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
1008 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
1009 (v850_operands): Change D16 to D16_15, use special insert/extract
1010 routines. New new D16 that uses the generic insert/extract code.
1011 (IF7A, IF7B): Use D16_15.
1012 (IF7C, IF7D): New. Use D16.
1013 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
1015 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
1016 message. Issue an error if the branch offset is odd.
1018 * v850-opc.c: Add notes about needing special insert/extract
1019 for all the load/store insns, except "ld.b" and "st.b".
1021 * v850-opc.c (insert_d22, extract_d22): New functions.
1022 (v850_operands): Use insert_d22 and extract_d22 for
1024 (insert_d9): Fix range check.
1028 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
1029 and set bits field to D9 and D22 operands.
1033 * v850-opc.c (v850_operands): Define SR2 operand.
1034 (v850_opcodes): "ldsr" uses R1,SR2.
1036 * v850-opc.c (v850_opcodes): Fix opcode specs for
1037 sld.w, sst.b, sst.h, sst.w, and nop.
1041 * v850-opc.c (v850_opcodes): Add null opcode to mark the
1042 end of the opcode table.
1047 * d10v-opc.c (pre_defined_registers): Added register pairs,
1048 "r0-r1", "r2-r3", etc.
1053 * v850-opc.c (v850_operands): Make I16 be a signed operand.
1054 Create I16U for an unsigned 16bit mmediate operand.
1055 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
1057 * v850-opc.c (v850_operands): Define EP operand.
1058 (IF4A, IF4B, IF4C, IF4D): Use EP.
1060 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
1061 with immediate operand, "movhi". Tweak "ldsr".
1063 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
1064 correct. Get sld.[bhw] and sst.[bhw] closer.
1066 * v850-opc.c (v850_operands): "not" is a two byte insn
1068 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
1070 * v850-opc.c (v850_operands): D16 inserts at offset 16!
1072 * v850-opc.c (two): Get order of words correct.
1074 * v850-opc.c (v850_operands): I16 inserts at offset 16!
1076 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
1077 register source and destination operands.
1078 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
1080 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
1081 same thinko in "trap" opcode.
1083 * v850-opc.c (v850_opcodes): Add initializer for size field
1086 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
1087 Add D8 for 8-bit unsigned field in short load/store insns.
1088 (IF4A, IF4D): These both need two registers.
1089 (IF4C, IF4D): Define. Use 8-bit unsigned field.
1090 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
1091 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
1092 for "ldsr" and "stsr".
1093 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
1096 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
1097 short store word (sst.w).
1101 * v850-opc.c (v850_operands): Added insert and extract fields,
1102 pointers to functions that handle unusual operand encodings.
1106 * v850-opc.c (v850_opcodes): Enable "trap".
1108 * v850-opc.c (v850_opcodes): Fix order of displacement
1109 and register for "set1", "clr1", "not1", and "tst1".
1113 * v850-opc.c (v850_operands): Add "B3" support.
1114 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
1117 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
1119 * v850-opc.c: Close unterminated comment.
1123 * v850-opc.c (v850_operands): Add flags field.
1124 (v850_opcodes): add move opcodes.
1128 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
1129 * configure: (bfd_v850v_arch) Add new case.
1130 * configure.in: (bfd_v850_arch) Add new case.
1131 * v850-opc.c: New file.
1136 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
1140 * d10v-opc.c: Add additional information to the opcode
1141 table to help determinine which instructions can be done
1146 * mpw-make.sed: Update editing of include pathnames to be
1151 * arm-opc.h: Added "bx" instruction definition.
1155 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
1159 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
1163 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
1167 * makefile.vms: Update for alpha-opc changes.
1171 * i386-dis.c (print_insn_i386): Actually return the correct value.
1172 (ONE, OP_ONE): #ifdef out; not used.
1176 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
1177 Changed subi operand type to treat 0 as 16.
1181 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
1186 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
1187 memory transfer instructions. Add new format string entries %h and %s.
1188 * arm-dis.c: (print_insn_arm): Provide decoding of the new
1193 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
1194 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
1198 * alpha-dis.c (print_insn_alpha_osf): Remove.
1199 (print_insn_alpha_vms): Remove.
1200 (print_insn_alpha): Make globally visible. Chose the register
1201 names based on info->flavour.
1202 * disassemble.c: Always return print_insn_alpha for the alpha.
1206 * d10v-dis.c (dis_long): Handle unknown opcodes.
1210 * d10v-opc.c: Changes to support signed and unsigned numbers.
1211 All instructions with the same name that have long and short forms
1212 now end in ".l" or ".s". Divs added.
1213 * d10v-dis.c: Changes to support signed and unsigned numbers.
1217 * d10v-dis.c: Change all functions to use info->print_address_func.
1221 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
1222 move ccr/sr insns more strict so that the disassembler only
1223 selects them when the addressing mode is data register.
1226 * d10v-opc.c (pre_defined_registers): Declare.
1227 * d10v-dis.c (print_operand): Now uses pre_defined_registers
1228 to pick a better name for the registers.
1232 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
1233 operands for fexpand and fpmerge. From Christian Kuehnke
1238 * alpha-dis.c (print_insn_alpha): No longer the user-visible
1239 print routine. Take new regnames and cpumask arguments.
1240 Kill the environment variable nonsense.
1241 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
1242 (print_insn_alpha_vms): New function. Do VMS style regnames.
1243 * disassemble.c (disassembler): Test bfd flavour to pick
1244 between OSF and VMS routines. Default to OSF.
1248 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
1249 * configure: Rebuild.
1250 * Makefile.in (install): Use @INSTALL_SHLIB@.
1254 * configure: (bfd_d10v_arch) Add new case.
1255 * configure.in: (bfd_d10v_arch) Add new case.
1256 * d10v-dis.c: New file.
1257 * d10v-opc.c: New file.
1258 * disassemble.c (disassembler) Add entry for d10v.
1262 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
1263 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
1267 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
1268 distinguish between variants of the instruction set.
1269 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
1270 distinguish between variants of the instruction set.
1274 * i386-dis.c (print_insn_i8086): New routine to disassemble using
1275 the 8086 instruction set.
1276 * i386-dis.c: General cleanups. Make most things static. Add
1277 prototypes. Get rid of static variables aflags and dflags. Pass
1278 them as args (to almost everything).
1282 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
1284 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
1286 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
1287 if the next arg is marked with SRC_IN_DST. Gross.
1289 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
1290 we're looking for and find EXR.
1292 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
1293 if we're looking for KBIT and we don't find it.
1295 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
1298 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
1299 3bit immediate operands.
1303 * Released binutils 2.7.
1305 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
1310 * alpha-opc.c: Correct second case of "mov" to use OPRL.
1314 * sparc-dis.c (print_insn_sparclite): New routine to print
1315 sparclite instructions.
1319 * m68k-opc.c (m68k_opcodes): Add coldfire support.
1323 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
1324 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
1325 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
1329 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
1330 Use autoconf-set values.
1331 (docdir, oldincludedir): Removed.
1332 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1336 * alpha-opc.c: New file.
1337 * alpha-opc.h: Remove.
1338 * alpha-dis.c: Complete rewrite to use new opcode table.
1339 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
1340 * configure: Rebuild with autoconf 2.10.
1341 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
1342 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
1344 (alpha-opc.o): New target.
1348 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
1349 Set imm_added_to_rs1 even if the source and destination register
1352 * sparc-opc.c: Add some two operand forms of the wr instruction.
1356 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
1359 * disassemble.c (disassembler): Handle H8/S.
1360 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
1364 * sparc-opc.c: Add beq/teq as aliases for be/te.
1366 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
1371 * makefile.vms: New file.
1373 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
1377 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
1382 * i386-dis.c (OP_OFF): Call append_prefix.
1386 * ppc-opc.c (instruction encoding macros): Add explicit casts to
1387 unsigned long to silence a warning from the Solaris PowerPC
1392 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
1396 * sparc-dis.c (X_IMM,X_SIMM): New macros.
1398 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
1399 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
1400 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
1401 cpush, cpusha, cpull sparclet insns.
1405 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
1409 * sparc-opc.c: Set F_FBR on floating point branch instructions.
1410 Set F_FLOAT on other floating point instructions.
1414 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
1416 (powerpc_opcodes): Add 860/821 specific SPRs.
1420 * configure.in: Permit --enable-shared to specify a list of
1421 directories. Set and substitute BFD_PICLIST.
1422 * configure: Rebuild.
1423 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
1424 uses. Set to @BFD_PICLIST@.
1428 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
1429 not "abs", which may be needed for the absolute in something
1430 like btst #0,@10:8. Print L_3 immediates separately from other
1431 immediates. Change ABSMOV reference to ABS8MEM.
1435 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
1436 (current_arch_mask): New static global.
1437 (compute_arch_mask): New static function.
1438 (print_insn_sparc): Delete sparc_v9_p. New static local
1439 current_mach. Resort opcode table if current_mach changes.
1440 Generalize "insn not supported" test.
1441 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
1442 Delete test for v9/!v9.
1443 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
1445 (brfc): Split into CBR and FBR for coprocessor/fp branches.
1446 (brfcx): Renamed to FBRX.
1447 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
1448 coprocessor mnemonics are not supported on the sparclet).
1449 (condf): Renamed to CONDF.
1450 (SLCBCC2): Delete F_ALIAS flag.
1454 * sparc-opc.c (sparc_opcodes): rd must be 0 for
1455 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
1459 * Makefile.in (config.status): Depend upon BFD VERSION file, so
1460 that the shared library version number is set correctly.
1464 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
1466 * configure: Rebuild.
1470 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
1475 * configure: Rebuild with autoconf 2.8.
1479 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
1480 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
1484 * configure.in: Don't set SHLIB or SHLINK to an empty string,
1485 since they appear as targets in Makefile.in.
1486 * configure: Rebuild.
1490 * mpw-make.sed: Edit out shared library support bits.
1494 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
1495 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
1496 (sparc_opcodes): Add sparclet insns.
1497 (sparclet_cpreg_table): New static local.
1498 (sparc_{encode,decode}_sparclet_cpreg): New functions.
1499 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
1503 * i386-dis.c (index16): New static variable.
1504 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
1506 (OP_indirE): Return result of OP_E.
1507 (OP_E): Check for 16 bit addressing mode, and disassemble
1508 correctly. Optimised 32 bit case a little. Don't print
1509 "(base,index,scale)" when sib specifies only an offset.
1513 * configure.in: Set and substitute SHLIB_DEP.
1514 * configure: Rebuild.
1515 * Makefile.in (SHLIB_DEP): New variable.
1516 (LIBIBERTY_LISTS, BFD_LIST): New variables.
1517 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
1518 COMMON_SHLIB, add them to piclist with appropriate modifications.
1519 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
1520 here: just use piclist.
1524 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
1525 (print_insn_sparc): Rewrite v9/not-v9 tests.
1526 (compare_opcodes): Likewise.
1527 * sparc-opc.c (MASK_<ARCH>): Define.
1528 (v6,v7,v8,sparclite,v9,v9a): Redefine.
1529 (sparclet,v6notv9): Define.
1530 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
1531 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
1535 * configure.in: Call AC_PROG_CC before configure.host.
1536 * configure: Rebuild.
1538 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
1542 * i386-dis.c (onebyte_has_modrm): New static array.
1543 (twobyte_has_modrm): New static array.
1544 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
1548 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
1553 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
1558 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
1559 m68010up, not just m68020up | cpu32.
1561 * Makefile.in (SONAME): New variable.
1562 ($(SHLINK)): Make a link to the transformed name, as well.
1563 (stamp-tshlink): New target.
1564 (install): Skip stamp-tshlink during install.
1568 * configure.in: Call AC_ARG_PROGRAM.
1569 * configure: Rebuild.
1570 * Makefile.in (program_transform_name): New variable.
1571 (install): Transform library name before installing it.
1575 * i960-dis.c (mem): Add HX dcinva instruction.
1577 Support for building as a shared library, based on patches from
1579 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
1580 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
1581 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
1582 * configure: Rebuild.
1583 * Makefile.in (ALLLIBS): New variable.
1584 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
1585 (COMMON_SHLIB, SHLINK): New variables.
1586 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
1587 (STAGESTUFF): Remove variable.
1588 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
1589 (stamp-piclist, piclist): New targets.
1590 ($(SHLIB), $(SHLINK)): New targets.
1591 ($(OFILES)): Depend upon stamp-picdir.
1592 (disassemble.o): Build twice if PICFLAG is set.
1593 (MOSTLYCLEAN): Add pic/*.o.
1594 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
1595 (distclean): Remove pic and stamp-picdir.
1596 (install): Install shared libraries.
1597 (stamp-picdir): New target.
1601 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
1602 Print unknown instruction as "unknown", rather than in hex.
1606 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
1610 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
1614 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
1615 when necessary. From Ulrich Drepper
1620 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
1621 sparc_num_opcodes. Update architecture enum values.
1622 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
1623 (sparc_opcode_lookup_arch): New function.
1624 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
1625 (sparc_opcodes): Add v9a shutdown insn.
1629 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
1630 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
1632 (print_insn_sparc64): Deleted.
1633 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
1636 * sparc-opc.c (architecture_pname): Add v9a.
1640 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
1641 incorrectly defined as 0x16 when it should be 0x15.
1642 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
1643 (alpha_insn_set): added cvtst and cvttq float ops. Also added
1644 excb (exception barrier) which is defined in the Alpha
1645 Architecture Handbook version 2.
1646 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
1647 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
1648 disassembled as or, for example.
1652 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
1653 (_print_insn_mips): Change i from int to unsigned int.
1657 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
1658 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
1662 * i386-dis.c: Added Pentium Pro instructions.
1666 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
1671 * sh-opc.h (sh_nibble_type): Added REG_B.
1672 (sh_arg_type): Added A_REG_B.
1673 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
1675 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
1679 * disassemble.c (disassembler): Use new bfd_big_endian macro.
1683 * Makefile.in (distclean): Remove stamp-h. From Ronald
1689 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
1694 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
1695 (sh_table): Added many SH3 opcodes.
1696 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
1700 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
1701 (subco,subco.): Mark this PPC, not PPCCOM.
1705 * configure: Rebuild with autoconf 2.7.
1709 * configure: Rebuild with autoconf 2.6.
1713 * configure.in: Sort list of architectures. Accept but do nothing
1714 for alliant, convex, pyramid, romp, and tahoe.
1718 * a29k-dis.c (print_special): Change num to unsigned int.
1722 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
1727 * configure.in: Call AC_CHECK_PROG to find and cache AR.
1728 * configure: Rebuilt.
1732 * configure.in: Add case for bfd_i860_arch.
1733 * configure: Rebuild.
1737 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
1738 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
1739 (NEXTDOUBLE): Likewise.
1740 (print_insn_m68k): Don't match fmoveml if there is more than one
1741 register in the list.
1742 (print_insn_arg): Handle a place of '8' for a type of 'L'.
1746 * m68k-opc.c: Use #W rather than #w.
1747 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
1751 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
1752 and likewise for all the dbxx opcodes.
1756 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
1760 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
1761 the VR4100 specific instructions to the mips_opcodes structure.
1765 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
1766 ugly Metrowerks bug in CW6, is fixed in CW7.
1770 * ppc-opc.c (whole file): Add flags for common/any support.
1774 * Makefile.in (BISON): Remove macro.
1775 (FLAGS_TO_PASS): Remove BISON.
1781 * m68k-dis.c (print_insn_m68k): Recognize all two-word
1782 instructions that take no args by looking at the match mask.
1783 (print_insn_arg): Always print "%" before register names.
1784 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
1785 [case '_']: Don't print "@#" before address.
1786 [case 'J']: Use "%s" as format string, not register name.
1787 [case 'B']: Treat place == 'C' like 'l' and 'L'.
1791 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
1798 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
1799 (alpha_insn_set): added definitions for VAX floating point
1800 instructions (Unix compilers don't generate these, but handcoded
1801 assembly might still use them).
1803 * alpha-dis.c (print_insn_alpha): added support for disassembling
1804 the miscellaneous instructions in the Alpha instruction set.
1808 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
1809 no longer create sysdep.h, sed ppc-opc.c to work around a
1810 serious Metrowerks C bug.
1811 * mpw-make.in: Remove.
1812 * mpw-make.sed: New file, used by mpw-configure to edit
1813 Makefile.in into an MPW makefile.
1817 * Makefile.in (maintainer-clean): New synonym for realclean.
1821 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
1822 which use '0', '1', and '2' instead. Specify the proper size for
1823 a pmove immediate operand. Correct the pmovefd patterns to be
1824 moves to a register, not from a register.
1825 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
1829 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
1830 %psr, %wim, %tbr as F_NOTV9.
1834 * Makefile.in (Makefile): Just rebuild Makefile when running
1836 (config.h, stamp-h): New targets.
1837 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
1838 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
1839 rebuilding config.h.
1840 * configure: Rebuild.
1842 * mips-opc.c: Change unaligned loads and stores with "t,A"
1843 operands to use "t,A(b)".
1847 * sh-dis.c (print_insn_shx): Add F_FR0 support.
1851 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
1852 until 3 instead of until 2.
1856 * Makefile.in (ALL_CFLAGS): Define.
1857 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
1858 (MOSTLYCLEAN): Add config.log.
1859 (distclean): Don't remove config.log.
1860 * configure.in: Substitute HDEFINES.
1861 * configure: Rebuild.
1865 * sh-opc.h (sh_arg_type): Add F_FR0.
1866 (sh_table, case fmac): Add F_FR0 as first argument.
1870 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
1874 * sparc-dis.c: Remove all references to NO_V9.
1878 * aclocal.m4: Just include ../bfd/aclocal.m4.
1879 * configure: Rebuild.
1883 * sparc-dis.c (X_DISP19): Define.
1884 (print_insn, case 'G'): Use it.
1885 (print_insn, case 'L'): Sign extend displacement.
1889 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
1890 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
1891 host_makefile_frag or frags.
1892 * aclocal.m4: New file.
1893 * configure: Rebuild.
1894 * Makefile.in (INSTALL): Set to @INSTALL@.
1895 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
1896 (INSTALL_DATA): Set to @INSTALL_DATA@.
1898 (AR_FLAGS): Set to rc rather than qc.
1899 (CC): Define as @CC@.
1900 (CFLAGS): Set to @CFLAGS@.
1901 (@host_makefile_frag@): Remove.
1902 (config.status): Remove dependency upon @frags@.
1904 * configure.in: ../bfd/config.bfd now just sets shell variables.
1905 Use them rather than looking through target Makefile fragments.
1906 * configure: Rebuild.
1910 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
1914 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
1915 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
1918 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
1919 (lookup_{name,value}): New functions.
1920 (prefetch_table): New static local.
1921 (sparc_{encode,decode}_prefetch): New functions.
1922 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
1926 * sh-opc.h: Add blank lines to improve readabililty of sh3e
1931 * sh-dis.c: Correct comment on first line of file.
1935 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
1937 * sparc-opc.c (asi, membar): New static locals.
1938 (sparc_{encode,decode}_{asi,membar}): New functions.
1939 (sparc_opcodes, membar insn): Fix.
1940 * sparc-dis.c (print_insn): Call sparc_decode_asi.
1941 Support decoding of membar masks.
1946 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
1950 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
1951 and likewise for the other branches. Add bhs as an alias for bcc,
1952 and likewise for the size variants. Add dbhs as an alias for
1957 * sh-opc.h (FP sts instructions): Update to match reality.
1961 * m68k-dis.c: (fpcr_names): Add % before all register names.
1962 (reg_names): Likewise.
1963 (print_insn_arg): Don't explicitly print % before register names.
1964 Add % before register names in static array names. In case 'r',
1965 print data registers as `@(Dn)', not `Dn@'. When printing a
1966 memory address, don't print @# before it.
1967 (print_indexed): Change base_disp and outer_disp from int to
1968 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
1969 syntax. Sign extend 8 byte displacement correctly.
1970 (print_base): Print using MIT syntax. Print zpc when appropriate.
1971 Change parameter disp from int to bfd_vma.
1973 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
1978 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
1979 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
1980 * sh-opc.h (sh_arg_type): Add new operand types.
1981 (sh_table): Add new opcodes from SH3E Floating Point ISA.
1985 * Makefile.in (distclean): Remove generated file config.h.
1989 * Makefile.in (distclean): Remove generated file config.h.
1993 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
1995 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
1997 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
1998 rather than numopcodes. Use m68k_opcodes rather than removed
1999 opcode function. Don't check F_ALIAS.
2000 (print_insn_arg): Change first parameter to be const char *.
2001 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
2002 (m68k-opc.o): New target.
2003 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
2004 * configure: Rebuild.
2008 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
2009 (opcode_bits, opcode_hash_table): New variables.
2010 (opcodes_initialized): Renamed from opcodes_sorted.
2011 (build_hash_table): New function.
2012 (is_delayed_branch): Use hash table.
2013 (print_insn): Renamed from print_insn_sparc, made static.
2014 Build and use hash table. If !sparc64, ignore sparc64 insns,
2015 and vice-versa if sparc64.
2016 (print_insn_sparc, print_insn_sparc64): New functions.
2017 (compare_opcodes): Move sparc64 opcodes to end.
2018 Print commutative insns with constant second.
2019 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
2023 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
2024 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
2025 avoids printing a delay slot in a delay slot.
2026 * sh-opc.h (sh_table): Fully bracket last entry.
2030 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
2034 * configure.in: Get host_makefile_frag from ${srcdir}.
2036 * configure.in: Autoconfiscated. Check for string[s].h. Create
2037 config.h from config.in. Don't set up sysdep.h link.
2038 * sysdep.h: New file.
2039 * configure, config.in: New files, generated from configure.in.
2040 * Makefile.in: Updated to be processed autoconf-style.
2041 (distclean): Keep sysdep.h. Remove config.log and config.cache.
2042 (Makefile): Depend on config.status.
2043 (config.status): New rule.
2044 * configure.bat: Update Makefile substitutions.
2048 * mips-opc.c (L1): Define.
2049 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
2050 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
2055 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
2056 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
2057 have multiple add units but only a single logical unit.
2059 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
2060 shifted by 18, without any insertion or extraction function.
2061 (insert_cr, extract_cr): Remove.
2066 * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o.
2071 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
2076 * mpw-config.in: Add sh and i386 configs, remove sparc config.
2077 * sh-opc.h: Add copyright.
2081 * Makefile.in (crunch-m68k): Delete extra target accidentally
2082 checked in a while ago.
2086 * sh-opc.h (sh_table): Add SH3 support.
2090 * sh-opc.h: Added bsrf and braf.
2094 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
2095 bogus [ls]fm{ea,fd} patterns.
2097 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
2098 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
2099 initialize it from memory. Make function static.
2100 (print_insn_{big,little}_arm): New functions.
2101 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
2102 the correct endianness.
2107 * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag.
2108 (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}.
2113 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
2118 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
2119 17th, so that it builds again using GCC as the compiler.
2123 * mips-dis.c (print_insn_little_mips): Cast return value from
2124 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
2125 expects an unsigned long, and that might be fewer words of
2126 argument storage (e.g., if bfd_vma is long long on a 32-bit
2128 (print_insn_big_mips): Likewise with bfd_getb32 value.
2129 (_print_insn_mips): Now static.
2133 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
2134 gcc memory hog problem with initializer is fixed.
2139 * arc-opc.c (NULL): Define.
2140 (arc_operands, insn fields u,s): Delete.
2141 (arc_operands, insn fields a,b,c): Mark as signed.
2142 (arc_opcodes): No longer const, links computed at run-time.
2143 (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle
2144 suffixes that affect the insn code.
2145 (arc_opcodes): Resort table to macros are first.
2146 (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms.
2147 (arc_opcodes, st [b] entry): Likewise.
2148 (arc_opcodes, st [b,d] entry): Fix mask, value.
2149 (arc_reg_names): Add entries for r29, r30, r31, r60.
2150 (opcode_map, icode_map): New static globals.
2151 (arc_opcode_init_tables): Initialize them.
2152 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions.
2153 (insert_shimmoffset): Signal error if register present.
2155 * arc-dis.c (print_insn): Call arc_opcode_lookup_dis.
2160 Merge in support for Mac MPW as a host.
2161 (Old change descriptions retained for informational value.)
2163 * mpw-config.in (archname): Compute from the config.
2164 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
2166 * mpw-config.in (target_arch): Compute from canonical target.
2167 (m68k, mips, powerpc, sparc): Add architectures.
2168 * mpw-make.in (disassemble.c.o): Add.
2169 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
2171 * mpw-config.in (BFD_MACHINES): Set to a default value.
2172 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
2174 * mpw-make.in (CSEARCH): Add extra-include to search path.
2176 * mpw-config.in (varargs.h): Don't create.
2177 (sysdep.h): Create using forward-include.
2178 * mpw-make.in (CSEARCH): Add include/mpw to search path.
2180 * mpw-config.in: New file, MPW version of configure.in.
2181 * mpw-make.in: New file, MPW version of Makefile.in.
2186 * arc-dis.c (print_insn): New parameter `big_p'. Callers updated.
2187 Call arc_get_opcode_mach to map bfd mach number to opcode value.
2188 (print_insn_*): Pass bfd mach number, not opcode version.
2189 * arc-opc.c (arc_get_opcode_mach): New function.
2194 * alpha-dis.c (print_insn_alpha): Put empty statement after
2199 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
2200 (low_sign_extend): Likewise.
2201 (get_field): Delete unused function.
2202 (set_field, deposit_14, deposit_21): Likewise.
2206 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
2213 * alpha-opc.h (OSF_ASMCODE): define
2214 print pal-code names as defined in App C of the
2215 Alpha Architecture Reference Manual
2217 * alpha-dis.c: cleaned up output
2218 print stylized code forms as defined in App A.4.3 of the
2219 Alpha Architecture Reference Manual
2223 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
2225 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
2230 * m68k-dis.c (opcode): New function. Returns address of opcode
2231 table entry given index, even if the opcode table was split to
2232 work around gcc bugs.
2233 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
2235 (BREAK_UP_BIG_DECL): Make secondary array static and const.
2236 (reg_names): Now const.
2237 (print_insn_arg): Arrays cacheFieldName and names now const.
2238 (print_indexed): Array scales now const.
2243 * arc-dis.c (print_insn_arc_base): Split into big and little fns.
2244 (print_insn_arc_{host,graphics,audio}): Likewise.
2245 (print_insn): Add prototype.
2246 (arc_get_disassembler): New arg `big_p'. Return little or big
2247 print fn accordingly.
2248 * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once.
2249 (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order.
2250 (arc_opval_supported): Likewise.
2251 * disassemble.c (disassembler): Pass big endian flag to
2252 arc_get_disassembler.
2257 * ppc-opc.c: Sort recently added instructions by minor opcode
2258 number within major opcode number.
2262 * hppa-dis.c: Include libhppa.h.
2266 * mips-opc.c: Change dli to use M_DLI, and add dla.
2270 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
2275 * arc-dis.c (arc_get_disassembler): Change argument to int,
2276 one of bfd_mach_arc_xxx. All callers updated.
2281 * mips-opc.c: Add r4650 mul instruction.
2285 * mips-opc.c: Add uld and usd macros for unaligned double load and
2290 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
2291 mfdcr, mtdcr, icbt, iccci.
2296 * arc-dis.c (print_insn): Handle ARC_OPERAND_ADDRESS.
2297 * arc-opc.c (arc_operands): New operand 'J' for jump addresses.
2298 ('L' operand): Mark as ARC_OPERAND_ADDRESS.
2299 (arc_opcodes, j insn): Use 'J' operand type, not 'L'.
2300 (arc_opcodes, ld/st insns): Fix address writeback operand letter.
2301 (insert_absaddr): New function.
2305 * arc-dis.c (print_insn_arc): Rename to print_insn and make static.
2306 New argument `cpu', pass it to arc_opcode_init_tables.
2307 Document byte order dependencies. Ignore unsupported insns.
2308 (arc_get_disassembler): New function.
2309 (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics,
2310 print_insn_arc_audio): New functions.
2311 * arc-opc.c (MULTSHIFT operand): Delete.
2312 (UNSIGNED, SATURATION): New operands.
2313 (mac, mul, mul64, mulu64): New insns.
2314 (ext. asl, asr, lsr, ror): Only available on host and graphics cpus.
2315 (padc, padd, pmov, pand, psbc, psub, swap): New insns.
2316 (host,graphics,audio extended and auxiliary regs): Define.
2317 (ss, sc, mh, ml): New suffixes.
2318 (arc_opcode_supported, arc_opval_supported): New functions.
2319 (insert_multshift, extract_multshift): Deleted.
2320 * disassemble.c (disassembler, case bfd_arch_arc): Call
2321 arc_get_disassembler to get disassembler routine.
2326 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
2327 signed char fields to shorts, more portable.
2331 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
2332 char fields as signed chars, since they may have negative values.
2336 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
2342 * ppc-opc.c (extract_bdm): Correct parenthezisation.
2343 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
2348 * ppc-opc.c: Changes based on patch from David Edelsohn
2350 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
2353 (insert_tbr): New static function.
2354 (extract_tbr): New static function.
2355 (XFXFXM_MASK, XFXM): Define.
2356 (XSPRBAT_MASK, XSPRG_MASK): Define.
2357 (powerpc_opcodes): Add instructions to access special registers by
2358 name. Add mtcr and mftbu.
2362 * mips-opc.c (P3): Define.
2363 (mips_opcodes): Add mad and madu.
2365 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
2367 * configure.in: Add W65 support.
2368 * disassemble.c: Likewise.
2369 * w65-opc.h, w65-dis.c: New files.
2373 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
2379 * arc-dis.c (print_insn_arc): Branch offsets are relative to delay
2381 * arc-opc.c (extract_reladdr): New function.
2382 (insert_reladdr): Store address right-shifted by 2.
2387 * mips-opc.c: Add dli as a synonym for li.
2392 * arc-opc.c (insertion fns): Pass pointer to value's table entry.
2394 (extraction fns): Insn argument now array of two words. Return pointer
2395 to value's table entry. All uses changed.
2396 (arc_opcode_lookup_suffix): Exported for arc-dis.c.
2397 (insert_multshift, extract_multshift): New fns.
2398 (arc_operands): Add support for cache bypass suffix. Add support for
2399 predefined aux regs. Modifier bits moved to flags field.
2400 (arc_opcodes): Likewise.
2401 Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed.
2402 New insn rlc. Update to syntax in programmer's manual.
2403 (arc_reg_names): Fix typo in lp_count. Add predefined aux regs.
2404 (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache
2406 (arc_opcode_init_tables): New argument to indicate cpu type.
2407 (insert_reg): Handle predefined aux regs.
2408 (extract_reg): Likewise.
2409 (lookup_register): New fn.
2410 * arc-dis.c (arc_condition_codes): Deleted.
2411 (print_insn_arc): Handle insns with 32 bit immediate constants better.
2412 Clean up modifier handling. Handle predefined aux regs.
2417 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
2418 print something for reserved opcode values, even if it won't
2421 * mips-dis.c (_print_insn_mips): When initializing, shift right
2422 and mask, to avoid sign extension problems on the Alpha.
2424 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
2430 * configure.in: Add ARC support.
2431 * disassemble.c: Likewise.
2432 * arc-dis.c, arc-opc.c: New files.
2437 * sh-opc.h (mov.l gbr): Get direction right.
2438 * sh-dis.c (print_insn_shx): New function.
2439 (print_insn_shl, print_insn_sh): Call print_insn_shx to
2440 print opcodes with right byte order.
2444 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
2445 to avoid conflicts with getopt.
2449 * hppa-dis.c (print_insn_hppa): Read the instruction using
2450 bfd_getb32, so that it works on a little endian or 64 bit host.
2451 Remove unused local variable op.
2455 * mips-opc.c: Use or instead of addu for pseudo-op move, since
2456 addu does not work correctly if -mips3.
2460 * a29k-dis.c (print_special): Add special register names defined
2461 on 29030, 29040 and 29050.
2462 (print_insn): Handle new operand type 'I'.
2466 * Makefile.in (INSTALL): Use top level install.sh script.
2470 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
2471 that it works on a little endian host.
2475 * configure.in: Use ${config_shell} when running config.bfd.
2479 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
2483 * a29k-dis.c (print_insn): Print the opcode.
2487 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
2491 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
2495 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
2496 which store a value into memory.
2500 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
2501 * arm-dis.c, arm-opc.h: New files.
2505 * Makefile.in (ns32k-dis.o): Add dependency.
2506 * ns32k-dis.c (print_insn_arg): Declare initialized local as
2507 string, not as array of chars.
2511 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
2513 * sparc-opc.c: Added sparclite extended FP operations, and
2514 versions of v9 impdep* instructions permitting specification of
2519 * i960-dis.c (reg_names): Now const.
2520 (struct sparse_tabent): New type, copied from array type in mem
2522 (ctrl): Local static array ctrl_tab now const.
2523 (cobr): Local static array cobr_tab now const.
2524 (mem): Local variables reg1, reg2, reg3 now point to const. Local
2525 static variable mem_tab no longer explicitly initialized. Changed
2526 mem_init to const array of struct sparse_tabent.
2527 (reg): Local static variable reg_tab no longer explicitly
2528 initialized. Changed reg_init to const array of struct
2530 (ea): Local static array scale_tab now const.
2532 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
2537 * configure.bat: the disassember needs to be enabled for
2538 "objdump -d" to work in djgpp.
2542 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
2543 (invalid_float): Enabled general version, doesn't require running
2544 on ns32k host. Changed to take char* argument, and test for
2545 explicitly specified sizes, instead of using sizeof() on host CPU
2547 (INVALID_FLOAT): Cast first argument.
2548 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
2549 list_P032, list_M032): Now const.
2550 (optlist, list_search): Made appropriate arguments now point to
2552 (print_insn_arg): Changed static array of one-character-string
2553 pointers into a static const array of characters; fixed sprintf
2554 statement accordingly.
2558 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
2559 from distribution. A ns32k-dis.c from a previous distribution has
2560 been brought up to date and supports the new interface.
2562 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
2564 * configure.in: add bfd_ns32k_arch target support.
2566 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
2567 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
2571 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
2576 * h8300-dis.c, mips-dis.c: Don't use true and false.
2580 * configure.in: Change --with-targets to --enable-targets.
2584 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
2585 opcodes to the first instruction with that opcode, to speed
2591 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
2595 * configure.bat: update to latest makefile.in
2599 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
2600 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
2601 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
2602 slot insn is in a delay slot.
2603 * z8k-opc.h: (resflg): Fix patterns.
2604 * h8500-opc.h Fix CR insn patterns.
2608 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
2609 "cmpl" before POWER versions, so that gas -many uses them.
2613 * disassemble.c: New file.
2614 * Makefile.in (OFILES): Add disassemble.o.
2615 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
2616 * configure.in: Define ARCHDEFS in Makefile. Code taken from
2617 binutils/configure.in.
2619 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
2620 opcode being examined.
2624 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
2625 (insert_ral, insert_ram, insert_ras): New functions.
2626 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
2627 RAS for store with update.
2631 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
2636 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
2641 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
2645 * ppc-opc.c (powerpc_operands): The signedp field has been
2646 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
2647 instead. Add new operand SISIGNOPT.
2648 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
2650 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
2655 * i386-dis.c (struct private): Renamed to dis_private. `private'
2656 is a reserved word for dynix cc.
2660 * configure.in: Change error message to refer to bfd/config.bfd
2661 rather than bfd/configure.in.
2665 * ppc-opc.c: Define POWER2 as short alias flag.
2666 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
2671 * i960-dis.c (print_insn_i960): Don't read a second word for
2672 opcodes 0, 1, 2 and 3.
2676 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
2680 * m68881-ext.c: Removed; no longer used.
2681 * Makefile.in: Changed accordingly.
2683 * m68k-dis.c (ext_format_68881): Don't declare.
2684 (print_insn_m68k): If an instruction uses place 'i', it uses at
2685 least four fixed bytes.
2686 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
2687 extended float, convert to double using floatformat_to_double, not
2688 ieee_extended_to_double, and fetch the data before converting it.
2692 * mips-opc.c: It's sqrt.s, not sqrt.w. From
2697 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
2698 PowerPC uses bdnz[l][a].
2702 * dis-buf.c, i386-dis.c: Include sysdep.h.
2706 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
2708 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
2709 by Motorola PowerPC 601 with PPC_OPCODE_601.
2710 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
2711 Disassemble Motorola PowerPC 601 instructions as well as normal
2712 PowerPC instructions.
2716 * i960-dis.c (reg, mem): Just use a static array instead of
2721 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
2722 condition name index if this is for a negated condition.
2724 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
2725 Floating point format for 'H' operand is backwards from normal
2726 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
2727 operands (fmpyadd and fmpysub), handle bizarre register
2728 translation correctly for single precision format.
2730 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
2731 or 'I' operands if the next format specifier is 'M' (fcmp
2732 condition completer).
2736 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
2737 single number giving a bitmask for the MB and ME fields of an M
2738 form instruction. Change NB to accept 32, and turn it into 0;
2739 also turn 0 into 32 when disassembling. Seperated SH from NB.
2740 (insert_mbe, extract_mbe): New functions.
2741 (insert_nb, extract_nb): New functions.
2742 (SC_MASK): Mask out SA and LK bits.
2743 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
2744 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
2745 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
2746 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
2747 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
2748 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
2749 (powerpc_macros): Define table of macro definitions.
2750 (powerpc_num_macros): Define.
2752 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
2753 if PPC_OPERAND_NEXT is set.
2757 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
2758 char. Retrieve contents using bfd_getl32 instead of shifting.
2762 * ppc-opc.c: New file. Opcode table for PowerPC, including
2763 opcodes for POWER (RS/6000).
2764 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
2765 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
2766 (CFILES): Add ppc-dis.c.
2767 (ppc-dis.o, ppc-opc.o): New targets.
2768 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
2772 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
2773 No space before 'u', 'f', or 'N'.
2777 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
2778 farther than we should.
2780 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
2784 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
2788 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
2789 needs it, to prevent reading past the end of a section.
2793 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
2794 Removed t,A case for la; always use t,A(b) case.
2799 * mips-dis.c (print_insn_arg): Handle 'k'.
2800 * mips-opc.c: Make cache use k, not t.
2804 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
2805 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
2806 FLOAT_FORMAT_CODE to put out floating point register names.
2810 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
2814 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
2818 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
2819 larger than 32. Moved dsxx32 variants first for disassembler.
2823 * z8kgen.c, z8k-opc.h: Add full lda information.
2827 * hppa-dis.c (print_insn_hppa): Do not emit a space after
2828 movb instructions. Any necessary space will be emitted by
2829 the code to handle nullification completers.
2833 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
2837 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
2838 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
2842 * mips-opc.c: Correct lwu opcode value (book had it wrong).
2846 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
2847 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
2851 * m88k-dis.c (m88kdis): comment change. Remove space after
2853 (printop): handle new arg types DEC and XREG for m88110.
2857 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
2858 type for absolute branch addresses. Delete special
2859 "ble" and "be" code in 'W' operand code.
2863 * mips-opc.c: Set hazard information correctly for branch
2864 likely instructions.
2868 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
2869 info->fprintf_func for printing and info->print_address_func for
2874 * mips-opc.c: Set INSN_TRAP for tXX instructions.
2879 Corrected second case of "b" for disassembler.
2883 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
2884 to BFD swapping routines to correspond to BFD name changes.
2888 * mips-opc.c: Change div machine instruction to be z,s,t rather
2889 than s,t. Change div macro to be d,v,t rather than d,s,t.
2890 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
2891 rem and remu which generates only the corresponding div
2892 instruction. This is for compatibility with the MIPS assembler,
2893 which only generates the simple machine instruction when an
2894 explicit destination of $0 is used.
2895 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
2900 WR_31 hazard for bal, bgezal, bltzal.
2904 * hppa-dis.c (print_insn_hppa): Use print function
2905 from within the disassemble_info, not fprintf_filtered.
2909 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
2914 * mips-opc.c ("absu"): Removed.
2919 * mips-opc.c: Added r6000 and r4000 instructions and macros.
2920 Changed hazard information to distinguish between memory load
2921 delays and coprocessor load delays.
2925 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
2929 * configure.in: Don't pass cpu to config.bfd.
2933 * m88k-dis.c (m88kdis): Make class unsigned.
2937 * alpha-dis.c (print_insn_alpha): One branch format case was
2938 missing the instruction name.
2942 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
2943 Add the arch-specific auxiliary files.
2944 (OFILES): Remove the arch-specific auxiliary files
2945 and use BFD_MACHINES instead of DIS_LIBS.
2946 * configure.in: Set BFD_MACHINES based on --with-targets option.
2950 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
2955 * sparc-opc.c: Change CONST to const to deal with gcc
2956 -Dconst=__const -traditional.
2961 coprocessor instructions out of #if 0, and made them use new
2966 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
2970 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
2971 instruction, for use by the disassembler.
2973 * sparc-dis.c (SEX): Add sign extension macro. Replace many
2974 hand-coded sign extensions that depended on 32-bit host ints.
2975 FIXME, we still depend on big-endian host bitfield ordering.
2976 (sparc_print_insn): Set the insn_info_valid field, and the
2977 other fields that describe the instruction being printed.
2981 * sparc-opc.c (call): Accept all 6 addressing modes valid for
2982 `jmp' instead of just one of them.
2986 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
2987 (fput_fp_reg_r): Renamed from fput_reg_r.
2988 (fput_fp_reg): New function.
2989 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
2991 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
2993 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
2997 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
2999 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
3000 don't output a space.
3002 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
3006 * mips-opc.c: New file, containing opcode table from
3007 ../include/opcode/mips.h.
3008 * Makefile.in: Add it.
3012 * m88k-dis.c: New file, moved in from gdb and changed to use the
3013 new dis-asm.h disassembler interface.
3014 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
3015 (m88k-dis.o): New target.
3019 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
3020 argument string const char * to correspond to opcode/mips.h.
3024 * mips-dis.c: Updated to account for name changes in new version
3026 * Makefile.in: Added header file dependencies.
3030 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
3034 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
3035 extend, rather than shifts.
3039 * Makefile.in: Undo 15 June change.
3043 * m68k-dis.c (print_insn_arg): Change return value to byte count
3045 * m68k-dis.c: Re-write to detect invalid operands before
3046 printing anything, so we can handle this the same way we
3047 handle invalid opcodes.
3051 * sh-dis.c, sh-opc.h: Understand some more opcodes.
3055 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
3060 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
3062 * configure.in: Do make sysdep.h link.
3063 * Makefile.in: Search ../include. Don't search ../bfd.
3068 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
3069 Do not print a space before the completers specified by
3074 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
3075 defined, since gdb has been fixed.
3078 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
3079 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
3080 be a *disassemble_info, not a *FILE.
3081 * hppa-dis.c: Support 'd', '!', and 'a'.
3082 * hppa-dis.c: Support 's' to extract a 2 bit space register.
3083 * hppa-dis.c: Delete cases which are no longer needed.
3087 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
3091 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
3096 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
3097 * configure.in: No longer need to configure to get sysdep.h.
3102 * hppa-dis.c: Support 'I', 'J', and 'K' in output
3103 templates for 1.1 FP computational instructions.
3107 * h8500-dis.c (print_insn_h8500): Address argument is type
3109 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
3112 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
3113 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
3115 * sparc-dis.c (compare_opcodes): Move static declaration to
3120 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
3121 instruction, remove unimp hack from 'l' argument.
3125 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
3131 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
3136 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
3137 arrays of string pointers to 2-d arrays of chars, to save
3142 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
3143 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
3147 * hppa-dis.c: New file from Utah, adapted to new disassembler
3149 * Makefile.in: Include it.
3153 * sh-dis.c, sh-opc.h: New files.
3157 * alpha-dis.c, alpha-opc.h: New files.
3161 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
3166 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
3170 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
3175 * sparc-dis.c: Use fprintf_func a few places where I forgot,
3176 and double percent signs a few places.
3178 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
3180 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
3181 Use info->print_address_func not print_address.
3183 * dis-buf.c (generic_print_address): New function.
3187 * Makefile.in: Add sparc-dis.c.
3188 sparc-dis.c: New file, merges binutils and gdb versions as follows:
3190 Add `add' instruction to the set that get checked
3191 for a preceding `sethi' in order to print an absolute address.
3192 * (print_insn): Disassembly prefers real instructions.
3193 (is_delayed_branch): Speed up.
3194 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
3195 Still missing some float ops, and needs testing.
3196 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
3197 F_ALIAS. Use printf, not fprintf, when not passing a file
3199 (compare_opcodes): Check that identical instructions have
3200 identical opcodes, complain otherwise.
3203 * Include reg_names.
3205 Use dis-asm.h/read_memory_func interface.
3209 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
3210 deliberately return non-zero to setjmp from longjmp. Otherwise
3211 this code fails to compile.
3215 * m68k-dis.c: Fix prototype for fetch_arg().
3219 * dis-buf.c: New file, for new read_memory_func interface.
3220 Makefile.in (OFILES): Include it.
3221 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
3222 Use new read_memory_func interface.
3226 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
3227 * h8500-opc.h: Fix couple of opcodes.
3229 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
3231 * Makefile.in: add dvi & installcheck targets
3235 * Makefile.in: Update for h8500-dis.c.
3239 * h8500-dis.c, h8500-opc.h: New files
3243 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
3244 ../include/dis-asm.h.
3245 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
3246 and ../gdb/m68k-pinsn.c).
3247 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
3248 and ../gdb/i386-pinsn.c).
3249 * m68881-ext.c: New file. Moved definition of
3250 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
3251 * Makefile.in: Adjust for new files.
3253 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
3254 can be dis-assembled.
3258 * mips-dis.c (print_insn_arg): Now returns void.
3262 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
3263 files that use the macros.
3267 * mips-dis.c: New file, from gdb/mips-pinsn.c.
3268 * Makefile.in (DIS_LIBS): Added mips-dis.o.
3269 (CFILES): Added mips-dis.c.
3273 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
3274 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
3278 * Makefile.in: Improve *clean rules.
3279 * configure.in: Allow a default host.
3281 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3283 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
3284 files include other sysdep files
3288 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
3292 * configure.in: For host support, use ../bfd/configure.host
3293 so it stays in sync with the ../bfd/hosts database.
3295 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3297 * configure.in: use cpu-vendor-os triple instead of nested cases
3301 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
3302 *always* the wrong one.
3306 * z8kgen.c: added copyright info
3310 * z8k-dis.c (unparse_instr): prettier tabs
3311 * z8kgen.c -> z8k-opc.h: bug fixes in tables
3313 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
3315 * configure.in: Add ncr* configuration.
3316 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
3317 picayune ANSI compilers happy.
3321 * configure.in (i386): Make i386 and i486 synonymous for now.
3322 * configure.in (i[34]86-*-sysv4): Add my_host definition.
3326 * Makefile.in (install): Fix typo.
3330 * Makefile.in (make): Remove obsolete crud.
3331 (sparc-opc.o): Avoid Sun Make VPATH bug.
3335 * Makefile.in: since there are no SUBDIRS, remove rule and
3336 references of subdir_do.
3340 * Makefile.in (install): Get the library name right here too.
3341 Don't install bfd.h, since it's unrelated to this library. No
3342 subdirs to recurse into, either.
3343 (CFILES): The source file has a .c suffix, not .o.
3345 * sparc-opc.c: New file, moved from BFD.
3346 * Makefile.in (OFILES): Build it.
3350 * z8k-dis.c: fixed forward refferences of some declarations.
3354 * Makefile.in: get the name of the library right
3358 * z8k-dis.c: knows how to disassemble z8k stuff
3359 * z8k-opc.h: new file full of z8000 opcodes
3363 version-control: never