3 * i386.h: Remove Abs32 from lcall.
7 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
9 Mark X,Y opcode letters as in use.
13 * sparc.h (F_FLOAT, F_FBR): Define.
17 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
19 (ABS8SRC,ABS8DST): Add ABS8MEM.
20 (add.l): Fix reg+reg variant.
21 (eepmov.w): Renamed from eepmovw.
22 (ldc,stc): Fix many cases.
26 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
30 * sparc.h (O): Mark operand letter as in use.
34 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
35 Mark operand letters uU as in use.
39 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
40 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
41 (SPARC_OPCODE_SUPPORTED): New macro.
42 (SPARC_OPCODE_CONFLICT_P): Rewrite.
47 * sparc.h (sparc_opcode_lookup_arch) Make return type in
48 declaration consistent with return type in definition.
52 * i386.h (i386_optab): Remove Data32 from pushf and popf.
56 * i386.h (i386_regtab): Add 80486 test registers.
60 * i960.h (I_HX): Define.
61 (i960_opcodes): Add HX instruction.
65 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
70 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
71 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
72 (bfd_* defines): Delete.
73 (sparc_opcode_archs): Replaces architecture_pname.
74 (sparc_opcode_lookup_arch): Declare.
79 * sparc.h (enum sparc_architecture): Add v9a.
80 (ARCHITECTURES_CONFLICT_P): Update.
84 * i386.h: Added Pentium Pro instructions.
88 * m68k.h: Document new 'W' operand place.
92 * hppa.h: Add lci and syncdma instructions.
96 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
101 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
102 assembler's -mcom and -many switches.
106 * i386.h: Fix cmpxchg8b extension opcode description.
110 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
115 * m68k.h: Change comment: split type P into types 0, 1 and 2.
119 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
123 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
129 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
130 declarations. Remove F_ALIAS and flag field of struct
131 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
132 int. Make name and args fields of struct m68k_opcode const.
136 * sparc.h (F_NOTV9): Define.
140 * mips.h (INSN_4010): Define.
144 * m68k.h (TBL1): Reverse sense of "round" argument in result.
147 * m68k.h: Fix argument descriptions of coprocessor
148 instructions to allow only alterable operands where appropriate.
149 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
150 (m68k_opcode_aliases): Add more aliases.
155 * arc.h (struct arc_opcode): New flag value ARC_OPCODE_COND_BRANCH.
156 (ARC_DELAY_{NONE,NORMAL,JUMP): Define delay slot types.
161 * m68k.h: Added explcitly short-sized conditional branches, and a
162 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
163 svr4-based configurations.
168 * arc.h (struct arc_opcode): New members next_asm, next_dis.
169 (ARC_HASH_OPCODE, ARC_HASH_ICODE): Define.
170 (ARC_OPCODE_NEXT_ASM, ARC_OPCODE_NEXT_DIS): Define.
171 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): Add prototypes.
175 * arc.h (arc_get_opcode_mach): Define prototype.
181 * i386.h: added missing Data16/Data32 flags to a few instructions.
185 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
186 (OP_MASK_BCC, OP_SH_BCC): Define.
187 (OP_MASK_PREFX, OP_SH_PREFX): Define.
188 (OP_MASK_CCC, OP_SH_CCC): Define.
189 (INSN_READ_FPR_R): Define.
194 * m68k.h (enum m68k_architecture): Deleted.
195 (struct m68k_opcode_alias): New type.
196 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
197 matching constraints, values and flags. As a side effect of this,
198 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
199 as I know were never used, now may need re-examining.
200 (numopcodes): Now const.
201 (m68k_opcode_aliases, numaliases): New variables.
203 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
204 m68k_opcode_aliases; update declaration of m68k_opcodes.
209 * arc.h (ARC_MACH_BIG): Define.
210 (ARC_MACH_MASK): Update.
211 (ARC_MACH_CPU_MASK): Define.
212 (ARC_OPCODE_CPU, ARC_OPVAL_CPU, ARC_HAVE_CPU): Likewise.
217 * hppa.h (delay_type): Delete unused enumeration.
218 (pa_opcode): Replace unused delayed field with an architecture
220 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
224 * mips.h (INSN_ISA4): Define.
228 * mips.h (M_DLA_AB, M_DLI): Define.
232 * hppa.h (fstwx): Fix single-bit error.
236 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
241 * arc.h (ARC_OPERAND_LIMM): New flag.
242 (ARC_OPERAND_ADDRESS): Likewise.
246 * arc.h (ARC_MACH_{BASE,HOST,GRAPHICS,AUDIO}): Define.
247 (ARC_MACH_MASK, ARC_OPCODE_MACH, ARC_OPVAL_MACH): Define.
248 (ARC_HAVE_MULT_SHIFT): Delete.
249 (ARC_HAVE_MACH): Define.
250 (struct arc_opcode): New field `flags'.
251 (struct arc_operand_value): Ditto.
252 (arc_opcode_supported): New function.
253 (arc_opval_supported): Ditto.
258 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
265 * i386.h (MOV_AX_DISP32): New macro.
266 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
267 of several call/return instructions.
268 (ADDR_PREFIX_OPCODE): New macro.
274 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
275 it pointer to const char;
276 (struct vot, field `name'): ditto.
280 * vax.h: Supply and properly group all values in end sentinel.
284 * mips.h (INSN_ISA, INSN_4650): Define.
289 * arc.h: Misc. cleanup. Merge "modifiers" into flags field.
290 Support multiply/shift insns.
301 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
302 systems with a separate instruction and data cache, such as the
303 29040, these instructions take an optional argument.
307 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
312 * mips.h (INSN_STORE_MEMORY): Define.
316 * sparc.h: Document new operand type 'x'.
320 * i960.h (I_CX2): New instruction category. It includes
321 instructions available on Cx and Jx processors.
322 (I_JX): New instruction category, for JX-only instructions.
323 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
324 Jx-only instructions, in I_JX category.
328 * ns32k.h (endop): Made pointer const too.
332 * ns32k.h: Drop Q operand type as there is no correct use
333 for it. Add I and Z operand types which allow better checking.
337 * h8300.h (xor.l) :fix bit pattern.
338 (L_2): New size of operand.
343 * m68k.h: Move "trap" before "tpcc" to change disassembly.
347 * sparc.h: Include v9 definitions.
351 * m68k.h (m68060): Defined.
352 (m68040up, mfloat, mmmu): Include it.
353 (struct m68k_opcode): Widen `arch' field.
354 (m68k_opcodes): Updated for M68060. Removed comments that were
355 instructions commented out by "JF" years ago.
359 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
360 add a one-bit `flags' field.
361 (F_ALIAS): New macro.
365 * h8300.h (dec, inc): Get encoding right.
369 * ppc.h (struct powerpc_operand): Removed signedp field; just use
371 (PPC_OPERAND_SIGNED): Define.
372 (PPC_OPERAND_SIGNOPT): Define.
376 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
381 * i386.h: Reverse last change. It'll be handled in gas instead.
385 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
386 slower on the 486 and used the implicit shift count despite the
387 explicit operand. The one-operand form is still available to get
388 the shorter form with the implicit shift count.
392 * hppa.h: Fix typo in fstws arg string.
396 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
400 * ppc.h (PPC_OPCODE_601): Define.
404 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
405 (so we can determine valid completers for both addb and addb[tf].)
407 * hppa.h (xmpyu): No floating point format specifier for the
412 * ppc.h (PPC_OPERAND_NEXT): Define.
413 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
414 (struct powerpc_macro): Define.
415 (powerpc_macros, powerpc_num_macros): Declare.
419 * ppc.h: New file. Header file for PowerPC opcode table.
423 * hppa.h: More minor template fixes for sfu and copr (to allow
424 for easier disassembly).
426 * hppa.h: Fix templates for all the sfu and copr instructions.
430 * i386.h (push): Permit Imm16 operand too.
434 * h8300.h (andc): Exists in base arch.
439 * hppa.h: #undef NONE to avoid conflict with hiux include files.
443 * hppa.h: Add FP quadword store instructions.
447 * mips.h: (M_J_A): Added.
452 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
457 * hppa.h: Immediate field in probei instructions is unsigned,
458 not low-sign extended.
462 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
466 * i386.h: Add "fxch" without operand.
470 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
474 * hppa.h: Add gfw and gfr to the opcode table.
478 * m88k.h: extended to handle m88110.
482 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
487 * i960.h (i960_opcodes): Properly bracket initializers.
491 * m88k.h (BOFLAG): rewrite to avoid nested comment.
495 * m68k.h (two): Protect second argument with parentheses.
499 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
500 Deleted old in/out instructions in "#if 0" section.
504 * i386.h (i386_optab): Properly bracket initializers.
508 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
513 * i386.h (lcall): Accept Imm32 operand also.
517 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
522 * mips.h (INSN_*): Changed values. Removed unused definitions.
523 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
524 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
525 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
526 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
527 (M_*): Added new values for r6000 and r4000 macros.
528 (ANY_DELAY): Removed.
532 * mips.h: Added M_LI_S and M_LI_SS.
536 * h8300.h: Get some rare mov.bs correct.
540 * sparc.h: Don't define const ourself; rely on ansidecl.h having
545 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
546 jump instructions, for use in disassemblers.
550 * m88k.h: Make bitfields just unsigned, not unsigned long or
555 * hppa.h: New argument type 'y'. Use in various float instructions.
559 * hppa.h (break): First immediate field is unsigned.
561 * hppa.h: Add rfir instruction.
565 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
569 * mips.h: Reworked the hazard information somewhat, and fixed some
570 bugs in the instruction hazard descriptions.
574 * m88k.h: Corrected a couple of opcodes.
578 * mips.h: Replaced with version from Ralph Campbell and OSF. The
579 new version includes instruction hazard information, but is
580 otherwise reasonably similar.
584 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
589 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
590 Make the tables be the same for the following instructions:
591 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
592 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
593 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
594 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
595 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
598 * hppa.h: Make new and old tables the same for "break", "mtctl",
599 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
600 Fix typo in last patch. Collapse several #ifdefs into a
603 * hppa.h: Delete remaining OLD_TABLE code. Bring some
604 of the comments up-to-date.
606 * hppa.h: Update "free list" of letters and update
607 comments describing each letter's function.
611 * h8300.h: checkpoint, includes H8/300-H opcodes.
616 * hppa.h: Rework single precision FP
617 instructions so that they correctly disassemble code
622 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
623 mov to allow instructions like mov ss,xyz(ecx) to assemble.
627 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
628 gdb will define it for now.
632 * sparc.h: Don't end enumerator list with comma.
637 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
638 ("bc2t"): Correct typo.
639 ("[ls]wc[023]"): Use T rather than t.
640 ("c[0123]"): Define general coprocessor instructions.
644 * m68k.h: Move split point for gcc compilation more towards
649 * rs6k.h: Clean up instructions for primary opcode 19 (many were
650 simply wrong, ics, rfi, & rfsvc were missing).
651 Add "a" to opr_ext for "bb". Doc fix.
656 * mips.h: Add casts, to suppress warnings about shifting too much.
657 * m68k.h: Document the placement code '9'.
661 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
662 allows callers to break up the large initialized struct full of
663 opcodes into two half-sized ones. This permits GCC to compile
664 this module, since it takes exponential space for initializers.
665 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
669 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
670 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
671 initialized structs in it.
676 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
677 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
681 * mips.h: document "i" and "j" operands correctly.
685 * mips.h: Removed endianness dependency.
689 * h8300.h: include info on number of cycles per instruction.
691 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
693 * hppa.h: Move handy aliases to the front. Fix masks for extract
694 and deposit instructions.
698 * i386.h: accept shld and shrd both with and without the shift
699 count argument, which is always %cl.
701 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
703 * i386.h (i386_optab_end, i386_regtab_end): Now const.
704 (one_byte_segment_defaults, two_byte_segment_defaults,
705 i386_prefixtab_end): Ditto.
709 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
714 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
715 always use 16-bit offsets. Makes calculated-size jump tables
720 * i386.h: Fix one-operand forms of in* and out* patterns.
724 * m68k.h: Added CPU32 support.
728 * mips.h (break): Disassemble the argument. Patch from
733 * m68k.h: merged Motorola and MIT syntax.
737 * m68k.h (pmove): make the tests less strict, the 68k book is
742 * m68k.h (m68ec030): Defined as alias for 68030.
743 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
744 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
745 them. Tightened description of "fmovex" to distinguish it from
746 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
747 up descriptions that claimed versions were available for chips not
748 supporting them. Added "pmovefd".
752 * m68k.h: fix where the . goes in divull
756 * m68k.h: the cas2 instruction is supposed to be written with
757 indirection on the last two operands, which can be either data or
758 address registers. Added a new operand type 'r' which accepts
759 either register type. Added new cases for cas2l and cas2w which
760 use them. Corrected masks for cas2 which failed to recognize use
765 * m68k.h: Merged in patches (mostly m68040-specific) from
768 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
769 base). Also cleaned up duplicates, re-ordered instructions for
770 the sake of dis-assembling (so aliases come after standard names).
771 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
775 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
780 * sparc.h: Moved tables to BFD library.
782 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
786 * h8300.h: Finish filling in all the holes in the opcode table,
787 so that the Lucid C compiler can digest this as well...
789 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
791 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
792 Fix opcodes on various sizes of fild/fist instructions
793 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
794 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
796 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
798 * h8300.h: Fill in all the holes in the opcode table so that the
799 losing HPUX C compiler can digest this...
801 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
803 * mips.h: Fix decoding of coprocessor instructions, somewhat.
808 * sparc.h: Add new architecture variant sparclite; add its scan
809 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
813 * mips.h: Add some more opcode synonyms (from Frank Yellin,
818 * rs6k.h: New version from IBM (Metin).
822 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
825 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
827 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
831 * m68k.h (one, two): Cast macro args to unsigned to suppress
832 complaints from compiler and lint about integer overflow during
835 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
837 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
839 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
841 * mips.h: Make bitfield layout depend on the HOST compiler,
842 not on the TARGET system.
846 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
847 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
850 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
852 * h8300.h: turned op_type enum into #define list
854 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
856 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
857 similar instructions -- they've been renamed to "fitoq", etc.
858 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
860 * h8300.h: Remove extra ; which produces compiler warning.
862 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
864 * sparc.h: fix opcode for tsubcctv.
866 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
868 * sparc.h: fba and cba are now aliases for fb and cb respectively.
870 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
872 * sparc.h (nop): Made the 'lose' field be even tighter,
873 so only a standard 'nop' is disassembled as a nop.
875 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
877 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
878 disassembled as a nop.
880 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
882 * sparc.h: fix a typo.
884 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
886 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
887 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
888 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
892 version-control: never