5 * configure: Regenerate.
10 * config.in: Regenerate.
14 * configure: Regenerated.
18 * configure: Regenerated.
22 * configure: Regenerated.
26 * interp.c (sim_stop_reason): Fix typo.
30 * interp.c (gdb/signals.h): Include it.
31 (sim_stop_reason): Use TARGET_SIGNAL_*.
35 * configure: Regenerate.
39 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
40 explicit call to AC_CONFIG_HEADER.
41 * configure: Regenerate.
45 * configure.ac: Update to use ../common/common.m4.
46 * configure: Re-generate.
50 * configure: Regenerated to track ../common/aclocal.m4 changes.
54 * configure.ac: Rename configure.in, require autoconf 2.59.
55 * configure: Re-generate.
59 * configure: Regenerate for ../common/aclocal.m4 update.
63 * interp.c (sim_resume): Rename ui_loop_hook to
64 deprecated_ui_loop_hook.
68 * simops.c: Replace "struct symbol_cache_entry" with "struct
73 * interp.c (xfer_mem): Simplify. Only do a single partial
74 transfer. Problem reported by Tom Rix.
78 * interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
79 (sim_d10v_translate_imap_addr): Ditto.
80 (sim_d10v_translate_dmap_addr): Ditto.
81 (xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
82 (dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
83 (dmap_register, imap_register): Add "regcache" parameter.
84 (imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
85 (sim_fetch_register): Pass NULL regcache to imap_register and
90 * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
94 * simops.c: Include <string.h>.
98 * d10v_sim.h (SET_PSW_BIT): Add cast to avoid inverting an enum.
102 * configure: Regenerated to track ../common/aclocal.m4 changes.
106 * interp.c (xfer_mem): Fix transfers across multiple segments.
110 * Makefile.in (INCLUDE): Update path to callback.h.
111 * gencode.c: Do not include "callback.h".
112 * d10v_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h".
117 * interp.c (sim_fetch_register): Fix name of enum used in cast.
118 (sim_store_register): Ditto.
123 * d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
124 less than MOD_S (post-decrement).
128 * interp.c (sim_fetch_register, sim_store_register): Use a switch
129 statement and enums from "sim-d10v.h".
133 * interp.c (sim_create_inferior): Add comment.
137 * simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
138 (OP_4401): Output "mvf0t" instead of "mf0t".
139 (OP_460B): Do not output a flag register.
140 (OP_4609): Do not output a flag register.
144 * Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
145 * interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
149 * interp.c (sim_create_inferior): Removed a hack that stated
150 it was setting r0/r1 with argc/argv.
154 * Makefile.in (simops.o): Add simops.h to dependency list.
158 * configure: Regenerated to track ../common/aclocal.m4 changes.
162 * interp.c (sim_resume): Deliver SIGILL.
163 (lookup_hash): Do not print SIGILL message.
167 * Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
168 * interp.c (sim_set_trace): Replace sim_trace. Enable tracing.
172 * d10v_sim.h (SIG_D10V_BUS): Define.
174 * simops.c (address_exception): Delete function.
175 (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
176 OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
177 OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
178 OP_6E1F, OP_6A01, OP_6E01, OP_37010000): Replace call to
179 address_exception with code that sets SIG_D10V_BUS.
181 * interp.c (sim_resume): When SIGBUS or SIGSEGV, deliver a bus
182 error to the simulator before resuming execution.
183 (sim_trace): Check stop reason and use that to determine sim_trace
185 (sim_stop_reason): For SIG_D10V_BUS return a SIGBUS / SIGSEGV
190 * interp.c (sim_create_inferior): Change internal initial value for
195 * interp.c (lookup_hash): Stop the update of the PC when there was
196 an illegal instruction exception.
200 * simops.c (address_exception): New function.
201 (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
202 OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
203 OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
204 OP_6E1F, OP_6A01, OP_6E01, OP_37010000): For "ld", "ld2w", "st"
205 and "st2w" check that the address is aligned.
209 * d10v_sim.h (INC_ADDR): Added code to assign
210 proper address for loads with predec operations.
214 * simops.c (OP_4E0F): New function: Simulate new bit pattern for
219 * simops.c (move_to_cr): Don't allow user to set PSW.DM in either
224 * simops.c (OP_5F20): Use SET_HW_PSW when updating PSW.
225 (PSW_HW_MASK): Declare.
227 * d10v_sim.h (move_to_cr): Add ``psw_hw_p'' parameter.
228 (SET_CREG, SET_PSW_BIT): Update.
229 (SET_HW_CREG, SET_HW_PSW): Define.
233 * interp.c (sim_d10v_translate_dmap_addr): Fix extraction of IOSP
238 * interp.c (sim_d10v_translate_addr): New function.
239 (xfer_mem): Rewrite. Use sim_d10v_translate_addr.
240 (map_memory): Make INLINE.
244 * interp.c (sim_d10v_translate_dmap_addr): New function.
245 (dmem_addr): Rewrite. Use sim_d10v_translate_dmap_addr. Change
246 offset parameter to type uint16.
247 * d10v_sim.h (dmem_addr): Update declaration.
251 * interp.c (imap_register, set_imap_register, dmap_register,
252 set_imap_register): Use map_memory.
254 (sim_create_inferior): Initialize all DMAP registers. NOTE that
255 DMAP2, in internal memory mode, is set to 0x0000 and NOT
256 0x2000. This is consistent with the older d10v boards.
260 * interp.c (sim_d10v_translate_imap_addr): New function.
261 (imem_addr): Rewrite. Use sim_d10v_translate_imap_addr.
262 (last_from, last_to): Declare.
266 * d10v_sim.h (struct d10v_memory): Define. Support very long
268 (struct _state): Replace imem, dmem and umem by mem.
269 (IMAP_BLOCK_SIZE, DMAP_BLOCK_SIZE, SEGMENT_SIZE, IMEM_SEGMENTS,
270 DMEM_SEGMENTS, UMEM_SEGMENTS): Define.
272 * interp.c (map_memory): New function.
273 (sim_size, xfer_memory, imem_addr, dmem_addr): Update.
274 (UMEM_SEGMENTS): Moveed to "d10v_sim.h".
275 (IMEM_SIZEDMEM_SIZE): Delete.
279 * interp.c: Include "sim-d10v.h".
280 (imap_register, set_imap_register, dmap_register,
281 set_dmap_register, spi_register, spu_register, set_spi_register,
282 set_spu_register): New functions.
283 (sim_create_inferior): Update.
284 (sim_fetch_register, sim_store_register): Rewrite. Use enums
285 defined in sim-d10v.h.
287 * d10v_sim.h (DEBUG_MEMORY): Define.
288 (IMAP0, IMAP1, DMAP, SET_IMAP0, SET_IMAP1, SET_DMAP): Delete.
292 * interp.c (sim_open): Allow a debug value to be passed to the -t
294 (lookup_hash): Don't exit on an illegal instruction.
295 (do_long, do_2_short, do_parallel): Check for failed instruction
300 * simops.c (OP_3220): Fix trace output for illegal accumulator
305 * simops.c: Disable setting of DM bit in PSW.
309 * simops.c (op_types): Added new memory indirect type OP_MEMREF3.
310 (trace_input_func): Added support for OP_MEMREF3.
311 (OP_32010000): New instruction ld.
312 (OP_33010000): New instruction ld2w.
313 (OP_5209): New instruction sac.
314 (OP_4209): New instruction sachi.
315 (OP_3220): New instruction slae.
316 (OP_36010000): New instruction st.
317 (OP_37010000): New instruction st2w.
321 * interp.c (old_segment_mapping): New global.
322 (xfer_mem): Change the default segment mapping to be the way
323 that Mitsubishi prefers, but use the previous mapping if
324 old_segment_mapping is true.
325 (sim_open): Add an option -oldseg to get the old mapping.
326 (sim_create_inferior): Init mapping registers based on the
327 value of old_segment_mapping.
331 * simops.c (OP_6601): Do not write back decremented address if
332 either of the destination registers was the same as the address
334 (OP_6201): Do not write back incremented address if either of the
335 destination registers was the same as the address register.
339 * configure: Regenerated to track ../common/aclocal.m4 changes.
343 * configure: Regenerated to track ../common/aclocal.m4 changes.
347 * interp.c (ui_loop_hook_counter): New global (when NEED_UI_LOOP_HOOK
349 (sim_resume): If the counter has expired, call the ui_loop_hook,
351 (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the frequency of
353 * Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
357 * simops.c: If load instruction with auto increment/decrement
358 addressing is used when the destination register is the same as
359 the address register, then ignore the auto increment/decrement.
363 * simops.c (OP_5F00): Ifdef SYS_stat case because
364 not all systems have it defined.
368 * simops.c (OP_5607): Correct saturation comparison/assignment.
369 (OP_1201, OP_1203, OP_17001200, OP_17001202,
370 OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
371 OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
375 * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
383 * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation
388 * simops.c (sys/syscall.h): Include targ-vals.h instead.
389 (SYS_*): Replace with TARGET_SYS_*.
391 * Makefile.in: Add dependency on targ-vals.h.
392 (NL_TARGET): Define as NL_TARGET_d10v.
396 * interp.c (xfer_mem): Missing break, instruction memory case
397 flowed into unified memory case.
401 * simops.c: If load instruction with auto increment/decrement
402 addressing is used when the destination register is the same as
403 the address register, then ignore the auto increment/decrement.
407 * configure: Regenerated to track ../common/aclocal.m4 changes.
409 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
411 * configure: Regenerated to track ../common/aclocal.m4 changes.
416 * acconfig.h: New file.
417 * configure.in: Reverted change of Apr 24; use sinclude again.
419 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
421 * configure: Regenerated to track ../common/aclocal.m4 changes.
426 * configure.in: Don't call sinclude.
430 * interp.c (struct hash_entry): OPCODE and MASK are unsigned.
432 * d10v_sim.h (remote-sim.h, sim-config.h): Include.
436 * configure: Regenerated to track ../common/aclocal.m4 changes.
440 * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain
442 (OP_OP_1000000, add3): Trace inputs before performing add.
443 (OP_5F00, <*>): Trace input registers before making system call.
444 (OP_5F00, <kill>): Trace R0, R1 not REGn.
445 (OP_5F00, <getpid>): Always return 47.
447 * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND,
448 SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write
450 (struct _state): Add struct slot slot to global state variable.
451 (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST,
452 F0, F1, C from global State variable.
453 (struct _state): Add struct trace to global State variable.
454 (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND.
455 (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG.
456 (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr.
457 (INC_ADDR): Re-implement. Use SET_GPR to update registers.
458 (JMP): Re-implement. Use SET_* to update registers.
460 * interp.c: Use new SET_* et.al. macros to fetch / store
462 (get_operands): Squirrel away trace values at start of each
464 (do_2_short): Flush pending writes before issuing second
466 (sim_resume): Flush pending writes at end of instruction cycle.
467 (sim_fetch_register, sim_store_register, sim_create_inferior):
468 After scheduling updates to registers using SET_*, flush updates.
469 (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so
470 that each sets pc using SET_* and last SET_* eventually winds out.
472 * simops.c: Use new SET_* et.al. macros to fetch / store
474 (move_to_cr): Add MASK argument for selective update of CREG bits.
475 Re-implement using new SET_* macros.
476 (trace_output_func, trace_output): Delete. Replace with.
477 (do_trace_output_flush, trace_output_finish, trace_output_40,
478 trace_output_32, trace_output_16, trace_output_void,
479 trace_output_flag): New functions. Handle specific trace cases.
480 (OP_*): Re-write tracing to use new trace_output_* functions.
481 (OP_*): Re-write to use new SET_* et.al. macros.
482 (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition.
483 (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32.
487 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
488 configure: Re-generate.
492 * configure: Regenerated to track ../common/aclocal.m4 changes.
496 * configure: Regenerated to track ../common/aclocal.m4 changes.
500 * configure: Regenerated to track ../common/aclocal.m4 changes.
504 * interp.c (sim_store_register, sim_fetch_register): Pass in
505 length parameter. Return -1.
509 * (dmem_addr): If address is illegal or in I/O space, signal a bus
510 error. Allocate unified memory on demand. Fix DMEM address
515 * simops.c (OP_5F20): Implement "dbt".
516 (OP_5F60): Implement "rtd".
518 * d10v_sim.h (DPC_CR): Define enum.
519 (DBT_VECTOR_START): Define
524 * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according
527 * d10v_sim.h (struct _state): Add sp, as holding area for SPI/SPU.
532 * simops.c (OP_5F00): Call error instead of abort for unknown
535 * d10v_sim.h (enum): Define DPSW_CR.
537 * simops.c (move_to_cr): Mask out hardwired zero bits in DPSW.
541 * interp.c (sim_write_phys): Delete.
542 (sim_load): Call sim_load_file with sim_write and LMA.
546 * interp.c: Rewrite xfer_mem so that it translates addresses as -
547 0x00... - DMAP translated memory, 0x01... IMAP translated memory,
548 0x10... - on-chip data, 0x11... - on-chip insn, 0x12... - unified
551 (imem_addr): New function - translate IMEM address.
552 (sim_resume): Use imem_addr to translate insn address, abort if
554 (sim_create_inferior): Write ARGV to memory using sim_write. Pass
555 argc/argv using r0/r1 not r2/r3.
556 (sim_size): Do not initialize IMAP/DMAP here.
557 (sim_open): Call sim_create_inferior and sim_size to initialize
559 (sim_create_inferior): Initialize IMAP/DMAP to hardware reset
561 (init_system): Delete.
562 (xfer_mem, sim_fetch_register, sim_store_register): Do not call
564 (decode_pc): Check prog_bfd is defined before looking up .text
569 * configure: Regenerated to track ../common/aclocal.m4 changes.
573 * configure: Regenerated to track ../common/aclocal.m4 changes.
577 * interp.c (sim_stop_reason): Exit status is now in r0, not r2.
581 * d10v_sim.h (DEBUG_TRAP): New debug flag.
583 * simops.c (OP_5F00): If DEBUG_TRAP is on, turn traps 0-14 into
584 printing the registers.
588 * simops.c (op_types): New ABI, args are r0..r3, system call # is
590 (trace_{in,out}put_func): Ditto.
592 (OP_24800000): Ditto.
598 * interp.c (UMEM_SEGMENTS): New define, set to 128.
599 (sim_size): Use UMEM_SEGMENTS rather than hardwired constant.
600 (sim_close): Reset prog_bfd to NULL after closing it. Also
601 reset prog_bfd_was_opened_p after closing prog_bfd.
602 (sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd.
603 (sim_create_inferior): Get start address from abfd not prog_bfd.
604 (xfer_mem): Do bounds checking on addresses and return zero length
605 read/write on bad addresses, rather than aborting. Prepare to
606 be able to handle xfers that cross segment boundaries, but not
607 yet implemented. Only emit debug message when d10v_debug is
608 set as well as DEBUG being defined.
610 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
612 * configure: Regenerated to track ../common/aclocal.m4 changes.
616 * configure: Regenerated to track ../common/aclocal.m4 changes.
621 * d10v_sim.h (RPT_S): Index cregs with RPT_S_CR not RPT_E_CR.
622 (BPSW): Ditto for BPSW_CR and not PSW_CR.
624 * simops.c (OP_5F40): JMP to BPC instead of assigning PC directly.
629 reserved trap from 0 to 15. Add trap emulation code for 0-14.
634 * d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START,
635 SDBT_VECTOR_START, TRAP_VECTOR_START): Define.
637 * simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW,
639 (OP_5F00): For "trap", update BPSW with move_to_cr.
643 * d10v_sim.h (enum): Enumerate CR register names.
644 (enum): Enumerate PSW bit values.
645 (PSW): Obtain value uing move_from_cr.
646 (MOD_S, MOD_E, BPSW): Make r-values.
647 (move_from_cr, move_to_cr): Declare functions.
649 * interp.c (sim_fetch_register, sim_store_register): Use
650 move_from_cr and move_to_cr for CR register transfers.
652 * simops.c (move_from_cr, move_to_cr): New functions.
653 (OP_5F40): Move BPSW to PSW using move_to_cr and move_from_cr.
654 (OP_5600): For "mvtc", use function move_to_cr.
655 (OP_5200): For "mvfc", use function move_from_cr.
659 * simops.c (OP_5600): For "mvtc" MOD_E and MOD_S, ensure that the
664 * configure: Regenerated to track ../common/aclocal.m4 changes.
668 * d10v_sim.h (struct _state): Add DM - PSW debug mask.
670 * simops.c (OP_5600): For "mvtc", save PSW.DM.
671 (OP_5200): Ditto for "mvfc".
675 * d10v_sim.h (SEXT56): Define.
677 * simops.c (OP_4201): For "rac", sign extend 56 bit value before
680 * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
685 * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or
686 RIGHT_FIRST, as appropriate, instead of hardcoded ints that
687 don't match enum values.
691 * simops.c (OP_3A00): For "macu", perform multiply stage using 32
692 bit rather than 16 bit precision.
693 (OP_3C00): For "mulxu", store unsigned product in ACC.
694 (OP_3800): For "msbu", subtract unsigned product from ACC,
695 (OP_0): For "sub", compute carry by comparing inputs.
699 * simops.c (OP_1000): For "sub2w", compute carry by comparing
704 * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract,
705 carry indicated by value > 0xffff.
709 * interp.c (sim_resume): Don't set up SIGINT handler using signal,
711 (sim_resume): Fix race condition of a direct assignment to
712 stop_simulator, conditionally call sim_stop.
713 (sim_stop_reason): Check stop_simulator returning SIGINT. Clear
714 stop_simulator ready for next sim_resume call.
715 (sim_ctrl_c): Delete function.
719 * interp.c (sim_resume): For "REP", only check/update the PC when
720 a branch instruction has not been executed.
724 * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign
725 extend bit 44 all constants.
726 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
730 * d10v_sim.h: Include sim-types.h.
731 (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef
732 using unsigned8 et.al. from sim-types.h.
733 (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with
738 * interp.c (sim_write_phys): New function, write to physical
739 instead of virtual memory.
741 * interp.c (sim_load): Pass lma_p and sim_write_phys to
744 Mon Oct 13 10:55:07 1997 Fred Fish <cygnus.com>
746 * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
747 exception generation code to OP_6E01.
748 (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
753 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
758 * configure: Regenerated to track ../common/aclocal.m4 changes.
762 * interp.c (pc_addr): Discard upper bit(s) of PC in case
763 IMAP1 selects unified memory.
764 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
769 * configure: Regenerated to track ../common/aclocal.m4 changes.
773 * configure: Regenerated to track ../common/aclocal.m4 changes.
777 * configure: Regenerated to track ../common/aclocal.m4 changes.
781 * configure: Regenerated to track ../common/aclocal.m4 changes.
785 * configure: Regenerated to track ../common/aclocal.m4 changes.
789 * interp.c (sim_resume): Increment PC at end of rep
792 * simops.c (OP_4201): Fix rachi instruction.
794 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
796 * configure: Regenerated to track ../common/aclocal.m4 changes.
800 * configure: Regenerated to track ../common/aclocal.m4 changes.
805 * interp.c (sim_kill): Delete.
806 (sim_create_inferior): Add ABFD argument.
807 (sim_load): Move setting of PC from here.
808 (sim_create_inferior): To here.
809 (start_address): Delete variable.
813 * configure: Regenerated to track ../common/aclocal.m4 changes.
818 * interp.c (sim_open): Add ABFD argument.
822 * interp.c (sim_open): Add callback argument.
823 (sim_set_callbacks): Remove SIM_DESC argument.
827 * configure: Regenerated to track ../common/aclocal.m4 changes.
831 * interp.c (sim_open): Undo patch to add -E support.
835 * interp.c (sim_stop): New function.
839 * Makefile.in (SIM_OBJS): Add sim-load.o.
840 * d10v_sim.h (exec_bfd): Rename to prog_bfd.
841 * interp.c: #include bfd.h.
842 (myname, sim_kind, start_address): New static locals.
843 (prog_bfd_was_opened_p, prog_bfd): New static locals.
844 (decode_pc): Update to use prog_bfd.
845 (sim_open): Set sim_kind, myname. Ignore -E arg.
846 (sim_close): Close prog_bfd if simulator opened it.
847 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
848 (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd.
849 Call sim_load_file to load file into simulator.
850 * simops.c (trace_input_func): exec_bfd renamed to prog_bfd.
854 * simops.c (OP_5F00): Only provide system calls SYS_execv,
855 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
859 * configure: Regenerated to track ../common/aclocal.m4 changes.
864 * interp.c (sim_open): New arg `kind'.
866 * configure: Regenerated to track ../common/aclocal.m4 changes.
870 * configure: Regenerated to track ../common/aclocal.m4 changes.
874 * configure: Re-generate.
878 * configure: Regenerate to track ../common/aclocal.m4 changes.
880 * simops.c (OP_5F00): Remove old traps 1-3. Make trap 15 the same
881 as trap 0, which will be deprecated. Only set errno, if an error
882 in fact was returned.
886 * interp.c: Delete redundant prototypes of sim_foo fns.
887 (sim_open): New SIM_DESC result. Argument is now in argv form.
888 (other sim_*): New SIM_DESC argument.
892 * simops.c (trace_{input,output}_func): Call flush_stdout from the
895 (OP_6{4,6,C,A}01): Test for post decrement on the stack pointer.
896 (OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in
897 setting the carry bit after an add or a subtract.
901 * simops.c (OP_{1403,15002A02,3{0,4}0{0,1}}): Only use the bottom
902 40 bits of accumulators. Sign/zero extend as appropriate.
906 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
907 COMMON_{PRE,POST}_CONFIG_FRAG instead.
908 * configure.in: sinclude ../common/aclocal.m4.
909 * configure: Regenerated.
913 * configure configure.in Makefile.in: Update to new configure
914 scheme which is more compatible with WinGDB builds.
915 * configure.in: Improve comment on how to run autoconf.
916 * configure: Re-run autoconf to get new ../common/aclocal.m4.
917 * Makefile.in: Use autoconf substitution to install common
922 * gencode.c: patch to not #include "d10v_sim.h" which
923 unecessarily includes bfd.h and causes wingdb configure
928 * interp.c (xfer_mem): Change unified memory to 0x0.
932 * simops.c (OP_3E01): Fix tracing information.
933 (OP_300{0,1}): Do not propigate sign.
937 * config.in (WORDS_BIGENDIAN): Add.
938 * configure: Regenerated.
939 * d10v_sim.h: #include "config.h"
943 * gencode.c (write_opcodes): Eliminate warnings when generated
948 * interp.c (sim_open): Cast result of calloc, and make sure NULL
950 (dmem_addr): If address is illegal or in I/O space, signal a bus
952 (pc_addr): Signal bus error, not illegal instruction for bogus
957 * Makefile.in: Delete all stuff moved to ../common/Make-common.in.
958 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
959 * configure.in: Simplify using macros in ../common/aclocal.m4.
960 Call AC_CHECK_HEADERS(unistd.h).
961 * configure: Regenerated.
962 * config.in: New file.
963 * interp.c: #include "callback.h".
964 * simops.c: #include "config.h". #include <unistd.h> if present.
968 * d10v-sim.h (simops): Add flag is_long.
969 (State): Add pc_changed. Instructions which update the PC should
970 use the JMP macro which sets this.
971 (JMP): New macro. Sets the PC and the pc_changed flag.
973 * gencode.c (write_opcodes): Add is_long field.
975 * interp.c (lookup_hash): If we blindly apply a short opcode's mask
976 to a long opcode we could get a false match. Check the opcode size.
977 (hash): Add a size field to the hash table.
978 (sim_open): Initialize size field in hash table.
979 (sim_resume): Change to logic for setting the PC. Used to increment the
980 PC if it had not been changed. This didn't allow single-instruction loops.
981 Now checks the flag State.pc_changed. Also now stops when ^C is received.
982 (dmem_addr): Fix translation of data segments to unified memory.
983 (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
985 * simops.c: Changed all branch and jump instructions to use new JMP macro.
986 (OP_20000000): Corrected trace information to show this is a ldi.l, not
991 * interp.c (sim_fetch_register, sim_store_register): Fix bug where
992 updating the accumulators was overwriting other parts of the global
997 * interp.c (bfd.h) Don't include it here any more.
998 (text{,_start,_end}): Move here from simops.c and make extern.
999 (decode_pc): New function to return the PC as an address that the
1001 (dmem_addr): Print decoded PC in error message.
1004 * simops.c (bfd.h) Don't include it here any more.
1005 (text{,_start,_end}): Move to simops.c.
1006 (trace_input_func): Move decoding of PC, and looking up .text
1009 * d10v_sim.h (bfd.h): Include it here.
1010 (text{,_start,_end}): Add external declarations.
1016 * interp.c (sim_size): Now allocates unified memory for imap segments
1017 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
1018 (sim_write): Just call xfer_mem().
1019 (sim_read): Just call xfer_mem().
1020 (xfer_mem): New function. Does appropriate memory mapping and copies bytes.
1021 (dmem_addr): New function. Reads dmap register and translates data
1022 addresses to local addresses.
1023 (pc_addr): New function. Reads imap register and computes local address
1024 corresponding to contents of the PC.
1025 (sim_resume): Change to use pc_addr().
1026 (sim_create_inferior): Change reinitialization code. Also reinitializes
1028 (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
1029 (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
1031 * simops.c (MEMPTR): Redefine to use dmem_addr().
1032 (OP_5F00): Replace references to STate.imem with dmem_addr().
1034 * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
1035 (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
1036 (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
1040 * d10v_sim.h (_ins_type): Reorganize, so that we can provide
1041 better statistics, like not counting NOPS as parallel
1042 instructions, and printing total cycles.
1043 (ins_type_counters): Make unsigned long.
1044 (left_nops,right_nops): Fold into ins_type_counters.
1046 * simops.c (trace_input_func): Print new instruction types.
1047 Handle OP_R2R3 as input types.
1048 (OP_{38000000,7000}): Correctly sign extend bytes.
1049 (OP_5E00): Don't count NOPs as parallel instructions.
1050 (OP_460B): Remove unused variable.
1053 * interp.c (ins_type_counters): Make unsigned long.
1054 (left_nops,right_nops): Delete.
1055 (most functions): Add prototypes.
1056 (INLINE): If GCC and optimize define as __inline__.
1057 ({,lookup_}hash,get_operands): Declare as INLINE.
1058 (do_parallel): Count conditional operations.
1059 (add_commas): New function, to add commas every 3 digits.
1060 (sim_size): Call add_commas to print numbers.
1061 (sim_{open,resume}): Delete unused variables.
1062 (sim_info): Provide better statistics.
1063 (sim_read): Add int return type.
1067 * interp.c (sim_resume): Change the way single-stepping and exceptions
1068 are handled so single-stepping works again.
1072 * endian.c: Optimize simulated loads/stores on x86, AIX, and big
1075 * configure.in (--enable-sim-bswap): New switch to enable using
1076 the BSWAP instruction on x86's.
1077 * configure: Regenerate.
1079 * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap
1084 * endian.c: New file. Move endian functions here from interp.c.
1085 Optimize code, and make it work as either inline functions or as a
1088 * interp.c: Move endian functions from here to endian.c.
1090 * Makefile.in (INCLUDE): Add endian.c.
1091 (run,libsim.a): Add dependency on endian.o.
1092 (endian.o): Add dependency.
1094 * d10v_sim.h (read/write support): Always go through the machine
1095 independent endian functions. If compiling with GCC and
1096 optimizing, include endian.c so the endian functions are inlined.
1098 * simops.c (OP_5F00): Correct tracing of accumulators.
1102 * simops.c (OP_5F00): Add support for getpid, kill system calls.
1104 * interp.c (do_{2_short,parallel}): If an exception is raised,
1105 don't execute the second instruction.
1109 * simops.c (OP_{31000000,6601,6201,6200}): Store address in a
1110 temporary in case the register is overriden when loading.
1111 (OP_6200): Output type is OP_DREG for tracing.
1115 * d10v_sim.h (struct _state): Add mem_{min,max} fields.
1117 * interp.c (sim_size): Initialize mem_{min,max} fields.
1118 (sim_write): Update mem_{min,max} fields.
1119 (sim_resume): If PC is not in the minimum/maximum memory range,
1121 (sim_create_inferior): Preserve mem_{min,max} fields.
1125 * simops.c (OP_5F00): Add support for time() system call.
1129 * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being
1131 (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for
1136 * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}.
1137 (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}.
1138 (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3
1139 to call/subroutine returns to trace the first two arguments and
1140 the return value. For small jumps, use CONSTANT8, not CONSTANT16.
1144 * interp.c (sim_create_inferior): Reinitialize State every time
1145 sim_create_inferior() is called.
1149 * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right
1151 (OP_401): Fix tracing information.
1155 * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output.
1156 (trace_input_func): Use them.
1157 (trace_input_func): Make sure there is a trailing space after the
1159 (OP_6200): Fix tracing info.
1161 * Makefile.in (run): Add dependencies on libbfd.a and
1166 * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line
1167 numbers and function names in debug trace.
1168 (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and
1170 (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction
1171 and exit system call trap being executed.
1173 * interp.c (sim_stop_reason): Set exit code correctly for stop
1174 instruction and exit system call trap.
1176 * configure.in (--enable-sim-cflags): Remove trace case.
1177 (--enable-sim-debug): New switch to set the debug values.
1178 * configure: Regenerate.
1180 * simops.c (trace_{input,output}_func): Rename from
1181 trace_{input,output}.
1182 (trace_{input,output}): Call trace_{input,output}_func if
1183 d10v_debug is non-zero.
1184 (SIZE_INSTRUCTION): Cut down to 8.
1185 (SIZE_OPERANDS): Cut down to 18.
1186 (SIZE_LOCATION): New value for size of line number, function name
1188 (init_text_p,text{,_start,_end}): New static variables for
1189 printing line number and function name.
1190 (exec_bfd): New external that run.c sets.
1191 (trace_input_func): Print line number and function name if
1192 available and if desired.
1193 (OP_4E09): Don't print out DBT message.
1194 (OP_5FE0): Set exception field to SIG_D10V_STOP.
1195 (OP_5F00): Set exception field to SIG_D10V_EXIT.
1199 * interp.c (do_2_short): If the instruction encodes jump->ins,
1200 don't do the second instruction if the jump succeeds.
1204 * simops.c (OP_5F00): Use unknown traps to print all GPRs,
1205 accumulators, PC, and F0/F1/C flags.
1209 * simops.c (OP_5F00): Fix problems with system calls.
1213 * simops.c (OP_5F00): Correct tracing information for trap.
1217 * Makefile.in (CSEARCH): Correctly find opcodes directory.
1221 * simops.c (trace_output): Properly align accumulator output.
1222 (OP_3{0,2,4}00): Properly parenthesize test expression. Add error
1223 if shift count is too high.
1224 (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book.
1225 (OP_4E09): Make cpfg properly trace the input flags.
1226 (op_types): Add OP_FLAG_OUTPUT.
1227 (trace_{input,output}): Support OP_FLAG_OUTPUT.
1228 (OP_31000000): This ld2w varient is a 16-bit memory reference, not
1229 an 8-bit memory reference instruction for tracing purposes.
1230 (OP_201): Addi needs to set the carry.
1234 * simops.c (OP_2600, OP_2601): Changed min and max comparisons
1235 to use signed register values.
1239 * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug
1241 (_ins_type): New enumeration to specify which container an
1242 instruction is in, and whether it is part of a parallel operation.
1243 (_state): Add ins_type field.
1244 ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types.
1245 (ins_type_counters): Counters for the various instruction types.
1246 ({left,right}_nops): Counters for the number of nops in each
1248 (d10v_debug): New variable to indicate whether debugging is turned
1251 * simops.c: (all functions): Change all #ifdef DEBUG code so that
1252 the input and output values can be traced, along with the
1253 instruction type. Make the -t option enable tracing.
1254 (all functions): Change printf calls to use the printf_filtered
1255 function in the callback table.
1257 * interp.c (_leftright): New enumeration to say whether 2 short
1258 instructions are done left first or right first.
1259 (do_{long,2_short,parallel}): Indicate in the machine state which
1260 type of instruction this is. Count each of the types of
1261 instructions executed.
1262 (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug
1264 (sim_resume): Pass left/right indication to do_2_short.
1265 (all functions): Change printf calls to use the printf_filtered
1266 function in the callback table.
1267 (sim_trace): Turn on debug flag if DEBUG was defined, and call
1269 (sim_info): Print out statistics on instructions.
1270 (sim_{trace,create_inferior}): Eliminate extraneous output unless
1272 (sim_open): If args == -t and DEBUG was defined, set d10v_debug.
1273 Only initialize the hash table the first time sim_open is called.
1275 * Makefile.in: Make objects depend on d10v_sim.h.
1276 ({,SIM_}CFLAGS): Include configure dependent switches. Setting
1277 CFLAGS does not override host/target defines or SIM_CFLAGS.
1278 (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode.
1279 (run): By default, the math library is not needed to be linked
1281 ({BFD,LIBIBERTY}_LIB): Define as variables so they can be
1283 (VPATH): Don't set to anything but @srcdir@ to work with non-GNU
1285 ({run,callback}.o): Provide explicit paths to their appropriate
1287 (gencode{,.o},d10v-opc.o): Split compilation into creating object
1288 and linking. Instead of linking in libopcodes.a, just compile
1289 d10v-opc.o directly to handle canadian cross.
1290 (CSEARCH): Add opcodes directory.
1292 * configure.in (--enable-sim-cflags): New switch to allow user to
1294 (CC_FOR_BUILD): Deal with canadian crosses.
1295 * configure: Regenerate.
1299 * simops.c: Include correct syscall.h for d10v, not host's.
1300 Fix #ifdef SYS_stat.
1304 * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef.
1305 Add trap 2 to be printf and trap 3 to be putchar.
1309 * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support
1310 for low-level system calls.
1314 * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
1318 * d10v_sim.h (SEXT32): Added.
1319 * interp.c: Commented out printfs.
1320 * simops.c: Fixed error in sb and st2w.
1324 * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining
1325 DSP instructions. Added modulo addressing.
1329 * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot.
1333 * d10v_sim.h, simops.c: Snapshot.
1337 * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
1338 gencode.c, interp.c, simops.c: Created.