3 * i386-dis.c: Add x86_64 support.
4 (rex): New static variable.
5 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
7 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
8 (OP_I64, OP_OFF64, OP_IMREG): New functions.
9 (OP_REG, OP_OFF): Declare.
10 (get64, get32, get32s): New functions.
11 (r??_reg): New constants.
12 (dis386_att): Change templates of instruction implicitly promoted
13 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
15 (dis386_intel): Likewise.
16 (dixx86_64_att): New table based on dis386_att.
17 (dixx86_64_intel): New table based on dis386_intel.
18 (names64, names8rex): New global variable.
19 (names32, names16): Add extended registers.
20 (prefix_user_t): Recognize rex prefixes.
21 (prefix_name): Print REX prefixes nicely.
22 (op_riprel): New global variable.
23 (start_pc): Set type to bfd_vma.
24 (print_insn_i386): Detect the 64bit mode and use proper table;
25 move ckprefix after initializing the buffer; output unused rex prefixes;
26 output information about target of RIP relative addresses.
27 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
28 (print_operand_value): New function.
29 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
30 REX prefix and new modes.
32 (get32): Return bfd_signed_vma type.
33 (set_op): Initialize the op_riprel.
34 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
38 cgen-dis.in (read_insn): Use bfd_get_bits()
42 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
43 (hash_insn_list): Likewise
44 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
45 (extract_1): Use bfd_get_bits().
46 (extract_normal): Apply sign extension to both extraction
48 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
49 (cgen_put_insn_value): Use bfd_put_bits()
53 * cgen-asm.in (parse_insn_normal): Print better error message for
54 instructions with missing operands.
58 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
62 * Makefile.in: Regenerate.
63 * aclocal.m4: Regenerate.
64 * config.in: Regenerate.
65 * configure.in: Add spacing.
66 * configure: Regenerate.
67 * ia64-asmtab.c: Regenerate.
68 * po/opcodes.pot: Regenerate.
72 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
73 error messages over later parse-time ones.
77 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
79 * ia64_gen.c (insert_deplist): Cast sizeof result to int.
80 (print_dependency_table): Print NULL if semantics field not set.
81 (insert_opcode_dependencies): Mark cmp parameter as unused.
82 (print_main_table): Use fprintf_vma to print long long fields.
83 (main): Mark argv paramter as unused. Convert to old style definition.
84 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
85 * ia64-asmtab.c: Regnerate.
89 * m32r-dis.c (print_insn): Prevent re-read of instruction from
92 * fr30-dis.c: Regenerate.
96 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
97 * Makefile.am (C_FILES): Add arc-ext.c.
98 (ALL_MACHINES) Add arc-ext.lo.
99 (INCLUDES) Add opcode directory to list.
100 New dependency entry for arc-ext.lo.
101 * disassemble.c (disassembler): Correct call to
102 arc_get_disassembler.
103 * arc-opc.c: New update for ARC, including full base
104 instructions for ARC variants.
105 * arc-dis.h, arc-dis.c: New update for ARC, including
106 extensibility functionality.
107 * arc-ext.h, arc-ext.c: New files for handling extensibility.
111 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
112 MOD_HILO, and MOD_LO macros.
114 * mips-opc.c (M1, M2): Delete.
115 (mips_builtin_opcodes): Remove all uses of M1.
117 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
118 instructions take "G" format second operands and use the
120 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
122 Delete "sel" code operands from mfc1 and mtc1.
123 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
129 * mips-opc.c (mips_builtin_opcodes): Finish additions
130 for MIPS32 support, and clean up existing entries for
131 aesthetics, consistency with the MIPS32 ISA, and
132 with consistency the rest of the table.
136 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
141 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
142 specifiers. Update 'B' for new constant names, and remove
144 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
145 near the top of the array, so they are disassembled properly.
146 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
147 code for MIPS32. Update "clo" and "clz" to use 'U' operand
148 specifier. Add 'H' format specifier variants for "mfc1,"
149 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
150 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
151 "wait" variant which uses 'J' operand specifier.
153 * mips-dis.c (set_mips_isa_type): Update to use
154 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
155 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
156 * mips-opc.c (I32): New constant for instructions added in
159 (mips_builtin_opcodes) Replace all uses of P4 with I32.
161 * mips-dis.c (set_mips_isa_type): Add cases for
162 bfd_mach_mips5 and bfd_mach_mips64.
163 * mips-opc.c (I64): New definitions.
165 * mips-dis.c (set_mips_isa_type): Add case for
170 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
171 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
172 Initialize variable dc to NULL.
173 (print_insn_shx): Remove unused label d_reg_n.
177 * arm-opc.h: Add new opcode formatting parameter 'B'.
178 (arm_opcodes): Add XScale, v5, and v5te instructions.
179 (thumb_opcodes): Add v5t instructions.
181 * arm-dis.c (print_insn_arm): Handle new 'B' format
183 (print_insn_thumb): Decode BLX(1) instruction.
187 * mips-opc.c: Fix file header comment.
191 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
192 print_insn_cris_with_register_prefix.
196 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
200 * cgen-dis.in (print_insn): All insns which can fit into insn_value
201 must be loaded there in their entirety.
205 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
206 (compute_arch_mask): Add v8plusb and v9b machines.
207 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
208 * opcodes/sparc-opc.c: Support for Cheetah instruction set.
209 (prefetch_table): Add #invalidate.
213 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
217 * fr30-desc.h: Regenerate.
218 * m32r-desc.h: Regenerate.
219 * m32r-ibld.c: Regenerate.
223 * ia64-ic.tbl: Update from Intel.
224 * ia64-asmtab.c: Regenerate.
228 * ia64-gen.c: Convert C++-style comments to C-style comments.
229 * tic54x-dis.c: Likewise.
233 Changes to add dollar prefix to registers for files where user symbols
234 don't have a leading underscore. Fix formatting.
235 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
236 (format_reg): Add parameter with_reg_prefix. All callers changed.
237 (print_with_operands): Ditto.
238 (print_insn_cris_generic): Renamed from print_insn_cris, add
239 parameter with_reg_prefix.
240 (print_insn_cris_with_register_prefix,
241 print_insn_cris_without_register_prefix, cris_get_disassembler):
243 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
247 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
248 gt, ge, ngt, and nge.
249 * ia64-asmtab.c: Regenerate.
251 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
252 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
253 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
254 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
255 * ia64-asmtab.c: Regnerate.
259 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
260 Add mfc0 and mtc0 with sub-selection values.
261 Add clo and clz opcodes.
262 Add msub and msubu instructions for MIPS32.
263 Add madd/maddu aliases for mad/madu for MIPS32.
264 Support wait, deret, eret, movn, pref for MIPS32.
265 Support tlbp, tlbr, tlbwi, tlbwr.
268 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
269 (print_insn_arg): Handle 'H' args.
270 (set_mips_isa_type): Recognize 4K.
271 Use CPU_* defines instead of hardcoded numbers.
275 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
276 (d30v_format_tab): Use Rb2 for modinc and moddec.
280 * d30v-opc.c (d30v_format_tab): Use format Ra for
285 * configure: Rebuilt with new libtool.m4.
289 * configure: Regenerate.
290 * po/opcodes.pot: Regenerate.
294 * acinclude.m4: Include libtool and gettext macros from the
296 * aclocal.m4, configure: Rebuilt.
300 * tic80-dis.c: Fix formatting.
304 * w65-dis.c: Fix formatting.
308 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
309 (powerpc_opcodes): Add table entries for PPC 405 instructions.
310 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
311 instructions. Added extended mnemonic mftbl as defined in the
312 405GP manual for all PPCs.
316 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
317 call. Change last goto to use failed instead of done.
321 * cgen-ibld.in (cgen_put_insn_int_value): New function.
322 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
323 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
324 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
325 * cgen-dis.in (read_insn): New static function.
326 (print_insn): Use read_insn to read the insn into the buffer and set
328 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
330 * fr30-asm.c: Regenerated.
331 * fr30-desc.c: Regenerated.
332 * fr30-desc.h Regenerated.
333 * fr30-dis.c: Regenerated.
334 * fr30-ibld.c: Regenerated.
335 * fr30-opc.c: Regenerated.
336 * fr30-opc.h Regenerated.
337 * m32r-asm.c: Regenerated.
338 * m32r-desc.c: Regenerated.
339 * m32r-desc.h Regenerated.
340 * m32r-dis.c: Regenerated.
341 * m32r-ibld.c: Regenerated.
342 * m32r-opc.c: Regenerated.
346 * tic30-dis.c: Fix formatting.
350 * sh-dis.c: Fix formatting.
354 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
358 * z8k-dis.c: Fix formatting.
362 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
363 break, mov-immediate, nop.
364 * ia64-opc-f.c: Delete fpsub instructions.
365 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
366 address operand. Rewrite using macros to avoid long lines.
367 * ia64-opc.h (POSTINC): Define.
368 * ia64-asmtab.c: Regenerate.
372 * ia64-ic.tbl: Add missing entries.
376 * i860-dis.c (print_br_address): Change third argument from int
381 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
382 for MLI templates. Handle IA64_OPND_TGT64.
386 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
391 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
395 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
396 Change return type from void to int. Check the combination
397 of operands, return 1 if valid. Fix to avoid BUF overflow.
398 Report undefined combinations of operands in COMMENT.
399 Report internal errors to stderr. Output the adiw/sbiw
400 constant operand in both decimal and hex.
401 (print_insn_avr): Disassemble ldd/std with displacement of 0
402 as ld/st. Check avr_operand () return value, handle invalid
403 combinations of operands like unknown opcodes.
407 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
408 (run-cgen, stamp-m32r, stamp-fr30): New targets.
409 * Makefile.in: Regenerate.
410 * configure.in: Add --enable-cgen-maint option.
411 * configure: Regenerate.
415 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
416 (cgen_hw_lookup_by_num): Ditto.
417 (cgen_operand_lookup_by_name): Ditto.
418 (print_address): Ditto.
419 (print_keyword): Ditto.
420 * cgen-dis.c (hash_insn_array): Mark unused parameters with
422 * cgen-asm.c (hash_insn_array): Mark unused parameters with
424 (cgen_parse_keyword): Ditto.
428 * i860-dis.c: New file.
429 (print_insn_i860): New function.
430 (print_br_address): New function.
431 (sign_extend): New function.
432 (BITWISE_OP): New macro.
433 (I860_REG_PREFIX): New macro.
434 (grnames, frnames, crnames): New structures.
436 * disassemble.c (ARCH_i860): Define.
437 (disassembler): Add check for bfd_arch_i860 to set disassemble
438 function to print_insn_i860.
440 * Makefile.in (CFILES): Added i860-dis.c.
441 (ALL_MACHINES): Added i860-dis.lo.
442 (i860-dis.lo): New dependences.
444 * configure.in: New bits for bfd_i860_arch.
446 * configure: Regenerated.
450 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
451 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
452 (cris-dis.lo, cris-opc.lo): New rules.
453 * Makefile.in: Rebuild.
454 * configure.in (bfd_cris_arch): New target.
455 * configure: Rebuild.
456 * disassemble.c (ARCH_cris): Define.
457 (disassembler): Support ARCH_cris.
458 * cris-dis.c, cris-opc.c: New files.
459 * po/POTFILES.in, po/opcodes.pot: Regenerate.
463 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
468 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
473 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
474 fput_const, extract_3, extract_5_load, extract_5_store,
475 extract_5r_store, extract_5R_store, extract_10U_store,
476 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
477 extract_12, extract_17, extract_22): Prototype.
478 (print_insn_hppa): Rename inner block opcode -> opc to avoid
479 shadowing outer block.
488 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
492 * avr-dis.c (avr_operand): Change _ () to _() around all strings
493 marked for translation (exception from the usual coding style).
494 (print_insn_avr): Initialize insn2 to avoid warnings.
498 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
499 * h8500-dis.c: Fix formatting.
503 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
504 (CLEANFILES): Add DEPA.
505 * Makefile.in: Regenerate.
509 * arm-dis.c (regnames): Add an additional register set to match
510 the set used by GCC. Make it the default.
514 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
516 * Makefile.in: Regenerate.
520 * Makefile.am: Rebuild dependency.
521 * Makefile.in: Rebuild.
525 * Makefile.in, configure: regenerate
526 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
528 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
530 * configure.in: Recognize m68hc12 and m68hc11.
531 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
532 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
533 and opcode generation for m68hc11 and m68hc12.
537 * disassemble.c (disassembler): Refer to the PowerPC 620 using
538 bfd_mach_ppc_620 instead of 620.
542 * h8300-dis.c: Fix formatting.
543 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
548 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
552 * avr-dis.c: completely rewritten.
556 * h8300-dis.c: Follow the GNU coding style.
557 (bfd_h8_disassemble) Fix a typo.
561 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
562 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
563 correctly. Fix a typo.
567 * opintl.h (_(String)): Explain why dgettext is used instead of
572 * opintl.h (gettext, dgettext, dcgettext, textdomain,
573 bindtextdomain): Replace defines with those from intl/libgettext.h
574 to quieten gcc warnings.
578 * Makefile.am: Update dependencies with "make dep-am"
579 * Makefile.in: Regenerate.
583 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
584 sign-extending operands.
588 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
593 * Makefile.am (LIBIBERTY): Define.
597 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
598 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
599 (reg_names): Rename to std_reg_names. Change it to a char **
601 (std_reg_names): New name for reg_names.
602 (set_mips_isa_type): Set reg_names to point to std_reg_names by
607 * fr30-desc.h: Partially regenerated to account for changed
608 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
609 * m32r-desc.h: Ditto.
613 * arm-opc.h: Use upper case for flasg in MSR and MRS
614 instructions. Allow any bit to be set in the field_mask of
617 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
618 field_mask of an MSR instruction.
622 * arm-opc.c: Disassembly of thumb ldsb/ldsh
623 instructions changed to ldrsb/ldrsh.
627 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
628 target addresses for 'jal' and 'j'.
632 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
633 also available in common mode when powerpc syntax is being used.
637 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
638 (dummy_print_address): Ditto.
644 * disassemble.c (disassembler): Add ARCH_tic54x.
645 * configure.in: Added tic54x target.
647 * Makefile.am: Add tic54x dependencies.
648 * Makefile.in: Ditto.
652 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
653 vector unit operands.
654 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
655 unit instruction formats.
656 (PPCVEC): New macro, mask for vector instructions.
657 (powerpc_operands): Add table entries for above operand types.
658 (powerpc_opcodes): Add table entries for vector instructions.
660 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
661 (print_insn_little_powerpc): Likewise.
662 (print_insn_powerpc): Prepend 'v' when printing vector registers.
666 * configure.in: Add bfd_powerpc_64_arch.
667 * disassemble.c (disassembler): Use print_insn_big_powerpc for
672 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
677 * avr-dis.c (reg_fmul_d): New. Extract destination register from
679 (reg_fmul_r): New. Extract source register from FMUL instruction.
680 (reg_muls_d): New. Extract destination register from MULS instruction.
681 (reg_muls_r): New. Extract source register from MULS instruction.
682 (reg_movw_d): New. Extract destination register from MOVW instruction.
683 (reg_movw_r): New. Extract source register from MOVW instruction.
684 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
685 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
689 * ia64-gen.c (general): Add an ordered table of primary
690 opcode names, as well as priority fields to disassembly data
691 structures to enforce a preferred disassembly format based on the
692 ordering of the opcode tables.
693 (load_insn_classes): Show a useful message if IC tables are missing.
694 (load_depfile): Ditto.
695 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
696 distinguish preferred disassembly.
697 * ia64-opc-f.c: Reorder some insn for preferred disassembly
698 format. Fix incorrect flag on fma.s/fma.s.s0.
699 * ia64-opc.c: Scan *all* disassembly matches and use the one with
700 the highest priority.
701 * ia64-opc-b.c: Use more abbreviations.
702 * ia64-asmtab.c: Regenerate.
706 * hppa-dis.c (extract_16): New function.
707 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
708 new operand types l,y,&,fe,fE,fx.
716 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
717 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
718 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
720 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
721 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
722 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
723 * Makefile.in: Rebuild.
725 * configure.in (bfd_ia64_arch): New target.
726 * disassemble.c (ARCH_ia64): Define.
727 (disassembler): Support ARCH_ia64.
728 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
729 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
730 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
731 ia64-war.tbl, ia64-waw.tbl): New files.
735 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
736 (disassemble): Use them.
740 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
741 * Makefile.am: Update dependencies.
742 * Makefile.in: Regenerate.
746 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
747 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
748 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
749 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
750 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
751 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
752 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
753 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
754 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
755 ansidecl.h as sysdep.h includes it.
759 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
760 --enable-build-warnings option.
761 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
762 * Makefile.in, configure: Re-generate.
766 * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
767 stc GBR,@-<REG_N> is available for arch_sh1_up.
768 Group parallel processing insn with identical mnemonics together.
769 Make three-operand psha / pshl come first.
773 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
774 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
775 (sh_arg_type): Add A_PC.
776 (sh_table): Update entries using immediates. Add repeat.
777 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
778 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
782 * po/opcodes.pot: Regenerate.
784 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
785 (DEP): Quote when passing vars to sub-make. Add warning message
787 (DEP1): Rewrite for "gcc -MM".
788 (CLEANFILES): Add DEP2.
790 * Makefile.in: Regenerate.
794 * avr-dis.c: Syntax cleanup.
795 (add0fff): Print the pc relative address as a signed number.
800 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
801 the parameter ATTRIBUTE_UNUSED.
802 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
806 * m10300-opc.c: SP-based offsets are always unsigned.
810 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
811 [branch always] instead of "undefined".
815 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
816 short instructions, from end of list of long instructions.
820 * Makefile.am (CFILES): Add avr-dis.c.
821 (ALL_MACHINES): Add avr-dis.lo.
825 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
827 (print_insn_avr): Call function via pointer in K&R compatible way.
828 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
829 add0fff, add03f8): Convert to old style function declaration and
831 (avrdis_opcode): Add prototype.
835 * avr-dis.c: New file. AVR disassembler.
836 * configure.in (bfd_avr_arch): New architecture support.
837 * disassemble.c: Likewise.
838 * configure: Regenerate.
842 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
846 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
847 flag to determine if operand is pc-relative.
850 (REL6S3): Renamed from IMM6S3.
851 Added flag OPERAND_PCREL.
852 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
853 added flag OPERAND_PCREL.
854 (IMM12S3U): Replaced with REL12S3.
855 (SHORT_D2, LONG_D): Delay target is pc-relative.
856 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
857 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
858 using the REL* operands.
859 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
860 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
861 LONG_Db, using REL* operands.
862 (SHORT_U, SHORT_A5S): Removed stray alternatives.
863 (d30v_opcode_table): Use new *r formats.
867 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
868 'signed_overflow_ok_p'.
872 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
873 name of the libtool directory.
874 * Makefile.in: Rebuild.
878 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
879 (cgen_clear_signed_overflow_ok): New function.
880 (cgen_signed_overflow_ok_p): New function.
884 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
885 m32r-ibld.c,m32r-opc.h: Rebuild.
889 * i370-dis.c, i370-opc.c: New.
891 * disassemble.c (ARCH_i370): Define.
892 (disassembler): Handle it.
894 * Makefile.am: Add support for Linux/IBM 370.
895 * configure.in: Likewise.
897 * Makefile.in: Regenerate.
898 * configure: Likewise.
902 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
903 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
908 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
910 * mips-opc.c (G6): New define.
911 (mips_builtin_op): Add "move" definition for -gp32.
916 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
920 * dis-buf.c (buffer_read_memory): Change `length' param and all int
925 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
926 (print_insn_ppi): Likewise.
927 (print_insn_shx): Use info->mach to select appropriate insn set.
928 Add support for sh-dsp. Remove FD_REG_N support.
929 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
930 (sh_arg_type): Likewise. Remove FD_REG_N.
931 (sh_dsp_reg_nums): New enum.
932 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
933 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
934 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
935 (arch_sh3_dsp_up): Likewise.
936 (sh_opcode_info): New field: arch.
937 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
938 D_REG_N. Fill in arch field. Add sh-dsp insns.
942 * arm-dis.c: Change flavor name from atpcs-special to
943 special-atpcs to prevent name conflict in gdb.
944 (get_arm_regname_num_options, set_arm_regname_option,
945 get_arm_regnames): New functions. API to access the several
946 flavor of register names. Note: Used by gdb.
947 (print_insn_thumb): Use the register name entry from the currently
948 selected flavor for LR and PC.
952 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
954 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
955 "mulsh.h" instructions.
956 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
958 (print_insn_mcore): Add support for little endian targets.
959 Add support for MULSH and OPSR classes.
963 * arm-dis.c (parse_arm_diassembler_option): Rename again.
964 Previous delat did not take.
968 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
969 to adjust target address bounds checking and calculate the
970 appropriate octet offset into data.
974 * arm-dis.c: (parse_disassembler_option): Rename to
975 parse_arm_disassembler_option and allow to be exported.
977 * disassemble.c (disassembler_usage): New function: Print out any
978 target specific disassembler options.
979 Call arm_disassembler_options() if the ARM architecture is being
982 * arm-dis.c (NUM_ELEM): Define this macro if not already
984 (arm_regname): New struct type for ARM register names.
985 (arm_toggle_regnames): Delete.
986 (parse_disassembler_option): Use register name structure.
987 (print_insn): New function: Combines duplicate code found in
988 print_insn_big_arm and print_insn_little_arm.
989 (print_insn_big_arm): Call print_insn.
990 (print_insn_little_arm): Call print_insn.
991 (print_arm_disassembler_options): Display list of supported,
992 ARM specific disassembler options.
996 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
997 ARM_STT_16BIT flag as Thumb code symbols.
999 * arm-dis.c (printf_insn_little_arm): Ditto.
1003 * arm-dis.c (printf_insn_thumb): Prevent double dumping
1004 of raw thumb instructions.
1008 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
1012 * arm-dis.c (streq): New macro.
1013 (strneq): New macro.
1014 (force_thumb): ew local variable.
1015 (parse_disassembler_option): New function: Parse a single, ARM
1016 specific disassembler command line switch.
1017 (parse_disassembler_option): Call parse_disassembler_option to
1018 parse individual command line switches.
1019 (print_insn_big_arm): Check force_thumb.
1020 (print_insn_little_arm): Check force_thumb.
1024 * i386-dis.c (grps[]): Correct GRP5 FF/3 from "call" to "lcall".
1028 * m10300-opc.c, m10300-dis.c: Add am33 support.
1032 * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
1033 (print_insn_hppa): Handle 'B' operand.
1037 * d10v-opc.c: Fix pattern for "cpfg,f{0|1},c" instruction.
1041 * mips-opc.c (I5): New.
1042 (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
1043 madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
1044 pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1048 * arm-dis.c (print_insn_arm): Added general purpose 'X' format.
1049 * arm-opc.h (print_insn_arm): Added comment documenting
1050 the 'X' format just added to arm-dis.c.
1054 * mips-opc.c (la): Create a version that just uses addiu directly.
1055 (dla): Expand to daddiu if possible.
1059 * mips-opc.c: Add ssnop pattern.
1063 * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
1067 * d30v-opc.c (mvtacc): Use format SHORT_AR not SHORT_AA
1068 (d30v_format_tab): Define the SHORT_AR format.
1072 * mcore-dis.c: Remove spurious code introduced in previous delta.
1076 * arm-dis.c: Include sysdep.h to prevent compile time warnings.
1080 * alpha-opc.c (alpha_operands): Fill in missing initializer.
1081 (alpha_num_operands): Convert to unsigned.
1082 (alpha_num_opcodes): Ditto.
1083 (insert_rba): Declare unused arguments ATTRIBUTE_UNUSED.
1084 (insert_rca): Ditto.
1088 (extract_bdisp): Ditto.
1089 (extract_jhint): Ditto.
1090 (extract_ev6hwjhint): Ditto.
1094 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',
1097 * hppa-dis.c (print_insn_hppa): Removed unused args. Fix '?W'.
1099 * hppa-dis.c (print_insn_hppa): Implement codes "?N", "?Q".
1103 * d10v-opc.c (d10v_operands): Add RESTRICTED_NUM3 flag for
1104 rac/rachi instructions.
1105 (d10v_opcodes): Added seven new instructions ld, ld2w, sac, sachi,
1110 * fr30-asm.c,fr30-desc.h: Rebuild.
1111 * m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild. Add m32rx support.
1112 * m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
1116 * sh-opc.h: Fix bit patterns for several load and store
1121 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' with
1122 cleaner code using completer prefixes. Add 'Y'.
1126 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'.
1128 * hppa-dis.c (extract_22): New function.
1130 * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'.
1132 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'.
1134 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'.
1136 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='.
1138 * hppa-dis.c (print_insn_hppa): Handle 'X' operand.
1140 * hppa-dis.c (print_insn_hppa): Handle 'B' operand.
1142 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
1144 * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
1146 * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
1150 * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
1152 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
1155 * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
1157 * hppa-dis.c: (print_insn_hppa): Add missing break after
1160 * hppa-dis.c: Finish constifying various completers, register
1165 * configure.in (Canonicalization of target names): Remove adding
1166 ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
1167 generates $ac_config_sub with a ${CONFIG_SHELL} already.
1168 * configure: Regenerate.
1172 * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
1174 * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
1178 * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
1179 names for the mulu and muls patterns.
1183 * pj-opc.c: New file.
1184 * pj-dis.c: New file.
1185 * disassemble.c (disassembler): Handle bfd_arch_pj.
1186 * configure.in: Handle bfd_pj_arch.
1187 * Makefile.am: Rebuild dependencies.
1188 (CFILES): Add pj-dis.c and pj-opc.c.
1189 (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
1190 * configure, Makefile.in: Rebuild.
1194 * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
1198 * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
1202 * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1203 * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1204 * m32r-opinst.c: Rebuild.
1208 * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
1209 register args by 'f'.
1211 * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
1213 * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
1214 extract_10U_store): New.
1215 (print_insn_hppa): Add new completers.
1217 * hppa-dis.c (signed_unsigned_names,mix_half_names,
1218 saturation_names): New.
1219 (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
1221 * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
1223 * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
1225 * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
1226 to decide to print a space.
1230 * i386-dis.c: Add AMD athlon instruction support.
1235 * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
1236 overflow at end of address space.
1237 (generic_print_address): Use sprintf_vma.
1241 * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
1242 MKDEP. Rebuild dependencies.
1243 * Makefile.in: Rebuild.
1247 * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
1248 add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
1249 unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
1250 (print_insn_hppa): Add 64 bit condition completers.
1254 * hppa-dis.c (print_insn_hppa): Change condition args to use
1259 * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
1265 * configure.bat: Remove; obsolete.
1269 * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
1270 (generic_strcat_address): Add cast to avoid warning.
1271 * i386-dis.c: Initialize all structure fields to avoid warnings.
1272 Add ATTRIBUTE_UNUSED as appropriate.
1276 * sparc-dis.c (print_insn_sparc): Differentiate between
1277 addition and oring when guessing symbol for comment.
1281 * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
1286 * i386-dis.c: Mention intel mode specials in macro char comment.
1290 * alpha-dis.c: Don't include <stdlib.h>.
1291 * arm-dis.c: Include "sysdep.h".
1292 * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
1294 * Makefile.am: Rebuild dependencies.
1295 * Makefile.in: Rebuild.
1299 * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
1304 * arm-dis.c (arm_regnames): Turn into a pointer to a register
1306 (arm_regnames_standard): New variable: Array of ARM register
1307 names according to ARM instruction set nomenclature.
1308 (arm_regnames_apcs): New variable: Array of ARM register names
1309 according to ARM Procedure Call Standard.
1310 (arm_regnames_raw): New variable: Array of ARM register names
1311 using just 'r' and the register number.
1312 (arm_toggle_regnames): New function: Toggle the chosen register set
1314 (parse_disassembler_options): New function: Parse any target
1315 disassembler command line options.
1316 (print_insn_big_arm): Call parse_disassembler_options if any
1318 (print_insn_little_arm): Call parse_disassembler_options if any
1323 * i386-dis.c (FWAIT_OPCODE): Define.
1324 (used_prefixes): New static variable.
1325 (fetch_data): Don't print an error message if we have already
1326 fetched some bytes successfully.
1327 (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
1328 (prefix_name): New static function.
1329 (print_insn_i386): If setjmp fails, indicating a data error, but
1330 we have managed to fetch some bytes, print the first one as a
1331 prefix or a .byte pseudo-op. If fwait is followed by a non
1332 floating point instruction, print the first prefix. Set
1333 used_prefixes when prefixes are used. If any prefixes were not
1334 used after disassembling the instruction, print the first prefix
1335 instead of printing the instruction.
1336 (putop): Set used_prefixes when prefixes are used.
1337 (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
1338 (OP_DIR, OP_SIMD_Suffix): Likewise.
1342 * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
1343 Support signx %reg, clruw %reg.
1347 * sparc-opc.c: Add aliases Solaris as supports.
1351 * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
1352 * Makefile.in: Regenerated.
1356 * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
1357 when target is PC-relative.
1361 * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
1364 * m68k-dis.c (fetch_arg): Add places `n', `o'.
1366 * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
1367 Add mcf5206e to appropriate instructions.
1368 Add alias for MAC, MSAC.
1370 * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
1373 * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
1374 macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
1376 * m68k-dis.c: Add format `u' and places `h', `m', `M'.
1380 * i386-dis.c (Ed): Define.
1381 (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
1383 (OP_rm): Rename to OP_Rd.
1386 (putop): Add const to template and p.
1387 (print_insn_x86): Delete.
1388 (print_insn_i386): Merge old function print_insn_x86. Add const
1390 (struct dis386): Add const to name.
1391 (dis386_att, dis386_intel): Add const.
1392 (dis386_twobyte_att, dis386_twobyte_intel): Add const.
1393 (names32, names16, names8, names_seg, index16): Add const.
1394 (grps, prefix_user_table, float_reg): Add const.
1395 (float_mem_att, float_mem_intel): Add const.
1396 (oappend): Add const to s.
1397 (OP_REG): Add const to s.
1398 (ptr_reg): Add const to s.
1399 (dofloat): Add const to dp.
1400 (OP_C): Don't skip modrm, it's now done in OP_Rd.
1403 (OP_Rd): Check for valid mod. Call Op_E to print.
1404 (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
1405 (OP_MS): Check for valid mod. Call Op_EM to print.
1406 (OP_3DNowSuffix): Set obufp and use oappend rather than
1407 strcat. Call BadOp() for errors.
1408 (OP_SIMD_Suffix): Likewise.
1409 (BadOp): New function.
1413 * i386-dis.c (dis386_intel): Remove macro chars, except for
1414 jEcxz. Change cWtR and cRtd to cW and cR.
1415 (dis386_twobyte_intel): Remove macro chars here too.
1416 (putop): Handle R and W macros for intel mode.
1418 * i386-dis.c (SIMD_Fixup): New function.
1419 (dis386_twobyte_att): Use it on movlps and movhps, and change
1420 Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
1421 (dis386_twobyte_intel): Same here.
1423 * i386-dis.c (Av): Remove.
1427 (OP_SIMD_Suffix): New function.
1428 (OP_DIR): Remove dead code.
1429 (eAX_reg..eDI_reg): Renumber.
1430 (onebyte_has_modrm): Table numbering comments.
1431 (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
1432 (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
1433 checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
1434 and handle SIMD cmp insns in OP_SIMD_Suffix.
1435 (info->bytes_per_line): Bump from 5 to 6.
1437 (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
1438 (OP_3DNowSuffix): Ensure mnemonic index unsigned.
1441 * i386-dis.c (XM, EX, None): Define.
1442 (OP_XMM, OP_EX, OP_None): New functions.
1443 (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
1444 (GRP14): Rename to GRPAMD.
1445 (GRP*): Add USE_GROUPS flag.
1447 (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
1448 (twobyte_has_modrm): Add SIMD entries.
1449 (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
1450 (grps): Add SIMD insns.
1451 (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
1452 oappend repz if uses_f3_prefix. Add code to handle new groups for
1456 * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
1457 operand from Av to Jv.
1461 * mcore-dis.c (print_insn_mcore): Use .short to display
1462 unidentified instructions, not .word.
1466 * aclocal.m4, configure: Updated for new version of libtool.
1470 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1471 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1475 * hppa-dis.c (print_insn_hppa, case '3'): New case for PA2.0
1480 * fr30-desc.c,fr30-desc.h,fr30-ibld.c: Rebuild.
1481 * m32r-desc.c,m32r-desc.h,m32r-opinst.c: Rebuild.
1485 * opintl.h (LC_MESSAGES): Never define.
1489 * i386-dis.c (intel_syntax, open_char, close_char): Make static.
1490 (separator_char, scale_char): Likewise.
1491 (print_insn_x86): Likewise.
1492 (print_insn_i386): Likewise. Add declaration.
1496 * fr30-dis.c: Rebuild.
1497 * m32r-dis.c: Rebuild.
1501 * m68k-opc.c: Change compare instructions to use "@s" rather than
1502 ";s" when used with an immediate operand.
1506 * cgen-opc.c (cgen_set_cpu): Delete.
1507 (cgen_lookup_insn): max_insn_size renamed to max_insn_bitsize.
1508 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c,fr30-opc.h:
1510 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h:
1512 * po/opcodes.pot: Rebuild.
1516 * d30v-opc.c (mvtsys): Remove FLAG_LKR.
1520 * cgen-opc.c (cgen_set_cpu): New arg `isa'. All callers updated.
1521 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): New fns.
1522 (cgen_get_insn_operands): Rewrite test for hardcoded/operand index.
1523 * fr30-asm.c,fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c: Rebuild.
1524 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c: Rebuild.
1525 * m32r-opinst.c: Rebuild.
1529 * cgen-opc.c (cgen_hw_lookup_by_name): Rewrite.
1530 (cgen_hw_lookup_by_num): Rewrite.
1531 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1532 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1533 * m32r-opinst.c: Rebuild.
1537 * alpha-opc.c: Add sqrt+flags patterns. Add EV6 PALcode insns.
1538 (insert_jhint): Fix insertion mask.
1539 * alpha-dis.c (print_insn_alpha): Disassemble EV6 PALcode insns.
1543 * Makefile.in: Rebuild.
1547 * i960c-asm.c,i960c-dis.c,i960c-opc.c,i960c-opc.h: Delete.
1548 * i960-dis.c (print_insn_i960): Rename from print_insn_i960_orig.
1549 * Makefile.am: Remove references to them.
1550 (HFILES): Add fr30-desc.h,m32r-desc.h.
1551 (CFILES): Add fr30-desc.c,fr30-ibld.c,m32r-desc.c,m32r-ibld.c,
1553 (ALL_MACHINES): Update.
1554 * configure.in: Redo handling of cgen_files.
1555 (bfd_i960_arch): Delete i960c-*.lo files.
1556 * configure: Regenerate.
1557 * cgen-asm.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1558 (hash_insn_array): Rewrite.
1559 * cgen-dis.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1560 (hash_insn_array): Rewrite.
1561 * cgen-opc.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1562 (cgen_lookup_insn,cgen_get_insn_operands): Define here.
1563 (cgen_lookup_get_insn_operands): Ditto.
1564 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1565 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1566 * po/POTFILES.in: Rebuild.
1567 * po/opcodes.pot: Rebuild.
1571 * Makefile.am: Rebuild dependencies.
1572 (HFILES): Add fr30-opc.h.
1573 (CFILES): Add fr30-asm.c, fr30-dis.c, fr30-opc.c.
1574 * Makefile.in: Rebuild.
1576 * configure.in: Change AC_PREREQ to 2.13. Remove AM_CYGWIN32.
1577 Change AM_EXEEXT to AC_EXEEXT and AM_PROG_INSTALL to
1579 * acconfig.h: Remove.
1580 * configure: Rebuild with current autoconf/automake.
1581 * aclocal.m4: Likewise.
1582 * config.in: Likewise.
1583 * Makefile.in: Likewise.
1587 * m68k-opc.c: Correct move (not movew) to status word on 5200.
1591 * disassemble.c (disassembler): Handle bfd_mach_i386_i386_intel_syntax.
1592 * i386-dis.c (x_mode): Define.
1595 (dis386_intel): New.
1596 (dis386_twobyte): Remove.
1597 (dis386_twobyte_att): New.
1598 (dis386_twobyte_intel): New.
1599 (print_insn_x86): Use new arrays.
1600 (float_mem): Remove.
1601 (float_mem_intel): New.
1602 (float_mem_att): New.
1603 (dofloat): Use new float_mem arrays.
1604 (print_insn_i386_att): New.
1605 (print_insn_i386_intel): New.
1606 (print_insn_i386): Handle bfd_mach_i386_i386_intel_syntax.
1607 (putop): Handle intel syntax.
1608 (OP_indirE): Handle intel syntax.
1609 (OP_E): Handle intel syntax.
1610 (OP_I): Handle intel syntax.
1611 (OP_sI): Handle intel syntax.
1612 (OP_OFF): Handle intel syntax.
1616 * fr30-opc.h,fr30-opc.c: Rebuild.
1617 * i960c-opc.h,i960c-opc.c: Rebuild.
1618 * m32r-opc.c: Rebuild.
1622 * hppa-dis.c: revert HP merge changes until HP gives us
1627 * arm-dis.c (print_insn_arm): Display ARM syntax for PC relative
1628 offsets as well as symbloic address.
1632 * hppa-dis.c: fix comments and some indentation.
1636 * fr30-opc.c,i960c-opc.c: Regenerate.
1640 * fr30-opc.c: Regenerate.
1644 * m32r-dis.c: Regenerate.
1648 * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
1649 * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
1650 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
1654 * configure.in: Require autoconf 2.12.1 or higher.
1658 * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
1662 * fr30-opc.c: Regenerated.
1666 * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
1670 * fr30-opc.c,fr30-opc.h: Regenerated.
1674 * fr30-opc.c,fr30-opc.h: Regenerated.
1678 * fr30-opc.c,fr30-opc.h: Regenerated.
1682 * m32r-opc.c: Regenerate.
1686 * dis-buf.c (generic_strcat_address): reformat to GNU coding
1687 conventions. change sprintf call to an sprintf_vma call.
1691 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1695 The following changes were made by
1699 merge in changes by HP; HP did not create ChangeLog entries.
1701 * dis-buf.c (generic_strcat_address): new function.
1703 * hppa-dis.c: Changes to improve hppa disassembly.
1704 Changed formatting in : reg_names, fp_reg_names,control_reg,
1705 New variables : sign_extension_names, deposit_names, conversion_names
1706 float_test_names, compare_cond_names_double, add_cond_names_double,
1707 logical_cond_names_double, unit_cond_names_double,
1708 branch_push_pop_names, saturation_names, shift_names, mix_names,
1709 New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
1710 Move some definitions to libhppa.h: GET_FIELD, GET_BIT
1711 (fput_const): renamed as fput_hex_const
1713 - use the macros fputs_filtered and
1714 fput_decimal_const whenever possible; calls to sign_extend require
1715 2 params -- add a missing second param of 0.
1716 - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
1717 architecture version number of current machine. HP folks are
1718 trying to handle situation where the target program was compiled
1719 for PA 1.x (32-bit), but is running on a PA 2.0 machine and
1721 - added new cases : 'g', 'B', 'm'
1722 - added cases specifically for PA 2.0
1723 - changed the following cases : '"', 'n', 'N', 'p', 'Z',
1724 - calls to fput_const become calls to fput_hex_const
1728 * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
1729 (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
1730 (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
1731 * Makefile.in: Rebuilt.
1732 * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
1734 * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
1735 * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
1739 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1743 * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
1745 * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
1750 * fr30-opc.c: Regenerate.
1754 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1758 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1762 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1766 * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
1767 CGEN_INSN_BASE_VALUE.
1768 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1769 * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
1773 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
1777 * fr30-asm.c,fr30-dis.c: Regenerated.
1781 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1785 * fr30-opc.c: Regenerated.
1789 * fr30-opc.c: Regenerated.
1790 * fr30-opc.h: Regenerated.
1791 * fr30-dis.c: Regenerated.
1792 * fr30-asm.c: Regenerated.
1796 * mips-opc.c (sync.p,sync.l): Swap insn values.
1800 * fr30-opc.c: Regenerate.
1804 * fr30-opc.c: Regenerated.
1805 * fr30-opc.h: Regenerated.
1809 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
1810 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
1814 * fr30-opc.c: Regenerated.
1818 * fr30-opc.c: Regenerated.
1819 * fr30-opc.h: Regenerated.
1820 * fr30-dis.c: Regenerated.
1821 * fr30-asm.c: Regenerated.
1825 * po/opcodes.pot: Regenerated.
1826 * fr30-opc.c: Regenerated.
1827 * fr30-opc.h: Regenerated.
1828 * fr30-dis.c: Regenerated.
1829 * fr30-asm.c: Regenerated.
1833 * disassemble.c (disassembler): Add support for FR30 target.
1837 * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
1838 * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
1842 * po/opcodes.pot: Regenerate.
1843 * po/POTFILES.in: Regenerate.
1844 * fr30-opc.c: Regenerate.
1845 * fr30-opc.h: Regenerate.
1849 * m32r-asm.c: Regenerate.
1853 * configure.in: Added case for bfd_fr30_arch.
1854 * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
1855 (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
1856 (CLEANFILES): Added stamp-fr30.
1858 * fr30-asm.c: New file.
1859 * fr30-dis.c: New file.
1860 * fr30-opc.c: New file.
1861 * fr30-opc.h: New file.
1862 * po/POTFILES.in: Regenerated
1863 * po/opcodes.pot: Regenerated
1867 * configure.in: detect cygwin* instead of cygwin32*
1868 * configure: regenerate
1872 * mips-opc.c (IS_M): Added.
1876 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1880 * m32r-opc.h,m32r-opc.c: Regenerate.
1884 * i386-dis.c (OP_3DNowSuffix): New static function.
1887 (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
1888 (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
1889 (insn_codep): New static variable.
1890 (print_insn_x86): Init insn_codep after prefixes.
1891 (grps): Add GRP14 entries for prefetch, prefetchw.
1895 * i386-dis.c (Suffix3DNow): New table.
1899 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
1903 * d10v-dis.c (print_operand): If num is nonzero, then
1904 add OPERAND_ACC1, not OPERAND_ACC0.
1908 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
1913 * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
1918 * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
1922 * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
1927 * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
1929 (print_insn_little_arm): Detect Thumb symbols in elf object
1934 * alpha-dis.c (print_insn_alpha): Use the machine type to
1935 decide which PALcode set to include.
1939 * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
1943 * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
1944 MSUB and MSUBS instructions.
1948 * ppc-opc.c (powerpc_operands): Omit parens around additions in
1949 operand name macros.
1954 * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
1955 +, -, and d for ColdFire.
1958 * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
1959 (extract_mbe): Likewise.
1963 * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
1965 * m10300-opc.c: First cut at UDF instructions.
1969 * m32r-opc.c: Regenerate (remove semantic descriptions).
1973 * arm-dis.c (print_insn_big_arm): Fix indentation.
1974 (print_insn_little_arm): Likewise.
1978 * arm-dis.c (print_insn_big_arm): Check for thumb symbol
1980 (print_insn_little_arm): Likewise.
1984 Move all global state data into opcode table struct, and treat
1985 opcode table as something that is "opened/closed".
1986 * cgen-asm.c (all fns): New first arg of opcode table descriptor.
1987 (cgen_asm_init): Delete.
1988 (cgen_set_parse_operand_fn): New function.
1989 * cgen-dis.c (all fns): New first arg of opcode table descriptor.
1990 (cgen_dis_init): Delete.
1991 * cgen-opc.c (all fns): New first arg of opcode table descriptor.
1992 (cgen_current_{opcode_table_mach,endian}): Delete.
1993 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1997 * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
2002 * m10300-opc.c: Add entries for "no_match_operands" field in
2007 * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
2011 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2015 * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
2017 (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
2019 (OP_J): Remove unnecessary subtraction when 16-bit displacement
2020 will be masked later.
2024 * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
2028 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
2032 * m10300-dis.c: Only recognize instructions from the currently
2034 * m10300-opc.c: Add field indicating the particular variant of
2035 the mn10300 each instruction is available on.
2039 * configure.in: For bfd_vax_arch, build vax-dis.lo.
2040 * Makefile.am: Rebuild dependencies.
2041 (CFILES): Add vax-dis.c.
2042 (ALL_MACHINES): Add vax-dis.lo.
2043 * aclocal.m4: Rebuild with current libtool.
2044 * configure, Makefile.in: Rebuild.
2048 * vax-dis.c: New file, from work by Pauline Middelink
2050 * disassemble.c (ARCH_vax): Define if ARCH_all.
2051 (disassembler): Add case for ARCH_vax.
2052 * makefile.vms: Support compilation on vms/vax.
2056 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
2057 related to sign extension and the size of ints.
2061 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
2062 instructions. Support (sp) addressing mode by expanding it into
2067 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
2071 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
2075 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
2080 * mips-dis.c (print_insn_little_mips): Previously, instruction
2081 printing references the symbol table to determine whether the
2082 instruction resides in a block regular instructions or mips16
2083 instructions. However, when the disassembler gets used in other
2084 environments where the symbol table is not present, we no longer
2085 rely in the symbol table, rather, use the low bit of the
2086 instructions address to guess. There should be no change for usage
2087 of the disassembler in host based programs, gdb, objdump.
2088 (print_insn_big_mips): ditto.
2089 (print_insn_mips): ditto
2093 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
2097 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
2101 * i386-dis.c (index16): Add '%' to register names. Use ','
2106 * i386-dis.c: Don't print opcode suffix when we can figure out the
2107 size (and gas can!) by register operands, or from the default
2109 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
2111 (dis386, dis386_twobyte, grps): Use new suffix macros.
2112 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
2113 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
2114 order of cmps operands to agree with Intel docs. Correct operand
2115 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
2116 agree with Intel docs.
2117 (print_insn_x86): Print orphan fwait before other prefixes.
2118 Return correct byte count for orphan fwait with prefixes. Don't
2119 print `bound' operands in reverse order.
2120 (ckprefix): Stop accumulating prefixes if we get fwait.
2121 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
2125 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
2126 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
2130 Fix problems when bfd_vma is wider than long.
2131 * i386-dis.c: Make op_address and start_pc unsigned.
2132 (set_op): Make parameter unsigned.
2133 (print_insn_x86): Cast to bfd_vma when passing a value to
2135 * ns32k-dis.c (CORE_ADDR): Don't define.
2136 (print_insn_ns32k): Change type of addr to bfd_vma. Use
2137 bfd_scan_vma to read back address.
2138 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
2140 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
2141 (NEXTULONG): New definition.
2142 (print_insn_m68k): Avoid overflow when computing third argument of
2144 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
2145 Use disp instead of val to store offset values.
2146 (print_indexed): Use base_disp instead of word to store base
2147 displacement, to avoid overflow.
2148 * m10300-dis.c (disassemble): Cast value to long when computing
2149 pc-relative address, to get correct sign extension.
2153 * m32r-opc.c: Regenerate.
2157 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
2162 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
2166 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
2168 (OP_DSreg): Rename from OP_DSSI.
2169 (OP_ESreg): Rename from OP_ESDI.
2170 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
2172 (append_seg): Rename from append_prefix.
2173 (ptr_reg): New function.
2174 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
2176 (PREFIX_ADDR): Rename from PREFIX_ADR.
2177 (float_reg): Add non-broken opcodes for people who don't want
2182 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
2187 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
2191 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
2192 0; produce error message for shifts of size 32 (or 64 for 64-bit
2193 shifts), because the hardware doesn't support them.
2197 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
2198 LONG_2, LONG_2b formats to use this new operand.
2202 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
2206 * sparc-dis.c (print_insn_sparc): big endian instruction / little
2207 endian data support.
2211 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
2212 and SHORT_B3b formats to use Rb instead of Ra.
2214 Add FLAG_MUL16 to MUL2XH opcode.
2216 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
2217 to existing 1.1.1 parallelisation prohibition procedure.
2221 * m32r-asm.c,m32r-dis.c: Regenerate.
2225 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
2226 with a shift count of 0.
2230 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
2231 (cgen_hw_lookup_by_num): New function.
2235 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
2239 * sparc-dis.c (print_insn_sparc): Always fetch instructions
2240 as big-endian on SPARClite.
2244 * d30v-opc.c (pre_defined_register): Remove alias for r0.
2248 * po/Make-in (install-info): New target.
2252 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
2253 * configure: Rebuild.
2257 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
2258 variety of ISA2 instructions to set bottom ten bits of trap code.
2262 * Makefile.am (config.status): Add explicit target so that
2263 config.status depends upon bfd/configure.in.
2264 * Makefile.in: Rebuild.
2268 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
2269 instructions to set bottom ten bits of break code.
2270 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
2271 for above optional argument.
2275 * makefile.vms: Run dec c with /nodebug.
2279 * Makefile.in: Rebuilt.
2280 * Makefile.am: Regenerated dependencies with mkdep.
2282 * opintl.h (_): Define as dgettext.
2286 * cgen-asm.c: Internationalised.
2287 * m32r-asm.c: Internationalised.
2288 * m32r-dis.c: Internationalised.
2289 * m32r-opc.c: Internationalised.
2291 * aclocal.m4: Regenerated.
2292 * configure: Regenerated.
2293 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
2294 * Makefile.in: Rebuild.
2295 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
2296 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
2300 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
2302 * aclocal.m4, configure: Rebuild with current tools.
2306 * opintl.h: New file - contains internationalisation macros used
2307 by source files in this directory.
2308 * po/: New subdirectory - contains internationalisation files.
2309 * po/Make-in: New file - Makefile constructor.
2310 * po/POTFILES.in: New file - list of files in opcodes directory
2311 that should be scan for internationalisation macros.
2312 * po/opcodes.pot: New file - list of internationisation strings
2313 found in files mentioned in po/POTFILES.in.
2314 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
2315 entry. Add intl directory to include paths.
2316 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
2317 HAVE_STRCPY, HAVE_LC_MESSAGES
2318 * configure.in: Add rule to build Makefile in po subdirectory.
2319 * Makefile.in: Rebuilt.
2320 * aclocal.m4: Rebuilt.
2321 * config.in: Rebuilt.
2322 * configure: Rebuilt.
2323 * alpha-opc.c: Internationalised.
2324 * arc-dis.c: Internationalised.
2325 * arc-opc.c: Internationalised.
2326 * arm-dis.c: Internationalised.
2327 * cgen-asm.c: Internationalised.
2328 * d30v-dis.c: Internationalised.
2329 * dis-buf.c: Internationalised.
2330 * h8300-dis.c: Internationalised.
2331 * h8500-dis.c: Internationalised.
2332 * i386-dis.c: Internationalised.
2333 * m10200-dis.c: Internationalised.
2334 * m10300-dis.c: Internationalised.
2335 * m68k-dis.c: Internationalised.
2336 * m88k-dis.c: Internationalised.
2337 * mips-dis.c: Internationalised.
2338 * ns32k-dis.c: Internationalised.
2339 * opintl.h: Internationalised.
2340 * ppc-opc.c: Internationalised.
2341 * sparc-dis.c: Internationalised.
2342 * v850-dis.c: Internationalised.
2343 * v850-opc.c: Internationalised.
2347 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
2348 (asm_hash_table_entries): New variable.
2349 (cgen_asm_init): Free asm_hash_table_entries.
2350 (hash_insn_array,hash_insn_list): New functions.
2351 (build_asm_hash_table): Use them. Hash macro insns as well.
2352 (cgen_asm_lookup_insn): Update.
2353 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
2354 (dis_hash_table_entries): New variable.
2355 (cgen_dis_init): Free dis_hash_table_entries.
2356 (hash_insn_array,hash_insn_list): New functions.
2357 (build_dis_hash_table): Use them. Hash macro insns as well.
2358 (cgen_dis_lookup_insn): Update.
2359 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
2360 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
2361 (cgen_macro_insn_count): New function.
2362 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2366 * i386-dis.c (OP_DSSI): Print segment override.
2370 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
2375 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
2376 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
2377 * configure.in: Define and substitute WIN32LDFLAGS and
2379 * aclocal.m4: Rebuild with new libtool.
2380 * configure, Makefile.in: Rebuild.
2384 * m32r-opc.c: Regenerate.
2388 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
2389 before trying to copy it.
2390 * Makefile.in: Rebuild.
2394 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
2398 * ns32k-dis.c (bit_extract_simple): New function to extract bits
2399 from an arbitrary valid buffer instead of fetching them on demand
2401 (invalid_float): use bit_extract_simple() instead of bit_extract().
2406 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
2411 * Branched binutils 2.9.
2415 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
2416 disassembling last 4 bytes of a section.
2420 Fix some gcc -Wall warnings:
2421 * arc-dis.c (print_insn): Add casts to avoid warnings.
2422 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
2423 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2424 * m10200-dis.c (disassemble): Likewise.
2425 * m10300-dis.c (disassemble): Likewise.
2426 * ns32k-dis.c (print_insn_ns32k): Likewise.
2427 * ppc-opc.c (insert_ral, insert_ram): Likewise.
2428 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
2429 * cgen-opc.c (cgen_keyword_search_next): Likewise.
2430 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2431 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
2432 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
2433 * tic80-dis.c (print_one_instruction): Likewise.
2434 * w65-dis.c (print_operand): Likewise.
2435 * z8k-dis.c (fetch_data): Likewise.
2436 * a29k-dis.c: Add return type for find_byte_func_type.
2437 * arc-opc.c: Include <stdio.h>. Remove declarations of
2438 insert_multshift and extract_multshift.
2439 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
2441 (extract_value): Fully parenthesize expression.
2442 * h8500-dis.c (print_insn_h8500): Initialize local variables.
2443 * h8500-opc.h (h8500_table): Fully bracket initializer.
2444 * w65-opc.h (optable): Likewise.
2445 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
2446 * i386-dis.c (OP_E): Initialize local variables.
2447 * m10200-dis.c (print_insn_mn10200): Likewise.
2448 * mips-dis.c (print_insn_mips16): Likewise.
2449 * sh-dis.c (print_insn_shx): Likewise.
2450 * v850-dis.c (print_insn_v850): Likewise.
2451 * ns32k-dis.c (print_insn_arg): Declare.
2452 (get_displacement, invalid_float): Declare.
2453 (list_search, sign_extend, flip_bytes): Declare return type.
2454 (get_displacement): Likewise.
2455 (print_insn_arg): Likewise. Make d int. Fix sprintf format
2457 (print_insn_ns32k): Make i unsigned.
2458 (invalid_float): Make static. Declare type of val.
2459 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
2460 on each for iteration.
2461 * tic30-dis.c (get_indirect_operand): Likewise.
2462 * z8k-dis.c (print_insn_z8001): Declare return type.
2463 (print_insn_z8002): Likewise.
2464 (unparse_instr): Fix sprintf format strings.
2468 * mips-opc.c: Add "sync.l" and "sync.p".
2472 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
2473 default m68k variant to recognize.
2475 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
2476 (ctrl, cobr, mem, ea): Likewise.
2477 (print_addr): Likewise. Remove cast.
2478 (ea): Cast argument of print_addr to bfd_vma.
2480 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
2482 (cgen_parse_unsigned_integer): Likewise.
2483 (cgen_parse_address): Likewise.
2487 * i960-dis.c (ctrl): Add full braces to structure initialization.
2488 (cobr, mem, reg): Likewise.
2489 (ea): Correct parenthesization in expression.
2491 * cgen-asm.c: Include <ctype.h>.
2492 (build_asm_hash_table): Remove unused local variable i.
2493 (cgen_parse_keyword): Add casts to avoid warnings.
2495 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
2496 symbol. Fix indentation.
2497 (print_insn_little_arm): Likewise.
2501 * configure.in: Use AM_DISABLE_SHARED.
2502 * aclocal.m4, configure: Rebuild with libtool 1.2.
2506 These patches are courtesy of Jonathan Walton and Tony Thompson
2509 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
2512 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
2513 both the offset and the label closest to the destination.
2517 * m32r-opc.h: Regenerate.
2521 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2525 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
2526 assume that info->symbols is non-empty.
2530 * alpha-opc.c (cvtqs) There is no such thing.
2531 (cvttq): Missing most of the /*d variants.
2535 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
2536 delayed branches or jumps.
2540 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
2542 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
2543 * tic30-dis.c (print_branch): Likewise.
2547 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
2548 saved_symbol code as it is no longer needed.
2552 * cgen-asm.c: Include symcat.h.
2553 * cgen-dis.c,cgen-opc.c: Ditto.
2554 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
2558 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
2562 * m32r-opc.[ch]: Regenerate.
2566 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
2567 arguments. Don't perform validation here.
2568 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
2572 * m32r-opc.c: Regenerate.
2576 * Makefile.am (AUTOMAKE_OPTIONS): Define.
2577 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
2581 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
2585 * configure.in: Get the version number from BFD.
2586 * configure: Rebuild.
2589 * Makefile.am (libopcodes_la_LDFLAGS): Define.
2590 * Makefile.in: Rebuild.
2594 * m32r-opc.c: Regenerate.
2595 * m32r-opc.h: Regenerate.
2599 * m32r-opc.c: Regenerate.
2603 Fix rac to accept only a0:
2604 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
2605 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
2606 Introduce OPERAND_GPR.
2607 * d10v-dis.c (print_operand): Likewise.
2611 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
2612 (cgen_hw_lookup): Make result const.
2613 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2617 * configure, aclocal.m4: Rebuild with new libtool.
2621 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
2622 instructions use a PC relative branch, not absolute.
2626 * configure.in: Set libtool_enable_shared rather than
2627 libtool_shared. Remove diversion hack.
2628 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
2632 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
2633 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2637 * tic30-dis.c: New file.
2638 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
2639 * configure.in: Handle bfd_tic30_arch.
2640 * Makefile.am: Rebuild dependencies.
2641 (CFILES): Add tic30-dis.c
2642 (ALL_MACHINES): Add tic30-dis.lo.
2643 * configure, Makefile.in: Rebuild.
2647 * m32r-opc.h (HAVE_CPU_M32R): Define.
2651 * v850-opc.c (insertion routines): If both alignment and size is
2652 wrong then report this.
2656 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
2657 Only recognize instructions for the current target_processor.
2661 * d10v-dis.c (PC_MASK): Correct value.
2662 (print_operand): If there's a reloc, don't calculate the
2663 address because they could be in different sections.
2667 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
2668 instruction after the 4650's "mul" instruction; nobody's using the
2669 4010 these days. If object files someday indicate which processor
2670 variant they're intended for, we can do a better job at this.
2674 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
2675 table provided entry size. Use CGEN_INSN_MNEMONIC.
2676 (cgen_parse_keyword): Rewrite.
2677 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
2678 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
2679 * cgen-opc.c: Clean up pass over `struct foo' usage.
2680 (cgen_keyword_lookup_value): Handle "" entry.
2681 (cgen_keyword_add): Likewise.
2685 * mips-opc.c: Add FP_D to s.d instruction flags.
2689 * m68k-opc.c (halt, pulse): Enable them on the 68060.
2693 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
2694 PC relative offset forms before the 15 bit forms. An assembler command
2695 line option now chooses the default.
2699 * d30v-opc.c (d30v_opcode_table): Set new flags bits
2700 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
2704 * configure: Only build libopcodes shared if --enable-shared's value
2705 was `yes', or was set to `*opcodes*'.
2706 * aclocal.m4: Likewise.
2707 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
2708 original source of this bit of code. It's not clear what the best fix
2713 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
2714 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
2715 offset forms before the 15 bit forms, to default to the long forms.
2719 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
2723 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
2724 symbol if none is present.
2725 (print_insn_big_arm): Prevent examination of stored symbol if
2730 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
2734 * disassemble.c: Remove disasm_symaddr() function.
2736 * arm-dis.c: Use info->symbol instead of info->flags to determine
2737 if disassmbly should be in Thumb or Arm mode.
2741 * arm-dis.c: Add support for disassembling Thumb opcodes.
2742 (print_insn_thumb): New function.
2744 * disassemble.c (disasm_symaddr): New function.
2746 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
2747 (thumb_opcodes): Table of Thumb opcodes.
2751 * m68k-opc.c (btst): Change Dd@s to Dd;b.
2753 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
2754 and 'v' as operand types.
2758 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
2760 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
2761 which has a two word opcode with a one word argument.
2765 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
2766 unsigned, not signed.
2767 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
2771 * d10v-dis.c (print_operand):
2772 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
2776 * d10v-opc.c (OPERAND_FLAG): Split into:
2777 (OPERAND_FFLAG, OPERAND_CFLAG) .
2783 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
2784 field for all INSN_MACRO's.
2785 * mips16-opc.c: same
2789 * mips-opc.c (sync,cache): These are 3900 insns.
2793 sh-opc.h (sh_table): Remove ftst/nan.
2797 * mips-opc.c (ffc, ffs): Fix mask.
2801 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
2806 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2807 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2811 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2812 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2816 * v850-dis.c (disassemble): Replace // with /* ... */
2820 * sparc-opc.c: Add wr & rd for v9a asr's.
2821 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
2822 (v9a_asr_reg_names): New variable.
2827 * sparc-opc.c (v9notv9a): New insn type.
2828 (IMPDEP): Move to the end to not conflict with edge8 et al.
2833 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
2837 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
2841 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
2842 of disassemble_info structure to determine if an overlay address
2843 has a matching symbol in low memory.
2845 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
2846 new symbol_at_address_func field in disassemble_info structure.
2850 * v850-opc.c (extract_d22): Use signed arithmatic.
2854 * mips-opc.c: Three op mult is not an ISA insn.
2858 * mips-opc.c: Fix formatting.
2862 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
2863 than assuming that char is signed. Explicitly sign extend 16 bit
2864 values, rather than assuming that short is 16 bits.
2865 (OP_sI, OP_J, OP_DIR): Likewise.
2869 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
2874 * v850-opc.c: Fix typo in comment.
2876 * v850-dis.c (disassemble): Add test of processor type when
2877 determining opcodes.
2881 * configure.in: Use a diversion to set enable_shared before the
2882 arguments are parsed.
2883 * configure: Rebuild.
2887 * m68k-opc.c (TBL1): Use ! rather than `.
2888 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
2892 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
2894 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
2896 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
2899 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
2900 * aclocal.m4: Rebuild with new libtool.
2901 * configure: Rebuild.
2905 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
2909 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
2913 * v850-opc.c (v850_opcodes): Further rearrangements.
2917 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
2921 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
2926 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
2930 * v850-opc.c: Initialise processors field of v850_opcode structure.
2934 Merge changes from Martin Hunt:
2936 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
2938 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
2939 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
2940 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
2942 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
2944 * d30v-dis.c (print_insn): First operand of d*i (delayed
2945 branch) instructions is relative.
2947 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
2948 (d30v_operand_table): Add IMM6S3 type.
2949 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
2951 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
2952 and cmp instructions.
2954 * d30v-opc.c: Correct entries for repeat*, and sat*.
2955 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
2956 types. Correct several formats.
2958 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
2960 * d30v-opc.c (pre_defined_registers): Change control registers.
2962 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
2963 SHORT_C2. Manual was incorrect.
2965 * d30v-dis.c (lookup_opcode): Return value now indicates
2966 if an opcode has a short and a long form. Used for deciding
2967 to append a ".s" or ".l".
2968 (print_insn): Append a ".s" to an instruction if it is
2969 the short form and ".l" if it is a long form. Do not append
2970 anything if the instruction has only one possible size.
2972 * d30v-opc.c: Change mulx2h to require an even register.
2973 New form: SHORT_A2; a SHORT_A form that needs an even
2974 register as the first operand.
2976 * d30v-dis.c (print_insn_d30v): Fix problem where the last
2977 instruction was not being disassembled if there were an odd
2978 number of instructions.
2980 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
2984 * v850-dis.c (disassemble): Improved display of register lists.
2988 * sparc-opc.c (sparc_opcodes): Fix assembler args to
2989 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
2990 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
2991 fandnot1s, fandnot2s.
2995 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
2999 * cgen-asm.c (cgen_parse_address): New argument resultp.
3000 All callers updated.
3001 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
3005 * mn10200-dis.c (disassemble): PC relative instructions are
3006 relative to the next instruction, not the current instruction.
3010 * v850-dis.c (disassemble): Only signed extend values that are not
3011 returned by extract functions.
3012 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
3016 * v850-opc.c: Update comments. Remove use of
3017 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
3021 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
3025 * configure: Rebuilt with latest devo autoconf for NT support.
3029 * v850-dis.c (disassemble): Use curly brace syntax for register
3032 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
3033 where r0 is being used as a destination register.
3037 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
3041 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
3045 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
3046 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
3051 * configure (cgen_files): Add support for v850e target.
3052 * configure.in (cgen_files): Add support for v850e target.
3056 * configure (cgen_files): Add support for v850ea target.
3057 * configure.in (cgen_files): Add support for v850ea target.
3061 * configure.in (bfd_arc_arch): Add.
3062 * configure: Rebuild.
3063 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
3064 * Makefile.in: Rebuild.
3065 * arc-dis.c, arc-opc.c: New files.
3066 * disassemble.c (ARCH_all): Define ARCH_arc.
3067 (disassembler): Add ARC support.
3071 * v850-dis.c (disassemble): Add support for v850EA instructions.
3073 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
3074 (v850_opcodes): Add v850EA instructions.
3076 * v850-dis.c (disassemble): Add support for v850E instructions.
3078 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
3079 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
3080 insert_spe, extract_spe): New Functions.
3081 (v850_opcodes): Add v850E instructions.
3083 * v850-opc.c: Reorganised and re-layed out to improve readability
3088 * configure: Rebuild with autoconf 2.12.1.
3092 * aclocal.m4, configure: Rebuild with new automake patches.
3096 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
3097 * acinclude.m4: Just include acinclude.m4 from BFD.
3098 * aclocal.m4, configure: Rebuild.
3102 * Makefile.am: New file, based on old Makefile.in.
3103 * acconfig.h: New file.
3104 * acinclude.m4: New file.
3105 * stamp-h.in: New file.
3106 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
3107 Removed shared library handling; now handled by libtool. Replace
3108 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
3109 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
3110 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
3111 handling in AC_OUTPUT.
3112 * dep-in.sed: Change .o to .lo.
3113 * Makefile.in: Now built with automake.
3114 * aclocal.m4: Now built with aclocal.
3115 * config.in, configure: Rebuild.
3119 * mips-opc.c: Fix typo/thinko in "eret" instruction.
3123 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
3125 * sparc-dis.c (sorted_opcodes): New static local.
3126 (struct opcode_hash): `opcode' is pointer to const element.
3127 (build_hash): First arg is now table of sorted pointers.
3128 (print_insn_sparc): Sort opcodes by sorting table of pointers.
3129 (compare_opcodes): Update.
3133 * cgen-opc.c: #include <ctype.h>.
3134 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
3135 Handle case insensitive hashing.
3136 (hash_keyword_value): Change type of `value' to unsigned int.
3140 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
3141 precision FP, mark it as such. Likewise for double precision
3142 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
3147 * ppc-opc.c (extract_nsi): make unsigned expression signed before
3149 (UNUSED): remove one level of parens, so MSVC doesn't choke on
3150 nesting depth when all the macros are expanded.
3154 * sparc-opc.c: The fcmp v9a instructions take an integer register
3155 as a destination, not a floating point register. From Christian
3160 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
3161 syntax. From Roman Hodek
3164 * i386-dis.c (twobyte_has_modrm): Fix pand.
3168 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
3172 * arm-dis.c: Add prototypes for arm_decode_shift and
3177 * mips-opc.c: Add r3900 insns.
3181 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
3182 print delay slot instructions on the same line. When using a PC
3183 relative load, add a comment with the value being loaded if it can
3188 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
3189 to pushS/popS for segment regs and byte constant so that
3190 pushw/popw printed when in 16 bit data mode.
3192 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
3193 print cbtw, cwtd in 16 bit data mode.
3194 * i386-dis.c (putop): extra case W to support above.
3196 * i386-dis.c (print_insn_x86): print addr32 prefix when given
3197 address size prefix in 16 bit address mode.
3201 * sh-dis.c: Reindent. Rename local variable fprintf to
3206 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
3210 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
3212 * mips16-opc.c (mip16_opcodes): same.
3216 * m68k-opc.c (moveb): Change $d to %d.
3220 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
3221 (twobyte_has_modrm): Likewise.
3223 (OP_MMX, OP_EM, OP_MS): New static functions.
3225 * i386-dis.c: Revert patch of April 4. The output now matches
3230 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
3235 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
3239 * Makefile.in (install): Depend upon installdirs.
3240 (installdirs): New target.
3245 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
3246 * configure: Rebuild.
3250 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
3251 Delete string{,s}.h support.
3255 * cgen-asm.c (cgen_parse_operand_fn): New global.
3256 (cgen_parse_{{,un}signed_integer,address}): Update call to
3257 cgen_parse_operand_fn.
3258 (cgen_init_parse_operand): New function.
3259 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
3260 from cgen_asm_init_parse.
3261 (m32r_cgen_assemble_insn): New operand `errmsg'.
3262 Delete call to as_bad, return error message to caller.
3263 (m32r_cgen_asm_hash_keywords): #if 0 out.
3267 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
3269 [case 'J']: Fix typo in register name.
3273 * configure.in: Substitute SHLIB_LIBS.
3274 * configure: Rebuild.
3275 * Makefile.in (SHLIB_LIBS): New variable.
3276 ($(SHLIB)): Use $(SHLIB_LIBS).
3280 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
3282 * cgen-opc.c (hash_keyword_name): Improve algorithm.
3284 * disassemble.c (disassembler): Handle m32r.
3288 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
3289 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
3290 * Makefile.in (CFILES): Add them.
3291 (ALL_MACHINES): Add them.
3292 (dependencies): Regenerate.
3293 * configure.in (cgen_files): New variable.
3294 (bfd_m32r_arch): Add entry.
3295 * configure: Regenerate.
3299 * configure.in: Correct file names for bfd_mn10[23]00_arch.
3300 * configure: Rebuild.
3302 * Makefile.in: Rebuild dependencies.
3304 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
3306 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
3311 * Branched binutils 2.8.
3315 * m10200-dis.c: Rename from mn10200-dis.c.
3316 * m10200-opc.c: Rename from mn10200-opc.c.
3317 * m10300-dis.c: Rename from mn10300-dis.c
3318 * m10300-opc.c: Rename from mn10300-opc.c.
3319 * Makefile.in: Update accordingly.
3321 * mips16-opc.c: Add mul and dmul macros.
3325 * makefile.vms: Update CFLAGS, add clean target.
3329 * mips-opc.c: Add "wait". From Ralf Baechle
3332 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
3333 * configure, config.in: Rebuild.
3334 * sysdep.h: Include <stdlib.h> if it exists.
3335 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
3337 * Makefile.in: Rebuild dependencies.
3341 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
3344 * mips-opc.c: Add cast when setting mips_opcodes.
3348 * v850-dis.c (disassemble): Fix sign extension problem.
3349 * v850-opc.c (extract_d*): Fix sign extension problems to make
3350 disassembly calculate branch offsets correctly.
3354 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
3356 * mips-opc.c: Add dctr and dctw.
3360 * d30v-dis.c (print_insn): Change the way signed constants
3365 * Makefile.in (BFD_H): New variable.
3366 (HFILES): New variable.
3367 (CFILES): Add all C files.
3368 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
3369 Delete old dependencies, and build new ones.
3370 * dep-in.sed: New file.
3374 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
3378 * mn10200-opc.c: Change "trap" to "syscall".
3379 * mn10300-opc.c: Add new "syscall" instruction.
3383 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
3384 mulul insns on the coldfire.
3388 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
3389 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
3390 (print_insn_little_arm): Likewise.
3395 * i386-dis.c (fetch_data): Add prototype.
3396 * m68k-dis.c (fetch_data): Add prototype.
3397 (dummy_print_address): Add prototype. Make static.
3398 * ppc-opc.c (valid_bo): Add prototype.
3399 * sparc-dis.c (build_hash_table): Add prototype.
3400 (is_delayed_branch, compute_arch_mask): Add prototypes.
3401 (print_insn_sparc): Make several local variables const.
3402 (compare_opcodes): Change arguments to const PTR. Add prototype.
3403 * sparc-opc.c (arg): Change name field to be const.
3404 (lookup_name, lookup_value): Add prototypes. Change table and
3405 name parameters to be const.
3406 (sparc_encode_asi): Change name parameter to be const.
3407 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
3408 (sparc_encode_sparclet_cpreg): Likewise.
3409 (sparc_decode_asi): Change return type to be const.
3410 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
3411 (sparc_decode_sparclet_cpreg): Likewise.
3415 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
3416 Solaris doesn't like the combined options, and the -f is
3418 (stamp-tshlink, install): Likewise.
3422 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
3427 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
3431 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
3436 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
3440 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
3444 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
3448 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
3449 floatformat_to_double to make portable.
3450 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
3455 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
3456 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
3460 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
3461 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
3465 * tic80-opc.c (LSI_SCALED): Renamed from this ...
3466 (OFF_SL_BR_SCALED): ... to this, and added the flag
3467 TIC80_OPERAND_BASEREL to the flags word.
3468 (tic80_opcodes): Replace all occurances of LSI_SCALED with
3473 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
3474 Change mips_opcodes from const array to a pointer,
3475 and change bfd_mips_num_opcodes from const int to int,
3476 so that we can increase the size of the mips opcodes table
3481 * tic80-opc.c (tic80_predefined_symbols): Revert change to
3482 store BITNUM values in the table in one's complement form
3483 to match behavior when assembler is given a raw numeric
3484 value for a BITNUM operand.
3485 * tic80-dis.c (print_operand_bitnum): Ditto.
3489 * d30v-opc.c: Removed references to FLAG_X.
3493 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
3497 * Makefile.in: Added d30v object files.
3498 * configure: (bfd_d30v_arch) Rebuilt.
3499 * configure.in: (bfd_d30v_arch) Added new case.
3500 * d30v-dis.c: New file.
3501 * d30v-opc.c: New file.
3502 * disassemble.c (disassembler) Add entry for d30v.
3506 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
3507 representations for the floating point BITNUM values.
3511 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
3512 in the table in one's complement form, as they appear in the
3514 (tic80_symbol_to_value): Use macros to access predefined
3516 (tic80_value_to_symbol): Ditto.
3517 (tic80_next_predefined_symbol): New function.
3518 * tic80-dis.c (print_operand_bitnum): Remove code that did
3519 one's complement for BITNUM values.
3523 * makefile.vms: Remove 8 bit characters. Update to latest
3528 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
3532 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
3533 (IMM24_PCREL): Likewise.
3537 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
3538 address for an extended PC relative instruction that is not a
3543 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
3548 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
3549 (tic80_opcodes): Sort entries so that long immediate forms
3550 come after short immediate forms, making it easier for
3551 assembler to select the right one for a given operand.
3555 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
3557 (print_insn_mips16): Likewise.
3561 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
3562 a symbol class that restricts translation to just that
3563 class (general register, condition code, etc).
3567 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
3568 and REG_DEST_E for register operands that have to be
3569 an even numbered register. Add REG_FPA for operands that
3570 are one of the floating point accumulator registers.
3571 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
3572 (tic80_opcodes): Change entries that need even numbered
3573 register operands to use the new operand table entries.
3574 Add "or" entries that are identical to "or.tt" entries.
3578 * mips16-opc.c: Add new cases of exit instruction for
3580 * mips-dis.c (print_mips16_insn_arg): Display floating point
3581 registers in operands of exit instruction. Print `$' before
3582 register names in operands of entry and exit instructions.
3586 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
3587 pairs for all predefined symbols recognized by the assembler.
3588 Also used by the disassembling routines.
3589 (tic80_symbol_to_value): New function.
3590 (tic80_value_to_symbol): New function.
3591 * tic80-dis.c (print_operand_control_register,
3592 print_operand_condition_code, print_operand_bitnum):
3593 Remove private tables and use tic80_value_to_symbol function.
3597 * d10v-dis.c (print_operand): Change address printing
3598 to correctly handle PC wrapping. Fixes PR11490.
3602 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
3607 * mips-dis.c (print_insn_mips16): Set insn_info information.
3608 (print_mips16_insn_arg): Likewise.
3610 * mips-dis.c (print_insn_mips16): Better handling of an extend
3611 opcode followed by an instruction which can not be extended.
3615 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
3616 coldfire moveb instruction to not allow an address register as
3617 destination. Although the documentation does not indicate that
3618 this is invalid, experiments uncovered unexpected behavior.
3619 Added a comment explaining the situation. Thanks to Andreas
3620 Schwab for pointing this out to me.
3624 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
3625 entries are presorted so that entries with the same mnemonic are
3626 adjacent to each other in the table. Sort the entries for each
3627 instruction so that this is true.
3631 * m68k-dis.c: Include <libiberty.h>.
3632 (print_insn_m68k): Sort the opcode table on the most significant
3633 nibble of the opcode.
3637 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
3638 "vsub", "vst", "xnor", and "xor" instructions.
3639 (V_a1): Renamed from V_a, msb of accumulator reg number.
3640 (V_a0): Add macro, lsb of accumulator reg number.
3644 * tic80-dis.c (print_insn_tic80): Broke excessively long
3645 function up into several smaller ones and arranged for
3646 the instruction printing function to be callable recursively
3647 to print vector instructions that have both a load and a
3648 math instruction packed into a single opcode.
3649 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
3650 to explain why it comes after the other vector opcodes.
3654 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
3655 move insns to handle immediate operands.
3659 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
3660 fix operand mask in the "moveml" entries for the coldfire.
3664 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
3665 New macros for building vector instruction opcodes.
3666 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
3667 FMT_LI, which were unused. The field is now a flags field.
3668 Remove some opcodes that are possible, but illegal, such
3669 as long immediate instructions with doubles for immediate
3670 values. Add "vadd" and "vld" instructions.
3674 * tic80-opc.c (tic80_operands): Reorder some table entries to make
3675 the order more logical. Move the shift alias instructions ("rotl",
3676 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
3677 interspersed with the regular sr.x and sl.x instructions. Add
3678 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
3679 "sub", "subu", "swcr", and "trap".
3683 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
3684 (OFF_SL_PC): Renamed from OFF_SL.
3685 (OFF_SS_BR): New operand type for base relative operand.
3686 (OFF_SL_BR): New operand type for base relative operand.
3687 (REG_BASE): New operand type for base register operand.
3688 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
3689 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
3690 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
3692 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
3693 10 char field, padded with spaces on rhs, rather than a string
3694 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
3695 than old TIC80_OPERAND_RELATIVE. Add support for new
3696 TIC80_OPERAND_BASEREL flag bit.
3700 * tic80-dis.c (print_insn_tic80): Print floating point operands
3702 * tic80-opc.c (SPFI): Add single precision floating point
3703 immediate operand type.
3704 (ROTATE): Add rotate operand type for shifts.
3705 (ENDMASK): Add for shifts.
3706 (n): Macro for the 'n' bit.
3707 (i): Macro for the 'i' bit.
3708 (PD): Macro for the 'PD' field.
3709 (P2): Macro for the 'P2' field.
3710 (P1): Macro for the 'P1' field.
3711 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
3716 * mn10200-dis.c (disassemble): Mask off unwanted bits after
3717 adding in current address for pc-relative operands.
3721 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
3722 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
3723 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
3724 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
3725 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
3726 REG_BASE_M_SI, REG_BASE_M_LI respectively.
3727 (REG_SCALED, LSI_SCALED): New operand types.
3728 (E): New macro for 'E' bit at bit 27.
3729 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
3730 opcodes, including the various size flavors (b,h,w,d) for
3731 the direct load and store instructions.
3735 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
3737 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
3738 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
3739 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
3740 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
3741 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
3742 masks with "MASK_* & ~M_*" to get the M bit reset.
3743 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
3747 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
3748 correctly. Add support for printing TIC80_OPERAND_BITNUM and
3749 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
3751 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
3752 CC, SICR, and LICR table entries.
3753 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
3754 "bcnd", and "brcr" opcodes.
3758 * ppc-opc.c (powerpc_operands): Make comment match the
3759 actual fields (no shift field).
3760 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
3761 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
3762 partial implementation, work in progress.
3763 * tic80-opc.c (tic80_operands): Begin construction operands table.
3764 (tic80_opcodes): Continue populating opcodes table and start
3765 filling in the operand indices.
3766 (tic80_num_opcodes): Add this.
3770 * m68k-opc.c: Add #B case for moveq.
3774 * mn10300-dis.c (disassemble): Make sure all variables are initialized
3775 before they are used.
3779 * v850-opc.c (v850_opcodes): Put curly-braces around operands
3780 for "breakpoint" instruction.
3784 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
3785 (dep): Use ALL_CFLAGS rather than CFLAGS.
3789 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
3794 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
3795 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
3799 * mips16-opc.c: Add "abs".
3803 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
3804 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
3805 (disassembler): Add bfd_arch_tic80 support to set disassemble
3806 to print_insn_tic80.
3807 * tic80-dis.c (print_insn_tic80): Add stub.
3811 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
3812 * configure: Regenerate with autoconf.
3813 * tic80-dis.c: Add file.
3814 * tic80-opc.c: Add file.
3818 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
3822 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
3823 (mn10200_opcodes): Use it for some logicals and btst insns.
3824 Add "break" and "trap" instructions.
3826 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
3828 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
3832 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
3833 relative load or add now depends upon whether the instruction is
3838 * mn10200-dis.c: Finish writing disassembler.
3839 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
3840 Fix mask for "jmp (an)".
3842 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
3843 handle endianness issues for mn10300.
3845 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
3849 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
3850 instruction. Fix opcode field for "movb (imm24),dn".
3852 * mn10200-opc.c (mn10200_operands): Fix insertion position
3857 * mn10200-opc.c: Create mn10200 opcode table.
3858 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
3859 but moving along nicely.
3863 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
3867 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
3868 specifiers for fmovem* instructions.
3872 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
3876 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
3881 * mn10300-opc.c: Add some comments explaining the various
3884 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
3888 * m68k-dis.c (print_insn_arg): Handle new < and > operand
3891 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3892 operand specifiers in fmovm* instructions.
3896 * ppc-opc.c (insert_li): Give an error if the offset has the two
3897 least significant bits set.
3901 * mips-dis.c (print_insn_mips16): Separate the instruction from
3902 the arguments with a tab, not a space.
3906 * mn10300-dis.c (disasemble): Finish conversion to '$' as
3909 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
3914 * configure: Rebuild with autoconf 2.12.
3916 Add support for mips16 (16 bit MIPS implementation):
3917 * mips16-opc.c: New file.
3918 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
3919 (mips16_reg_names): New static array.
3920 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
3921 after seeing a 16 bit symbol.
3922 (print_insn_little_mips): Likewise.
3923 (print_insn_mips16): New static function.
3924 (print_mips16_insn_arg): New static function.
3925 * mips-opc.c: Add jalx instruction.
3926 * Makefile.in (mips16-opc.o): New target.
3927 * configure.in: Use mips16-opc.o for bfd_mips_arch.
3928 * configure: Rebuild.
3932 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3933 operand specifiers in *save, *restore and movem* instructions.
3935 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
3938 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
3939 register operands for immediate arithmetic, not, neg, negx, and
3940 set according to condition instructions.
3942 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
3943 specifier of the effective-address operand in immediate forms of
3944 arithmetic instructions. The specifier for the immediate operand
3945 notes how and where the constant will be stored.
3949 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
3952 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
3955 * mn10300-dis.c (disassemble): Prefix registers with '%'.
3959 * mn10300-dis.c (disassemble): Handle register lists.
3961 * mn10300-opc.c: Fix handling of register list operand for
3962 "call", "ret", and "rets" instructions.
3964 * mn10300-dis.c (disassemble): Print PC-relative and memory
3965 addresses symbolically if possible.
3966 * mn10300-opc.c: Distinguish between absolute memory addresses,
3967 pc-relative offsets & random immediates.
3969 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
3971 (disassemble): Handle SPLIT and EXTENDED operands.
3975 * mn10300-dis.c: Rough cut at printing some operands.
3977 * mn10300-dis.c: Start working on disassembler support.
3978 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
3980 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
3982 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
3986 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
3990 * mn10300-opc.c (mn10300_opcodes): Demand parens around
3991 register argument is calls and jmp instructions.
3995 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
3996 getx operand. Fix opcode for mulqu imm,dn.
4000 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
4001 in MN10300_OPERAND_SPLIT operands for how many bits
4002 appear in the basic insn word. Add IMM32_HIGH24,
4003 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
4004 (mn10300_opcodes): Use new operands as needed.
4006 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
4007 for bset, bclr, btst instructions.
4008 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
4010 * mn10300-opc.c (mn10300_operands): Remove many redundant
4011 operands. Update opcode table as appropriate.
4012 (IMM32): Add MN10300_OPERAND_SPLIT flag.
4013 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
4017 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
4018 operands (for indexed load/stores). Fix bitpos for DI
4019 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
4020 few instructions that insert immediates/displacements in the
4021 middle of the instruction. Add IMM8E for 8 bit immediate in
4022 the extended part of an instruction.
4023 (mn10300_operands): Use new opcodes as appropriate.
4027 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
4028 sequential so the assembler never parallelizes it with
4033 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
4034 a data/address register that appears in register field 0
4035 and register field 1.
4036 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
4040 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
4041 standard disassembly.
4043 * alpha-opc.c (alpha_operands): Rearrange flags slot.
4044 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
4045 Recategorize PALcode instructions.
4049 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
4053 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
4054 there are no operand types.
4058 * v850-opc.c (D9_RELAX): Renamed from D9, all references
4060 (v850_operands): Make sure D22 immediately follows D9_RELAX.
4064 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
4068 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
4069 and sst.w instructions.
4071 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
4076 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
4081 * ppc-opc.c (PPCPWR2): Define.
4082 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
4087 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
4088 field for movhu instruction.
4090 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
4091 cast value to "long" not "signed long" to keep hpux10
4096 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
4099 * mn10300-opc.c (FMT*): Remove definitions.
4101 * mn10300-opc.c (mn10300_opcodes): Fix destination register
4102 for shift-by-register opcodes.
4104 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
4105 into [AD][MN][01] for encoding the position of the register
4110 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
4111 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
4115 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
4116 Fix various typos. Add "PAREN" operand.
4117 (MEM, MEM2): Define.
4118 (mn10300_opcodes): Surround all memory addresses with "PAREN"
4119 operands. Fix several typos.
4121 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
4126 * mn10300-opc.c (FMT_XX): Renumber starting at one.
4127 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
4129 (mn10300_opcodes): Break opcode format out into its own field.
4130 Update many operand fields to deal with signed vs unsigned
4131 issues. Fix one or two typos in the "mov" instruction
4132 opcode, mask and/or operand fields.
4136 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
4137 m68851 wasn't reset.
4141 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
4142 all opcodes. Very rough cut at operands for all opcodes.
4144 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
4149 * mn10200-opc.c, mn10300-opc.c: New files.
4150 * mn10200-dis.c, mn10300-dis.c: New files.
4151 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
4152 * disassemble.c: Break mn10x00 support into 10200 and 10300
4154 * configure.in: Likewise.
4155 * configure: Rebuilt.
4159 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
4163 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
4165 * disassemble (ARCH_mn10x00): Define.
4166 (disassembler): Handle bfd_arch_mn10x00.
4167 * configure.in: Recognize bfd_mn10x00_arch.
4168 * configure: Rebuilt.
4172 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
4173 accordingly. Don't declare functions using op_rtn.
4177 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
4178 params to be more standard.
4179 * (disassemble): Print absolute addresses and symbolic names for
4180 branch and jump targets.
4181 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
4183 * (v850_opcodes): Add breakpoint insn.
4187 * m68k-opc.c: Move the fmovemx data register cases before the
4188 other cases, so that they get recognized before the data register
4189 does gets treated as a degenerate register list.
4193 * mips-opc.c: Add a case for "div" and "divu" with two registers
4194 and a destination of $0.
4198 * mips-dis.c (print_insn_arg): Add prototype.
4199 (_print_insn_mips): Ditto.
4203 * mips-dis.c (print_insn_arg): Print condition code registers as
4208 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
4212 * v850-dis.c (disassemble): Make static. Provide prototype.
4216 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
4221 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
4222 ']' characters into the output stream.
4223 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
4224 Add "memop" field to all opcodes (for the disassembler).
4225 Reorder opcodes so that "nop" comes before "mov" and "jr"
4226 comes before "jarl".
4228 * v850-dis.c (print_insn_v850): Fix typo in last change.
4230 * v850-dis.c (print_insn_v850): Properly handle disassembling
4231 a two byte insn at the end of a memory region when the memory
4232 region's size is only two byte aligned.
4234 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
4236 * v850-dis.c (v850_reg_names): Define.
4237 (v850_sreg_names, v850_cc_names): Likewise.
4238 (disassemble): Very rough cut at printing operands (unformatted).
4240 * v850-opc.c (BOP_MASK): Fix.
4241 (v850_opcodes): Fix mask for jarl and jr.
4243 * v850-dis.c: New file. Skeleton for disassembler support.
4244 * Makefile.in Remove v850 references, they're not needed here.
4245 * configure.in: Add v850-dis.o when building v850 toolchains.
4246 * configure: Rebuilt.
4247 * disassemble.c (disassembler): Call v850 disassembler.
4249 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
4250 (insert_d8_6, extract_d8_6): New functions.
4251 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
4252 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
4254 (IF4A, IF4B): Use "D7" instead of "D7S".
4255 (IF4C, IF4D): Use "D8_7" instead of "D8".
4256 (IF4E, IF4F): New. Use "D8_6".
4257 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
4258 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
4260 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
4261 (v850_operands): Change D16 to D16_15, use special insert/extract
4262 routines. New new D16 that uses the generic insert/extract code.
4263 (IF7A, IF7B): Use D16_15.
4264 (IF7C, IF7D): New. Use D16.
4265 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
4267 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
4268 message. Issue an error if the branch offset is odd.
4270 * v850-opc.c: Add notes about needing special insert/extract
4271 for all the load/store insns, except "ld.b" and "st.b".
4273 * v850-opc.c (insert_d22, extract_d22): New functions.
4274 (v850_operands): Use insert_d22 and extract_d22 for
4276 (insert_d9): Fix range check.
4280 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
4281 and set bits field to D9 and D22 operands.
4285 * v850-opc.c (v850_operands): Define SR2 operand.
4286 (v850_opcodes): "ldsr" uses R1,SR2.
4288 * v850-opc.c (v850_opcodes): Fix opcode specs for
4289 sld.w, sst.b, sst.h, sst.w, and nop.
4293 * v850-opc.c (v850_opcodes): Add null opcode to mark the
4294 end of the opcode table.
4298 * d10v-opc.c (pre_defined_registers): Added register pairs,
4299 "r0-r1", "r2-r3", etc.
4303 * v850-opc.c (v850_operands): Make I16 be a signed operand.
4304 Create I16U for an unsigned 16bit mmediate operand.
4305 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
4307 * v850-opc.c (v850_operands): Define EP operand.
4308 (IF4A, IF4B, IF4C, IF4D): Use EP.
4310 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
4311 with immediate operand, "movhi". Tweak "ldsr".
4313 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
4314 correct. Get sld.[bhw] and sst.[bhw] closer.
4316 * v850-opc.c (v850_operands): "not" is a two byte insn
4318 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
4320 * v850-opc.c (v850_operands): D16 inserts at offset 16!
4322 * v850-opc.c (two): Get order of words correct.
4324 * v850-opc.c (v850_operands): I16 inserts at offset 16!
4326 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
4327 register source and destination operands.
4328 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
4330 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
4331 same thinko in "trap" opcode.
4333 * v850-opc.c (v850_opcodes): Add initializer for size field
4336 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
4337 Add D8 for 8-bit unsigned field in short load/store insns.
4338 (IF4A, IF4D): These both need two registers.
4339 (IF4C, IF4D): Define. Use 8-bit unsigned field.
4340 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
4341 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
4342 for "ldsr" and "stsr".
4343 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
4346 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
4347 short store word (sst.w).
4351 * v850-opc.c (v850_operands): Added insert and extract fields,
4352 pointers to functions that handle unusual operand encodings.
4356 * v850-opc.c (v850_opcodes): Enable "trap".
4358 * v850-opc.c (v850_opcodes): Fix order of displacement
4359 and register for "set1", "clr1", "not1", and "tst1".
4363 * v850-opc.c (v850_operands): Add "B3" support.
4364 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
4367 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
4369 * v850-opc.c: Close unterminated comment.
4373 * v850-opc.c (v850_operands): Add flags field.
4374 (v850_opcodes): add move opcodes.
4378 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
4379 * configure: (bfd_v850v_arch) Add new case.
4380 * configure.in: (bfd_v850_arch) Add new case.
4381 * v850-opc.c: New file.
4385 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
4389 * d10v-opc.c: Add additional information to the opcode
4390 table to help determinine which instructions can be done
4395 * mpw-make.sed: Update editing of include pathnames to be
4400 * arm-opc.h: Added "bx" instruction definition.
4404 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
4408 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
4412 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
4416 * makefile.vms: Update for alpha-opc changes.
4420 * i386-dis.c (print_insn_i386): Actually return the correct value.
4421 (ONE, OP_ONE): #ifdef out; not used.
4425 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
4426 Changed subi operand type to treat 0 as 16.
4430 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
4435 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
4436 memory transfer instructions. Add new format string entries %h and %s.
4437 * arm-dis.c: (print_insn_arm): Provide decoding of the new
4442 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
4443 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
4447 * alpha-dis.c (print_insn_alpha_osf): Remove.
4448 (print_insn_alpha_vms): Remove.
4449 (print_insn_alpha): Make globally visible. Chose the register
4450 names based on info->flavour.
4451 * disassemble.c: Always return print_insn_alpha for the alpha.
4455 * d10v-dis.c (dis_long): Handle unknown opcodes.
4459 * d10v-opc.c: Changes to support signed and unsigned numbers.
4460 All instructions with the same name that have long and short forms
4461 now end in ".l" or ".s". Divs added.
4462 * d10v-dis.c: Changes to support signed and unsigned numbers.
4466 * d10v-dis.c: Change all functions to use info->print_address_func.
4470 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
4471 move ccr/sr insns more strict so that the disassembler only
4472 selects them when the addressing mode is data register.
4475 * d10v-opc.c (pre_defined_registers): Declare.
4476 * d10v-dis.c (print_operand): Now uses pre_defined_registers
4477 to pick a better name for the registers.
4481 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
4482 operands for fexpand and fpmerge. From Christian Kuehnke
4487 * alpha-dis.c (print_insn_alpha): No longer the user-visible
4488 print routine. Take new regnames and cpumask arguments.
4489 Kill the environment variable nonsense.
4490 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
4491 (print_insn_alpha_vms): New function. Do VMS style regnames.
4492 * disassemble.c (disassembler): Test bfd flavour to pick
4493 between OSF and VMS routines. Default to OSF.
4497 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
4498 * configure: Rebuild.
4499 * Makefile.in (install): Use @INSTALL_SHLIB@.
4503 * configure: (bfd_d10v_arch) Add new case.
4504 * configure.in: (bfd_d10v_arch) Add new case.
4505 * d10v-dis.c: New file.
4506 * d10v-opc.c: New file.
4507 * disassemble.c (disassembler) Add entry for d10v.
4511 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
4512 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
4516 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
4517 distinguish between variants of the instruction set.
4518 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
4519 distinguish between variants of the instruction set.
4523 * i386-dis.c (print_insn_i8086): New routine to disassemble using
4524 the 8086 instruction set.
4525 * i386-dis.c: General cleanups. Make most things static. Add
4526 prototypes. Get rid of static variables aflags and dflags. Pass
4527 them as args (to almost everything).
4531 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
4533 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
4535 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
4536 if the next arg is marked with SRC_IN_DST. Gross.
4538 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
4539 we're looking for and find EXR.
4541 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
4542 if we're looking for KBIT and we don't find it.
4544 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
4547 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
4548 3bit immediate operands.
4552 * Released binutils 2.7.
4554 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
4559 * alpha-opc.c: Correct second case of "mov" to use OPRL.
4563 * sparc-dis.c (print_insn_sparclite): New routine to print
4564 sparclite instructions.
4568 * m68k-opc.c (m68k_opcodes): Add coldfire support.
4572 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
4573 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
4574 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
4578 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
4579 Use autoconf-set values.
4580 (docdir, oldincludedir): Removed.
4581 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
4585 * alpha-opc.c: New file.
4586 * alpha-opc.h: Remove.
4587 * alpha-dis.c: Complete rewrite to use new opcode table.
4588 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
4589 * configure: Rebuild with autoconf 2.10.
4590 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
4591 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
4593 (alpha-opc.o): New target.
4597 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
4598 Set imm_added_to_rs1 even if the source and destination register
4601 * sparc-opc.c: Add some two operand forms of the wr instruction.
4605 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
4608 * disassemble.c (disassembler): Handle H8/S.
4609 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
4613 * sparc-opc.c: Add beq/teq as aliases for be/te.
4615 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
4620 * makefile.vms: New file.
4622 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
4626 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
4631 * i386-dis.c (OP_OFF): Call append_prefix.
4635 * ppc-opc.c (instruction encoding macros): Add explicit casts to
4636 unsigned long to silence a warning from the Solaris PowerPC
4641 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
4645 * sparc-dis.c (X_IMM,X_SIMM): New macros.
4647 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
4648 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
4649 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
4650 cpush, cpusha, cpull sparclet insns.
4654 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
4658 * sparc-opc.c: Set F_FBR on floating point branch instructions.
4659 Set F_FLOAT on other floating point instructions.
4663 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
4665 (powerpc_opcodes): Add 860/821 specific SPRs.
4669 * configure.in: Permit --enable-shared to specify a list of
4670 directories. Set and substitute BFD_PICLIST.
4671 * configure: Rebuild.
4672 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
4673 uses. Set to @BFD_PICLIST@.
4677 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
4678 not "abs", which may be needed for the absolute in something
4679 like btst #0,@10:8. Print L_3 immediates separately from other
4680 immediates. Change ABSMOV reference to ABS8MEM.
4684 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
4685 (current_arch_mask): New static global.
4686 (compute_arch_mask): New static function.
4687 (print_insn_sparc): Delete sparc_v9_p. New static local
4688 current_mach. Resort opcode table if current_mach changes.
4689 Generalize "insn not supported" test.
4690 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
4691 Delete test for v9/!v9.
4692 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
4694 (brfc): Split into CBR and FBR for coprocessor/fp branches.
4695 (brfcx): Renamed to FBRX.
4696 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
4697 coprocessor mnemonics are not supported on the sparclet).
4698 (condf): Renamed to CONDF.
4699 (SLCBCC2): Delete F_ALIAS flag.
4703 * sparc-opc.c (sparc_opcodes): rd must be 0 for
4704 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
4708 * Makefile.in (config.status): Depend upon BFD VERSION file, so
4709 that the shared library version number is set correctly.
4713 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
4715 * configure: Rebuild.
4719 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
4724 * configure: Rebuild with autoconf 2.8.
4728 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
4729 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
4733 * configure.in: Don't set SHLIB or SHLINK to an empty string,
4734 since they appear as targets in Makefile.in.
4735 * configure: Rebuild.
4739 * mpw-make.sed: Edit out shared library support bits.
4743 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
4744 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
4745 (sparc_opcodes): Add sparclet insns.
4746 (sparclet_cpreg_table): New static local.
4747 (sparc_{encode,decode}_sparclet_cpreg): New functions.
4748 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
4752 * i386-dis.c (index16): New static variable.
4753 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
4755 (OP_indirE): Return result of OP_E.
4756 (OP_E): Check for 16 bit addressing mode, and disassemble
4757 correctly. Optimised 32 bit case a little. Don't print
4758 "(base,index,scale)" when sib specifies only an offset.
4762 * configure.in: Set and substitute SHLIB_DEP.
4763 * configure: Rebuild.
4764 * Makefile.in (SHLIB_DEP): New variable.
4765 (LIBIBERTY_LISTS, BFD_LIST): New variables.
4766 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
4767 COMMON_SHLIB, add them to piclist with appropriate modifications.
4768 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
4769 here: just use piclist.
4773 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
4774 (print_insn_sparc): Rewrite v9/not-v9 tests.
4775 (compare_opcodes): Likewise.
4776 * sparc-opc.c (MASK_<ARCH>): Define.
4777 (v6,v7,v8,sparclite,v9,v9a): Redefine.
4778 (sparclet,v6notv9): Define.
4779 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
4780 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
4784 * configure.in: Call AC_PROG_CC before configure.host.
4785 * configure: Rebuild.
4787 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
4791 * i386-dis.c (onebyte_has_modrm): New static array.
4792 (twobyte_has_modrm): New static array.
4793 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
4797 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
4802 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
4807 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
4808 m68010up, not just m68020up | cpu32.
4810 * Makefile.in (SONAME): New variable.
4811 ($(SHLINK)): Make a link to the transformed name, as well.
4812 (stamp-tshlink): New target.
4813 (install): Skip stamp-tshlink during install.
4817 * configure.in: Call AC_ARG_PROGRAM.
4818 * configure: Rebuild.
4819 * Makefile.in (program_transform_name): New variable.
4820 (install): Transform library name before installing it.
4824 * i960-dis.c (mem): Add HX dcinva instruction.
4826 Support for building as a shared library, based on patches from
4828 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
4829 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
4830 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
4831 * configure: Rebuild.
4832 * Makefile.in (ALLLIBS): New variable.
4833 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
4834 (COMMON_SHLIB, SHLINK): New variables.
4835 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
4836 (STAGESTUFF): Remove variable.
4837 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
4838 (stamp-piclist, piclist): New targets.
4839 ($(SHLIB), $(SHLINK)): New targets.
4840 ($(OFILES)): Depend upon stamp-picdir.
4841 (disassemble.o): Build twice if PICFLAG is set.
4842 (MOSTLYCLEAN): Add pic/*.o.
4843 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
4844 (distclean): Remove pic and stamp-picdir.
4845 (install): Install shared libraries.
4846 (stamp-picdir): New target.
4850 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
4851 Print unknown instruction as "unknown", rather than in hex.
4855 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
4859 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
4863 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
4864 when necessary. From Ulrich Drepper
4869 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
4870 sparc_num_opcodes. Update architecture enum values.
4871 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
4872 (sparc_opcode_lookup_arch): New function.
4873 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
4874 (sparc_opcodes): Add v9a shutdown insn.
4878 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
4879 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
4881 (print_insn_sparc64): Deleted.
4882 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
4885 * sparc-opc.c (architecture_pname): Add v9a.
4889 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
4890 incorrectly defined as 0x16 when it should be 0x15.
4891 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
4892 (alpha_insn_set): added cvtst and cvttq float ops. Also added
4893 excb (exception barrier) which is defined in the Alpha
4894 Architecture Handbook version 2.
4895 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
4896 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
4897 disassembled as or, for example.
4901 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
4902 (_print_insn_mips): Change i from int to unsigned int.
4906 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
4907 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
4911 * i386-dis.c: Added Pentium Pro instructions.
4915 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
4920 * sh-opc.h (sh_nibble_type): Added REG_B.
4921 (sh_arg_type): Added A_REG_B.
4922 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
4924 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
4928 * disassemble.c (disassembler): Use new bfd_big_endian macro.
4932 * Makefile.in (distclean): Remove stamp-h. From Ronald
4938 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
4943 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
4944 (sh_table): Added many SH3 opcodes.
4945 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
4949 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
4950 (subco,subco.): Mark this PPC, not PPCCOM.
4954 * configure: Rebuild with autoconf 2.7.
4958 * configure: Rebuild with autoconf 2.6.
4962 * configure.in: Sort list of architectures. Accept but do nothing
4963 for alliant, convex, pyramid, romp, and tahoe.
4967 * a29k-dis.c (print_special): Change num to unsigned int.
4971 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
4976 * configure.in: Call AC_CHECK_PROG to find and cache AR.
4977 * configure: Rebuilt.
4981 * configure.in: Add case for bfd_i860_arch.
4982 * configure: Rebuild.
4986 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
4987 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
4988 (NEXTDOUBLE): Likewise.
4989 (print_insn_m68k): Don't match fmoveml if there is more than one
4990 register in the list.
4991 (print_insn_arg): Handle a place of '8' for a type of 'L'.
4995 * m68k-opc.c: Use #W rather than #w.
4996 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
5000 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
5001 and likewise for all the dbxx opcodes.
5005 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
5009 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
5010 the VR4100 specific instructions to the mips_opcodes structure.
5014 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
5015 ugly Metrowerks bug in CW6, is fixed in CW7.
5019 * ppc-opc.c (whole file): Add flags for common/any support.
5023 * Makefile.in (BISON): Remove macro.
5024 (FLAGS_TO_PASS): Remove BISON.
5030 * m68k-dis.c (print_insn_m68k): Recognize all two-word
5031 instructions that take no args by looking at the match mask.
5032 (print_insn_arg): Always print "%" before register names.
5033 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
5034 [case '_']: Don't print "@#" before address.
5035 [case 'J']: Use "%s" as format string, not register name.
5036 [case 'B']: Treat place == 'C' like 'l' and 'L'.
5040 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
5047 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
5048 (alpha_insn_set): added definitions for VAX floating point
5049 instructions (Unix compilers don't generate these, but handcoded
5050 assembly might still use them).
5052 * alpha-dis.c (print_insn_alpha): added support for disassembling
5053 the miscellaneous instructions in the Alpha instruction set.
5057 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
5058 no longer create sysdep.h, sed ppc-opc.c to work around a
5059 serious Metrowerks C bug.
5060 * mpw-make.in: Remove.
5061 * mpw-make.sed: New file, used by mpw-configure to edit
5062 Makefile.in into an MPW makefile.
5066 * Makefile.in (maintainer-clean): New synonym for realclean.
5070 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
5071 which use '0', '1', and '2' instead. Specify the proper size for
5072 a pmove immediate operand. Correct the pmovefd patterns to be
5073 moves to a register, not from a register.
5074 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
5078 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
5079 %psr, %wim, %tbr as F_NOTV9.
5083 * Makefile.in (Makefile): Just rebuild Makefile when running
5085 (config.h, stamp-h): New targets.
5086 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
5087 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
5088 rebuilding config.h.
5089 * configure: Rebuild.
5091 * mips-opc.c: Change unaligned loads and stores with "t,A"
5092 operands to use "t,A(b)".
5096 * sh-dis.c (print_insn_shx): Add F_FR0 support.
5100 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
5101 until 3 instead of until 2.
5105 * Makefile.in (ALL_CFLAGS): Define.
5106 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
5107 (MOSTLYCLEAN): Add config.log.
5108 (distclean): Don't remove config.log.
5109 * configure.in: Substitute HDEFINES.
5110 * configure: Rebuild.
5114 * sh-opc.h (sh_arg_type): Add F_FR0.
5115 (sh_table, case fmac): Add F_FR0 as first argument.
5119 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
5123 * sparc-dis.c: Remove all references to NO_V9.
5127 * aclocal.m4: Just include ../bfd/aclocal.m4.
5128 * configure: Rebuild.
5132 * sparc-dis.c (X_DISP19): Define.
5133 (print_insn, case 'G'): Use it.
5134 (print_insn, case 'L'): Sign extend displacement.
5138 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
5139 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
5140 host_makefile_frag or frags.
5141 * aclocal.m4: New file.
5142 * configure: Rebuild.
5143 * Makefile.in (INSTALL): Set to @INSTALL@.
5144 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
5145 (INSTALL_DATA): Set to @INSTALL_DATA@.
5147 (AR_FLAGS): Set to rc rather than qc.
5148 (CC): Define as @CC@.
5149 (CFLAGS): Set to @CFLAGS@.
5150 (@host_makefile_frag@): Remove.
5151 (config.status): Remove dependency upon @frags@.
5153 * configure.in: ../bfd/config.bfd now just sets shell variables.
5154 Use them rather than looking through target Makefile fragments.
5155 * configure: Rebuild.
5159 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
5163 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
5164 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
5167 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
5168 (lookup_{name,value}): New functions.
5169 (prefetch_table): New static local.
5170 (sparc_{encode,decode}_prefetch): New functions.
5171 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
5175 * sh-opc.h: Add blank lines to improve readabililty of sh3e
5180 * sh-dis.c: Correct comment on first line of file.
5184 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
5186 * sparc-opc.c (asi, membar): New static locals.
5187 (sparc_{encode,decode}_{asi,membar}): New functions.
5188 (sparc_opcodes, membar insn): Fix.
5189 * sparc-dis.c (print_insn): Call sparc_decode_asi.
5190 Support decoding of membar masks.
5195 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
5199 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
5200 and likewise for the other branches. Add bhs as an alias for bcc,
5201 and likewise for the size variants. Add dbhs as an alias for
5206 * sh-opc.h (FP sts instructions): Update to match reality.
5210 * m68k-dis.c: (fpcr_names): Add % before all register names.
5211 (reg_names): Likewise.
5212 (print_insn_arg): Don't explicitly print % before register names.
5213 Add % before register names in static array names. In case 'r',
5214 print data registers as `@(Dn)', not `Dn@'. When printing a
5215 memory address, don't print @# before it.
5216 (print_indexed): Change base_disp and outer_disp from int to
5217 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
5218 syntax. Sign extend 8 byte displacement correctly.
5219 (print_base): Print using MIT syntax. Print zpc when appropriate.
5220 Change parameter disp from int to bfd_vma.
5222 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
5227 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
5228 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
5229 * sh-opc.h (sh_arg_type): Add new operand types.
5230 (sh_table): Add new opcodes from SH3E Floating Point ISA.
5234 * Makefile.in (distclean): Remove generated file config.h.
5238 * Makefile.in (distclean): Remove generated file config.h.
5242 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
5244 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
5246 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
5247 rather than numopcodes. Use m68k_opcodes rather than removed
5248 opcode function. Don't check F_ALIAS.
5249 (print_insn_arg): Change first parameter to be const char *.
5250 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
5251 (m68k-opc.o): New target.
5252 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
5253 * configure: Rebuild.
5257 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
5258 (opcode_bits, opcode_hash_table): New variables.
5259 (opcodes_initialized): Renamed from opcodes_sorted.
5260 (build_hash_table): New function.
5261 (is_delayed_branch): Use hash table.
5262 (print_insn): Renamed from print_insn_sparc, made static.
5263 Build and use hash table. If !sparc64, ignore sparc64 insns,
5264 and vice-versa if sparc64.
5265 (print_insn_sparc, print_insn_sparc64): New functions.
5266 (compare_opcodes): Move sparc64 opcodes to end.
5267 Print commutative insns with constant second.
5268 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
5272 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
5273 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
5274 avoids printing a delay slot in a delay slot.
5275 * sh-opc.h (sh_table): Fully bracket last entry.
5279 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
5283 * configure.in: Get host_makefile_frag from ${srcdir}.
5285 * configure.in: Autoconfiscated. Check for string[s].h. Create
5286 config.h from config.in. Don't set up sysdep.h link.
5287 * sysdep.h: New file.
5288 * configure, config.in: New files, generated from configure.in.
5289 * Makefile.in: Updated to be processed autoconf-style.
5290 (distclean): Keep sysdep.h. Remove config.log and config.cache.
5291 (Makefile): Depend on config.status.
5292 (config.status): New rule.
5293 * configure.bat: Update Makefile substitutions.
5297 * mips-opc.c (L1): Define.
5298 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
5299 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
5304 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
5305 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
5306 have multiple add units but only a single logical unit.
5308 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
5309 shifted by 18, without any insertion or extraction function.
5310 (insert_cr, extract_cr): Remove.
5314 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
5319 * mpw-config.in: Add sh and i386 configs, remove sparc config.
5320 * sh-opc.h: Add copyright.
5324 * Makefile.in (crunch-m68k): Delete extra target accidentally
5325 checked in a while ago.
5329 * sh-opc.h (sh_table): Add SH3 support.
5333 * sh-opc.h: Added bsrf and braf.
5337 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
5338 bogus [ls]fm{ea,fd} patterns.
5340 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
5341 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
5342 initialize it from memory. Make function static.
5343 (print_insn_{big,little}_arm): New functions.
5344 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
5345 the correct endianness.
5349 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
5354 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
5355 17th, so that it builds again using GCC as the compiler.
5359 * mips-dis.c (print_insn_little_mips): Cast return value from
5360 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
5361 expects an unsigned long, and that might be fewer words of
5362 argument storage (e.g., if bfd_vma is long long on a 32-bit
5364 (print_insn_big_mips): Likewise with bfd_getb32 value.
5365 (_print_insn_mips): Now static.
5369 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
5370 gcc memory hog problem with initializer is fixed.
5374 Merge in support for Mac MPW as a host.
5375 (Old change descriptions retained for informational value.)
5377 * mpw-config.in (archname): Compute from the config.
5378 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
5380 * mpw-config.in (target_arch): Compute from canonical target.
5381 (m68k, mips, powerpc, sparc): Add architectures.
5382 * mpw-make.in (disassemble.c.o): Add.
5383 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
5385 * mpw-config.in (BFD_MACHINES): Set to a default value.
5386 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
5388 * mpw-make.in (CSEARCH): Add extra-include to search path.
5390 * mpw-config.in (varargs.h): Don't create.
5391 (sysdep.h): Create using forward-include.
5392 * mpw-make.in (CSEARCH): Add include/mpw to search path.
5394 * mpw-config.in: New file, MPW version of configure.in.
5395 * mpw-make.in: New file, MPW version of Makefile.in.
5399 * alpha-dis.c (print_insn_alpha): Put empty statement after
5404 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
5405 (low_sign_extend): Likewise.
5406 (get_field): Delete unused function.
5407 (set_field, deposit_14, deposit_21): Likewise.
5411 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
5418 * alpha-opc.h (OSF_ASMCODE): define
5419 print pal-code names as defined in App C of the
5420 Alpha Architecture Reference Manual
5422 * alpha-dis.c: cleaned up output
5423 print stylized code forms as defined in App A.4.3 of the
5424 Alpha Architecture Reference Manual
5428 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
5430 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
5435 * m68k-dis.c (opcode): New function. Returns address of opcode
5436 table entry given index, even if the opcode table was split to
5437 work around gcc bugs.
5438 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
5440 (BREAK_UP_BIG_DECL): Make secondary array static and const.
5441 (reg_names): Now const.
5442 (print_insn_arg): Arrays cacheFieldName and names now const.
5443 (print_indexed): Array scales now const.
5447 * ppc-opc.c: Sort recently added instructions by minor opcode
5448 number within major opcode number.
5452 * hppa-dis.c: Include libhppa.h.
5456 * mips-opc.c: Change dli to use M_DLI, and add dla.
5460 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
5464 * mips-opc.c: Add r4650 mul instruction.
5468 * mips-opc.c: Add uld and usd macros for unaligned double load and
5473 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
5474 mfdcr, mtdcr, icbt, iccci.
5478 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
5479 signed char fields to shorts, more portable.
5483 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
5484 char fields as signed chars, since they may have negative values.
5488 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
5494 * ppc-opc.c (extract_bdm): Correct parenthezisation.
5495 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
5500 * ppc-opc.c: Changes based on patch from David Edelsohn
5502 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
5505 (insert_tbr): New static function.
5506 (extract_tbr): New static function.
5507 (XFXFXM_MASK, XFXM): Define.
5508 (XSPRBAT_MASK, XSPRG_MASK): Define.
5509 (powerpc_opcodes): Add instructions to access special registers by
5510 name. Add mtcr and mftbu.
5514 * mips-opc.c (P3): Define.
5515 (mips_opcodes): Add mad and madu.
5517 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
5519 * configure.in: Add W65 support.
5520 * disassemble.c: Likewise.
5521 * w65-opc.h, w65-dis.c: New files.
5525 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
5530 * mips-opc.c: Add dli as a synonym for li.
5534 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
5535 print something for reserved opcode values, even if it won't
5538 * mips-dis.c (_print_insn_mips): When initializing, shift right
5539 and mask, to avoid sign extension problems on the Alpha.
5541 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
5546 * sh-opc.h (mov.l gbr): Get direction right.
5547 * sh-dis.c (print_insn_shx): New function.
5548 (print_insn_shl, print_insn_sh): Call print_insn_shx to
5549 print opcodes with right byte order.
5553 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
5554 to avoid conflicts with getopt.
5558 * hppa-dis.c (print_insn_hppa): Read the instruction using
5559 bfd_getb32, so that it works on a little endian or 64 bit host.
5560 Remove unused local variable op.
5564 * mips-opc.c: Use or instead of addu for pseudo-op move, since
5565 addu does not work correctly if -mips3.
5569 * a29k-dis.c (print_special): Add special register names defined
5570 on 29030, 29040 and 29050.
5571 (print_insn): Handle new operand type 'I'.
5575 * Makefile.in (INSTALL): Use top level install.sh script.
5579 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
5580 that it works on a little endian host.
5584 * configure.in: Use ${config_shell} when running config.bfd.
5588 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
5592 * a29k-dis.c (print_insn): Print the opcode.
5596 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
5600 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
5604 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
5605 which store a value into memory.
5609 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
5610 * arm-dis.c, arm-opc.h: New files.
5614 * Makefile.in (ns32k-dis.o): Add dependency.
5615 * ns32k-dis.c (print_insn_arg): Declare initialized local as
5616 string, not as array of chars.
5620 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
5622 * sparc-opc.c: Added sparclite extended FP operations, and
5623 versions of v9 impdep* instructions permitting specification of
5628 * i960-dis.c (reg_names): Now const.
5629 (struct sparse_tabent): New type, copied from array type in mem
5631 (ctrl): Local static array ctrl_tab now const.
5632 (cobr): Local static array cobr_tab now const.
5633 (mem): Local variables reg1, reg2, reg3 now point to const. Local
5634 static variable mem_tab no longer explicitly initialized. Changed
5635 mem_init to const array of struct sparse_tabent.
5636 (reg): Local static variable reg_tab no longer explicitly
5637 initialized. Changed reg_init to const array of struct
5639 (ea): Local static array scale_tab now const.
5641 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
5646 * configure.bat: the disassember needs to be enabled for
5647 "objdump -d" to work in djgpp.
5651 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
5652 (invalid_float): Enabled general version, doesn't require running
5653 on ns32k host. Changed to take char* argument, and test for
5654 explicitly specified sizes, instead of using sizeof() on host CPU
5656 (INVALID_FLOAT): Cast first argument.
5657 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
5658 list_P032, list_M032): Now const.
5659 (optlist, list_search): Made appropriate arguments now point to
5661 (print_insn_arg): Changed static array of one-character-string
5662 pointers into a static const array of characters; fixed sprintf
5663 statement accordingly.
5667 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
5668 from distribution. A ns32k-dis.c from a previous distribution has
5669 been brought up to date and supports the new interface.
5671 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
5673 * configure.in: add bfd_ns32k_arch target support.
5675 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
5676 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
5680 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
5685 * h8300-dis.c, mips-dis.c: Don't use true and false.
5689 * configure.in: Change --with-targets to --enable-targets.
5693 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
5694 opcodes to the first instruction with that opcode, to speed
5700 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
5704 * configure.bat: update to latest makefile.in
5708 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
5709 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
5710 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
5711 slot insn is in a delay slot.
5712 * z8k-opc.h: (resflg): Fix patterns.
5713 * h8500-opc.h Fix CR insn patterns.
5717 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
5718 "cmpl" before POWER versions, so that gas -many uses them.
5722 * disassemble.c: New file.
5723 * Makefile.in (OFILES): Add disassemble.o.
5724 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
5725 * configure.in: Define ARCHDEFS in Makefile. Code taken from
5726 binutils/configure.in.
5728 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
5729 opcode being examined.
5733 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
5734 (insert_ral, insert_ram, insert_ras): New functions.
5735 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
5736 RAS for store with update.
5740 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
5745 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
5750 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
5754 * ppc-opc.c (powerpc_operands): The signedp field has been
5755 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
5756 instead. Add new operand SISIGNOPT.
5757 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
5759 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
5764 * i386-dis.c (struct private): Renamed to dis_private. `private'
5765 is a reserved word for dynix cc.
5769 * configure.in: Change error message to refer to bfd/config.bfd
5770 rather than bfd/configure.in.
5774 * ppc-opc.c: Define POWER2 as short alias flag.
5775 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
5780 * i960-dis.c (print_insn_i960): Don't read a second word for
5781 opcodes 0, 1, 2 and 3.
5785 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
5789 * m68881-ext.c: Removed; no longer used.
5790 * Makefile.in: Changed accordingly.
5792 * m68k-dis.c (ext_format_68881): Don't declare.
5793 (print_insn_m68k): If an instruction uses place 'i', it uses at
5794 least four fixed bytes.
5795 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
5796 extended float, convert to double using floatformat_to_double, not
5797 ieee_extended_to_double, and fetch the data before converting it.
5801 * mips-opc.c: It's sqrt.s, not sqrt.w. From
5806 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
5807 PowerPC uses bdnz[l][a].
5811 * dis-buf.c, i386-dis.c: Include sysdep.h.
5815 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
5817 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
5818 by Motorola PowerPC 601 with PPC_OPCODE_601.
5819 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
5820 Disassemble Motorola PowerPC 601 instructions as well as normal
5821 PowerPC instructions.
5825 * i960-dis.c (reg, mem): Just use a static array instead of
5830 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
5831 condition name index if this is for a negated condition.
5833 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
5834 Floating point format for 'H' operand is backwards from normal
5835 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
5836 operands (fmpyadd and fmpysub), handle bizarre register
5837 translation correctly for single precision format.
5839 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
5840 or 'I' operands if the next format specifier is 'M' (fcmp
5841 condition completer).
5845 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
5846 single number giving a bitmask for the MB and ME fields of an M
5847 form instruction. Change NB to accept 32, and turn it into 0;
5848 also turn 0 into 32 when disassembling. Seperated SH from NB.
5849 (insert_mbe, extract_mbe): New functions.
5850 (insert_nb, extract_nb): New functions.
5851 (SC_MASK): Mask out SA and LK bits.
5852 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
5853 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
5854 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
5855 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
5856 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
5857 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
5858 (powerpc_macros): Define table of macro definitions.
5859 (powerpc_num_macros): Define.
5861 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
5862 if PPC_OPERAND_NEXT is set.
5866 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
5867 char. Retrieve contents using bfd_getl32 instead of shifting.
5871 * ppc-opc.c: New file. Opcode table for PowerPC, including
5872 opcodes for POWER (RS/6000).
5873 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
5874 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
5875 (CFILES): Add ppc-dis.c.
5876 (ppc-dis.o, ppc-opc.o): New targets.
5877 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
5881 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
5882 No space before 'u', 'f', or 'N'.
5886 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
5887 farther than we should.
5889 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
5893 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
5897 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
5898 needs it, to prevent reading past the end of a section.
5902 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
5903 Removed t,A case for la; always use t,A(b) case.
5908 * mips-dis.c (print_insn_arg): Handle 'k'.
5909 * mips-opc.c: Make cache use k, not t.
5913 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
5914 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
5915 FLOAT_FORMAT_CODE to put out floating point register names.
5919 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
5923 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
5927 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
5928 larger than 32. Moved dsxx32 variants first for disassembler.
5932 * z8kgen.c, z8k-opc.h: Add full lda information.
5936 * hppa-dis.c (print_insn_hppa): Do not emit a space after
5937 movb instructions. Any necessary space will be emitted by
5938 the code to handle nullification completers.
5942 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
5946 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
5947 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
5951 * mips-opc.c: Correct lwu opcode value (book had it wrong).
5955 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
5956 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
5960 * m88k-dis.c (m88kdis): comment change. Remove space after
5962 (printop): handle new arg types DEC and XREG for m88110.
5966 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
5967 type for absolute branch addresses. Delete special
5968 "ble" and "be" code in 'W' operand code.
5972 * mips-opc.c: Set hazard information correctly for branch
5973 likely instructions.
5977 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
5978 info->fprintf_func for printing and info->print_address_func for
5983 * mips-opc.c: Set INSN_TRAP for tXX instructions.
5988 Corrected second case of "b" for disassembler.
5992 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
5993 to BFD swapping routines to correspond to BFD name changes.
5997 * mips-opc.c: Change div machine instruction to be z,s,t rather
5998 than s,t. Change div macro to be d,v,t rather than d,s,t.
5999 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
6000 rem and remu which generates only the corresponding div
6001 instruction. This is for compatibility with the MIPS assembler,
6002 which only generates the simple machine instruction when an
6003 explicit destination of $0 is used.
6004 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
6009 WR_31 hazard for bal, bgezal, bltzal.
6013 * hppa-dis.c (print_insn_hppa): Use print function
6014 from within the disassemble_info, not fprintf_filtered.
6018 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
6023 * mips-opc.c ("absu"): Removed.
6028 * mips-opc.c: Added r6000 and r4000 instructions and macros.
6029 Changed hazard information to distinguish between memory load
6030 delays and coprocessor load delays.
6034 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
6038 * configure.in: Don't pass cpu to config.bfd.
6042 * m88k-dis.c (m88kdis): Make class unsigned.
6046 * alpha-dis.c (print_insn_alpha): One branch format case was
6047 missing the instruction name.
6051 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
6052 Add the arch-specific auxiliary files.
6053 (OFILES): Remove the arch-specific auxiliary files
6054 and use BFD_MACHINES instead of DIS_LIBS.
6055 * configure.in: Set BFD_MACHINES based on --with-targets option.
6059 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
6064 * sparc-opc.c: Change CONST to const to deal with gcc
6065 -Dconst=__const -traditional.
6070 coprocessor instructions out of #if 0, and made them use new
6075 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
6079 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
6080 instruction, for use by the disassembler.
6082 * sparc-dis.c (SEX): Add sign extension macro. Replace many
6083 hand-coded sign extensions that depended on 32-bit host ints.
6084 FIXME, we still depend on big-endian host bitfield ordering.
6085 (sparc_print_insn): Set the insn_info_valid field, and the
6086 other fields that describe the instruction being printed.
6090 * sparc-opc.c (call): Accept all 6 addressing modes valid for
6091 `jmp' instead of just one of them.
6095 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
6096 (fput_fp_reg_r): Renamed from fput_reg_r.
6097 (fput_fp_reg): New function.
6098 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
6100 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
6102 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
6106 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
6108 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
6109 don't output a space.
6111 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
6115 * mips-opc.c: New file, containing opcode table from
6116 ../include/opcode/mips.h.
6117 * Makefile.in: Add it.
6121 * m88k-dis.c: New file, moved in from gdb and changed to use the
6122 new dis-asm.h disassembler interface.
6123 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
6124 (m88k-dis.o): New target.
6128 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
6129 argument string const char * to correspond to opcode/mips.h.
6133 * mips-dis.c: Updated to account for name changes in new version
6135 * Makefile.in: Added header file dependencies.
6139 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
6143 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
6144 extend, rather than shifts.
6148 * Makefile.in: Undo 15 June change.
6152 * m68k-dis.c (print_insn_arg): Change return value to byte count
6154 * m68k-dis.c: Re-write to detect invalid operands before
6155 printing anything, so we can handle this the same way we
6156 handle invalid opcodes.
6160 * sh-dis.c, sh-opc.h: Understand some more opcodes.
6164 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
6169 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
6171 * configure.in: Do make sysdep.h link.
6172 * Makefile.in: Search ../include. Don't search ../bfd.
6177 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
6178 Do not print a space before the completers specified by
6183 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
6184 defined, since gdb has been fixed.
6187 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
6188 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
6189 be a *disassemble_info, not a *FILE.
6190 * hppa-dis.c: Support 'd', '!', and 'a'.
6191 * hppa-dis.c: Support 's' to extract a 2 bit space register.
6192 * hppa-dis.c: Delete cases which are no longer needed.
6196 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
6200 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
6205 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
6206 * configure.in: No longer need to configure to get sysdep.h.
6211 * hppa-dis.c: Support 'I', 'J', and 'K' in output
6212 templates for 1.1 FP computational instructions.
6216 * h8500-dis.c (print_insn_h8500): Address argument is type
6218 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
6221 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
6222 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
6224 * sparc-dis.c (compare_opcodes): Move static declaration to
6229 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
6230 instruction, remove unimp hack from 'l' argument.
6234 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
6240 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
6245 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
6246 arrays of string pointers to 2-d arrays of chars, to save
6251 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
6252 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
6256 * hppa-dis.c: New file from Utah, adapted to new disassembler
6258 * Makefile.in: Include it.
6262 * sh-dis.c, sh-opc.h: New files.
6266 * alpha-dis.c, alpha-opc.h: New files.
6270 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
6275 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
6279 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
6284 * sparc-dis.c: Use fprintf_func a few places where I forgot,
6285 and double percent signs a few places.
6287 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
6289 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
6290 Use info->print_address_func not print_address.
6292 * dis-buf.c (generic_print_address): New function.
6296 * Makefile.in: Add sparc-dis.c.
6297 sparc-dis.c: New file, merges binutils and gdb versions as follows:
6299 Add `add' instruction to the set that get checked
6300 for a preceding `sethi' in order to print an absolute address.
6301 * (print_insn): Disassembly prefers real instructions.
6302 (is_delayed_branch): Speed up.
6303 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
6304 Still missing some float ops, and needs testing.
6305 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
6306 F_ALIAS. Use printf, not fprintf, when not passing a file
6308 (compare_opcodes): Check that identical instructions have
6309 identical opcodes, complain otherwise.
6312 * Include reg_names.
6314 Use dis-asm.h/read_memory_func interface.
6318 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
6319 deliberately return non-zero to setjmp from longjmp. Otherwise
6320 this code fails to compile.
6324 * m68k-dis.c: Fix prototype for fetch_arg().
6328 * dis-buf.c: New file, for new read_memory_func interface.
6329 Makefile.in (OFILES): Include it.
6330 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
6331 Use new read_memory_func interface.
6335 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
6336 * h8500-opc.h: Fix couple of opcodes.
6338 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
6340 * Makefile.in: add dvi & installcheck targets
6344 * Makefile.in: Update for h8500-dis.c.
6348 * h8500-dis.c, h8500-opc.h: New files
6352 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
6353 ../include/dis-asm.h.
6354 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
6355 and ../gdb/m68k-pinsn.c).
6356 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
6357 and ../gdb/i386-pinsn.c).
6358 * m68881-ext.c: New file. Moved definition of
6359 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
6360 * Makefile.in: Adjust for new files.
6362 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
6363 can be dis-assembled.
6367 * mips-dis.c (print_insn_arg): Now returns void.
6371 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
6372 files that use the macros.
6376 * mips-dis.c: New file, from gdb/mips-pinsn.c.
6377 * Makefile.in (DIS_LIBS): Added mips-dis.o.
6378 (CFILES): Added mips-dis.c.
6382 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
6383 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
6387 * Makefile.in: Improve *clean rules.
6388 * configure.in: Allow a default host.
6390 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6392 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
6393 files include other sysdep files
6397 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
6401 * configure.in: For host support, use ../bfd/configure.host
6402 so it stays in sync with the ../bfd/hosts database.
6404 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6406 * configure.in: use cpu-vendor-os triple instead of nested cases
6410 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
6411 *always* the wrong one.
6415 * z8kgen.c: added copyright info
6419 * z8k-dis.c (unparse_instr): prettier tabs
6420 * z8kgen.c -> z8k-opc.h: bug fixes in tables
6422 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
6424 * configure.in: Add ncr* configuration.
6425 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
6426 picayune ANSI compilers happy.
6430 * configure.in (i386): Make i386 and i486 synonymous for now.
6431 * configure.in (i[34]86-*-sysv4): Add my_host definition.
6435 * Makefile.in (install): Fix typo.
6439 * Makefile.in (make): Remove obsolete crud.
6440 (sparc-opc.o): Avoid Sun Make VPATH bug.
6444 * Makefile.in: since there are no SUBDIRS, remove rule and
6445 references of subdir_do.
6449 * Makefile.in (install): Get the library name right here too.
6450 Don't install bfd.h, since it's unrelated to this library. No
6451 subdirs to recurse into, either.
6452 (CFILES): The source file has a .c suffix, not .o.
6454 * sparc-opc.c: New file, moved from BFD.
6455 * Makefile.in (OFILES): Build it.
6459 * z8k-dis.c: fixed forward refferences of some declarations.
6463 * Makefile.in: get the name of the library right
6467 * z8k-dis.c: knows how to disassemble z8k stuff
6468 * z8k-opc.h: new file full of z8000 opcodes
6472 version-control: never