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1 | /* Definitions for the Macraigor Systems BDM Wiggler | |
2 | Copyright (C) 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street, Fifth Floor, | |
19 | Boston, MA 02110-1301, USA. */ | |
20 | ||
21 | #ifndef OCD_H | |
22 | #define OCD_H | |
23 | ||
24 | struct mem_attrib; | |
25 | struct target_ops; | |
26 | ||
27 | /* Wiggler serial protocol definitions */ | |
28 | ||
29 | #define DLE 020 /* Quote char */ | |
30 | #define SYN 026 /* Start of packet */ | |
31 | #define RAW_SYN ((026 << 8) | 026) /* get_quoted_char found a naked SYN */ | |
32 | ||
33 | /* Status flags */ | |
34 | ||
35 | #define OCD_FLAG_RESET 0x01 /* Target is being reset */ | |
36 | #define OCD_FLAG_STOPPED 0x02 /* Target is halted */ | |
37 | #define OCD_FLAG_BDM 0x04 /* Target is in BDM */ | |
38 | #define OCD_FLAG_PWF 0x08 /* Power failed */ | |
39 | #define OCD_FLAG_CABLE_DISC 0x10 /* BDM cable disconnected */ | |
40 | ||
41 | /* Commands */ | |
42 | ||
43 | #define OCD_AYT 0x0 /* Are you there? */ | |
44 | #define OCD_GET_VERSION 0x1 /* Get Version */ | |
45 | #define OCD_SET_BAUD_RATE 0x2 /* Set Baud Rate */ | |
46 | #define OCD_INIT 0x10 /* Initialize Wiggler */ | |
47 | #define OCD_SET_SPEED 0x11 /* Set Speed */ | |
48 | #define OCD_GET_STATUS_MASK 0x12 /* Get Status Mask */ | |
49 | #define OCD_GET_CTRS 0x13 /* Get Error Counters */ | |
50 | #define OCD_SET_FUNC_CODE 0x14 /* Set Function Code */ | |
51 | #define OCD_SET_CTL_FLAGS 0x15 /* Set Control Flags */ | |
52 | #define OCD_SET_BUF_ADDR 0x16 /* Set Register Buffer Address */ | |
53 | #define OCD_RUN 0x20 /* Run Target from PC */ | |
54 | #define OCD_RUN_ADDR 0x21 /* Run Target from Specified Address */ | |
55 | #define OCD_STOP 0x22 /* Stop Target */ | |
56 | #define OCD_RESET_RUN 0x23 /* Reset Target and Run */ | |
57 | #define OCD_RESET 0x24 /* Reset Target and Halt */ | |
58 | #define OCD_STEP 0x25 /* Single step */ | |
59 | #define OCD_READ_REGS 0x30 /* Read Registers */ | |
60 | #define OCD_WRITE_REGS 0x31 /* Write Registers */ | |
61 | #define OCD_READ_MEM 0x32 /* Read Memory */ | |
62 | #define OCD_WRITE_MEM 0x33 /* Write Memory */ | |
63 | #define OCD_FILL_MEM 0x34 /* Fill Memory */ | |
64 | #define OCD_MOVE_MEM 0x35 /* Move Memory */ | |
65 | ||
66 | #define OCD_READ_INT_MEM 0x80 /* Read Internal Memory */ | |
67 | #define OCD_WRITE_INT_MEM 0x81 /* Write Internal Memory */ | |
68 | #define OCD_JUMP 0x82 /* Jump to Subroutine */ | |
69 | ||
70 | #define OCD_ERASE_FLASH 0x90 /* Erase flash memory */ | |
71 | #define OCD_PROGRAM_FLASH 0x91 /* Write flash memory */ | |
72 | #define OCD_EXIT_MON 0x93 /* Exit the flash programming monitor */ | |
73 | #define OCD_ENTER_MON 0x94 /* Enter the flash programming monitor */ | |
74 | ||
75 | #define OCD_SET_STATUS 0x0a /* Set status */ | |
76 | #define OCD_SET_CONNECTION 0xf0 /* Set connection (init Wigglers.dll) */ | |
77 | #define OCD_LOG_FILE 0xf1 /* Cmd to get Wigglers.dll to log cmds */ | |
78 | #define OCD_FLAG_STOP 0x0 /* Stop the target, enter BDM */ | |
79 | #define OCD_FLAG_START 0x01 /* Start the target at PC */ | |
80 | #define OCD_FLAG_RETURN_STATUS 0x04 /* Return async status */ | |
81 | ||
82 | /* Target type (for OCD_INIT command) */ | |
83 | ||
84 | enum ocd_target_type | |
85 | { | |
86 | OCD_TARGET_CPU32 = 0x0, /* Moto cpu32 family */ | |
87 | OCD_TARGET_CPU16 = 0x1, | |
88 | OCD_TARGET_MOTO_PPC = 0x2, /* Motorola PPC 5xx/8xx */ | |
89 | OCD_TARGET_IBM_PPC = 0x3 | |
90 | }; /* IBM PPC 4xx */ | |
91 | ||
92 | void ocd_open (char *name, int from_tty, enum ocd_target_type, | |
93 | struct target_ops *ops); | |
94 | ||
95 | void ocd_close (int quitting); | |
96 | ||
97 | void ocd_detach (char *args, int from_tty); | |
98 | ||
99 | void ocd_resume (ptid_t ptid, int step, enum target_signal siggnal); | |
100 | ||
101 | void ocd_prepare_to_store (void); | |
102 | ||
103 | void ocd_stop (void); | |
104 | ||
105 | void ocd_files_info (struct target_ops *ignore); | |
106 | ||
107 | ||
108 | int ocd_xfer_memory (CORE_ADDR memaddr, char *myaddr, | |
109 | int len, int should_write, | |
110 | struct mem_attrib *attrib, | |
111 | struct target_ops *target); | |
112 | ||
113 | void ocd_mourn (void); | |
114 | ||
115 | void ocd_create_inferior (char *exec_file, char *args, char **env, | |
116 | int from_tty); | |
117 | ||
118 | int ocd_thread_alive (ptid_t th); | |
119 | ||
120 | void ocd_error (char *s, int error_code); | |
121 | ||
122 | void ocd_kill (void); | |
123 | ||
124 | void ocd_load (char *args, int from_tty); | |
125 | ||
126 | unsigned char *ocd_read_bdm_registers (int first_bdm_regno, | |
127 | int last_bdm_regno, int *reglen); | |
128 | ||
129 | CORE_ADDR ocd_read_bdm_register (int bdm_regno); | |
130 | ||
131 | void ocd_write_bdm_registers (int first_bdm_regno, | |
132 | unsigned char *regptr, int reglen); | |
133 | ||
134 | void ocd_write_bdm_register (int bdm_regno, CORE_ADDR reg); | |
135 | ||
136 | int ocd_wait (void); | |
137 | ||
138 | int ocd_insert_breakpoint (CORE_ADDR addr, char *contents_cache); | |
139 | int ocd_remove_breakpoint (CORE_ADDR addr, char *contents_cache); | |
140 | ||
141 | int ocd_write_bytes (CORE_ADDR memaddr, char *myaddr, int len); | |
142 | ||
143 | #endif /* OCD_H */ |