[binutils.git] / sim / i960 / Makefile.in

# Makefile template for Configure for the i960 simulator
# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of GDB, the GNU debugger.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

## COMMON_PRE_CONFIG_FRAG

I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o

CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =

SIM_OBJS = \
	$(SIM_NEW_COMMON_OBJS) \
	sim-cpu.o \
	sim-engine.o \
	sim-hload.o \
	sim-hrw.o \
	sim-model.o \
	sim-reason.o \
	cgen-utils.o cgen-trace.o cgen-scache.o \
	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
	sim-if.o arch.o \
	$(I960_OBJS) \
	traps.o devices.o \
	$(CONFIG_DEVICES)

# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
	$(CGEN_INCLUDE_DEPS) \
	arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h

SIM_EXTRA_CFLAGS =

SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = i960-clean

# This selects the i960 newlib/libgloss syscall definitions.
#
# ??? This affects what stuff gets included from ../common/nltvals.def.
# For now, we need SYS_exit because of traps.c.  If we really need this,
# then we need to add i960 specific definitions to nltvals.def.
NL_TARGET = -DNL_TARGET_i960

## COMMON_POST_CONFIG_FRAG

arch = i960

sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h

arch.o: arch.c $(SIM_MAIN_DEPS)

traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)

# I960 objs

I960BASE_INCLUDE_DEPS = \
	$(CGEN_MAIN_CPU_DEPS) \
	cpu.h decode.h eng.h

i960.o: i960.c $(I960BASE_INCLUDE_DEPS)

# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
	$(SHELL) $(srccom)/genmloop.sh \
		-mono -fast -pbb -switch sem-switch.c \
		-cpu i960base -infile $(srcdir)/mloop.in
	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
	touch stamp-mloop
#	$(SHELL) $(srccom)/genmloop.sh \
#		-mono -scache -fast i960base $(srcdir)/mloop.in \
#		| sed -e 's/@cpu@/i960base/' -e 's/@CPU@/I960BASE/' >mloop.c
mloop.o: mloop.c sem-switch.c $(I960BASE_INCLUDE_DEPS)

cpu.o: cpu.c $(I960BASE_INCLUDE_DEPS)
decode.o: decode.c $(I960BASE_INCLUDE_DEPS)
sem.o: sem.c $(I960BASE_INCLUDE_DEPS)
model.o: model.c $(I960BASE_INCLUDE_DEPS)

i960-clean:
	rm -f mloop.c eng.h stamp-mloop
	rm -f tmp-*
	rm -f stamp-arch stamp-cpu stamp-desc

# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =

stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/i960.cpu
	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
	  FLAGS="with-scache with-profile=fn"
	touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch

stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/i960.cpu
	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
	  cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
	touch stamp-cpu
cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu

stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \
		$(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/i960.cpu $(srccgen)/i960.cpu
	$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
		cpu=i960 mach=all
	touch stamp-desc
i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc
Commit	Line	Data
c906108c SS	1	# Makefile template for Configure for the i960 simulator
	2	# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
	3	# Contributed by Cygnus Support.
	4	#
	5	# This file is part of GDB, the GNU debugger.
	6	#
	7	# This program is free software; you can redistribute it and/or modify
	8	# it under the terms of the GNU General Public License as published by
	9	# the Free Software Foundation; either version 2 of the License, or
	10	# (at your option) any later version.
	11	#
	12	# This program is distributed in the hope that it will be useful,
	13	# but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	# GNU General Public License for more details.
	16	#
	17	# You should have received a copy of the GNU General Public License along
	18	# with this program; if not, write to the Free Software Foundation, Inc.,
	19	# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	20
	21	## COMMON_PRE_CONFIG_FRAG
	22
	23	I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o
	24
	25	CONFIG_DEVICES = dv-sockser.o
	26	CONFIG_DEVICES =
	27
	28	SIM_OBJS = \
	29	$(SIM_NEW_COMMON_OBJS) \
	30	sim-cpu.o \
	31	sim-engine.o \
	32	sim-hload.o \
	33	sim-hrw.o \
	34	sim-model.o \
	35	sim-reason.o \
	36	cgen-utils.o cgen-trace.o cgen-scache.o \
	37	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
	38	sim-if.o arch.o \
	39	$(I960_OBJS) \
	40	traps.o devices.o \
	41	$(CONFIG_DEVICES)
	42
	43	# Extra headers included by sim-main.h.
	44	SIM_EXTRA_DEPS = \
	45	$(CGEN_INCLUDE_DEPS) \
	46	arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h
	47
	48	SIM_EXTRA_CFLAGS =
	49
	50	SIM_RUN_OBJS = nrun.o
	51	SIM_EXTRA_CLEAN = i960-clean
	52
	53	# This selects the i960 newlib/libgloss syscall definitions.
	54	#
	55	# ??? This affects what stuff gets included from ../common/nltvals.def.
	56	# For now, we need SYS_exit because of traps.c. If we really need this,
	57	# then we need to add i960 specific definitions to nltvals.def.
	58	NL_TARGET = -DNL_TARGET_i960
	59
	60	## COMMON_POST_CONFIG_FRAG
	61
	62	arch = i960
	63
	64	sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
65
66	arch.o: arch.c $(SIM_MAIN_DEPS)
67
68	traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
69	devices.o: devices.c $(SIM_MAIN_DEPS)
70
71	# I960 objs
72
73	I960BASE_INCLUDE_DEPS = \
74	$(CGEN_MAIN_CPU_DEPS) \
75	cpu.h decode.h eng.h
76
77	i960.o: i960.c $(I960BASE_INCLUDE_DEPS)
78
79	# FIXME: Use of `mono' is wip.
80	mloop.c eng.h: stamp-mloop
81	stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
82	$(SHELL) $(srccom)/genmloop.sh \
83	-mono -fast -pbb -switch sem-switch.c \
84	-cpu i960base -infile $(srcdir)/mloop.in
85	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
86	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
87	touch stamp-mloop
88	# $(SHELL) $(srccom)/genmloop.sh \
89	# -mono -scache -fast i960base $(srcdir)/mloop.in \
90	# \| sed -e 's/@cpu@/i960base/' -e 's/@CPU@/I960BASE/' >mloop.c
91	mloop.o: mloop.c sem-switch.c $(I960BASE_INCLUDE_DEPS)
92
93	cpu.o: cpu.c $(I960BASE_INCLUDE_DEPS)
94	decode.o: decode.c $(I960BASE_INCLUDE_DEPS)
95	sem.o: sem.c $(I960BASE_INCLUDE_DEPS)
96	model.o: model.c $(I960BASE_INCLUDE_DEPS)
97
98	i960-clean:
99	rm -f mloop.c eng.h stamp-mloop
100	rm -f tmp-*
604259a0 FCE	101	rm -f stamp-arch stamp-cpu stamp-desc
	102
	103	# cgen support, enable with --enable-cgen-maint
	104	CGEN_MAINT = ; @true
	105	# The following line is commented in or out depending upon --enable-cgen-maint.
	106	@CGEN_MAINT@CGEN_MAINT =
	107
	108	stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/i960.cpu
	109	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
	110	FLAGS="with-scache with-profile=fn"
	111	touch stamp-arch
	112	arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
604259a0 FCE	113
	114	stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/i960.cpu
	115	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
	116	cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
	117	touch stamp-cpu
	118	cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
604259a0 FCE	119
	120	stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \
	121	$(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/i960.cpu $(srccgen)/i960.cpu
	122	$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
	123	cpu=i960 mach=all
	124	touch stamp-desc
	125	i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc