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908f682f | 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
70ed8774 | 2 | Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
ffe1f3ee | 3 | Contributed by Stephane Carrez, [email protected] |
78073dd8 AC |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
78073dd8 | 21 | |
82c230c2 SC |
22 | #include "defs.h" |
23 | #include "frame.h" | |
82c230c2 SC |
24 | #include "symtab.h" |
25 | #include "gdbtypes.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdb_string.h" | |
29 | #include "value.h" | |
30 | #include "inferior.h" | |
31 | #include "dis-asm.h" | |
32 | #include "symfile.h" | |
33 | #include "objfiles.h" | |
34 | #include "arch-utils.h" | |
4e052eda | 35 | #include "regcache.h" |
78073dd8 | 36 | |
82c230c2 SC |
37 | #include "target.h" |
38 | #include "opcode/m68hc11.h" | |
81967506 SC |
39 | #include "elf/m68hc11.h" |
40 | #include "elf-bfd.h" | |
78073dd8 | 41 | |
7df11f59 SC |
42 | /* Macros for setting and testing a bit in a minimal symbol. |
43 | For 68HC11/68HC12 we have two flags that tell which return | |
44 | type the function is using. This is used for prologue and frame | |
45 | analysis to compute correct stack frame layout. | |
46 | ||
47 | The MSB of the minimal symbol's "info" field is used for this purpose. | |
48 | This field is already being used to store the symbol size, so the | |
49 | assumption is that the symbol size cannot exceed 2^30. | |
50 | ||
51 | MSYMBOL_SET_RTC Actually sets the "RTC" bit. | |
52 | MSYMBOL_SET_RTI Actually sets the "RTI" bit. | |
53 | MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol. | |
54 | MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. | |
55 | MSYMBOL_SIZE Returns the size of the minimal symbol, | |
56 | i.e. the "info" field with the "special" bit | |
57 | masked out. */ | |
58 | ||
59 | #define MSYMBOL_SET_RTC(msym) \ | |
60 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
61 | | 0x80000000) | |
62 | ||
63 | #define MSYMBOL_SET_RTI(msym) \ | |
64 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ | |
65 | | 0x40000000) | |
66 | ||
67 | #define MSYMBOL_IS_RTC(msym) \ | |
68 | (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0) | |
69 | ||
70 | #define MSYMBOL_IS_RTI(msym) \ | |
71 | (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0) | |
72 | ||
73 | #define MSYMBOL_SIZE(msym) \ | |
74 | ((long) MSYMBOL_INFO (msym) & 0x3fffffff) | |
75 | ||
76 | enum insn_return_kind { | |
77 | RETURN_RTS, | |
78 | RETURN_RTC, | |
79 | RETURN_RTI | |
80 | }; | |
81 | ||
82 | ||
78073dd8 AC |
83 | /* Register numbers of various important registers. |
84 | Note that some of these values are "real" register numbers, | |
85 | and correspond to the general registers of the machine, | |
86 | and some are "phony" register numbers which are too large | |
87 | to be actual register numbers as far as the user is concerned | |
88 | but do serve to get the desired values when passed to read_register. */ | |
89 | ||
82c230c2 SC |
90 | #define HARD_X_REGNUM 0 |
91 | #define HARD_D_REGNUM 1 | |
92 | #define HARD_Y_REGNUM 2 | |
93 | #define HARD_SP_REGNUM 3 | |
94 | #define HARD_PC_REGNUM 4 | |
95 | ||
96 | #define HARD_A_REGNUM 5 | |
97 | #define HARD_B_REGNUM 6 | |
98 | #define HARD_CCR_REGNUM 7 | |
5706502a SC |
99 | |
100 | /* 68HC12 page number register. | |
101 | Note: to keep a compatibility with gcc register naming, we must | |
102 | not have to rename FP and other soft registers. The page register | |
103 | is a real hard register and must therefore be counted by NUM_REGS. | |
104 | For this it has the same number as Z register (which is not used). */ | |
105 | #define HARD_PAGE_REGNUM 8 | |
106 | #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM) | |
82c230c2 SC |
107 | |
108 | /* Z is replaced by X or Y by gcc during machine reorg. | |
109 | ??? There is no way to get it and even know whether | |
110 | it's in X or Y or in ZS. */ | |
111 | #define SOFT_Z_REGNUM 8 | |
112 | ||
113 | /* Soft registers. These registers are special. There are treated | |
114 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). | |
115 | They are physically located in memory. */ | |
116 | #define SOFT_FP_REGNUM 9 | |
117 | #define SOFT_TMP_REGNUM 10 | |
118 | #define SOFT_ZS_REGNUM 11 | |
119 | #define SOFT_XY_REGNUM 12 | |
f91a8b6b SC |
120 | #define SOFT_UNUSED_REGNUM 13 |
121 | #define SOFT_D1_REGNUM 14 | |
82c230c2 SC |
122 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
123 | #define M68HC11_MAX_SOFT_REGS 32 | |
124 | ||
125 | #define M68HC11_NUM_REGS (8) | |
126 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) | |
127 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) | |
128 | ||
129 | #define M68HC11_REG_SIZE (2) | |
130 | ||
548bcbec SC |
131 | #define M68HC12_NUM_REGS (9) |
132 | #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1) | |
133 | #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1) | |
134 | ||
908f682f | 135 | struct insn_sequence; |
82c230c2 SC |
136 | struct gdbarch_tdep |
137 | { | |
5d1a66bd SC |
138 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
139 | to the next push location. An offset of 1 must be applied to obtain | |
140 | the address where the last value is saved. For 68hc12, the stack | |
141 | pointer points to the last value pushed. No offset is necessary. */ | |
142 | int stack_correction; | |
908f682f SC |
143 | |
144 | /* Description of instructions in the prologue. */ | |
145 | struct insn_sequence *prologue; | |
81967506 | 146 | |
7df11f59 SC |
147 | /* True if the page memory bank register is available |
148 | and must be used. */ | |
149 | int use_page_register; | |
150 | ||
81967506 SC |
151 | /* ELF flags for ABI. */ |
152 | int elf_flags; | |
82c230c2 SC |
153 | }; |
154 | ||
5d1a66bd SC |
155 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
156 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) | |
7df11f59 | 157 | #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register) |
5d1a66bd | 158 | |
82c230c2 SC |
159 | struct frame_extra_info |
160 | { | |
82c230c2 | 161 | CORE_ADDR return_pc; |
82c230c2 SC |
162 | int frameless; |
163 | int size; | |
7df11f59 | 164 | enum insn_return_kind return_kind; |
82c230c2 | 165 | }; |
78073dd8 | 166 | |
82c230c2 SC |
167 | /* Table of registers for 68HC11. This includes the hard registers |
168 | and the soft registers used by GCC. */ | |
169 | static char * | |
170 | m68hc11_register_names[] = | |
171 | { | |
172 | "x", "d", "y", "sp", "pc", "a", "b", | |
5706502a | 173 | "ccr", "page", "frame","tmp", "zs", "xy", 0, |
82c230c2 SC |
174 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
175 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", | |
176 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", | |
177 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", | |
178 | "d29", "d30", "d31", "d32" | |
179 | }; | |
78073dd8 | 180 | |
82c230c2 SC |
181 | struct m68hc11_soft_reg |
182 | { | |
183 | const char *name; | |
184 | CORE_ADDR addr; | |
185 | }; | |
78073dd8 | 186 | |
82c230c2 | 187 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
78073dd8 | 188 | |
82c230c2 | 189 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
78073dd8 | 190 | |
82c230c2 SC |
191 | static int soft_min_addr; |
192 | static int soft_max_addr; | |
193 | static int soft_reg_initialized = 0; | |
78073dd8 | 194 | |
82c230c2 SC |
195 | /* Look in the symbol table for the address of a pseudo register |
196 | in memory. If we don't find it, pretend the register is not used | |
197 | and not available. */ | |
198 | static void | |
199 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) | |
200 | { | |
201 | struct minimal_symbol *msymbol; | |
78073dd8 | 202 | |
82c230c2 SC |
203 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
204 | if (msymbol) | |
205 | { | |
206 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); | |
207 | reg->name = xstrdup (name); | |
208 | ||
209 | /* Keep track of the address range for soft registers. */ | |
210 | if (reg->addr < (CORE_ADDR) soft_min_addr) | |
211 | soft_min_addr = reg->addr; | |
212 | if (reg->addr > (CORE_ADDR) soft_max_addr) | |
213 | soft_max_addr = reg->addr; | |
214 | } | |
215 | else | |
216 | { | |
217 | reg->name = 0; | |
218 | reg->addr = 0; | |
219 | } | |
220 | } | |
78073dd8 | 221 | |
82c230c2 SC |
222 | /* Initialize the table of soft register addresses according |
223 | to the symbol table. */ | |
224 | static void | |
225 | m68hc11_initialize_register_info (void) | |
226 | { | |
227 | int i; | |
78073dd8 | 228 | |
82c230c2 SC |
229 | if (soft_reg_initialized) |
230 | return; | |
231 | ||
232 | soft_min_addr = INT_MAX; | |
233 | soft_max_addr = 0; | |
234 | for (i = 0; i < M68HC11_ALL_REGS; i++) | |
235 | { | |
236 | soft_regs[i].name = 0; | |
237 | } | |
238 | ||
239 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); | |
240 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); | |
241 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); | |
242 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; | |
243 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); | |
78073dd8 | 244 | |
82c230c2 SC |
245 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
246 | { | |
247 | char buf[10]; | |
78073dd8 | 248 | |
82c230c2 SC |
249 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
250 | m68hc11_get_register_info (&soft_regs[i], buf); | |
251 | } | |
78073dd8 | 252 | |
82c230c2 SC |
253 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
254 | { | |
255 | warning ("No frame soft register found in the symbol table.\n"); | |
256 | warning ("Stack backtrace will not work.\n"); | |
257 | } | |
258 | soft_reg_initialized = 1; | |
259 | } | |
78073dd8 | 260 | |
82c230c2 SC |
261 | /* Given an address in memory, return the soft register number if |
262 | that address corresponds to a soft register. Returns -1 if not. */ | |
263 | static int | |
264 | m68hc11_which_soft_register (CORE_ADDR addr) | |
265 | { | |
266 | int i; | |
267 | ||
268 | if (addr < soft_min_addr || addr > soft_max_addr) | |
269 | return -1; | |
270 | ||
271 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) | |
272 | { | |
273 | if (soft_regs[i].name && soft_regs[i].addr == addr) | |
274 | return i; | |
275 | } | |
276 | return -1; | |
277 | } | |
78073dd8 | 278 | |
82c230c2 SC |
279 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
280 | pseudo registers. They are located in memory. Translate the register | |
281 | fetch into a memory read. */ | |
46ce284d AC |
282 | static void |
283 | m68hc11_pseudo_register_read (struct gdbarch *gdbarch, | |
284 | struct regcache *regcache, | |
285 | int regno, void *buf) | |
82c230c2 | 286 | { |
548bcbec SC |
287 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
288 | addressing mode. */ | |
289 | if (regno == M68HC12_HARD_PC_REGNUM) | |
290 | { | |
291 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
292 | CORE_ADDR pc = read_register (HARD_PC_REGNUM); | |
293 | int page = read_register (HARD_PAGE_REGNUM); | |
294 | ||
295 | if (pc >= 0x8000 && pc < 0xc000) | |
296 | { | |
297 | pc -= 0x8000; | |
298 | pc += (page << 14); | |
299 | pc += 0x1000000; | |
300 | } | |
301 | store_unsigned_integer (buf, regsize, pc); | |
302 | return; | |
303 | } | |
304 | ||
82c230c2 SC |
305 | m68hc11_initialize_register_info (); |
306 | ||
307 | /* Fetch a soft register: translate into a memory read. */ | |
308 | if (soft_regs[regno].name) | |
309 | { | |
310 | target_read_memory (soft_regs[regno].addr, buf, 2); | |
311 | } | |
312 | else | |
313 | { | |
314 | memset (buf, 0, 2); | |
315 | } | |
82c230c2 | 316 | } |
78073dd8 | 317 | |
82c230c2 SC |
318 | /* Store a pseudo register. Translate the register store |
319 | into a memory write. */ | |
320 | static void | |
46ce284d AC |
321 | m68hc11_pseudo_register_write (struct gdbarch *gdbarch, |
322 | struct regcache *regcache, | |
323 | int regno, const void *buf) | |
82c230c2 | 324 | { |
548bcbec SC |
325 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
326 | addressing mode. */ | |
327 | if (regno == M68HC12_HARD_PC_REGNUM) | |
328 | { | |
329 | const int regsize = TYPE_LENGTH (builtin_type_uint32); | |
330 | char *tmp = alloca (regsize); | |
331 | CORE_ADDR pc; | |
332 | ||
333 | memcpy (tmp, buf, regsize); | |
334 | pc = extract_unsigned_integer (tmp, regsize); | |
335 | if (pc >= 0x1000000) | |
336 | { | |
337 | pc -= 0x1000000; | |
338 | write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff); | |
339 | pc &= 0x03fff; | |
340 | write_register (HARD_PC_REGNUM, pc + 0x8000); | |
341 | } | |
342 | else | |
343 | write_register (HARD_PC_REGNUM, pc); | |
344 | return; | |
345 | } | |
346 | ||
82c230c2 | 347 | m68hc11_initialize_register_info (); |
78073dd8 | 348 | |
82c230c2 SC |
349 | /* Store a soft register: translate into a memory write. */ |
350 | if (soft_regs[regno].name) | |
351 | { | |
46ce284d AC |
352 | const int regsize = 2; |
353 | char *tmp = alloca (regsize); | |
354 | memcpy (tmp, buf, regsize); | |
355 | target_write_memory (soft_regs[regno].addr, tmp, regsize); | |
82c230c2 SC |
356 | } |
357 | } | |
78073dd8 | 358 | |
fa88f677 | 359 | static const char * |
82c230c2 | 360 | m68hc11_register_name (int reg_nr) |
78073dd8 | 361 | { |
548bcbec SC |
362 | if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER) |
363 | return "pc"; | |
364 | if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER) | |
365 | return "ppc"; | |
366 | ||
82c230c2 SC |
367 | if (reg_nr < 0) |
368 | return NULL; | |
369 | if (reg_nr >= M68HC11_ALL_REGS) | |
370 | return NULL; | |
371 | ||
372 | /* If we don't know the address of a soft register, pretend it | |
373 | does not exist. */ | |
374 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) | |
375 | return NULL; | |
376 | return m68hc11_register_names[reg_nr]; | |
377 | } | |
78073dd8 | 378 | |
f4f9705a | 379 | static const unsigned char * |
82c230c2 | 380 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
78073dd8 | 381 | { |
82c230c2 SC |
382 | static unsigned char breakpoint[] = {0x0}; |
383 | ||
384 | *lenptr = sizeof (breakpoint); | |
385 | return breakpoint; | |
78073dd8 AC |
386 | } |
387 | ||
388 | /* Immediately after a function call, return the saved pc before the frame | |
82c230c2 | 389 | is setup. */ |
78073dd8 | 390 | |
82c230c2 | 391 | static CORE_ADDR |
78073dd8 AC |
392 | m68hc11_saved_pc_after_call (struct frame_info *frame) |
393 | { | |
82c230c2 SC |
394 | CORE_ADDR addr; |
395 | ||
5d1a66bd | 396 | addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION; |
78073dd8 AC |
397 | addr &= 0x0ffff; |
398 | return read_memory_integer (addr, 2) & 0x0FFFF; | |
399 | } | |
400 | ||
82c230c2 SC |
401 | static CORE_ADDR |
402 | m68hc11_frame_saved_pc (struct frame_info *frame) | |
403 | { | |
404 | return frame->extra_info->return_pc; | |
405 | } | |
406 | ||
407 | static CORE_ADDR | |
408 | m68hc11_frame_args_address (struct frame_info *frame) | |
409 | { | |
7df11f59 SC |
410 | CORE_ADDR addr; |
411 | ||
412 | addr = frame->frame + frame->extra_info->size + STACK_CORRECTION + 2; | |
413 | if (frame->extra_info->return_kind == RETURN_RTC) | |
414 | addr += 1; | |
415 | else if (frame->extra_info->return_kind == RETURN_RTI) | |
416 | addr += 7; | |
417 | ||
418 | return addr; | |
82c230c2 SC |
419 | } |
420 | ||
421 | static CORE_ADDR | |
422 | m68hc11_frame_locals_address (struct frame_info *frame) | |
423 | { | |
424 | return frame->frame; | |
425 | } | |
426 | ||
78073dd8 AC |
427 | /* Discard from the stack the innermost frame, restoring all saved |
428 | registers. */ | |
429 | ||
82c230c2 | 430 | static void |
fba45db2 | 431 | m68hc11_pop_frame (void) |
78073dd8 | 432 | { |
82c230c2 SC |
433 | register struct frame_info *frame = get_current_frame (); |
434 | register CORE_ADDR fp, sp; | |
435 | register int regnum; | |
436 | ||
437 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
438 | generic_pop_dummy_frame (); | |
439 | else | |
440 | { | |
441 | fp = FRAME_FP (frame); | |
442 | FRAME_INIT_SAVED_REGS (frame); | |
443 | ||
444 | /* Copy regs from where they were saved in the frame. */ | |
445 | for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++) | |
446 | if (frame->saved_regs[regnum]) | |
447 | write_register (regnum, | |
448 | read_memory_integer (frame->saved_regs[regnum], 2)); | |
449 | ||
450 | write_register (HARD_PC_REGNUM, frame->extra_info->return_pc); | |
b4fa4770 | 451 | sp = (fp + frame->extra_info->size + 2) & 0x0ffff; |
82c230c2 SC |
452 | write_register (HARD_SP_REGNUM, sp); |
453 | } | |
454 | flush_cached_frames (); | |
78073dd8 AC |
455 | } |
456 | ||
908f682f SC |
457 | \f |
458 | /* 68HC11 & 68HC12 prologue analysis. | |
459 | ||
460 | */ | |
461 | #define MAX_CODES 12 | |
462 | ||
463 | /* 68HC11 opcodes. */ | |
464 | #undef M6811_OP_PAGE2 | |
465 | #define M6811_OP_PAGE2 (0x18) | |
466 | #define M6811_OP_LDX (0xde) | |
467 | #define M6811_OP_PSHX (0x3c) | |
468 | #define M6811_OP_STS (0x9f) | |
469 | #define M6811_OP_TSX (0x30) | |
470 | #define M6811_OP_XGDX (0x8f) | |
471 | #define M6811_OP_ADDD (0xc3) | |
472 | #define M6811_OP_TXS (0x35) | |
473 | #define M6811_OP_DES (0x34) | |
474 | ||
475 | /* 68HC12 opcodes. */ | |
476 | #define M6812_OP_PAGE2 (0x18) | |
477 | #define M6812_OP_MOVW (0x01) | |
478 | #define M6812_PB_PSHW (0xae) | |
479 | #define M6812_OP_STS (0x7f) | |
480 | #define M6812_OP_LEAS (0x1b) | |
ffe1f3ee SC |
481 | #define M6812_OP_PSHX (0x34) |
482 | #define M6812_OP_PSHY (0x35) | |
908f682f SC |
483 | |
484 | /* Operand extraction. */ | |
485 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ | |
486 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ | |
487 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ | |
488 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ | |
489 | ||
490 | /* Identification of the sequence. */ | |
491 | enum m6811_seq_type | |
492 | { | |
493 | P_LAST = 0, | |
494 | P_SAVE_REG, /* Save a register on the stack. */ | |
495 | P_SET_FRAME, /* Setup the frame pointer. */ | |
496 | P_LOCAL_1, /* Allocate 1 byte for locals. */ | |
497 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ | |
498 | P_LOCAL_N /* Allocate N bytes for locals. */ | |
499 | }; | |
500 | ||
501 | struct insn_sequence { | |
502 | enum m6811_seq_type type; | |
503 | unsigned length; | |
504 | unsigned short code[MAX_CODES]; | |
505 | }; | |
506 | ||
507 | /* Sequence of instructions in the 68HC11 function prologue. */ | |
508 | static struct insn_sequence m6811_prologue[] = { | |
509 | /* Sequences to save a soft-register. */ | |
510 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, | |
511 | M6811_OP_PSHX } }, | |
512 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, | |
513 | M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
514 | ||
515 | /* Sequences to allocate local variables. */ | |
516 | { P_LOCAL_N, 7, { M6811_OP_TSX, | |
517 | M6811_OP_XGDX, | |
518 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
519 | M6811_OP_XGDX, | |
520 | M6811_OP_TXS } }, | |
521 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, | |
522 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
523 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, | |
524 | M6811_OP_PAGE2, M6811_OP_XGDX, | |
525 | M6811_OP_PAGE2, M6811_OP_TXS } }, | |
526 | { P_LOCAL_1, 1, { M6811_OP_DES } }, | |
527 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, | |
528 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, | |
529 | ||
530 | /* Initialize the frame pointer. */ | |
531 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, | |
532 | { P_LAST, 0, { 0 } } | |
533 | }; | |
534 | ||
535 | ||
536 | /* Sequence of instructions in the 68HC12 function prologue. */ | |
537 | static struct insn_sequence m6812_prologue[] = { | |
538 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, | |
539 | OP_IMM_HIGH, OP_IMM_LOW } }, | |
540 | { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } }, | |
541 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, | |
ffe1f3ee SC |
542 | { P_LOCAL_2, 1, { M6812_OP_PSHX } }, |
543 | { P_LOCAL_2, 1, { M6812_OP_PSHY } }, | |
908f682f SC |
544 | { P_LAST, 0 } |
545 | }; | |
546 | ||
547 | ||
548 | /* Analyze the sequence of instructions starting at the given address. | |
549 | Returns a pointer to the sequence when it is recognized and | |
550 | the optional value (constant/address) associated with it. | |
551 | Advance the pc for the next sequence. */ | |
552 | static struct insn_sequence * | |
553 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc, | |
554 | CORE_ADDR *val) | |
555 | { | |
556 | unsigned char buffer[MAX_CODES]; | |
557 | unsigned bufsize; | |
558 | unsigned j; | |
559 | CORE_ADDR cur_val; | |
560 | short v = 0; | |
561 | ||
562 | bufsize = 0; | |
563 | for (; seq->type != P_LAST; seq++) | |
564 | { | |
565 | cur_val = 0; | |
566 | for (j = 0; j < seq->length; j++) | |
567 | { | |
568 | if (bufsize < j + 1) | |
569 | { | |
570 | buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize, | |
571 | 1); | |
572 | bufsize++; | |
573 | } | |
574 | /* Continue while we match the opcode. */ | |
575 | if (seq->code[j] == buffer[j]) | |
576 | continue; | |
577 | ||
578 | if ((seq->code[j] & 0xf00) == 0) | |
579 | break; | |
580 | ||
581 | /* Extract a sequence parameter (address or constant). */ | |
582 | switch (seq->code[j]) | |
583 | { | |
584 | case OP_DIRECT: | |
585 | cur_val = (CORE_ADDR) buffer[j]; | |
586 | break; | |
587 | ||
588 | case OP_IMM_HIGH: | |
589 | cur_val = cur_val & 0x0ff; | |
590 | cur_val |= (buffer[j] << 8); | |
591 | break; | |
592 | ||
593 | case OP_IMM_LOW: | |
594 | cur_val &= 0x0ff00; | |
595 | cur_val |= buffer[j]; | |
596 | break; | |
597 | ||
598 | case OP_PBYTE: | |
599 | if ((buffer[j] & 0xE0) == 0x80) | |
600 | { | |
601 | v = buffer[j] & 0x1f; | |
602 | if (v & 0x10) | |
603 | v |= 0xfff0; | |
604 | } | |
605 | else if ((buffer[j] & 0xfe) == 0xf0) | |
606 | { | |
607 | v = read_memory_unsigned_integer (*pc + j + 1, 1); | |
608 | if (buffer[j] & 1) | |
609 | v |= 0xff00; | |
b4fa4770 | 610 | *pc = *pc + 1; |
908f682f SC |
611 | } |
612 | else if (buffer[j] == 0xf2) | |
613 | { | |
614 | v = read_memory_unsigned_integer (*pc + j + 1, 2); | |
b4fa4770 | 615 | *pc = *pc + 2; |
908f682f SC |
616 | } |
617 | cur_val = v; | |
618 | break; | |
619 | } | |
620 | } | |
621 | ||
622 | /* We have a full match. */ | |
623 | if (j == seq->length) | |
624 | { | |
625 | *val = cur_val; | |
626 | *pc = *pc + j; | |
627 | return seq; | |
628 | } | |
629 | } | |
630 | return 0; | |
631 | } | |
632 | ||
7df11f59 SC |
633 | /* Return the instruction that the function at the PC is using. */ |
634 | static enum insn_return_kind | |
635 | m68hc11_get_return_insn (CORE_ADDR pc) | |
636 | { | |
637 | struct minimal_symbol *sym; | |
638 | ||
639 | /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT | |
640 | function is stored by elfread.c in the high bit of the info field. | |
641 | Use this to decide which instruction the function uses to return. */ | |
642 | sym = lookup_minimal_symbol_by_pc (pc); | |
643 | if (sym == 0) | |
644 | return RETURN_RTS; | |
645 | ||
646 | if (MSYMBOL_IS_RTC (sym)) | |
647 | return RETURN_RTC; | |
648 | else if (MSYMBOL_IS_RTI (sym)) | |
649 | return RETURN_RTI; | |
650 | else | |
651 | return RETURN_RTS; | |
652 | } | |
653 | ||
654 | ||
78073dd8 AC |
655 | /* Analyze the function prologue to find some information |
656 | about the function: | |
657 | - the PC of the first line (for m68hc11_skip_prologue) | |
658 | - the offset of the previous frame saved address (from current frame) | |
659 | - the soft registers which are pushed. */ | |
660 | static void | |
82c230c2 SC |
661 | m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp, |
662 | CORE_ADDR *first_line, | |
663 | int *frame_offset, CORE_ADDR *pushed_regs) | |
78073dd8 | 664 | { |
82c230c2 | 665 | CORE_ADDR save_addr; |
78073dd8 | 666 | CORE_ADDR func_end; |
78073dd8 AC |
667 | int size; |
668 | int found_frame_point; | |
82c230c2 | 669 | int saved_reg; |
78073dd8 | 670 | CORE_ADDR first_pc; |
908f682f SC |
671 | int done = 0; |
672 | struct insn_sequence *seq_table; | |
78073dd8 AC |
673 | |
674 | first_pc = get_pc_function_start (pc); | |
675 | size = 0; | |
676 | ||
82c230c2 | 677 | m68hc11_initialize_register_info (); |
78073dd8 AC |
678 | if (first_pc == 0) |
679 | { | |
680 | *frame_offset = 0; | |
78073dd8 AC |
681 | *first_line = pc; |
682 | return; | |
683 | } | |
684 | ||
908f682f SC |
685 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
686 | ||
78073dd8 AC |
687 | /* The 68hc11 stack is as follows: |
688 | ||
689 | ||
690 | | | | |
691 | +-----------+ | |
692 | | | | |
693 | | args | | |
694 | | | | |
695 | +-----------+ | |
696 | | PC-return | | |
697 | +-----------+ | |
698 | | Old frame | | |
699 | +-----------+ | |
700 | | | | |
701 | | Locals | | |
702 | | | | |
703 | +-----------+ <--- current frame | |
704 | | | | |
705 | ||
706 | With most processors (like 68K) the previous frame can be computed | |
707 | easily because it is always at a fixed offset (see link/unlink). | |
708 | That is, locals are accessed with negative offsets, arguments are | |
709 | accessed with positive ones. Since 68hc11 only supports offsets | |
710 | in the range [0..255], the frame is defined at the bottom of | |
711 | locals (see picture). | |
712 | ||
713 | The purpose of the analysis made here is to find out the size | |
714 | of locals in this function. An alternative to this is to use | |
715 | DWARF2 info. This would be better but I don't know how to | |
716 | access dwarf2 debug from this function. | |
717 | ||
718 | Walk from the function entry point to the point where we save | |
719 | the frame. While walking instructions, compute the size of bytes | |
720 | which are pushed. This gives us the index to access the previous | |
721 | frame. | |
722 | ||
723 | We limit the search to 128 bytes so that the algorithm is bounded | |
724 | in case of random and wrong code. We also stop and abort if | |
725 | we find an instruction which is not supposed to appear in the | |
726 | prologue (as generated by gcc 2.95, 2.96). | |
727 | */ | |
728 | pc = first_pc; | |
729 | func_end = pc + 128; | |
78073dd8 | 730 | found_frame_point = 0; |
908f682f | 731 | *frame_offset = 0; |
b4fa4770 | 732 | save_addr = fp + STACK_CORRECTION; |
908f682f | 733 | while (!done && pc + 2 < func_end) |
78073dd8 | 734 | { |
908f682f SC |
735 | struct insn_sequence *seq; |
736 | CORE_ADDR val; | |
78073dd8 | 737 | |
908f682f SC |
738 | seq = m68hc11_analyze_instruction (seq_table, &pc, &val); |
739 | if (seq == 0) | |
740 | break; | |
78073dd8 | 741 | |
908f682f | 742 | if (seq->type == P_SAVE_REG) |
78073dd8 | 743 | { |
908f682f SC |
744 | if (found_frame_point) |
745 | { | |
746 | saved_reg = m68hc11_which_soft_register (val); | |
747 | if (saved_reg < 0) | |
748 | break; | |
78073dd8 | 749 | |
908f682f SC |
750 | save_addr -= 2; |
751 | if (pushed_regs) | |
752 | pushed_regs[saved_reg] = save_addr; | |
753 | } | |
754 | else | |
755 | { | |
756 | size += 2; | |
757 | } | |
78073dd8 | 758 | } |
908f682f | 759 | else if (seq->type == P_SET_FRAME) |
78073dd8 AC |
760 | { |
761 | found_frame_point = 1; | |
908f682f | 762 | *frame_offset = size; |
78073dd8 | 763 | } |
908f682f | 764 | else if (seq->type == P_LOCAL_1) |
78073dd8 | 765 | { |
6148eca7 SC |
766 | size += 1; |
767 | } | |
908f682f | 768 | else if (seq->type == P_LOCAL_2) |
78073dd8 | 769 | { |
908f682f | 770 | size += 2; |
78073dd8 | 771 | } |
908f682f | 772 | else if (seq->type == P_LOCAL_N) |
78073dd8 | 773 | { |
908f682f SC |
774 | /* Stack pointer is decremented for the allocation. */ |
775 | if (val & 0x8000) | |
776 | size -= (int) (val) | 0xffff0000; | |
777 | else | |
778 | size -= val; | |
78073dd8 AC |
779 | } |
780 | } | |
78073dd8 AC |
781 | *first_line = pc; |
782 | } | |
783 | ||
82c230c2 | 784 | static CORE_ADDR |
78073dd8 AC |
785 | m68hc11_skip_prologue (CORE_ADDR pc) |
786 | { | |
787 | CORE_ADDR func_addr, func_end; | |
788 | struct symtab_and_line sal; | |
789 | int frame_offset; | |
78073dd8 | 790 | |
82c230c2 SC |
791 | /* If we have line debugging information, then the end of the |
792 | prologue should be the first assembly instruction of the | |
78073dd8 AC |
793 | first source line. */ |
794 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
795 | { | |
796 | sal = find_pc_line (func_addr, 0); | |
797 | if (sal.end && sal.end < func_end) | |
798 | return sal.end; | |
799 | } | |
800 | ||
82c230c2 | 801 | m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0); |
78073dd8 AC |
802 | return pc; |
803 | } | |
804 | ||
805 | /* Given a GDB frame, determine the address of the calling function's frame. | |
806 | This will be used to create a new GDB frame struct, and then | |
807 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
808 | */ | |
809 | ||
82c230c2 | 810 | static CORE_ADDR |
78073dd8 AC |
811 | m68hc11_frame_chain (struct frame_info *frame) |
812 | { | |
82c230c2 | 813 | CORE_ADDR addr; |
78073dd8 | 814 | |
6148eca7 SC |
815 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
816 | return frame->frame; /* dummy frame same as caller's frame */ | |
817 | ||
82c230c2 SC |
818 | if (frame->extra_info->return_pc == 0 |
819 | || inside_entry_file (frame->extra_info->return_pc)) | |
820 | return (CORE_ADDR) 0; | |
78073dd8 AC |
821 | |
822 | if (frame->frame == 0) | |
823 | { | |
824 | return (CORE_ADDR) 0; | |
825 | } | |
826 | ||
5d1a66bd | 827 | addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2; |
78073dd8 | 828 | addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF; |
78073dd8 AC |
829 | return addr; |
830 | } | |
831 | ||
832 | /* Put here the code to store, into a struct frame_saved_regs, the | |
833 | addresses of the saved registers of frame described by FRAME_INFO. | |
834 | This includes special registers such as pc and fp saved in special | |
835 | ways in the stack frame. sp is even more special: the address we | |
836 | return for it IS the sp for the next frame. */ | |
82c230c2 SC |
837 | static void |
838 | m68hc11_frame_init_saved_regs (struct frame_info *fi) | |
78073dd8 AC |
839 | { |
840 | CORE_ADDR pc; | |
184651e3 | 841 | CORE_ADDR addr; |
7df11f59 | 842 | |
82c230c2 SC |
843 | if (fi->saved_regs == NULL) |
844 | frame_saved_regs_zalloc (fi); | |
845 | else | |
846 | memset (fi->saved_regs, 0, sizeof (fi->saved_regs)); | |
847 | ||
78073dd8 | 848 | pc = fi->pc; |
7df11f59 | 849 | fi->extra_info->return_kind = m68hc11_get_return_insn (pc); |
82c230c2 SC |
850 | m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size, |
851 | fi->saved_regs); | |
852 | ||
5d1a66bd | 853 | addr = fi->frame + fi->extra_info->size + STACK_CORRECTION; |
908f682f SC |
854 | if (soft_regs[SOFT_FP_REGNUM].name) |
855 | fi->saved_regs[SOFT_FP_REGNUM] = addr - 2; | |
7df11f59 SC |
856 | |
857 | /* Take into account how the function was called/returns. */ | |
858 | if (fi->extra_info->return_kind == RETURN_RTC) | |
859 | { | |
860 | fi->saved_regs[HARD_PAGE_REGNUM] = addr; | |
861 | addr++; | |
862 | } | |
863 | else if (fi->extra_info->return_kind == RETURN_RTI) | |
864 | { | |
865 | fi->saved_regs[HARD_CCR_REGNUM] = addr; | |
866 | fi->saved_regs[HARD_D_REGNUM] = addr + 1; | |
867 | fi->saved_regs[HARD_X_REGNUM] = addr + 3; | |
868 | fi->saved_regs[HARD_Y_REGNUM] = addr + 5; | |
869 | addr += 7; | |
870 | } | |
184651e3 | 871 | fi->saved_regs[HARD_SP_REGNUM] = addr; |
82c230c2 | 872 | fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM]; |
78073dd8 AC |
873 | } |
874 | ||
82c230c2 | 875 | static void |
78073dd8 AC |
876 | m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
877 | { | |
82c230c2 | 878 | CORE_ADDR addr; |
78073dd8 | 879 | |
82c230c2 SC |
880 | fi->extra_info = (struct frame_extra_info *) |
881 | frame_obstack_alloc (sizeof (struct frame_extra_info)); | |
882 | ||
883 | if (fi->next) | |
884 | fi->pc = FRAME_SAVED_PC (fi->next); | |
885 | ||
886 | m68hc11_frame_init_saved_regs (fi); | |
78073dd8 AC |
887 | |
888 | if (fromleaf) | |
889 | { | |
7df11f59 | 890 | fi->extra_info->return_kind = m68hc11_get_return_insn (fi->pc); |
82c230c2 | 891 | fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi); |
78073dd8 AC |
892 | } |
893 | else | |
894 | { | |
7df11f59 | 895 | addr = fi->saved_regs[HARD_PC_REGNUM]; |
82c230c2 | 896 | addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff; |
7df11f59 SC |
897 | |
898 | /* Take into account the 68HC12 specific call (PC + page). */ | |
899 | if (fi->extra_info->return_kind == RETURN_RTC | |
900 | && addr >= 0x08000 && addr < 0x0c000 | |
901 | && USE_PAGE_REGISTER) | |
902 | { | |
903 | CORE_ADDR page_addr = fi->saved_regs[HARD_PAGE_REGNUM]; | |
904 | ||
905 | unsigned page = read_memory_unsigned_integer (page_addr, 1); | |
906 | addr -= 0x08000; | |
907 | addr += ((page & 0x0ff) << 14); | |
908 | addr += 0x1000000; | |
909 | } | |
82c230c2 | 910 | fi->extra_info->return_pc = addr; |
78073dd8 AC |
911 | } |
912 | } | |
913 | ||
914 | /* Same as 'info reg' but prints the registers in a different way. */ | |
915 | static void | |
916 | show_regs (char *args, int from_tty) | |
917 | { | |
82c230c2 | 918 | int ccr = read_register (HARD_CCR_REGNUM); |
78073dd8 | 919 | int i; |
82c230c2 SC |
920 | int nr; |
921 | ||
78073dd8 | 922 | printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n", |
82c230c2 SC |
923 | (int) read_register (HARD_PC_REGNUM), |
924 | (int) read_register (HARD_SP_REGNUM), | |
925 | (int) read_register (SOFT_FP_REGNUM), | |
78073dd8 AC |
926 | ccr, |
927 | ccr & M6811_S_BIT ? 'S' : '-', | |
928 | ccr & M6811_X_BIT ? 'X' : '-', | |
929 | ccr & M6811_H_BIT ? 'H' : '-', | |
930 | ccr & M6811_I_BIT ? 'I' : '-', | |
931 | ccr & M6811_N_BIT ? 'N' : '-', | |
932 | ccr & M6811_Z_BIT ? 'Z' : '-', | |
933 | ccr & M6811_V_BIT ? 'V' : '-', | |
934 | ccr & M6811_C_BIT ? 'C' : '-'); | |
935 | ||
7df11f59 | 936 | printf_filtered ("D=%04x IX=%04x IY=%04x", |
82c230c2 SC |
937 | (int) read_register (HARD_D_REGNUM), |
938 | (int) read_register (HARD_X_REGNUM), | |
939 | (int) read_register (HARD_Y_REGNUM)); | |
940 | ||
7df11f59 SC |
941 | if (USE_PAGE_REGISTER) |
942 | { | |
943 | printf_filtered (" Page=%02x", | |
944 | (int) read_register (HARD_PAGE_REGNUM)); | |
945 | } | |
946 | printf_filtered ("\n"); | |
947 | ||
82c230c2 SC |
948 | nr = 0; |
949 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) | |
78073dd8 | 950 | { |
82c230c2 SC |
951 | /* Skip registers which are not defined in the symbol table. */ |
952 | if (soft_regs[i].name == 0) | |
953 | continue; | |
954 | ||
955 | printf_filtered ("D%d=%04x", | |
956 | i - SOFT_D1_REGNUM + 1, | |
957 | (int) read_register (i)); | |
958 | nr++; | |
959 | if ((nr % 8) == 7) | |
78073dd8 AC |
960 | printf_filtered ("\n"); |
961 | else | |
962 | printf_filtered (" "); | |
963 | } | |
82c230c2 SC |
964 | if (nr && (nr % 8) != 7) |
965 | printf_filtered ("\n"); | |
78073dd8 AC |
966 | } |
967 | ||
22df305e SC |
968 | static CORE_ADDR |
969 | m68hc11_stack_align (CORE_ADDR addr) | |
970 | { | |
971 | return ((addr + 1) & -2); | |
972 | } | |
973 | ||
82c230c2 | 974 | static CORE_ADDR |
78073dd8 | 975 | m68hc11_push_arguments (int nargs, |
ea7c478f | 976 | struct value **args, |
78073dd8 AC |
977 | CORE_ADDR sp, |
978 | int struct_return, | |
979 | CORE_ADDR struct_addr) | |
980 | { | |
82c230c2 SC |
981 | int stack_alloc; |
982 | int argnum; | |
983 | int first_stack_argnum; | |
984 | int stack_offset; | |
985 | struct type *type; | |
986 | char *val; | |
987 | int len; | |
988 | ||
989 | stack_alloc = 0; | |
990 | first_stack_argnum = 0; | |
991 | if (struct_return) | |
992 | { | |
184651e3 SC |
993 | /* The struct is allocated on the stack and gdb used the stack |
994 | pointer for the address of that struct. We must apply the | |
995 | stack offset on the address. */ | |
5d1a66bd | 996 | write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION); |
82c230c2 SC |
997 | } |
998 | else if (nargs > 0) | |
999 | { | |
1000 | type = VALUE_TYPE (args[0]); | |
1001 | len = TYPE_LENGTH (type); | |
1002 | ||
1003 | /* First argument is passed in D and X registers. */ | |
1004 | if (len <= 4) | |
1005 | { | |
1006 | LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len); | |
1007 | first_stack_argnum = 1; | |
1008 | write_register (HARD_D_REGNUM, v); | |
1009 | if (len > 2) | |
1010 | { | |
1011 | v >>= 16; | |
1012 | write_register (HARD_X_REGNUM, v); | |
1013 | } | |
1014 | } | |
1015 | } | |
1016 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) | |
1017 | { | |
1018 | type = VALUE_TYPE (args[argnum]); | |
22df305e | 1019 | stack_alloc += (TYPE_LENGTH (type) + 1) & -2; |
82c230c2 SC |
1020 | } |
1021 | sp -= stack_alloc; | |
1022 | ||
5d1a66bd | 1023 | stack_offset = STACK_CORRECTION; |
82c230c2 SC |
1024 | for (argnum = first_stack_argnum; argnum < nargs; argnum++) |
1025 | { | |
1026 | type = VALUE_TYPE (args[argnum]); | |
1027 | len = TYPE_LENGTH (type); | |
1028 | ||
1029 | val = (char*) VALUE_CONTENTS (args[argnum]); | |
1030 | write_memory (sp + stack_offset, val, len); | |
1031 | stack_offset += len; | |
22df305e SC |
1032 | if (len & 1) |
1033 | { | |
1034 | static char zero = 0; | |
1035 | ||
1036 | write_memory (sp + stack_offset, &zero, 1); | |
1037 | stack_offset++; | |
1038 | } | |
82c230c2 SC |
1039 | } |
1040 | return sp; | |
78073dd8 AC |
1041 | } |
1042 | ||
1043 | ||
82c230c2 SC |
1044 | /* Return a location where we can set a breakpoint that will be hit |
1045 | when an inferior function call returns. */ | |
78073dd8 | 1046 | CORE_ADDR |
fba45db2 | 1047 | m68hc11_call_dummy_address (void) |
78073dd8 | 1048 | { |
22df305e | 1049 | return entry_point_address (); |
78073dd8 AC |
1050 | } |
1051 | ||
82c230c2 SC |
1052 | static struct type * |
1053 | m68hc11_register_virtual_type (int reg_nr) | |
1054 | { | |
5706502a SC |
1055 | switch (reg_nr) |
1056 | { | |
1057 | case HARD_PAGE_REGNUM: | |
1058 | case HARD_A_REGNUM: | |
1059 | case HARD_B_REGNUM: | |
1060 | case HARD_CCR_REGNUM: | |
1061 | return builtin_type_uint8; | |
1062 | ||
548bcbec SC |
1063 | case M68HC12_HARD_PC_REGNUM: |
1064 | return builtin_type_uint32; | |
1065 | ||
5706502a SC |
1066 | default: |
1067 | return builtin_type_uint16; | |
1068 | } | |
82c230c2 SC |
1069 | } |
1070 | ||
1071 | static void | |
1072 | m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1073 | { | |
184651e3 SC |
1074 | /* The struct address computed by gdb is on the stack. |
1075 | It uses the stack pointer so we must apply the stack | |
1076 | correction offset. */ | |
5d1a66bd | 1077 | write_register (HARD_D_REGNUM, addr + STACK_CORRECTION); |
82c230c2 SC |
1078 | } |
1079 | ||
1080 | static void | |
1081 | m68hc11_store_return_value (struct type *type, char *valbuf) | |
1082 | { | |
22df305e SC |
1083 | int len; |
1084 | ||
1085 | len = TYPE_LENGTH (type); | |
1086 | ||
1087 | /* First argument is passed in D and X registers. */ | |
1088 | if (len <= 4) | |
1089 | { | |
1090 | LONGEST v = extract_unsigned_integer (valbuf, len); | |
1091 | ||
1092 | write_register (HARD_D_REGNUM, v); | |
1093 | if (len > 2) | |
1094 | { | |
1095 | v >>= 16; | |
1096 | write_register (HARD_X_REGNUM, v); | |
1097 | } | |
1098 | } | |
1099 | else | |
1100 | error ("return of value > 4 is not supported."); | |
82c230c2 SC |
1101 | } |
1102 | ||
1103 | ||
1104 | /* Given a return value in `regbuf' with a type `type', | |
78073dd8 AC |
1105 | extract and copy its value into `valbuf'. */ |
1106 | ||
82c230c2 SC |
1107 | static void |
1108 | m68hc11_extract_return_value (struct type *type, | |
78073dd8 AC |
1109 | char *regbuf, |
1110 | char *valbuf) | |
1111 | { | |
82c230c2 SC |
1112 | int len = TYPE_LENGTH (type); |
1113 | ||
22df305e | 1114 | switch (len) |
82c230c2 | 1115 | { |
22df305e SC |
1116 | case 1: |
1117 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len); | |
1118 | break; | |
1119 | ||
1120 | case 2: | |
1121 | memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len); | |
1122 | break; | |
1123 | ||
1124 | case 3: | |
1125 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1); | |
1126 | memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2); | |
1127 | break; | |
1128 | ||
1129 | case 4: | |
1130 | memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2); | |
1131 | memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2); | |
1132 | break; | |
1133 | ||
1134 | default: | |
82c230c2 SC |
1135 | error ("bad size for return value"); |
1136 | } | |
1137 | } | |
1138 | ||
1139 | /* Should call_function allocate stack space for a struct return? */ | |
1140 | static int | |
1141 | m68hc11_use_struct_convention (int gcc_p, struct type *type) | |
1142 | { | |
22df305e SC |
1143 | return (TYPE_CODE (type) == TYPE_CODE_STRUCT |
1144 | || TYPE_CODE (type) == TYPE_CODE_UNION | |
1145 | || TYPE_LENGTH (type) > 4); | |
82c230c2 SC |
1146 | } |
1147 | ||
1148 | static int | |
1149 | m68hc11_return_value_on_stack (struct type *type) | |
1150 | { | |
22df305e | 1151 | return TYPE_LENGTH (type) > 4; |
82c230c2 SC |
1152 | } |
1153 | ||
1154 | /* Extract from an array REGBUF containing the (raw) register state | |
1155 | the address in which a function should return its structure value, | |
1156 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1157 | static CORE_ADDR | |
1158 | m68hc11_extract_struct_value_address (char *regbuf) | |
1159 | { | |
1160 | return extract_address (®buf[HARD_D_REGNUM * 2], | |
1161 | REGISTER_RAW_SIZE (HARD_D_REGNUM)); | |
1162 | } | |
1163 | ||
1164 | /* Function: push_return_address (pc) | |
1165 | Set up the return address for the inferior function call. | |
1166 | Needed for targets where we don't actually execute a JSR/BSR instruction */ | |
1167 | ||
1168 | static CORE_ADDR | |
1169 | m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
1170 | { | |
1171 | char valbuf[2]; | |
1172 | ||
22df305e | 1173 | pc = CALL_DUMMY_ADDRESS (); |
82c230c2 SC |
1174 | sp -= 2; |
1175 | store_unsigned_integer (valbuf, 2, pc); | |
5d1a66bd | 1176 | write_memory (sp + STACK_CORRECTION, valbuf, 2); |
82c230c2 SC |
1177 | return sp; |
1178 | } | |
1179 | ||
1180 | /* Index within `registers' of the first byte of the space for | |
1181 | register N. */ | |
1182 | static int | |
1183 | m68hc11_register_byte (int reg_nr) | |
1184 | { | |
1185 | return (reg_nr * M68HC11_REG_SIZE); | |
1186 | } | |
1187 | ||
1188 | static int | |
1189 | m68hc11_register_raw_size (int reg_nr) | |
1190 | { | |
5706502a SC |
1191 | switch (reg_nr) |
1192 | { | |
1193 | case HARD_PAGE_REGNUM: | |
1194 | case HARD_A_REGNUM: | |
1195 | case HARD_B_REGNUM: | |
1196 | case HARD_CCR_REGNUM: | |
1197 | return 1; | |
1198 | ||
548bcbec SC |
1199 | case M68HC12_HARD_PC_REGNUM: |
1200 | return 4; | |
1201 | ||
5706502a SC |
1202 | default: |
1203 | return M68HC11_REG_SIZE; | |
1204 | } | |
82c230c2 SC |
1205 | } |
1206 | ||
7df11f59 SC |
1207 | /* Test whether the ELF symbol corresponds to a function using rtc or |
1208 | rti to return. */ | |
1209 | ||
1210 | static void | |
1211 | m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) | |
1212 | { | |
1213 | unsigned char flags; | |
1214 | ||
1215 | flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other; | |
1216 | if (flags & STO_M68HC12_FAR) | |
1217 | MSYMBOL_SET_RTC (msym); | |
1218 | if (flags & STO_M68HC12_INTERRUPT) | |
1219 | MSYMBOL_SET_RTI (msym); | |
1220 | } | |
1221 | ||
ea3881d9 SC |
1222 | static int |
1223 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) | |
1224 | { | |
1225 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) | |
1226 | return print_insn_m68hc11 (memaddr, info); | |
1227 | else | |
1228 | return print_insn_m68hc12 (memaddr, info); | |
1229 | } | |
1230 | ||
82c230c2 SC |
1231 | static struct gdbarch * |
1232 | m68hc11_gdbarch_init (struct gdbarch_info info, | |
1233 | struct gdbarch_list *arches) | |
1234 | { | |
1235 | static LONGEST m68hc11_call_dummy_words[] = | |
1236 | {0}; | |
1237 | struct gdbarch *gdbarch; | |
1238 | struct gdbarch_tdep *tdep; | |
81967506 | 1239 | int elf_flags; |
82c230c2 SC |
1240 | |
1241 | soft_reg_initialized = 0; | |
81967506 SC |
1242 | |
1243 | /* Extract the elf_flags if available. */ | |
1244 | if (info.abfd != NULL | |
1245 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
1246 | elf_flags = elf_elfheader (info.abfd)->e_flags; | |
1247 | else | |
1248 | elf_flags = 0; | |
1249 | ||
82c230c2 SC |
1250 | /* try to find a pre-existing architecture */ |
1251 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1252 | arches != NULL; | |
1253 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1254 | { | |
81967506 SC |
1255 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) |
1256 | continue; | |
1257 | ||
82c230c2 SC |
1258 | return arches->gdbarch; |
1259 | } | |
1260 | ||
1261 | /* Need a new architecture. Fill in a target specific vector. */ | |
1262 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
1263 | gdbarch = gdbarch_alloc (&info, tdep); | |
81967506 | 1264 | tdep->elf_flags = elf_flags; |
ed99b3d0 | 1265 | |
5d1a66bd SC |
1266 | switch (info.bfd_arch_info->arch) |
1267 | { | |
1268 | case bfd_arch_m68hc11: | |
1269 | tdep->stack_correction = 1; | |
7df11f59 | 1270 | tdep->use_page_register = 0; |
908f682f | 1271 | tdep->prologue = m6811_prologue; |
548bcbec SC |
1272 | set_gdbarch_addr_bit (gdbarch, 16); |
1273 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); | |
1274 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); | |
1275 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); | |
5d1a66bd | 1276 | break; |
82c230c2 | 1277 | |
5d1a66bd SC |
1278 | case bfd_arch_m68hc12: |
1279 | tdep->stack_correction = 0; | |
7df11f59 | 1280 | tdep->use_page_register = elf_flags & E_M68HC12_BANKS; |
908f682f | 1281 | tdep->prologue = m6812_prologue; |
548bcbec SC |
1282 | set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16); |
1283 | set_gdbarch_num_pseudo_regs (gdbarch, | |
1284 | elf_flags & E_M68HC12_BANKS | |
1285 | ? M68HC12_NUM_PSEUDO_REGS | |
1286 | : M68HC11_NUM_PSEUDO_REGS); | |
1287 | set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS | |
1288 | ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM); | |
1289 | set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS | |
1290 | ? M68HC12_NUM_REGS : M68HC11_NUM_REGS); | |
5d1a66bd SC |
1291 | break; |
1292 | ||
1293 | default: | |
1294 | break; | |
1295 | } | |
7d32ba20 SC |
1296 | |
1297 | /* Initially set everything according to the ABI. | |
1298 | Use 16-bit integers since it will be the case for most | |
1299 | programs. The size of these types should normally be set | |
1300 | according to the dwarf2 debug information. */ | |
82c230c2 | 1301 | set_gdbarch_short_bit (gdbarch, 16); |
81967506 | 1302 | set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16); |
82c230c2 | 1303 | set_gdbarch_float_bit (gdbarch, 32); |
81967506 SC |
1304 | set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); |
1305 | set_gdbarch_long_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); | |
82c230c2 SC |
1306 | set_gdbarch_long_bit (gdbarch, 32); |
1307 | set_gdbarch_ptr_bit (gdbarch, 16); | |
1308 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1309 | ||
1310 | /* Set register info. */ | |
1311 | set_gdbarch_fp0_regnum (gdbarch, -1); | |
1312 | set_gdbarch_max_register_raw_size (gdbarch, 2); | |
1313 | set_gdbarch_max_register_virtual_size (gdbarch, 2); | |
1314 | set_gdbarch_register_raw_size (gdbarch, m68hc11_register_raw_size); | |
1315 | set_gdbarch_register_virtual_size (gdbarch, m68hc11_register_raw_size); | |
1316 | set_gdbarch_register_byte (gdbarch, m68hc11_register_byte); | |
1317 | set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs); | |
1318 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
1319 | ||
1320 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); | |
1321 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
1322 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
82c230c2 SC |
1323 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); |
1324 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
1325 | ||
82c230c2 SC |
1326 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); |
1327 | set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM); | |
82c230c2 SC |
1328 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); |
1329 | set_gdbarch_register_size (gdbarch, 2); | |
1330 | set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2); | |
1331 | set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type); | |
46ce284d AC |
1332 | set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read); |
1333 | set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write); | |
82c230c2 SC |
1334 | |
1335 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
1336 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
1337 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
1338 | set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address); | |
1339 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/ | |
1340 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
1341 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
1342 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); | |
1343 | set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words); | |
1344 | set_gdbarch_sizeof_call_dummy_words (gdbarch, | |
1345 | sizeof (m68hc11_call_dummy_words)); | |
1346 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
1347 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
1348 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1349 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
26e9b323 | 1350 | set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value); |
82c230c2 SC |
1351 | set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments); |
1352 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
1353 | set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address); | |
1354 | set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack); | |
1355 | ||
1356 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
ebba8386 | 1357 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1358 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address); |
82c230c2 SC |
1359 | set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not); |
1360 | ||
1361 | ||
1362 | set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain); | |
1363 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
1364 | set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc); | |
1365 | set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address); | |
1366 | set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address); | |
1367 | set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call); | |
1368 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
1369 | ||
1370 | set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid); | |
1371 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
1372 | ||
1373 | set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return); | |
ebba8386 | 1374 | set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value); |
26e9b323 | 1375 | set_gdbarch_deprecated_extract_struct_value_address |
82c230c2 SC |
1376 | (gdbarch, m68hc11_extract_struct_value_address); |
1377 | set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention); | |
1378 | set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info); | |
1379 | set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame); | |
1380 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); | |
1381 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1382 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
1383 | set_gdbarch_function_start_offset (gdbarch, 0); | |
1384 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); | |
22df305e | 1385 | set_gdbarch_stack_align (gdbarch, m68hc11_stack_align); |
70ed8774 | 1386 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11); |
82c230c2 | 1387 | |
7df11f59 SC |
1388 | /* Minsymbol frobbing. */ |
1389 | set_gdbarch_elf_make_msymbol_special (gdbarch, | |
1390 | m68hc11_elf_make_msymbol_special); | |
1391 | ||
82c230c2 | 1392 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
82c230c2 SC |
1393 | |
1394 | return gdbarch; | |
78073dd8 AC |
1395 | } |
1396 | ||
1397 | void | |
fba45db2 | 1398 | _initialize_m68hc11_tdep (void) |
78073dd8 | 1399 | { |
82c230c2 | 1400 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
ea3881d9 | 1401 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
78073dd8 AC |
1402 | |
1403 | add_com ("regs", class_vars, show_regs, "Print all registers"); | |
1404 | } | |
1405 |