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c906108c SS |
1 | // -*- C -*- |
2 | // | |
3 | // NEC specific instructions | |
4 | // | |
5 | ||
6 | // Integer Instructions | |
7 | // -------------------- | |
8 | // | |
9 | // MulAcc is the Multiply Accumulator. | |
10 | // This register is mapped on the the HI and LO registers. | |
11 | // Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register. | |
12 | // Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register. | |
13 | ||
14 | ||
15 | :function:::unsigned64:MulAcc: | |
16 | *vr4100: | |
17 | { | |
18 | unsigned64 result = U8_4 (HI, LO); | |
19 | return result; | |
20 | } | |
21 | ||
22 | :function:::void:SET_MulAcc:unsigned64 value | |
23 | *vr4100: | |
24 | { | |
25 | /* 64 bit specific */ | |
26 | *AL4_8 (&HI) = VH4_8 (value); | |
27 | *AL4_8 (&LO) = VL4_8 (value); | |
28 | } | |
29 | ||
30 | :function:::signed64:SignedMultiply:signed32 l, signed32 r | |
31 | *vr4100: | |
32 | { | |
33 | signed64 result = (signed64) l * (signed64) r; | |
34 | return result; | |
35 | } | |
36 | ||
37 | :function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r | |
38 | *vr4100: | |
39 | { | |
40 | unsigned64 result = (unsigned64) l * (unsigned64) r; | |
41 | return result; | |
42 | } | |
43 | ||
44 | :function:::unsigned64:Low32Bits:unsigned64 value | |
45 | *vr4100: | |
46 | { | |
47 | unsigned64 result = (signed64) (signed32) VL4_8 (value); | |
48 | return result; | |
49 | } | |
50 | ||
51 | :function:::unsigned64:High32Bits:unsigned64 value | |
52 | *vr4100: | |
53 | { | |
54 | unsigned64 result = (signed64) (signed32) VH4_8 (value); | |
55 | return result; | |
56 | } | |
57 | ||
58 | ||
59 | ||
60 | // Multiply, Accumulate | |
61 | 000000,5.RS,5.RT,00000,00000,101000::64::MAC | |
62 | "mac r<RS>, r<RT>" | |
63 | *vr4100: | |
64 | { | |
65 | SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT])); | |
66 | } | |
67 | ||
68 | ||
69 | // D-Multiply, Accumulate | |
70 | 000000,5.RS,5.RT,00000,00000,101001::64::DMAC | |
71 | "dmac r<RS>, r<RT>" | |
72 | *vr4100: | |
73 | { | |
74 | LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]); | |
75 | } | |
76 | ||
77 | ||
78 |