[binutils.git] / opcodes / ChangeLog

2020-01-27  Tamar Christina  <[email protected]>

	PR 25403
	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	* aarch64-asm-2.c: Regenerate
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

2020-01-21  Jan Beulich  <[email protected]>

	* i386-opc.tbl (sysret): Drop DefaultSize.
	* i386-tbl.h: Re-generate.

2020-01-21  Jan Beulich  <[email protected]>

	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	Dword.
	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	* i386-tbl.h: Re-generate.

2020-01-20  Nick Clifton  <[email protected]>

	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	* po/uk.po: Updated Ukranian translation.

2020-01-20  Alan Modra  <[email protected]>

	* hppa-dis.c (fput_const): Remove useless cast.

2020-01-20  Alan Modra  <[email protected]>

	* arm-dis.c (print_insn_arm): Wrap 'T' value.

2020-01-18  Nick Clifton  <[email protected]>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2020-01-18  Nick Clifton  <[email protected]>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <[email protected]>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <[email protected]>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <[email protected]>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <[email protected]>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <[email protected]>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <[email protected]>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <[email protected]>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <[email protected]>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <[email protected]>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <[email protected]>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <[email protected]>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <[email protected]>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <[email protected]>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <[email protected]>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <[email protected]>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <[email protected]>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <[email protected]>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <[email protected]>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <[email protected]>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <[email protected]>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <[email protected]>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <[email protected]>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <[email protected]>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <[email protected]>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <[email protected]>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <[email protected]>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <[email protected]>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <[email protected]>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <[email protected]>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <[email protected]>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <[email protected]>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <[email protected]>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <[email protected]>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <[email protected]>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <[email protected]>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <[email protected]>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <[email protected]>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <[email protected]>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
7568c93b TC	1	2020-01-27 Tamar Christina <[email protected]>
	2
	3	PR 25403
	4	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	5	* aarch64-asm-2.c: Regenerate
	6	* aarch64-dis-2.c: Likewise.
	7	* aarch64-opc-2.c: Likewise.
	8
c006a730 JB	9	2020-01-21 Jan Beulich <[email protected]>
	10
	11	* i386-opc.tbl (sysret): Drop DefaultSize.
	12	* i386-tbl.h: Re-generate.
	13
c906a69a JB	14	2020-01-21 Jan Beulich <[email protected]>
	15
	16	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	17	Dword.
	18	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	19	* i386-tbl.h: Re-generate.
	20
26916852 NC	21	2020-01-20 Nick Clifton <[email protected]>
	22
	23	* po/de.po: Updated German translation.
	24	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	25	* po/uk.po: Updated Ukranian translation.
	26
4d6cbb64 AM	27	2020-01-20 Alan Modra <[email protected]>
	28
	29	* hppa-dis.c (fput_const): Remove useless cast.
	30
2bddb71a AM	31	2020-01-20 Alan Modra <[email protected]>
	32
	33	* arm-dis.c (print_insn_arm): Wrap 'T' value.
	34
1b1bb2c6 NC	35	2020-01-18 Nick Clifton <[email protected]>
	36
	37	* configure: Regenerate.
	38	* po/opcodes.pot: Regenerate.
	39
ae774686 NC	40	2020-01-18 Nick Clifton <[email protected]>
	41
	42	Binutils 2.34 branch created.
	43
07f1f3aa CB	44	2020-01-17 Christian Biesinger <[email protected]>
	45
	46	* opintl.h: Fix spelling error (seperate).
	47
42e04b36 L	48	2020-01-17 H.J. Lu <[email protected]>
	49
	50	* i386-opc.tbl: Add {vex} pseudo prefix.
	51	* i386-tbl.h: Regenerated.
	52
2da2eaf4 AV	53	2020-01-16 Andre Vieira <[email protected]>
	54
	55	PR 25376
	56	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	57	(neon_opcodes): Likewise.
	58	(select_arm_features): Make sure we enable MVE bits when selecting
	59	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	60	any architecture.
	61
d0849eed JB	62	2020-01-16 Jan Beulich <[email protected]>
	63
	64	* i386-opc.tbl: Drop stale comment from XOP section.
	65
9cf70a44 JB	66	2020-01-16 Jan Beulich <[email protected]>
	67
	68	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	69	(extractps): Add VexWIG to SSE2AVX forms.
	70	* i386-tbl.h: Re-generate.
	71
4814632e JB	72	2020-01-16 Jan Beulich <[email protected]>
	73
	74	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	75	Size64 from and use VexW1 on SSE2AVX forms.
	76	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	77	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	78	* i386-tbl.h: Re-generate.
	79
aad09917 AM	80	2020-01-15 Alan Modra <[email protected]>
	81
	82	* tic4x-dis.c (tic4x_version): Make unsigned long.
	83	(optab, optab_special, registernames): New file scope vars.
	84	(tic4x_print_register): Set up registernames rather than
	85	malloc'd registertable.
	86	(tic4x_disassemble): Delete optable and optable_special. Use
	87	optab and optab_special instead. Throw away old optab,
	88	optab_special and registernames when info->mach changes.
	89
7a6bf3be SB	90	2020-01-14 Sergey Belyashov <[email protected]>
	91
	92	PR 25377
	93	* z80-dis.c (suffix): Use .db instruction to generate double
	94	prefix.
	95
ca1eaac0 AM	96	2020-01-14 Alan Modra <[email protected]>
	97
	98	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	99	values to unsigned before shifting.
	100
1d67fe3b TT	101	2020-01-13 Thomas Troeger <[email protected]>
	102
	103	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	104	flow instructions.
	105	(print_insn_thumb16, print_insn_thumb32): Likewise.
	106	(print_insn): Initialize the insn info.
	107	* i386-dis.c (print_insn): Initialize the insn info fields, and
	108	detect jumps.
	109
5e4f7e05 CZ	110	2012-01-13 Claudiu Zissulescu <[email protected]>
	111
	112	* arc-opc.c (C_NE): Make it required.
	113
b9fe6b8a CZ	114	2012-01-13 Claudiu Zissulescu <[email protected]>
	115
	116	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	117	reserved register name.
	118
90dee485 AM	119	2020-01-13 Alan Modra <[email protected]>
	120
	121	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	122	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	123
febda64f AM	124	2020-01-13 Alan Modra <[email protected]>
	125
	126	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	127	result of wasm_read_leb128 in a uint64_t and check that bits
	128	are not lost when copying to other locals. Use uint32_t for
	129	most locals. Use PRId64 when printing int64_t.
	130
df08b588 AM	131	2020-01-13 Alan Modra <[email protected]>
	132
	133	* score-dis.c: Formatting.
	134	* score7-dis.c: Formatting.
	135
b2c759ce AM	136	2020-01-13 Alan Modra <[email protected]>
	137
	138	* score-dis.c (print_insn_score48): Use unsigned variables for
	139	unsigned values. Don't left shift negative values.
	140	(print_insn_score32): Likewise.
	141	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	142
5496abe1 AM	143	2020-01-13 Alan Modra <[email protected]>
	144
	145	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	146
202e762b AM	147	2020-01-13 Alan Modra <[email protected]>
	148
	149	* fr30-ibld.c: Regenerate.
	150
7ef412cf AM	151	2020-01-13 Alan Modra <[email protected]>
	152
	153	* xgate-dis.c (print_insn): Don't left shift signed value.
	154	(ripBits): Formatting, use 1u.
	155
7f578b95 AM	156	2020-01-10 Alan Modra <[email protected]>
	157
	158	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	159	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	160
441af85b AM	161	2020-01-10 Alan Modra <[email protected]>
	162
	163	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	164	and XRREG value earlier to avoid a shift with negative exponent.
	165	* m10200-dis.c (disassemble): Similarly.
	166
bce58db4 NC	167	2020-01-09 Nick Clifton <[email protected]>
	168
	169	PR 25224
	170	* z80-dis.c (ld_ii_ii): Use correct cast.
	171
40c75bc8 SB	172	2020-01-03 Sergey Belyashov <[email protected]>
	173
	174	PR 25224
	175	* z80-dis.c (ld_ii_ii): Use character constant when checking
	176	opcode byte value.
	177
d835a58b JB	178	2020-01-09 Jan Beulich <[email protected]>
	179
	180	* i386-dis.c (SEP_Fixup): New.
	181	(SEP): Define.
	182	(dis386_twobyte): Use it for sysenter/sysexit.
	183	(enum x86_64_isa): Change amd64 enumerator to value 1.
	184	(OP_J): Compare isa64 against intel64 instead of amd64.
	185	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	186	forms.
	187	* i386-tbl.h: Re-generate.
	188
030a2e78 AM	189	2020-01-08 Alan Modra <[email protected]>
	190
	191	* z8k-dis.c: Include libiberty.h
	192	(instr_data_s): Make max_fetched unsigned.
	193	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	194	Don't exceed byte_info bounds.
	195	(output_instr): Make num_bytes unsigned.
	196	(unpack_instr): Likewise for nibl_count and loop.
	197	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	198	idx unsigned.
	199	* z8k-opc.h: Regenerate.
	200
bb82aefe SV	201	2020-01-07 Shahab Vahedi <[email protected]>
	202
	203	* arc-tbl.h (llock): Use 'LLOCK' as class.
	204	(llockd): Likewise.
	205	(scond): Use 'SCOND' as class.
	206	(scondd): Likewise.
	207	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	208	(scondd): Likewise.
	209
cc6aa1a6 AM	210	2020-01-06 Alan Modra <[email protected]>
	211
	212	* m32c-ibld.c: Regenerate.
	213
660e62b1 AM	214	2020-01-06 Alan Modra <[email protected]>
	215
	216	PR 25344
	217	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	218	Peek at next byte to prevent recursion on repeated prefix bytes.
	219	Ensure uninitialised "mybuf" is not accessed.
	220	(print_insn_z80): Don't zero n_fetch and n_used here,..
	221	(print_insn_z80_buf): ..do it here instead.
	222
c9ae58fe AM	223	2020-01-04 Alan Modra <[email protected]>
	224
	225	* m32r-ibld.c: Regenerate.
	226
5f57d4ec AM	227	2020-01-04 Alan Modra <[email protected]>
	228
	229	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	230
2c5c1196 AM	231	2020-01-04 Alan Modra <[email protected]>
	232
	233	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	234
2e98c6c5 AM	235	2020-01-04 Alan Modra <[email protected]>
	236
	237	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	238
567dfba2 JB	239	2020-01-03 Jan Beulich <[email protected]>
567dfba2 JB	240
5437a02a JB	241	* aarch64-tbl.h (aarch64_opcode_table): Use
	242	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	243
	244	2020-01-03 Jan Beulich <[email protected]>
	245
	246	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	247	forms of SUDOT and USDOT.
567dfba2 JB	248
8c45011a JB	249	2020-01-03 Jan Beulich <[email protected]>
8c45011a JB	250
5437a02a	251	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	252	uzip{1,2}.
	253	* opcodes/aarch64-dis-2.c: Re-generate.
	254
f4950f76 JB	255	2020-01-03 Jan Beulich <[email protected]>
f4950f76 JB	256
5437a02a	257	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	258	FMMLA encoding.
	259	* opcodes/aarch64-dis-2.c: Re-generate.
	260
6655dba2 SB	261	2020-01-02 Sergey Belyashov <[email protected]>
	262
	263	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	264
b14ce8bf AM	265	2020-01-01 Alan Modra <[email protected]>
	266
	267	Update year range in copyright notice of all files.
	268
0b114740	269	For older changes see ChangeLog-2019
3499769a	270	\f
0b114740	271	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	272
	273	Copying and distribution of this file, with or without modification,
	274	are permitted in any medium without royalty provided the copyright
	275	notice and this notice are preserved.
	276
	277	Local Variables:
	278	mode: change-log
	279	left-margin: 8
	280	fill-column: 74
	281	version-control: never
	282	End: