]>
Commit | Line | Data |
---|---|---|
c906108c SS |
1 | /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator. |
2 | Copyright (C) 1994 Advanced RISC Machines Ltd. | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
17 | ||
18 | #include <stdio.h> | |
19 | #include <stdlib.h> | |
20 | ||
21 | #define FALSE 0 | |
22 | #define TRUE 1 | |
23 | #define LOW 0 | |
24 | #define HIGH 1 | |
25 | #define LOWHIGH 1 | |
26 | #define HIGHLOW 2 | |
27 | ||
28 | #ifndef __STDC__ | |
dfcd3bfb | 29 | typedef char *VoidStar; |
c906108c SS |
30 | #endif |
31 | ||
dfcd3bfb JM |
32 | typedef unsigned long ARMword; /* must be 32 bits wide */ |
33 | typedef struct ARMul_State ARMul_State; | |
34 | ||
35 | typedef unsigned ARMul_CPInits (ARMul_State * state); | |
36 | typedef unsigned ARMul_CPExits (ARMul_State * state); | |
37 | typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type, | |
38 | ARMword instr, ARMword value); | |
39 | typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type, | |
40 | ARMword instr, ARMword * value); | |
41 | typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type, | |
42 | ARMword instr, ARMword * value); | |
43 | typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type, | |
44 | ARMword instr, ARMword value); | |
45 | typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type, | |
46 | ARMword instr); | |
47 | typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg, | |
48 | ARMword * value); | |
49 | typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg, | |
50 | ARMword value); | |
51 | ||
52 | struct ARMul_State | |
53 | { | |
54 | ARMword Emulate; /* to start and stop emulation */ | |
55 | unsigned EndCondition; /* reason for stopping */ | |
56 | unsigned ErrorCode; /* type of illegal instruction */ | |
57 | ARMword Reg[16]; /* the current register file */ | |
58 | ARMword RegBank[7][16]; /* all the registers */ | |
59 | ARMword Cpsr; /* the current psr */ | |
60 | ARMword Spsr[7]; /* the exception psr's */ | |
61 | ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */ | |
c906108c | 62 | #ifdef MODET |
dfcd3bfb | 63 | ARMword TFlag; /* Thumb state */ |
c906108c | 64 | #endif |
dfcd3bfb JM |
65 | ARMword Bank; /* the current register bank */ |
66 | ARMword Mode; /* the current mode */ | |
67 | ARMword instr, pc, temp; /* saved register state */ | |
68 | ARMword loaded, decoded; /* saved pipeline state */ | |
69 | unsigned long NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */ | |
70 | unsigned long NumInstrs; /* the number of instructions executed */ | |
71 | unsigned NextInstr; | |
72 | unsigned VectorCatch; /* caught exception mask */ | |
73 | unsigned CallDebug; /* set to call the debugger */ | |
74 | unsigned CanWatch; /* set by memory interface if its willing to suffer the | |
75 | overhead of checking for watchpoints on each memory | |
76 | access */ | |
77 | unsigned MemReadDebug, MemWriteDebug; | |
78 | unsigned long StopHandle; | |
79 | ||
80 | unsigned char *MemDataPtr; /* admin data */ | |
81 | unsigned char *MemInPtr; /* the Data In bus */ | |
82 | unsigned char *MemOutPtr; /* the Data Out bus (which you may not need */ | |
83 | unsigned char *MemSparePtr; /* extra space */ | |
84 | ARMword MemSize; | |
85 | ||
86 | unsigned char *OSptr; /* OS Handle */ | |
87 | char *CommandLine; /* Command Line from ARMsd */ | |
88 | ||
89 | ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ | |
90 | ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ | |
91 | ARMul_LDCs *LDC[16]; /* LDC instruction */ | |
92 | ARMul_STCs *STC[16]; /* STC instruction */ | |
93 | ARMul_MRCs *MRC[16]; /* MRC instruction */ | |
94 | ARMul_MCRs *MCR[16]; /* MCR instruction */ | |
95 | ARMul_CDPs *CDP[16]; /* CDP instruction */ | |
96 | ARMul_CPReads *CPRead[16]; /* Read CP register */ | |
97 | ARMul_CPWrites *CPWrite[16]; /* Write CP register */ | |
98 | unsigned char *CPData[16]; /* Coprocessor data */ | |
99 | unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ | |
100 | ||
101 | unsigned EventSet; /* the number of events in the queue */ | |
102 | unsigned long Now; /* time to the nearest cycle */ | |
103 | struct EventNode **EventPtr; /* the event list */ | |
104 | ||
105 | unsigned Exception; /* enable the next four values */ | |
106 | unsigned Debug; /* show instructions as they are executed */ | |
107 | unsigned NresetSig; /* reset the processor */ | |
108 | unsigned NfiqSig; | |
109 | unsigned NirqSig; | |
110 | ||
111 | unsigned abortSig; | |
112 | unsigned NtransSig; | |
113 | unsigned bigendSig; | |
114 | unsigned prog32Sig; | |
115 | unsigned data32Sig; | |
116 | unsigned lateabtSig; | |
117 | ARMword Vector; /* synthesize aborts in cycle modes */ | |
118 | ARMword Aborted; /* sticky flag for aborts */ | |
119 | ARMword Reseted; /* sticky flag for Reset */ | |
120 | ARMword Inted, LastInted; /* sticky flags for interrupts */ | |
121 | ARMword Base; /* extra hand for base writeback */ | |
122 | ARMword AbortAddr; /* to keep track of Prefetch aborts */ | |
123 | ||
124 | const struct Dbg_HostosInterface *hostif; | |
125 | ||
126 | int verbose; /* non-zero means print various messages like the banner */ | |
127 | }; | |
c906108c SS |
128 | |
129 | #define ResetPin NresetSig | |
130 | #define FIQPin NfiqSig | |
131 | #define IRQPin NirqSig | |
132 | #define AbortPin abortSig | |
133 | #define TransPin NtransSig | |
134 | #define BigEndPin bigendSig | |
135 | #define Prog32Pin prog32Sig | |
136 | #define Data32Pin data32Sig | |
137 | #define LateAbortPin lateabtSig | |
138 | ||
139 | /***************************************************************************\ | |
140 | * Types of ARM we know about * | |
141 | \***************************************************************************/ | |
dfcd3bfb | 142 | |
c906108c SS |
143 | /* The bitflags */ |
144 | #define ARM_Fix26_Prop 0x01 | |
145 | #define ARM_Nexec_Prop 0x02 | |
146 | #define ARM_Debug_Prop 0x10 | |
147 | #define ARM_Isync_Prop ARM_Debug_Prop | |
148 | #define ARM_Lock_Prop 0x20 | |
dfcd3bfb | 149 | |
c906108c SS |
150 | /* ARM2 family */ |
151 | #define ARM2 (ARM_Fix26_Prop) | |
152 | #define ARM2as ARM2 | |
153 | #define ARM61 ARM2 | |
154 | #define ARM3 ARM2 | |
155 | ||
dfcd3bfb | 156 | #ifdef ARM60 /* previous definition in armopts.h */ |
c906108c SS |
157 | #undef ARM60 |
158 | #endif | |
159 | ||
160 | /* ARM6 family */ | |
161 | #define ARM6 (ARM_Lock_Prop) | |
162 | #define ARM60 ARM6 | |
163 | #define ARM600 ARM6 | |
164 | #define ARM610 ARM6 | |
165 | #define ARM620 ARM6 | |
dfcd3bfb | 166 | |
c906108c SS |
167 | |
168 | /***************************************************************************\ | |
169 | * Macros to extract instruction fields * | |
170 | \***************************************************************************/ | |
171 | ||
dfcd3bfb JM |
172 | #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */ |
173 | #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */ | |
174 | #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */ | |
c906108c SS |
175 | |
176 | /***************************************************************************\ | |
177 | * The hardware vector addresses * | |
178 | \***************************************************************************/ | |
179 | ||
180 | #define ARMResetV 0L | |
181 | #define ARMUndefinedInstrV 4L | |
182 | #define ARMSWIV 8L | |
183 | #define ARMPrefetchAbortV 12L | |
184 | #define ARMDataAbortV 16L | |
185 | #define ARMAddrExceptnV 20L | |
186 | #define ARMIRQV 24L | |
187 | #define ARMFIQV 28L | |
dfcd3bfb | 188 | #define ARMErrorV 32L /* This is an offset, not an address ! */ |
c906108c SS |
189 | |
190 | #define ARMul_ResetV ARMResetV | |
191 | #define ARMul_UndefinedInstrV ARMUndefinedInstrV | |
192 | #define ARMul_SWIV ARMSWIV | |
193 | #define ARMul_PrefetchAbortV ARMPrefetchAbortV | |
194 | #define ARMul_DataAbortV ARMDataAbortV | |
195 | #define ARMul_AddrExceptnV ARMAddrExceptnV | |
196 | #define ARMul_IRQV ARMIRQV | |
197 | #define ARMul_FIQV ARMFIQV | |
198 | ||
199 | /***************************************************************************\ | |
200 | * Mode and Bank Constants * | |
201 | \***************************************************************************/ | |
202 | ||
203 | #define USER26MODE 0L | |
204 | #define FIQ26MODE 1L | |
205 | #define IRQ26MODE 2L | |
206 | #define SVC26MODE 3L | |
207 | #define USER32MODE 16L | |
208 | #define FIQ32MODE 17L | |
209 | #define IRQ32MODE 18L | |
210 | #define SVC32MODE 19L | |
211 | #define ABORT32MODE 23L | |
212 | #define UNDEF32MODE 27L | |
213 | ||
214 | #define ARM32BITMODE (state->Mode > 3) | |
215 | #define ARM26BITMODE (state->Mode <= 3) | |
216 | #define ARMMODE (state->Mode) | |
217 | #define ARMul_MODEBITS 0x1fL | |
218 | #define ARMul_MODE32BIT ARM32BITMODE | |
219 | #define ARMul_MODE26BIT ARM26BITMODE | |
220 | ||
221 | #define USERBANK 0 | |
222 | #define FIQBANK 1 | |
223 | #define IRQBANK 2 | |
224 | #define SVCBANK 3 | |
225 | #define ABORTBANK 4 | |
226 | #define UNDEFBANK 5 | |
227 | #define DUMMYBANK 6 | |
228 | ||
229 | /***************************************************************************\ | |
230 | * Definitons of things in the emulator * | |
231 | \***************************************************************************/ | |
232 | ||
dfcd3bfb JM |
233 | extern void ARMul_EmulateInit (void); |
234 | extern ARMul_State *ARMul_NewState (void); | |
235 | extern void ARMul_Reset (ARMul_State * state); | |
236 | extern ARMword ARMul_DoProg (ARMul_State * state); | |
237 | extern ARMword ARMul_DoInstr (ARMul_State * state); | |
c906108c SS |
238 | |
239 | /***************************************************************************\ | |
240 | * Definitons of things for event handling * | |
241 | \***************************************************************************/ | |
242 | ||
dfcd3bfb JM |
243 | extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay, |
244 | unsigned (*func) ()); | |
245 | extern void ARMul_EnvokeEvent (ARMul_State * state); | |
246 | extern unsigned long ARMul_Time (ARMul_State * state); | |
c906108c SS |
247 | |
248 | /***************************************************************************\ | |
249 | * Useful support routines * | |
250 | \***************************************************************************/ | |
251 | ||
dfcd3bfb JM |
252 | extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, |
253 | unsigned reg); | |
254 | extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, | |
255 | ARMword value); | |
256 | extern ARMword ARMul_GetPC (ARMul_State * state); | |
257 | extern ARMword ARMul_GetNextPC (ARMul_State * state); | |
258 | extern void ARMul_SetPC (ARMul_State * state, ARMword value); | |
259 | extern ARMword ARMul_GetR15 (ARMul_State * state); | |
260 | extern void ARMul_SetR15 (ARMul_State * state, ARMword value); | |
261 | ||
262 | extern ARMword ARMul_GetCPSR (ARMul_State * state); | |
263 | extern void ARMul_SetCPSR (ARMul_State * state, ARMword value); | |
264 | extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode); | |
265 | extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value); | |
c906108c SS |
266 | |
267 | /***************************************************************************\ | |
268 | * Definitons of things to handle aborts * | |
269 | \***************************************************************************/ | |
270 | ||
dfcd3bfb JM |
271 | extern void ARMul_Abort (ARMul_State * state, ARMword address); |
272 | #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */ | |
c906108c SS |
273 | #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ |
274 | state->AbortAddr = (address & ~3L) | |
275 | #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \ | |
276 | state->Aborted = ARMul_DataAbortV ; | |
277 | #define ARMul_CLEARABORT state->abortSig = LOW | |
278 | ||
279 | /***************************************************************************\ | |
280 | * Definitons of things in the memory interface * | |
281 | \***************************************************************************/ | |
282 | ||
dfcd3bfb JM |
283 | extern unsigned ARMul_MemoryInit (ARMul_State * state, |
284 | unsigned long initmemsize); | |
285 | extern void ARMul_MemoryExit (ARMul_State * state); | |
286 | ||
287 | extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, | |
288 | ARMword isize); | |
289 | extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, | |
290 | ARMword isize); | |
291 | extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address, | |
292 | ARMword isize); | |
293 | ||
294 | extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address); | |
295 | extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address); | |
296 | extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address); | |
297 | extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address); | |
298 | ||
299 | extern void ARMul_StoreWordS (ARMul_State * state, ARMword address, | |
300 | ARMword data); | |
301 | extern void ARMul_StoreWordN (ARMul_State * state, ARMword address, | |
302 | ARMword data); | |
303 | extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address, | |
304 | ARMword data); | |
305 | extern void ARMul_StoreByte (ARMul_State * state, ARMword address, | |
306 | ARMword data); | |
307 | ||
308 | extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, | |
309 | ARMword data); | |
310 | extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, | |
311 | ARMword data); | |
312 | ||
313 | extern void ARMul_Icycles (ARMul_State * state, unsigned number, | |
314 | ARMword address); | |
315 | extern void ARMul_Ccycles (ARMul_State * state, unsigned number, | |
316 | ARMword address); | |
317 | ||
318 | extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address); | |
319 | extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address); | |
320 | extern void ARMul_WriteWord (ARMul_State * state, ARMword address, | |
321 | ARMword data); | |
322 | extern void ARMul_WriteByte (ARMul_State * state, ARMword address, | |
323 | ARMword data); | |
324 | ||
325 | extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, | |
326 | ARMword, ARMword, ARMword, ARMword, ARMword, | |
327 | ARMword, ARMword, ARMword); | |
c906108c SS |
328 | |
329 | /***************************************************************************\ | |
330 | * Definitons of things in the co-processor interface * | |
331 | \***************************************************************************/ | |
332 | ||
333 | #define ARMul_FIRST 0 | |
334 | #define ARMul_TRANSFER 1 | |
335 | #define ARMul_BUSY 2 | |
336 | #define ARMul_DATA 3 | |
337 | #define ARMul_INTERRUPT 4 | |
338 | #define ARMul_DONE 0 | |
339 | #define ARMul_CANT 1 | |
340 | #define ARMul_INC 3 | |
341 | ||
dfcd3bfb JM |
342 | extern unsigned ARMul_CoProInit (ARMul_State * state); |
343 | extern void ARMul_CoProExit (ARMul_State * state); | |
344 | extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, | |
345 | ARMul_CPInits * init, ARMul_CPExits * exit, | |
346 | ARMul_LDCs * ldc, ARMul_STCs * stc, | |
347 | ARMul_MRCs * mrc, ARMul_MCRs * mcr, | |
348 | ARMul_CDPs * cdp, | |
349 | ARMul_CPReads * read, ARMul_CPWrites * write); | |
350 | extern void ARMul_CoProDetach (ARMul_State * state, unsigned number); | |
c906108c SS |
351 | |
352 | /***************************************************************************\ | |
353 | * Definitons of things in the host environment * | |
354 | \***************************************************************************/ | |
355 | ||
dfcd3bfb JM |
356 | extern unsigned ARMul_OSInit (ARMul_State * state); |
357 | extern void ARMul_OSExit (ARMul_State * state); | |
358 | extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number); | |
359 | extern ARMword ARMul_OSLastErrorP (ARMul_State * state); | |
c906108c | 360 | |
dfcd3bfb JM |
361 | extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr); |
362 | extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector, | |
363 | ARMword pc); | |
364 | extern int rdi_log; | |
c906108c SS |
365 | |
366 | /***************************************************************************\ | |
367 | * Host-dependent stuff * | |
368 | \***************************************************************************/ | |
369 | ||
370 | #ifdef macintosh | |
dfcd3bfb | 371 | pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ |
c906108c | 372 | # define HOURGLASS SpinCursor( 1 ) |
dfcd3bfb | 373 | # define HOURGLASS_RATE 1023 /* 2^n - 1 */ |
c906108c | 374 | #endif |