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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
2571583a 2 Copyright (C) 2008-2017 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
d68cd58c 22#include "bfd_stdint.h"
c7927a3c
NC		 23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
6346d5ca 52 RXREL (NONE, 3, 0, 0, dont, FALSE),
c7927a3c
NC		 53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
185#define R_RX_RH_ABS5p8W 0x79
186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
187#define R_RX_RH_ABS5p8L 0x7a
188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
193#define R_RX_RH_ABS5p5W 0x7c
194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
195#define R_RX_RH_ABS5p5L 0x7d
196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
203 /* End of internal relocs. */
204
205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222};
223\f
224/* Map BFD reloc types to RX ELF reloc types. */
225
226struct rx_reloc_map
227{
228 bfd_reloc_code_real_type bfd_reloc_val;
229 unsigned int rx_reloc_val;
230};
231
232static const struct rx_reloc_map rx_reloc_map [] =
233{
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267};
268
269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271static reloc_howto_type *
272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
273 bfd_reloc_code_real_type code)
274{
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
0ba38529 280 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285}
286
287static reloc_howto_type *
288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289{
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298}
299
300/* Set the howto pointer for an RX ELF reloc. */
301
302static void
303rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
306{
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 310 if (r_type >= (unsigned int) R_RX_max)
311 {
695344c0 312 /* xgettext:c-format */
64d29018 313 _bfd_error_handler (_("%B: invalid RX reloc number: %d"), abfd, r_type);
5860e3f8
NC		 314 r_type = 0;
315 }
c7927a3c
NC		 316 cache_ptr->howto = rx_elf_howto_table + r_type;
317}
318\f
319static bfd_vma
320get_symbol_value (const char * name,
c7927a3c
NC		 321 struct bfd_link_info * info,
322 bfd * input_bfd,
323 asection * input_section,
324 int offset)
325{
326 bfd_vma value = 0;
327 struct bfd_link_hash_entry * h;
328
329 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
330
331 if (h == NULL
332 || (h->type != bfd_link_hash_defined
333 && h->type != bfd_link_hash_defweak))
1a72702b 334 (*info->callbacks->undefined_symbol)
c7927a3c
NC		 335 (info, name, input_bfd, input_section, offset, TRUE);
336 else
337 value = (h->u.def.value
338 + h->u.def.section->output_section->vma
339 + h->u.def.section->output_offset);
340
341 return value;
342}
1a72702b 343
7a2f2d82
DD		 344static bfd_vma
345get_symbol_value_maybe (const char * name,
346 struct bfd_link_info * info)
347{
348 bfd_vma value = 0;
349 struct bfd_link_hash_entry * h;
350
351 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
352
353 if (h == NULL
354 || (h->type != bfd_link_hash_defined
355 && h->type != bfd_link_hash_defweak))
356 return 0;
357 else
358 value = (h->u.def.value
359 + h->u.def.section->output_section->vma
360 + h->u.def.section->output_offset);
361
362 return value;
363}
c7927a3c
NC		 364
365static bfd_vma
1a72702b 366get_gp (struct bfd_link_info * info,
c7927a3c
NC		 367 bfd * abfd,
368 asection * sec,
369 int offset)
370{
371 static bfd_boolean cached = FALSE;
372 static bfd_vma cached_value = 0;
373
374 if (!cached)
375 {
1a72702b 376 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
c7927a3c
NC		 377 cached = TRUE;
378 }
379 return cached_value;
380}
381
382static bfd_vma
1a72702b 383get_romstart (struct bfd_link_info * info,
c7927a3c
NC		 384 bfd * abfd,
385 asection * sec,
386 int offset)
387{
388 static bfd_boolean cached = FALSE;
389 static bfd_vma cached_value = 0;
390
391 if (!cached)
392 {
1a72702b 393 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
c7927a3c
NC		 394 cached = TRUE;
395 }
396 return cached_value;
397}
398
399static bfd_vma
1a72702b 400get_ramstart (struct bfd_link_info * info,
c7927a3c
NC		 401 bfd * abfd,
402 asection * sec,
403 int offset)
404{
405 static bfd_boolean cached = FALSE;
406 static bfd_vma cached_value = 0;
407
408 if (!cached)
409 {
1a72702b 410 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
c7927a3c
NC		 411 cached = TRUE;
412 }
413 return cached_value;
414}
415
416#define NUM_STACK_ENTRIES 16
417static int32_t rx_stack [ NUM_STACK_ENTRIES ];
418static unsigned int rx_stack_top;
419
420#define RX_STACK_PUSH(val) \
421 do \
422 { \
423 if (rx_stack_top < NUM_STACK_ENTRIES) \
424 rx_stack [rx_stack_top ++] = (val); \
425 else \
426 r = bfd_reloc_dangerous; \
427 } \
428 while (0)
429
430#define RX_STACK_POP(dest) \
431 do \
432 { \
433 if (rx_stack_top > 0) \
434 (dest) = rx_stack [-- rx_stack_top]; \
435 else \
436 (dest) = 0, r = bfd_reloc_dangerous; \
437 } \
438 while (0)
439
440/* Relocate an RX ELF section.
441 There is some attempt to make this function usable for many architectures,
442 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
443 if only to serve as a learning tool.
444
445 The RELOCATE_SECTION function is called by the new ELF backend linker
446 to handle the relocations for a section.
447
448 The relocs are always passed as Rela structures; if the section
449 actually uses Rel structures, the r_addend field will always be
450 zero.
451
452 This function is responsible for adjusting the section contents as
453 necessary, and (if using Rela relocs and generating a relocatable
454 output file) adjusting the reloc addend as necessary.
455
456 This function does not have to worry about setting the reloc
457 address or the reloc symbol index.
458
459 LOCAL_SYMS is a pointer to the swapped in local symbols.
460
461 LOCAL_SECTIONS is an array giving the section in the input file
462 corresponding to the st_shndx field of each local symbol.
463
464 The global hash table entry for the global symbols can be found
465 via elf_sym_hashes (input_bfd).
466
467 When generating relocatable output, this function must handle
468 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
469 going to be the section symbol corresponding to the output
470 section, which means that the addend must be adjusted
471 accordingly. */
472
473static bfd_boolean
474rx_elf_relocate_section
475 (bfd * output_bfd,
476 struct bfd_link_info * info,
477 bfd * input_bfd,
478 asection * input_section,
479 bfd_byte * contents,
480 Elf_Internal_Rela * relocs,
481 Elf_Internal_Sym * local_syms,
482 asection ** local_sections)
483{
484 Elf_Internal_Shdr * symtab_hdr;
485 struct elf_link_hash_entry ** sym_hashes;
486 Elf_Internal_Rela * rel;
487 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 488 bfd_boolean pid_mode;
489 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 490 const char * table_default_cache = NULL;
491 bfd_vma table_start_cache = 0;
492 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 493
494 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
495 pid_mode = TRUE;
496 else
497 pid_mode = FALSE;
c7927a3c
NC		 498
499 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
500 sym_hashes = elf_sym_hashes (input_bfd);
501 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 502 for (rel = relocs; rel < relend; rel ++)
503 {
504 reloc_howto_type * howto;
505 unsigned long r_symndx;
506 Elf_Internal_Sym * sym;
507 asection * sec;
508 struct elf_link_hash_entry * h;
509 bfd_vma relocation;
510 bfd_reloc_status_type r;
511 const char * name = NULL;
512 bfd_boolean unresolved_reloc = TRUE;
513 int r_type;
514
515 r_type = ELF32_R_TYPE (rel->r_info);
516 r_symndx = ELF32_R_SYM (rel->r_info);
517
518 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
519 h = NULL;
520 sym = NULL;
521 sec = NULL;
522 relocation = 0;
523
d4cb0ea0
NC		 524 if (rx_stack_top == 0)
525 saw_subtract = FALSE;
526
c7927a3c
NC		 527 if (r_symndx < symtab_hdr->sh_info)
528 {
529 sym = local_syms + r_symndx;
530 sec = local_sections [r_symndx];
531 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
532
533 name = bfd_elf_string_from_elf_section
534 (input_bfd, symtab_hdr->sh_link, sym->st_name);
535 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
536 }
537 else
538 {
62d887d4 539 bfd_boolean warned, ignored;
c7927a3c
NC		 540
541 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
542 r_symndx, symtab_hdr, sym_hashes, h,
543 sec, relocation, unresolved_reloc,
62d887d4 544 warned, ignored);
c7927a3c
NC		 545
546 name = h->root.root.string;
547 }
548
7a2f2d82
DD		 549 if (strncmp (name, "$tableentry$default$", 20) == 0)
550 {
551 bfd_vma entry_vma;
552 int idx;
553 char *buf;
7a2f2d82
DD		 554
555 if (table_default_cache != name)
556 {
557
558 /* All relocs for a given table should be to the same
559 (weak) default symbol) so we can use it to detect a
560 cache miss. We use the offset into the table to find
561 the "real" symbol. Calculate and store the table's
562 offset here. */
563
564 table_default_cache = name;
565
566 /* We have already done error checking in rx_table_find(). */
567
568 buf = (char *) malloc (13 + strlen (name + 20));
569
570 sprintf (buf, "$tablestart$%s", name + 20);
7a2f2d82 571 table_start_cache = get_symbol_value (buf,
7a2f2d82
DD		 572 info,
573 input_bfd,
574 input_section,
575 rel->r_offset);
576
577 sprintf (buf, "$tableend$%s", name + 20);
7a2f2d82 578 table_end_cache = get_symbol_value (buf,
7a2f2d82
DD		 579 info,
580 input_bfd,
581 input_section,
582 rel->r_offset);
583
584 free (buf);
585 }
586
587 entry_vma = (input_section->output_section->vma
588 + input_section->output_offset
589 + rel->r_offset);
590
591 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
592 {
695344c0 593 /* xgettext:c-format */
7a2f2d82
DD		 594 _bfd_error_handler (_("%B:%A: table entry %s outside table"),
595 input_bfd, input_section,
596 name);
597 }
598 else if ((int) (entry_vma - table_start_cache) % 4)
599 {
695344c0 600 /* xgettext:c-format */
7a2f2d82
DD		 601 _bfd_error_handler (_("%B:%A: table entry %s not word-aligned within table"),
602 input_bfd, input_section,
603 name);
604 }
605 else
606 {
607 idx = (int) (entry_vma - table_start_cache) / 4;
608
609 /* This will look like $tableentry$<N>$<name> */
610 buf = (char *) malloc (12 + 20 + strlen (name + 20));
611 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
612
613 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
614
615 if (h)
616 {
617 relocation = (h->root.u.def.value
618 + h->root.u.def.section->output_section->vma
619 + h->root.u.def.section->output_offset);;
620 }
621
622 free (buf);
623 }
624 }
625
dbaa2011 626 if (sec != NULL && discarded_section (sec))
e4067dbb 627 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 628 rel, 1, relend, howto, 0, contents);
c7927a3c 629
0e1862bb 630 if (bfd_link_relocatable (info))
c7927a3c
NC		 631 {
632 /* This is a relocatable link. We don't have to change
633 anything, unless the reloc is against a section symbol,
634 in which case we have to adjust according to where the
635 section symbol winds up in the output section. */
636 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
637 rel->r_addend += sec->output_offset;
638 continue;
639 }
640
641 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
642 /* If the symbol is undefined and weak
643 then the relocation resolves to zero. */
644 relocation = 0;
645 else
646 {
647 if (howto->pc_relative)
648 {
649 relocation -= (input_section->output_section->vma
650 + input_section->output_offset
651 + rel->r_offset);
652 if (r_type != R_RX_RH_3_PCREL
653 && r_type != R_RX_DIR3U_PCREL)
654 relocation ++;
655 }
656
657 relocation += rel->r_addend;
658 }
659
660 r = bfd_reloc_ok;
661
662#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
663#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
664#define OP(i) (contents[rel->r_offset + (i)])
665#define WARN_REDHAT(type) \
695344c0 666 /* xgettext:c-format */ \
c7927a3c
NC		 667 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
668 input_bfd, input_section, name)
669
d4cb0ea0
NC		 670 /* Check for unsafe relocs in PID mode. These are any relocs where
671 an absolute address is being computed. There are special cases
672 for relocs against symbols that are known to be referenced in
673 crt0.o before the PID base address register has been initialised. */
674#define UNSAFE_FOR_PID \
675 do \
676 { \
677 if (pid_mode \
678 && sec != NULL \
679 && sec->flags & SEC_READONLY \
680 && !(input_section->flags & SEC_DEBUGGING) \
681 && strcmp (name, "__pid_base") != 0 \
682 && strcmp (name, "__gp") != 0 \
683 && strcmp (name, "__romdatastart") != 0 \
684 && !saw_subtract) \
695344c0 685 /* xgettext:c-format */ \
d4cb0ea0
NC		 686 _bfd_error_handler (_("%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"), \
687 input_bfd, input_section, howto->name, \
688 input_section->output_section->vma + input_section->output_offset + rel->r_offset, \
689 name, sec->name); \
690 } \
691 while (0)
692
c7927a3c
NC		 693 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
694 switch (r_type)
695 {
696 case R_RX_NONE:
697 break;
698
699 case R_RX_RH_RELAX:
700 break;
701
702 case R_RX_RH_3_PCREL:
703 WARN_REDHAT ("RX_RH_3_PCREL");
704 RANGE (3, 10);
705 OP (0) &= 0xf8;
706 OP (0) |= relocation & 0x07;
707 break;
708
709 case R_RX_RH_8_NEG:
710 WARN_REDHAT ("RX_RH_8_NEG");
711 relocation = - relocation;
1a0670f3 712 /* Fall through. */
c7927a3c 713 case R_RX_DIR8S_PCREL:
d4cb0ea0 714 UNSAFE_FOR_PID;
c7927a3c
NC		 715 RANGE (-128, 127);
716 OP (0) = relocation;
717 break;
718
719 case R_RX_DIR8S:
d4cb0ea0 720 UNSAFE_FOR_PID;
c7927a3c
NC		 721 RANGE (-128, 255);
722 OP (0) = relocation;
723 break;
724
725 case R_RX_DIR8U:
d4cb0ea0 726 UNSAFE_FOR_PID;
c7927a3c
NC		 727 RANGE (0, 255);
728 OP (0) = relocation;
729 break;
730
731 case R_RX_RH_16_NEG:
732 WARN_REDHAT ("RX_RH_16_NEG");
733 relocation = - relocation;
1a0670f3 734 /* Fall through. */
c7927a3c 735 case R_RX_DIR16S_PCREL:
d4cb0ea0 736 UNSAFE_FOR_PID;
c7927a3c
NC		 737 RANGE (-32768, 32767);
738#if RX_OPCODE_BIG_ENDIAN
739#else
740 OP (0) = relocation;
741 OP (1) = relocation >> 8;
742#endif
743 break;
744
745 case R_RX_RH_16_OP:
746 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 747 UNSAFE_FOR_PID;
c7927a3c
NC		 748 RANGE (-32768, 32767);
749#if RX_OPCODE_BIG_ENDIAN
750 OP (1) = relocation;
751 OP (0) = relocation >> 8;
752#else
753 OP (0) = relocation;
754 OP (1) = relocation >> 8;
755#endif
756 break;
757
758 case R_RX_DIR16S:
d4cb0ea0 759 UNSAFE_FOR_PID;
c7927a3c
NC		 760 RANGE (-32768, 65535);
761 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
762 {
763 OP (1) = relocation;
764 OP (0) = relocation >> 8;
765 }
766 else
767 {
768 OP (0) = relocation;
769 OP (1) = relocation >> 8;
770 }
771 break;
772
773 case R_RX_DIR16U:
d4cb0ea0 774 UNSAFE_FOR_PID;
c7927a3c
NC		 775 RANGE (0, 65536);
776#if RX_OPCODE_BIG_ENDIAN
777 OP (1) = relocation;
778 OP (0) = relocation >> 8;
779#else
780 OP (0) = relocation;
781 OP (1) = relocation >> 8;
782#endif
783 break;
784
785 case R_RX_DIR16:
d4cb0ea0 786 UNSAFE_FOR_PID;
c7927a3c
NC		 787 RANGE (-32768, 65536);
788#if RX_OPCODE_BIG_ENDIAN
789 OP (1) = relocation;
790 OP (0) = relocation >> 8;
791#else
792 OP (0) = relocation;
793 OP (1) = relocation >> 8;
794#endif
795 break;
796
797 case R_RX_DIR16_REV:
d4cb0ea0 798 UNSAFE_FOR_PID;
c7927a3c
NC		 799 RANGE (-32768, 65536);
800#if RX_OPCODE_BIG_ENDIAN
801 OP (0) = relocation;
802 OP (1) = relocation >> 8;
803#else
804 OP (1) = relocation;
805 OP (0) = relocation >> 8;
806#endif
807 break;
808
809 case R_RX_DIR3U_PCREL:
810 RANGE (3, 10);
811 OP (0) &= 0xf8;
812 OP (0) |= relocation & 0x07;
813 break;
814
815 case R_RX_RH_24_NEG:
d4cb0ea0 816 UNSAFE_FOR_PID;
c7927a3c
NC		 817 WARN_REDHAT ("RX_RH_24_NEG");
818 relocation = - relocation;
1a0670f3 819 /* Fall through. */
c7927a3c
NC		 820 case R_RX_DIR24S_PCREL:
821 RANGE (-0x800000, 0x7fffff);
822#if RX_OPCODE_BIG_ENDIAN
823 OP (2) = relocation;
824 OP (1) = relocation >> 8;
825 OP (0) = relocation >> 16;
826#else
827 OP (0) = relocation;
828 OP (1) = relocation >> 8;
829 OP (2) = relocation >> 16;
830#endif
831 break;
832
833 case R_RX_RH_24_OP:
d4cb0ea0 834 UNSAFE_FOR_PID;
c7927a3c
NC		 835 WARN_REDHAT ("RX_RH_24_OP");
836 RANGE (-0x800000, 0x7fffff);
837#if RX_OPCODE_BIG_ENDIAN
838 OP (2) = relocation;
839 OP (1) = relocation >> 8;
840 OP (0) = relocation >> 16;
841#else
842 OP (0) = relocation;
843 OP (1) = relocation >> 8;
844 OP (2) = relocation >> 16;
845#endif
846 break;
847
848 case R_RX_DIR24S:
d4cb0ea0 849 UNSAFE_FOR_PID;
c7927a3c
NC		 850 RANGE (-0x800000, 0x7fffff);
851 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
852 {
853 OP (2) = relocation;
854 OP (1) = relocation >> 8;
855 OP (0) = relocation >> 16;
856 }
857 else
858 {
859 OP (0) = relocation;
860 OP (1) = relocation >> 8;
861 OP (2) = relocation >> 16;
862 }
863 break;
864
865 case R_RX_RH_24_UNS:
d4cb0ea0 866 UNSAFE_FOR_PID;
c7927a3c
NC		 867 WARN_REDHAT ("RX_RH_24_UNS");
868 RANGE (0, 0xffffff);
869#if RX_OPCODE_BIG_ENDIAN
870 OP (2) = relocation;
871 OP (1) = relocation >> 8;
872 OP (0) = relocation >> 16;
873#else
874 OP (0) = relocation;
875 OP (1) = relocation >> 8;
876 OP (2) = relocation >> 16;
877#endif
878 break;
879
880 case R_RX_RH_32_NEG:
d4cb0ea0 881 UNSAFE_FOR_PID;
c7927a3c
NC		 882 WARN_REDHAT ("RX_RH_32_NEG");
883 relocation = - relocation;
884#if RX_OPCODE_BIG_ENDIAN
885 OP (3) = relocation;
886 OP (2) = relocation >> 8;
887 OP (1) = relocation >> 16;
888 OP (0) = relocation >> 24;
889#else
890 OP (0) = relocation;
891 OP (1) = relocation >> 8;
892 OP (2) = relocation >> 16;
893 OP (3) = relocation >> 24;
894#endif
895 break;
896
897 case R_RX_RH_32_OP:
d4cb0ea0 898 UNSAFE_FOR_PID;
c7927a3c
NC		 899 WARN_REDHAT ("RX_RH_32_OP");
900#if RX_OPCODE_BIG_ENDIAN
901 OP (3) = relocation;
902 OP (2) = relocation >> 8;
903 OP (1) = relocation >> 16;
904 OP (0) = relocation >> 24;
905#else
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 OP (3) = relocation >> 24;
910#endif
911 break;
912
913 case R_RX_DIR32:
914 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
915 {
916 OP (3) = relocation;
917 OP (2) = relocation >> 8;
918 OP (1) = relocation >> 16;
919 OP (0) = relocation >> 24;
920 }
921 else
922 {
923 OP (0) = relocation;
924 OP (1) = relocation >> 8;
925 OP (2) = relocation >> 16;
926 OP (3) = relocation >> 24;
927 }
928 break;
929
930 case R_RX_DIR32_REV:
931 if (BIGE (output_bfd))
932 {
933 OP (0) = relocation;
934 OP (1) = relocation >> 8;
935 OP (2) = relocation >> 16;
936 OP (3) = relocation >> 24;
937 }
938 else
939 {
940 OP (3) = relocation;
941 OP (2) = relocation >> 8;
942 OP (1) = relocation >> 16;
943 OP (0) = relocation >> 24;
944 }
945 break;
946
947 case R_RX_RH_DIFF:
948 {
949 bfd_vma val;
950 WARN_REDHAT ("RX_RH_DIFF");
951 val = bfd_get_32 (output_bfd, & OP (0));
952 val -= relocation;
953 bfd_put_32 (output_bfd, val, & OP (0));
954 }
955 break;
956
957 case R_RX_RH_GPRELB:
958 WARN_REDHAT ("RX_RH_GPRELB");
1a72702b 959 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 960 RANGE (0, 65535);
961#if RX_OPCODE_BIG_ENDIAN
962 OP (1) = relocation;
963 OP (0) = relocation >> 8;
964#else
965 OP (0) = relocation;
966 OP (1) = relocation >> 8;
967#endif
968 break;
969
970 case R_RX_RH_GPRELW:
971 WARN_REDHAT ("RX_RH_GPRELW");
1a72702b 972 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 973 ALIGN (1);
974 relocation >>= 1;
975 RANGE (0, 65535);
976#if RX_OPCODE_BIG_ENDIAN
977 OP (1) = relocation;
978 OP (0) = relocation >> 8;
979#else
980 OP (0) = relocation;
981 OP (1) = relocation >> 8;
982#endif
983 break;
984
985 case R_RX_RH_GPRELL:
986 WARN_REDHAT ("RX_RH_GPRELL");
1a72702b 987 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 988 ALIGN (3);
989 relocation >>= 2;
990 RANGE (0, 65535);
991#if RX_OPCODE_BIG_ENDIAN
992 OP (1) = relocation;
993 OP (0) = relocation >> 8;
994#else
995 OP (0) = relocation;
996 OP (1) = relocation >> 8;
997#endif
998 break;
999
1000 /* Internal relocations just for relaxation: */
1001 case R_RX_RH_ABS5p5B:
1002 RX_STACK_POP (relocation);
1003 RANGE (0, 31);
1004 OP (0) &= 0xf8;
1005 OP (0) |= relocation >> 2;
1006 OP (1) &= 0x77;
1007 OP (1) |= (relocation << 6) & 0x80;
1008 OP (1) |= (relocation << 3) & 0x08;
1009 break;
1010
1011 case R_RX_RH_ABS5p5W:
1012 RX_STACK_POP (relocation);
1013 RANGE (0, 62);
1014 ALIGN (1);
1015 relocation >>= 1;
1016 OP (0) &= 0xf8;
1017 OP (0) |= relocation >> 2;
1018 OP (1) &= 0x77;
1019 OP (1) |= (relocation << 6) & 0x80;
1020 OP (1) |= (relocation << 3) & 0x08;
1021 break;
1022
1023 case R_RX_RH_ABS5p5L:
1024 RX_STACK_POP (relocation);
1025 RANGE (0, 124);
1026 ALIGN (3);
1027 relocation >>= 2;
1028 OP (0) &= 0xf8;
1029 OP (0) |= relocation >> 2;
1030 OP (1) &= 0x77;
1031 OP (1) |= (relocation << 6) & 0x80;
1032 OP (1) |= (relocation << 3) & 0x08;
1033 break;
1034
1035 case R_RX_RH_ABS5p8B:
1036 RX_STACK_POP (relocation);
1037 RANGE (0, 31);
1038 OP (0) &= 0x70;
1039 OP (0) |= (relocation << 3) & 0x80;
1040 OP (0) |= relocation & 0x0f;
1041 break;
1042
1043 case R_RX_RH_ABS5p8W:
1044 RX_STACK_POP (relocation);
1045 RANGE (0, 62);
1046 ALIGN (1);
1047 relocation >>= 1;
1048 OP (0) &= 0x70;
1049 OP (0) |= (relocation << 3) & 0x80;
1050 OP (0) |= relocation & 0x0f;
1051 break;
1052
1053 case R_RX_RH_ABS5p8L:
1054 RX_STACK_POP (relocation);
1055 RANGE (0, 124);
1056 ALIGN (3);
1057 relocation >>= 2;
1058 OP (0) &= 0x70;
1059 OP (0) |= (relocation << 3) & 0x80;
1060 OP (0) |= relocation & 0x0f;
1061 break;
1062
1063 case R_RX_RH_UIMM4p8:
1064 RANGE (0, 15);
1065 OP (0) &= 0x0f;
1066 OP (0) |= relocation << 4;
1067 break;
1068
1069 case R_RX_RH_UNEG4p8:
1070 RANGE (-15, 0);
1071 OP (0) &= 0x0f;
1072 OP (0) |= (-relocation) << 4;
1073 break;
1074
1075 /* Complex reloc handling: */
1076
1077 case R_RX_ABS32:
d4cb0ea0 1078 UNSAFE_FOR_PID;
c7927a3c
NC		 1079 RX_STACK_POP (relocation);
1080#if RX_OPCODE_BIG_ENDIAN
1081 OP (3) = relocation;
1082 OP (2) = relocation >> 8;
1083 OP (1) = relocation >> 16;
1084 OP (0) = relocation >> 24;
1085#else
1086 OP (0) = relocation;
1087 OP (1) = relocation >> 8;
1088 OP (2) = relocation >> 16;
1089 OP (3) = relocation >> 24;
1090#endif
1091 break;
1092
1093 case R_RX_ABS32_REV:
d4cb0ea0 1094 UNSAFE_FOR_PID;
c7927a3c
NC		 1095 RX_STACK_POP (relocation);
1096#if RX_OPCODE_BIG_ENDIAN
1097 OP (0) = relocation;
1098 OP (1) = relocation >> 8;
1099 OP (2) = relocation >> 16;
1100 OP (3) = relocation >> 24;
1101#else
1102 OP (3) = relocation;
1103 OP (2) = relocation >> 8;
1104 OP (1) = relocation >> 16;
1105 OP (0) = relocation >> 24;
1106#endif
1107 break;
1108
1109 case R_RX_ABS24S_PCREL:
1110 case R_RX_ABS24S:
d4cb0ea0 1111 UNSAFE_FOR_PID;
c7927a3c
NC		 1112 RX_STACK_POP (relocation);
1113 RANGE (-0x800000, 0x7fffff);
1114 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1115 {
1116 OP (2) = relocation;
1117 OP (1) = relocation >> 8;
1118 OP (0) = relocation >> 16;
1119 }
1120 else
1121 {
1122 OP (0) = relocation;
1123 OP (1) = relocation >> 8;
1124 OP (2) = relocation >> 16;
1125 }
1126 break;
1127
1128 case R_RX_ABS16:
d4cb0ea0 1129 UNSAFE_FOR_PID;
c7927a3c
NC		 1130 RX_STACK_POP (relocation);
1131 RANGE (-32768, 65535);
1132#if RX_OPCODE_BIG_ENDIAN
1133 OP (1) = relocation;
1134 OP (0) = relocation >> 8;
1135#else
1136 OP (0) = relocation;
1137 OP (1) = relocation >> 8;
1138#endif
1139 break;
1140
1141 case R_RX_ABS16_REV:
d4cb0ea0 1142 UNSAFE_FOR_PID;
c7927a3c
NC		 1143 RX_STACK_POP (relocation);
1144 RANGE (-32768, 65535);
1145#if RX_OPCODE_BIG_ENDIAN
1146 OP (0) = relocation;
1147 OP (1) = relocation >> 8;
1148#else
1149 OP (1) = relocation;
1150 OP (0) = relocation >> 8;
1151#endif
1152 break;
1153
1154 case R_RX_ABS16S_PCREL:
1155 case R_RX_ABS16S:
1156 RX_STACK_POP (relocation);
1157 RANGE (-32768, 32767);
1158 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1159 {
1160 OP (1) = relocation;
1161 OP (0) = relocation >> 8;
1162 }
1163 else
1164 {
1165 OP (0) = relocation;
1166 OP (1) = relocation >> 8;
1167 }
1168 break;
1169
1170 case R_RX_ABS16U:
d4cb0ea0 1171 UNSAFE_FOR_PID;
c7927a3c
NC		 1172 RX_STACK_POP (relocation);
1173 RANGE (0, 65536);
1174#if RX_OPCODE_BIG_ENDIAN
1175 OP (1) = relocation;
1176 OP (0) = relocation >> 8;
1177#else
1178 OP (0) = relocation;
1179 OP (1) = relocation >> 8;
1180#endif
1181 break;
1182
1183 case R_RX_ABS16UL:
d4cb0ea0 1184 UNSAFE_FOR_PID;
c7927a3c
NC		 1185 RX_STACK_POP (relocation);
1186 relocation >>= 2;
1187 RANGE (0, 65536);
1188#if RX_OPCODE_BIG_ENDIAN
1189 OP (1) = relocation;
1190 OP (0) = relocation >> 8;
1191#else
1192 OP (0) = relocation;
1193 OP (1) = relocation >> 8;
1194#endif
1195 break;
1196
1197 case R_RX_ABS16UW:
d4cb0ea0 1198 UNSAFE_FOR_PID;
c7927a3c
NC		 1199 RX_STACK_POP (relocation);
1200 relocation >>= 1;
1201 RANGE (0, 65536);
1202#if RX_OPCODE_BIG_ENDIAN
1203 OP (1) = relocation;
1204 OP (0) = relocation >> 8;
1205#else
1206 OP (0) = relocation;
1207 OP (1) = relocation >> 8;
1208#endif
1209 break;
1210
1211 case R_RX_ABS8:
d4cb0ea0 1212 UNSAFE_FOR_PID;
c7927a3c
NC		 1213 RX_STACK_POP (relocation);
1214 RANGE (-128, 255);
1215 OP (0) = relocation;
1216 break;
1217
1218 case R_RX_ABS8U:
d4cb0ea0 1219 UNSAFE_FOR_PID;
c7927a3c
NC		 1220 RX_STACK_POP (relocation);
1221 RANGE (0, 255);
1222 OP (0) = relocation;
1223 break;
1224
1225 case R_RX_ABS8UL:
d4cb0ea0 1226 UNSAFE_FOR_PID;
c7927a3c
NC		 1227 RX_STACK_POP (relocation);
1228 relocation >>= 2;
1229 RANGE (0, 255);
1230 OP (0) = relocation;
1231 break;
1232
1233 case R_RX_ABS8UW:
d4cb0ea0 1234 UNSAFE_FOR_PID;
c7927a3c
NC		 1235 RX_STACK_POP (relocation);
1236 relocation >>= 1;
1237 RANGE (0, 255);
1238 OP (0) = relocation;
1239 break;
1240
c7927a3c 1241 case R_RX_ABS8S:
d4cb0ea0 1242 UNSAFE_FOR_PID;
1a0670f3 1243 /* Fall through. */
d4cb0ea0 1244 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1245 RX_STACK_POP (relocation);
1246 RANGE (-128, 127);
1247 OP (0) = relocation;
1248 break;
1249
1250 case R_RX_SYM:
1251 if (r_symndx < symtab_hdr->sh_info)
1252 RX_STACK_PUSH (sec->output_section->vma
1253 + sec->output_offset
d4cb0ea0
NC		 1254 + sym->st_value
1255 + rel->r_addend);
c7927a3c
NC		 1256 else
1257 {
1258 if (h != NULL
1259 && (h->root.type == bfd_link_hash_defined
1260 || h->root.type == bfd_link_hash_defweak))
1261 RX_STACK_PUSH (h->root.u.def.value
1262 + sec->output_section->vma
d4cb0ea0
NC		 1263 + sec->output_offset
1264 + rel->r_addend);
c7927a3c
NC		 1265 else
1266 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1267 }
1268 break;
1269
1270 case R_RX_OPneg:
1271 {
1272 int32_t tmp;
1273
ee181c72 1274 saw_subtract = TRUE;
c7927a3c
NC		 1275 RX_STACK_POP (tmp);
1276 tmp = - tmp;
1277 RX_STACK_PUSH (tmp);
1278 }
1279 break;
1280
1281 case R_RX_OPadd:
1282 {
1283 int32_t tmp1, tmp2;
1284
1285 RX_STACK_POP (tmp1);
1286 RX_STACK_POP (tmp2);
1287 tmp1 += tmp2;
1288 RX_STACK_PUSH (tmp1);
1289 }
1290 break;
1291
1292 case R_RX_OPsub:
1293 {
1294 int32_t tmp1, tmp2;
1295
d4cb0ea0 1296 saw_subtract = TRUE;
c7927a3c
NC		 1297 RX_STACK_POP (tmp1);
1298 RX_STACK_POP (tmp2);
1299 tmp2 -= tmp1;
1300 RX_STACK_PUSH (tmp2);
1301 }
1302 break;
1303
1304 case R_RX_OPmul:
1305 {
1306 int32_t tmp1, tmp2;
1307
1308 RX_STACK_POP (tmp1);
1309 RX_STACK_POP (tmp2);
1310 tmp1 *= tmp2;
1311 RX_STACK_PUSH (tmp1);
1312 }
1313 break;
1314
1315 case R_RX_OPdiv:
1316 {
1317 int32_t tmp1, tmp2;
1318
1319 RX_STACK_POP (tmp1);
1320 RX_STACK_POP (tmp2);
1321 tmp1 /= tmp2;
1322 RX_STACK_PUSH (tmp1);
1323 }
1324 break;
1325
1326 case R_RX_OPshla:
1327 {
1328 int32_t tmp1, tmp2;
1329
1330 RX_STACK_POP (tmp1);
1331 RX_STACK_POP (tmp2);
1332 tmp1 <<= tmp2;
1333 RX_STACK_PUSH (tmp1);
1334 }
1335 break;
1336
1337 case R_RX_OPshra:
1338 {
1339 int32_t tmp1, tmp2;
1340
1341 RX_STACK_POP (tmp1);
1342 RX_STACK_POP (tmp2);
1343 tmp1 >>= tmp2;
1344 RX_STACK_PUSH (tmp1);
1345 }
1346 break;
1347
1348 case R_RX_OPsctsize:
1349 RX_STACK_PUSH (input_section->size);
1350 break;
1351
1352 case R_RX_OPscttop:
1353 RX_STACK_PUSH (input_section->output_section->vma);
1354 break;
1355
1356 case R_RX_OPand:
1357 {
1358 int32_t tmp1, tmp2;
1359
1360 RX_STACK_POP (tmp1);
1361 RX_STACK_POP (tmp2);
1362 tmp1 &= tmp2;
1363 RX_STACK_PUSH (tmp1);
1364 }
1365 break;
1366
1367 case R_RX_OPor:
1368 {
1369 int32_t tmp1, tmp2;
1370
1371 RX_STACK_POP (tmp1);
1372 RX_STACK_POP (tmp2);
1373 tmp1 |= tmp2;
1374 RX_STACK_PUSH (tmp1);
1375 }
1376 break;
1377
1378 case R_RX_OPxor:
1379 {
1380 int32_t tmp1, tmp2;
1381
1382 RX_STACK_POP (tmp1);
1383 RX_STACK_POP (tmp2);
1384 tmp1 ^= tmp2;
1385 RX_STACK_PUSH (tmp1);
1386 }
1387 break;
1388
1389 case R_RX_OPnot:
1390 {
1391 int32_t tmp;
1392
1393 RX_STACK_POP (tmp);
1394 tmp = ~ tmp;
1395 RX_STACK_PUSH (tmp);
1396 }
1397 break;
1398
1399 case R_RX_OPmod:
1400 {
1401 int32_t tmp1, tmp2;
1402
1403 RX_STACK_POP (tmp1);
1404 RX_STACK_POP (tmp2);
1405 tmp1 %= tmp2;
1406 RX_STACK_PUSH (tmp1);
1407 }
1408 break;
1409
1410 case R_RX_OPromtop:
1a72702b 1411 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1412 break;
1413
1414 case R_RX_OPramtop:
1a72702b 1415 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1416 break;
1417
1418 default:
1419 r = bfd_reloc_notsupported;
1420 break;
1421 }
1422
1423 if (r != bfd_reloc_ok)
1424 {
1425 const char * msg = NULL;
1426
1427 switch (r)
1428 {
1429 case bfd_reloc_overflow:
1430 /* Catch the case of a missing function declaration
1431 and emit a more helpful error message. */
1432 if (r_type == R_RX_DIR24S_PCREL)
695344c0 1433 /* xgettext:c-format */
c7927a3c
NC		 1434 msg = _("%B(%A): error: call to undefined function '%s'");
1435 else
1a72702b 1436 (*info->callbacks->reloc_overflow)
c7927a3c
NC		 1437 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1438 input_bfd, input_section, rel->r_offset);
1439 break;
1440
1441 case bfd_reloc_undefined:
1a72702b
AM		 1442 (*info->callbacks->undefined_symbol)
1443 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
c7927a3c
NC		 1444 break;
1445
1446 case bfd_reloc_other:
695344c0 1447 /* xgettext:c-format */
c7927a3c
NC		 1448 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1449 break;
1450
1451 case bfd_reloc_outofrange:
695344c0 1452 /* xgettext:c-format */
c7927a3c
NC		 1453 msg = _("%B(%A): internal error: out of range error");
1454 break;
1455
1456 case bfd_reloc_notsupported:
695344c0 1457 /* xgettext:c-format */
c7927a3c
NC		 1458 msg = _("%B(%A): internal error: unsupported relocation error");
1459 break;
1460
1461 case bfd_reloc_dangerous:
695344c0 1462 /* xgettext:c-format */
c7927a3c
NC		 1463 msg = _("%B(%A): internal error: dangerous relocation");
1464 break;
1465
1466 default:
695344c0 1467 /* xgettext:c-format */
c7927a3c
NC		 1468 msg = _("%B(%A): internal error: unknown error");
1469 break;
1470 }
1471
1472 if (msg)
1473 _bfd_error_handler (msg, input_bfd, input_section, name);
c7927a3c
NC		 1474 }
1475 }
1476
1477 return TRUE;
1478}
1479\f
1480/* Relaxation Support. */
1481
1482/* Progression of relocations from largest operand size to smallest
1483 operand size. */
1484
1485static int
1486next_smaller_reloc (int r)
1487{
1488 switch (r)
1489 {
1490 case R_RX_DIR32: return R_RX_DIR24S;
1491 case R_RX_DIR24S: return R_RX_DIR16S;
1492 case R_RX_DIR16S: return R_RX_DIR8S;
1493 case R_RX_DIR8S: return R_RX_NONE;
1494
1495 case R_RX_DIR16: return R_RX_DIR8;
1496 case R_RX_DIR8: return R_RX_NONE;
1497
1498 case R_RX_DIR16U: return R_RX_DIR8U;
1499 case R_RX_DIR8U: return R_RX_NONE;
1500
1501 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1502 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1503 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1504
1505 case R_RX_DIR16UL: return R_RX_DIR8UL;
1506 case R_RX_DIR8UL: return R_RX_NONE;
1507 case R_RX_DIR16UW: return R_RX_DIR8UW;
1508 case R_RX_DIR8UW: return R_RX_NONE;
1509
1510 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1511 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1512 case R_RX_RH_16_OP: return R_RX_DIR8;
1513
1514 case R_RX_ABS32: return R_RX_ABS24S;
1515 case R_RX_ABS24S: return R_RX_ABS16S;
1516 case R_RX_ABS16: return R_RX_ABS8;
1517 case R_RX_ABS16U: return R_RX_ABS8U;
1518 case R_RX_ABS16S: return R_RX_ABS8S;
1519 case R_RX_ABS8: return R_RX_NONE;
1520 case R_RX_ABS8U: return R_RX_NONE;
1521 case R_RX_ABS8S: return R_RX_NONE;
1522 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1523 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1524 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1525 case R_RX_ABS16UL: return R_RX_ABS8UL;
1526 case R_RX_ABS16UW: return R_RX_ABS8UW;
1527 case R_RX_ABS8UL: return R_RX_NONE;
1528 case R_RX_ABS8UW: return R_RX_NONE;
1529 }
1530 return r;
1531};
1532
1533/* Delete some bytes from a section while relaxing. */
1534
1535static bfd_boolean
1536elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
5ee4a06a
NC		 1537 Elf_Internal_Rela *alignment_rel, int force_snip,
1538 Elf_Internal_Rela *irelstart)
c7927a3c
NC		 1539{
1540 Elf_Internal_Shdr * symtab_hdr;
1541 unsigned int sec_shndx;
1542 bfd_byte * contents;
1543 Elf_Internal_Rela * irel;
1544 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1545 Elf_Internal_Sym * isym;
1546 Elf_Internal_Sym * isymend;
1547 bfd_vma toaddr;
1548 unsigned int symcount;
1549 struct elf_link_hash_entry ** sym_hashes;
1550 struct elf_link_hash_entry ** end_hashes;
1551
1552 if (!alignment_rel)
1553 force_snip = 1;
1554
1555 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1556
1557 contents = elf_section_data (sec)->this_hdr.contents;
1558
1559 /* The deletion must stop at the next alignment boundary, if
1560 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1561 toaddr = sec->size;
1562 if (alignment_rel)
1563 toaddr = alignment_rel->r_offset;
1564
5ee4a06a 1565 BFD_ASSERT (toaddr > addr);
9c761a55 1566
c7927a3c
NC		 1567 /* Actually delete the bytes. */
1568 memmove (contents + addr, contents + addr + count,
1569 (size_t) (toaddr - addr - count));
1570
1571 /* If we don't have an alignment marker to worry about, we can just
1572 shrink the section. Otherwise, we have to fill in the newly
1573 created gap with NOP insns (0x03). */
1574 if (force_snip)
1575 sec->size -= count;
1576 else
1577 memset (contents + toaddr - count, 0x03, count);
1578
5ee4a06a
NC		 1579 irel = irelstart;
1580 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1581 irelend = irel + sec->reloc_count;
1582
c7927a3c 1583 /* Adjust all the relocs. */
9c761a55 1584 for (; irel < irelend; irel++)
c7927a3c
NC		 1585 {
1586 /* Get the new reloc address. */
1587 if (irel->r_offset > addr
1588 && (irel->r_offset < toaddr
1589 || (force_snip && irel->r_offset == toaddr)))
1590 irel->r_offset -= count;
1591
1592 /* If we see an ALIGN marker at the end of the gap, we move it
1593 to the beginning of the gap, since marking these gaps is what
1594 they're for. */
1595 if (irel->r_offset == toaddr
1596 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1597 && irel->r_addend & RX_RELAXA_ALIGN)
1598 irel->r_offset -= count;
1599 }
1600
1601 /* Adjust the local symbols defined in this section. */
1602 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1603 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1604 isymend = isym + symtab_hdr->sh_info;
1605
1606 for (; isym < isymend; isym++)
1607 {
1608 /* If the symbol is in the range of memory we just moved, we
1609 have to adjust its value. */
1610 if (isym->st_shndx == sec_shndx
1611 && isym->st_value > addr
1612 && isym->st_value < toaddr)
1613 isym->st_value -= count;
1614
1615 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1616 *end* is in the moved bytes but it's *start* isn't), then we
1617 must adjust its size. */
1618 if (isym->st_shndx == sec_shndx
1619 && isym->st_value < addr
1620 && isym->st_value + isym->st_size > addr
1621 && isym->st_value + isym->st_size < toaddr)
1622 isym->st_size -= count;
1623 }
1624
1625 /* Now adjust the global symbols defined in this section. */
1626 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1627 - symtab_hdr->sh_info);
1628 sym_hashes = elf_sym_hashes (abfd);
1629 end_hashes = sym_hashes + symcount;
1630
1631 for (; sym_hashes < end_hashes; sym_hashes++)
1632 {
1633 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1634
1635 if ((sym_hash->root.type == bfd_link_hash_defined
1636 || sym_hash->root.type == bfd_link_hash_defweak)
1637 && sym_hash->root.u.def.section == sec)
1638 {
1639 /* As above, adjust the value if needed. */
1640 if (sym_hash->root.u.def.value > addr
1641 && sym_hash->root.u.def.value < toaddr)
1642 sym_hash->root.u.def.value -= count;
1643
1644 /* As above, adjust the size if needed. */
1645 if (sym_hash->root.u.def.value < addr
1646 && sym_hash->root.u.def.value + sym_hash->size > addr
1647 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1648 sym_hash->size -= count;
1649 }
1650 }
1651
1652 return TRUE;
1653}
1654
1655/* Used to sort relocs by address. If relocs have the same address,
1656 we maintain their relative order, except that R_RX_RH_RELAX
1657 alignment relocs must be the first reloc for any given address. */
1658
1659static void
1660reloc_bubblesort (Elf_Internal_Rela * r, int count)
1661{
1662 int i;
1663 bfd_boolean again;
1664 bfd_boolean swappit;
1665
1666 /* This is almost a classic bubblesort. It's the slowest sort, but
1667 we're taking advantage of the fact that the relocations are
1668 mostly in order already (the assembler emits them that way) and
1669 we need relocs with the same address to remain in the same
1670 relative order. */
1671 again = TRUE;
1672 while (again)
1673 {
1674 again = FALSE;
1675 for (i = 0; i < count - 1; i ++)
1676 {
1677 if (r[i].r_offset > r[i + 1].r_offset)
1678 swappit = TRUE;
1679 else if (r[i].r_offset < r[i + 1].r_offset)
1680 swappit = FALSE;
1681 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1682 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1683 swappit = TRUE;
1684 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1685 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1686 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1687 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1688 swappit = TRUE;
1689 else
1690 swappit = FALSE;
1691
1692 if (swappit)
1693 {
1694 Elf_Internal_Rela tmp;
1695
1696 tmp = r[i];
1697 r[i] = r[i + 1];
1698 r[i + 1] = tmp;
1699 /* If we do move a reloc back, re-scan to see if it
1700 needs to be moved even further back. This avoids
1701 most of the O(n^2) behavior for our cases. */
1702 if (i > 0)
1703 i -= 2;
1704 again = TRUE;
1705 }
1706 }
1707 }
1708}
1709
1710
1711#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1712 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1713 lrel, abfd, sec, link_info, scale)
1714
1715static bfd_vma
1716rx_offset_for_reloc (bfd * abfd,
1717 Elf_Internal_Rela * rel,
1718 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1719 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
c7927a3c
NC		 1720 Elf_Internal_Sym * intsyms,
1721 Elf_Internal_Rela ** lrel,
1722 bfd * input_bfd,
1723 asection * input_section,
1724 struct bfd_link_info * info,
1725 int * scale)
1726{
1727 bfd_vma symval;
1728 bfd_reloc_status_type r;
1729
1730 *scale = 1;
1731
1732 /* REL is the first of 1..N relocations. We compute the symbol
1733 value for each relocation, then combine them if needed. LREL
1734 gets a pointer to the last relocation used. */
1735 while (1)
1736 {
1737 int32_t tmp1, tmp2;
1738
1739 /* Get the value of the symbol referred to by the reloc. */
1740 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1741 {
1742 /* A local symbol. */
1743 Elf_Internal_Sym *isym;
c7927a3c
NC		 1744 asection *ssec;
1745
1746 isym = intsyms + ELF32_R_SYM (rel->r_info);
1747
1748 if (isym->st_shndx == SHN_UNDEF)
1749 ssec = bfd_und_section_ptr;
1750 else if (isym->st_shndx == SHN_ABS)
1751 ssec = bfd_abs_section_ptr;
1752 else if (isym->st_shndx == SHN_COMMON)
1753 ssec = bfd_com_section_ptr;
1754 else
1755 ssec = bfd_section_from_elf_index (abfd,
1756 isym->st_shndx);
1757
c7927a3c
NC		 1758 /* Initial symbol value. */
1759 symval = isym->st_value;
1760
1761 /* GAS may have made this symbol relative to a section, in
1762 which case, we have to add the addend to find the
1763 symbol. */
1764 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1765 symval += rel->r_addend;
1766
1767 if (ssec)
1768 {
1769 if ((ssec->flags & SEC_MERGE)
dbaa2011 1770 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1771 symval = _bfd_merged_section_offset (abfd, & ssec,
1772 elf_section_data (ssec)->sec_info,
1773 symval);
1774 }
1775
1776 /* Now make the offset relative to where the linker is putting it. */
1777 if (ssec)
1778 symval +=
1779 ssec->output_section->vma + ssec->output_offset;
1780
1781 symval += rel->r_addend;
1782 }
1783 else
1784 {
1785 unsigned long indx;
1786 struct elf_link_hash_entry * h;
1787
1788 /* An external symbol. */
1789 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1790 h = elf_sym_hashes (abfd)[indx];
1791 BFD_ASSERT (h != NULL);
1792
1793 if (h->root.type != bfd_link_hash_defined
1794 && h->root.type != bfd_link_hash_defweak)
1795 {
1796 /* This appears to be a reference to an undefined
1797 symbol. Just ignore it--it will be caught by the
1798 regular reloc processing. */
1799 if (lrel)
1800 *lrel = rel;
1801 return 0;
1802 }
1803
1804 symval = (h->root.u.def.value
1805 + h->root.u.def.section->output_section->vma
1806 + h->root.u.def.section->output_offset);
1807
1808 symval += rel->r_addend;
1809 }
1810
1811 switch (ELF32_R_TYPE (rel->r_info))
1812 {
1813 case R_RX_SYM:
1814 RX_STACK_PUSH (symval);
1815 break;
1816
1817 case R_RX_OPneg:
1818 RX_STACK_POP (tmp1);
1819 tmp1 = - tmp1;
1820 RX_STACK_PUSH (tmp1);
1821 break;
1822
1823 case R_RX_OPadd:
1824 RX_STACK_POP (tmp1);
1825 RX_STACK_POP (tmp2);
1826 tmp1 += tmp2;
1827 RX_STACK_PUSH (tmp1);
1828 break;
1829
1830 case R_RX_OPsub:
1831 RX_STACK_POP (tmp1);
1832 RX_STACK_POP (tmp2);
1833 tmp2 -= tmp1;
1834 RX_STACK_PUSH (tmp2);
1835 break;
1836
1837 case R_RX_OPmul:
1838 RX_STACK_POP (tmp1);
1839 RX_STACK_POP (tmp2);
1840 tmp1 *= tmp2;
1841 RX_STACK_PUSH (tmp1);
1842 break;
1843
1844 case R_RX_OPdiv:
1845 RX_STACK_POP (tmp1);
1846 RX_STACK_POP (tmp2);
1847 tmp1 /= tmp2;
1848 RX_STACK_PUSH (tmp1);
1849 break;
1850
1851 case R_RX_OPshla:
1852 RX_STACK_POP (tmp1);
1853 RX_STACK_POP (tmp2);
1854 tmp1 <<= tmp2;
1855 RX_STACK_PUSH (tmp1);
1856 break;
1857
1858 case R_RX_OPshra:
1859 RX_STACK_POP (tmp1);
1860 RX_STACK_POP (tmp2);
1861 tmp1 >>= tmp2;
1862 RX_STACK_PUSH (tmp1);
1863 break;
1864
1865 case R_RX_OPsctsize:
1866 RX_STACK_PUSH (input_section->size);
1867 break;
1868
1869 case R_RX_OPscttop:
1870 RX_STACK_PUSH (input_section->output_section->vma);
1871 break;
1872
1873 case R_RX_OPand:
1874 RX_STACK_POP (tmp1);
1875 RX_STACK_POP (tmp2);
1876 tmp1 &= tmp2;
1877 RX_STACK_PUSH (tmp1);
1878 break;
1879
1880 case R_RX_OPor:
1881 RX_STACK_POP (tmp1);
1882 RX_STACK_POP (tmp2);
1883 tmp1 |= tmp2;
1884 RX_STACK_PUSH (tmp1);
1885 break;
1886
1887 case R_RX_OPxor:
1888 RX_STACK_POP (tmp1);
1889 RX_STACK_POP (tmp2);
1890 tmp1 ^= tmp2;
1891 RX_STACK_PUSH (tmp1);
1892 break;
1893
1894 case R_RX_OPnot:
1895 RX_STACK_POP (tmp1);
1896 tmp1 = ~ tmp1;
1897 RX_STACK_PUSH (tmp1);
1898 break;
1899
1900 case R_RX_OPmod:
1901 RX_STACK_POP (tmp1);
1902 RX_STACK_POP (tmp2);
1903 tmp1 %= tmp2;
1904 RX_STACK_PUSH (tmp1);
1905 break;
1906
1907 case R_RX_OPromtop:
1a72702b 1908 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1909 break;
1910
1911 case R_RX_OPramtop:
1a72702b 1912 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1913 break;
1914
1915 case R_RX_DIR16UL:
1916 case R_RX_DIR8UL:
1917 case R_RX_ABS16UL:
1918 case R_RX_ABS8UL:
1919 if (rx_stack_top)
1920 RX_STACK_POP (symval);
1921 if (lrel)
1922 *lrel = rel;
1923 *scale = 4;
1924 return symval;
1925
1926 case R_RX_DIR16UW:
1927 case R_RX_DIR8UW:
1928 case R_RX_ABS16UW:
1929 case R_RX_ABS8UW:
1930 if (rx_stack_top)
1931 RX_STACK_POP (symval);
1932 if (lrel)
1933 *lrel = rel;
1934 *scale = 2;
1935 return symval;
1936
1937 default:
1938 if (rx_stack_top)
1939 RX_STACK_POP (symval);
1940 if (lrel)
1941 *lrel = rel;
1942 return symval;
1943 }
1944
1945 rel ++;
1946 }
1a72702b
AM		 1947 /* FIXME. */
1948 (void) r;
c7927a3c
NC		 1949}
1950
1951static void
1952move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1953{
1954 bfd_vma old_offset = srel->r_offset;
1955
1956 irel ++;
1957 while (irel <= srel)
1958 {
1959 if (irel->r_offset == old_offset)
1960 irel->r_offset += delta;
1961 irel ++;
1962 }
1963}
1964
1965/* Relax one section. */
1966
1967static bfd_boolean
1968elf32_rx_relax_section (bfd * abfd,
1969 asection * sec,
1970 struct bfd_link_info * link_info,
1971 bfd_boolean * again,
1972 bfd_boolean allow_pcrel3)
1973{
1974 Elf_Internal_Shdr * symtab_hdr;
1975 Elf_Internal_Shdr * shndx_hdr;
1976 Elf_Internal_Rela * internal_relocs;
c7927a3c
NC		 1977 Elf_Internal_Rela * irel;
1978 Elf_Internal_Rela * srel;
1979 Elf_Internal_Rela * irelend;
1980 Elf_Internal_Rela * next_alignment;
1981 Elf_Internal_Rela * prev_alignment;
1982 bfd_byte * contents = NULL;
1983 bfd_byte * free_contents = NULL;
1984 Elf_Internal_Sym * intsyms = NULL;
1985 Elf_Internal_Sym * free_intsyms = NULL;
1986 Elf_External_Sym_Shndx * shndx_buf = NULL;
1987 bfd_vma pc;
1988 bfd_vma sec_start;
c7927a3c
NC		 1989 bfd_vma symval = 0;
1990 int pcrel = 0;
1991 int code = 0;
1992 int section_alignment_glue;
1993 /* how much to scale the relocation by - 1, 2, or 4. */
1994 int scale;
1995
1996 /* Assume nothing changes. */
1997 *again = FALSE;
1998
1999 /* We don't have to do anything for a relocatable link, if
2000 this section does not have relocs, or if this is not a
2001 code section. */
0e1862bb 2002 if (bfd_link_relocatable (link_info)
c7927a3c
NC		 2003 || (sec->flags & SEC_RELOC) == 0
2004 || sec->reloc_count == 0
2005 || (sec->flags & SEC_CODE) == 0)
2006 return TRUE;
2007
6a40cf0c
NC		 2008 symtab_hdr = & elf_symtab_hdr (abfd);
2009 if (elf_symtab_shndx_list (abfd))
2010 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2011 else
2012 shndx_hdr = NULL;
c7927a3c
NC		 2013
2014 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2015
2016 /* Get the section contents. */
2017 if (elf_section_data (sec)->this_hdr.contents != NULL)
2018 contents = elf_section_data (sec)->this_hdr.contents;
2019 /* Go get them off disk. */
2020 else
2021 {
2022 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2023 goto error_return;
2024 elf_section_data (sec)->this_hdr.contents = contents;
2025 }
2026
2027 /* Read this BFD's symbols. */
2028 /* Get cached copy if it exists. */
2029 if (symtab_hdr->contents != NULL)
2030 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2031 else
2032 {
2033 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2034 symtab_hdr->contents = (bfd_byte *) intsyms;
2035 }
2036
6a40cf0c 2037 if (shndx_hdr && shndx_hdr->sh_size != 0)
c7927a3c
NC		 2038 {
2039 bfd_size_type amt;
2040
2041 amt = symtab_hdr->sh_info;
2042 amt *= sizeof (Elf_External_Sym_Shndx);
2043 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2044 if (shndx_buf == NULL)
2045 goto error_return;
2046 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2047 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2048 goto error_return;
2049 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2050 }
2051
2052 /* Get a copy of the native relocations. */
5ee4a06a
NC		 2053 /* Note - we ignore the setting of link_info->keep_memory when reading
2054 in these relocs. We have to maintain a permanent copy of the relocs
2055 because we are going to walk over them multiple times, adjusting them
2056 as bytes are deleted from the section, and with this relaxation
2057 function itself being called multiple times on the same section... */
2058 internal_relocs = _bfd_elf_link_read_relocs
2059 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE);
c7927a3c
NC		 2060 if (internal_relocs == NULL)
2061 goto error_return;
c7927a3c
NC		 2062
2063 /* The RL_ relocs must be just before the operand relocs they go
2064 with, so we must sort them to guarantee this. We use bubblesort
2065 instead of qsort so we can guarantee that relocs with the same
2066 address remain in the same relative order. */
2067 reloc_bubblesort (internal_relocs, sec->reloc_count);
2068
2069 /* Walk through them looking for relaxing opportunities. */
2070 irelend = internal_relocs + sec->reloc_count;
2071
2072 /* This will either be NULL or a pointer to the next alignment
2073 relocation. */
2074 next_alignment = internal_relocs;
2075 /* This will be the previous alignment, although at first it points
2076 to the first real relocation. */
2077 prev_alignment = internal_relocs;
2078
2079 /* We calculate worst case shrinkage caused by alignment directives.
2080 No fool-proof, but better than either ignoring the problem or
2081 doing heavy duty analysis of all the alignment markers in all
2082 input sections. */
2083 section_alignment_glue = 0;
2084 for (irel = internal_relocs; irel < irelend; irel++)
2085 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2086 && irel->r_addend & RX_RELAXA_ALIGN)
2087 {
2088 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2089
2090 if (section_alignment_glue < this_glue)
2091 section_alignment_glue = this_glue;
2092 }
2093 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2094 shrinkage. */
2095 section_alignment_glue *= 2;
2096
2097 for (irel = internal_relocs; irel < irelend; irel++)
2098 {
2099 unsigned char *insn;
2100 int nrelocs;
2101
2102 /* The insns we care about are all marked with one of these. */
2103 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2104 continue;
2105
2106 if (irel->r_addend & RX_RELAXA_ALIGN
2107 || next_alignment == internal_relocs)
2108 {
2109 /* When we delete bytes, we need to maintain all the alignments
2110 indicated. In addition, we need to be careful about relaxing
2111 jumps across alignment boundaries - these displacements
2112 *grow* when we delete bytes. For now, don't shrink
2113 displacements across an alignment boundary, just in case.
2114 Note that this only affects relocations to the same
2115 section. */
2116 prev_alignment = next_alignment;
2117 next_alignment += 2;
2118 while (next_alignment < irelend
2119 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2120 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2121 next_alignment ++;
2122 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2123 next_alignment = NULL;
2124 }
2125
2126 /* When we hit alignment markers, see if we've shrunk enough
2127 before them to reduce the gap without violating the alignment
2128 requirements. */
2129 if (irel->r_addend & RX_RELAXA_ALIGN)
2130 {
2131 /* At this point, the next relocation *should* be the ELIGN
2132 end marker. */
2133 Elf_Internal_Rela *erel = irel + 1;
2134 unsigned int alignment, nbytes;
2135
2136 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2137 continue;
2138 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2139 continue;
2140
2141 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2142
2143 if (erel->r_offset - irel->r_offset < alignment)
2144 continue;
2145
2146 nbytes = erel->r_offset - irel->r_offset;
2147 nbytes /= alignment;
2148 nbytes *= alignment;
2149
2150 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
5ee4a06a 2151 erel->r_offset == sec->size, internal_relocs);
c7927a3c
NC		 2152 *again = TRUE;
2153
2154 continue;
2155 }
2156
2157 if (irel->r_addend & RX_RELAXA_ELIGN)
2158 continue;
2159
2160 insn = contents + irel->r_offset;
2161
2162 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2163
2164 /* At this point, we have an insn that is a candidate for linker
2165 relaxation. There are NRELOCS relocs following that may be
2166 relaxed, although each reloc may be made of more than one
2167 reloc entry (such as gp-rel symbols). */
2168
2169 /* Get the value of the symbol referred to by the reloc. Just
2170 in case this is the last reloc in the list, use the RL's
2171 addend to choose between this reloc (no addend) or the next
2172 (yes addend, which means at least one following reloc). */
2173
2174 /* srel points to the "current" reloction for this insn -
2175 actually the last reloc for a given operand, which is the one
2176 we need to update. We check the relaxations in the same
2177 order that the relocations happen, so we'll just push it
2178 along as we go. */
2179 srel = irel;
2180
2181 pc = sec->output_section->vma + sec->output_offset
2182 + srel->r_offset;
2183
2184#define GET_RELOC \
2185 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2186 pcrel = symval - pc + srel->r_addend; \
2187 nrelocs --;
2188
2189#define SNIPNR(offset, nbytes) \
5ee4a06a 2190 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
c7927a3c
NC		 2191#define SNIP(offset, nbytes, newtype) \
2192 SNIPNR (offset, nbytes); \
2193 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2194
2195 /* The order of these bit tests must match the order that the
2196 relocs appear in. Since we sorted those by offset, we can
2197 predict them. */
2198
2199 /* Note that the numbers in, say, DSP6 are the bit offsets of
2200 the code fields that describe the operand. Bits number 0 for
2201 the MSB of insn[0]. */
2202
2203 /* DSP* codes:
2204 0 00 [reg]
2205 1 01 dsp:8[reg]
2206 2 10 dsp:16[reg]
2207 3 11 reg */
2208 if (irel->r_addend & RX_RELAXA_DSP6)
2209 {
2210 GET_RELOC;
2211
2212 code = insn[0] & 3;
2213 if (code == 2 && symval/scale <= 255)
2214 {
2215 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2216 insn[0] &= 0xfc;
2217 insn[0] |= 0x01;
2218 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2219 if (newrel != ELF32_R_TYPE (srel->r_info))
2220 {
2221 SNIP (3, 1, newrel);
2222 *again = TRUE;
2223 }
2224 }
2225
2226 else if (code == 1 && symval == 0)
2227 {
2228 insn[0] &= 0xfc;
2229 SNIP (2, 1, R_RX_NONE);
2230 *again = TRUE;
2231 }
2232
2233 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2234 else if (code == 1 && symval/scale <= 31
2235 /* Decodable bits. */
2236 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2237 /* Width. */
eb8c5f3f 2238 && (insn[0] & 0x30) != 0x30
91d6fa6a 2239 /* Register MSBs. */
c7927a3c
NC		 2240 && (insn[1] & 0x88) == 0x00)
2241 {
2242 int newrel = 0;
2243
2244 insn[0] = 0x88 | (insn[0] & 0x30);
2245 /* The register fields are in the right place already. */
2246
2247 /* We can't relax this new opcode. */
2248 irel->r_addend = 0;
2249
2250 switch ((insn[0] & 0x30) >> 4)
2251 {
2252 case 0:
2253 newrel = R_RX_RH_ABS5p5B;
2254 break;
2255 case 1:
2256 newrel = R_RX_RH_ABS5p5W;
2257 break;
2258 case 2:
2259 newrel = R_RX_RH_ABS5p5L;
2260 break;
2261 }
2262
2263 move_reloc (irel, srel, -2);
2264 SNIP (2, 1, newrel);
2265 }
2266
2267 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2268 else if (code == 1 && symval/scale <= 31
2269 /* Decodable bits. */
2270 && (insn[0] & 0xf8) == 0x58
2271 /* Register MSBs. */
2272 && (insn[1] & 0x88) == 0x00)
2273 {
2274 int newrel = 0;
2275
2276 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2277 /* The register fields are in the right place already. */
2278
2279 /* We can't relax this new opcode. */
2280 irel->r_addend = 0;
2281
2282 switch ((insn[0] & 0x08) >> 3)
2283 {
2284 case 0:
2285 newrel = R_RX_RH_ABS5p5B;
2286 break;
2287 case 1:
2288 newrel = R_RX_RH_ABS5p5W;
2289 break;
2290 }
2291
2292 move_reloc (irel, srel, -2);
2293 SNIP (2, 1, newrel);
2294 }
2295 }
2296
2297 /* A DSP4 operand always follows a DSP6 operand, even if there's
2298 no relocation for it. We have to read the code out of the
2299 opcode to calculate the offset of the operand. */
2300 if (irel->r_addend & RX_RELAXA_DSP4)
2301 {
2302 int code6, offset = 0;
2303
2304 GET_RELOC;
2305
2306 code6 = insn[0] & 0x03;
2307 switch (code6)
2308 {
2309 case 0: offset = 2; break;
2310 case 1: offset = 3; break;
2311 case 2: offset = 4; break;
2312 case 3: offset = 2; break;
2313 }
2314
2315 code = (insn[0] & 0x0c) >> 2;
2316
2317 if (code == 2 && symval / scale <= 255)
2318 {
2319 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2320
2321 insn[0] &= 0xf3;
2322 insn[0] |= 0x04;
2323 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2324 if (newrel != ELF32_R_TYPE (srel->r_info))
2325 {
2326 SNIP (offset+1, 1, newrel);
2327 *again = TRUE;
2328 }
2329 }
2330
2331 else if (code == 1 && symval == 0)
2332 {
2333 insn[0] &= 0xf3;
2334 SNIP (offset, 1, R_RX_NONE);
2335 *again = TRUE;
2336 }
2337 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2338 else if (code == 1 && symval/scale <= 31
2339 /* Decodable bits. */
2340 && (insn[0] & 0xc3) == 0xc3
2341 /* Width. */
eb8c5f3f 2342 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2343 /* Register MSBs. */
2344 && (insn[1] & 0x88) == 0x00)
2345 {
2346 int newrel = 0;
2347
2348 insn[0] = 0x80 | (insn[0] & 0x30);
2349 /* The register fields are in the right place already. */
2350
2351 /* We can't relax this new opcode. */
2352 irel->r_addend = 0;
2353
2354 switch ((insn[0] & 0x30) >> 4)
2355 {
2356 case 0:
2357 newrel = R_RX_RH_ABS5p5B;
2358 break;
2359 case 1:
2360 newrel = R_RX_RH_ABS5p5W;
2361 break;
2362 case 2:
2363 newrel = R_RX_RH_ABS5p5L;
2364 break;
2365 }
2366
2367 move_reloc (irel, srel, -2);
2368 SNIP (2, 1, newrel);
2369 }
2370 }
2371
2372 /* These always occur alone, but the offset depends on whether
2373 it's a MEMEX opcode (0x06) or not. */
2374 if (irel->r_addend & RX_RELAXA_DSP14)
2375 {
2376 int offset;
2377 GET_RELOC;
2378
2379 if (insn[0] == 0x06)
2380 offset = 3;
2381 else
2382 offset = 4;
2383
2384 code = insn[1] & 3;
2385
2386 if (code == 2 && symval / scale <= 255)
2387 {
2388 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2389
2390 insn[1] &= 0xfc;
2391 insn[1] |= 0x01;
2392 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2393 if (newrel != ELF32_R_TYPE (srel->r_info))
2394 {
2395 SNIP (offset, 1, newrel);
2396 *again = TRUE;
2397 }
2398 }
2399 else if (code == 1 && symval == 0)
2400 {
2401 insn[1] &= 0xfc;
2402 SNIP (offset, 1, R_RX_NONE);
2403 *again = TRUE;
2404 }
2405 }
2406
2407 /* IMM* codes:
2408 0 00 imm:32
2409 1 01 simm:8
2410 2 10 simm:16
2411 3 11 simm:24. */
2412
2413 /* These always occur alone. */
2414 if (irel->r_addend & RX_RELAXA_IMM6)
2415 {
2416 long ssymval;
2417
2418 GET_RELOC;
2419
2420 /* These relocations sign-extend, so we must do signed compares. */
2421 ssymval = (long) symval;
2422
2423 code = insn[0] & 0x03;
2424
2425 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2426 {
2427 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2428
2429 insn[0] &= 0xfc;
2430 insn[0] |= 0x03;
2431 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2432 if (newrel != ELF32_R_TYPE (srel->r_info))
2433 {
2434 SNIP (2, 1, newrel);
2435 *again = TRUE;
2436 }
2437 }
2438
2439 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2440 {
2441 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2442
2443 insn[0] &= 0xfc;
2444 insn[0] |= 0x02;
2445 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2446 if (newrel != ELF32_R_TYPE (srel->r_info))
2447 {
2448 SNIP (2, 1, newrel);
2449 *again = TRUE;
2450 }
2451 }
2452
2453 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2454 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2455 /* Decodable bits. */
2456 && (insn[0] & 0xfc) == 0x74
2457 /* Decodable bits. */
2458 && ((insn[1] & 0xf0) == 0x00))
2459 {
2460 int newrel;
2461
2462 insn[0] = 0x75;
2463 insn[1] = 0x50 | (insn[1] & 0x0f);
2464
2465 /* We can't relax this new opcode. */
2466 irel->r_addend = 0;
2467
2468 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2469 newrel = R_RX_ABS8U;
2470 else
2471 newrel = R_RX_DIR8U;
2472
2473 SNIP (2, 1, newrel);
2474 *again = TRUE;
2475 }
2476
2477 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2478 {
2479 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2480
2481 insn[0] &= 0xfc;
2482 insn[0] |= 0x01;
2483 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2484 if (newrel != ELF32_R_TYPE (srel->r_info))
2485 {
2486 SNIP (2, 1, newrel);
2487 *again = TRUE;
2488 }
2489 }
2490
2491 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2492 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2493 /* Decodable bits and immediate type. */
2494 && insn[0] == 0x75
2495 /* Decodable bits. */
2496 && (insn[1] & 0xc0) == 0x00)
2497 {
2498 static const int newop[4] = { 1, 3, 4, 5 };
2499
2500 insn[0] = 0x60 | newop[insn[1] >> 4];
2501 /* The register number doesn't move. */
2502
2503 /* We can't relax this new opcode. */
2504 irel->r_addend = 0;
2505
2506 move_reloc (irel, srel, -1);
2507
2508 SNIP (2, 1, R_RX_RH_UIMM4p8);
2509 *again = TRUE;
2510 }
2511
2512 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2513 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2514 /* Decodable bits and immediate type. */
2515 && insn[0] == 0x71
2516 /* Same register for source and destination. */
2517 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2518 {
2519 int newrel;
2520
2521 /* Note that we can't turn "add $0,Rs" into a NOP
2522 because the flags need to be set right. */
2523
2524 if (ssymval < 0)
2525 {
2526 insn[0] = 0x60; /* Subtract. */
2527 newrel = R_RX_RH_UNEG4p8;
2528 }
2529 else
2530 {
2531 insn[0] = 0x62; /* Add. */
2532 newrel = R_RX_RH_UIMM4p8;
2533 }
2534
2535 /* The register number is in the right place. */
2536
2537 /* We can't relax this new opcode. */
2538 irel->r_addend = 0;
2539
2540 move_reloc (irel, srel, -1);
2541
2542 SNIP (2, 1, newrel);
2543 *again = TRUE;
2544 }
2545 }
2546
2547 /* These are either matched with a DSP6 (2-byte base) or an id24
2548 (3-byte base). */
2549 if (irel->r_addend & RX_RELAXA_IMM12)
2550 {
2551 int dspcode, offset = 0;
2552 long ssymval;
2553
2554 GET_RELOC;
2555
2556 if ((insn[0] & 0xfc) == 0xfc)
2557 dspcode = 1; /* Just something with one byte operand. */
2558 else
2559 dspcode = insn[0] & 3;
2560 switch (dspcode)
2561 {
2562 case 0: offset = 2; break;
2563 case 1: offset = 3; break;
2564 case 2: offset = 4; break;
2565 case 3: offset = 2; break;
2566 }
2567
2568 /* These relocations sign-extend, so we must do signed compares. */
2569 ssymval = (long) symval;
2570
2571 code = (insn[1] >> 2) & 3;
2572 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2573 {
2574 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2575
2576 insn[1] &= 0xf3;
2577 insn[1] |= 0x0c;
2578 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2579 if (newrel != ELF32_R_TYPE (srel->r_info))
2580 {
2581 SNIP (offset, 1, newrel);
2582 *again = TRUE;
2583 }
2584 }
2585
2586 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2587 {
2588 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2589
2590 insn[1] &= 0xf3;
2591 insn[1] |= 0x08;
2592 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2593 if (newrel != ELF32_R_TYPE (srel->r_info))
2594 {
2595 SNIP (offset, 1, newrel);
2596 *again = TRUE;
2597 }
2598 }
2599
2600 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2601 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2602 /* Decodable bits. */
2603 && insn[0] == 0xfb
2604 /* Decodable bits. */
2605 && ((insn[1] & 0x03) == 0x02))
2606 {
2607 int newrel;
2608
2609 insn[0] = 0x75;
2610 insn[1] = 0x40 | (insn[1] >> 4);
2611
2612 /* We can't relax this new opcode. */
2613 irel->r_addend = 0;
2614
2615 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2616 newrel = R_RX_ABS8U;
2617 else
2618 newrel = R_RX_DIR8U;
2619
2620 SNIP (2, 1, newrel);
2621 *again = TRUE;
2622 }
2623
2624 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2625 {
2626 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2627
2628 insn[1] &= 0xf3;
2629 insn[1] |= 0x04;
2630 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2631 if (newrel != ELF32_R_TYPE(srel->r_info))
2632 {
2633 SNIP (offset, 1, newrel);
2634 *again = TRUE;
2635 }
2636 }
2637
2638 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2639 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2640 /* Decodable bits. */
2641 && insn[0] == 0xfb
2642 /* Decodable bits. */
2643 && ((insn[1] & 0x03) == 0x02))
2644 {
2645 insn[0] = 0x66;
2646 insn[1] = insn[1] >> 4;
2647
2648 /* We can't relax this new opcode. */
2649 irel->r_addend = 0;
2650
2651 move_reloc (irel, srel, -1);
2652
2653 SNIP (2, 1, R_RX_RH_UIMM4p8);
2654 *again = TRUE;
2655 }
2656 }
2657
2658 if (irel->r_addend & RX_RELAXA_BRA)
2659 {
2660 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2661 int max_pcrel3 = 4;
2662 int alignment_glue = 0;
2663
2664 GET_RELOC;
2665
2666 /* Branches over alignment chunks are problematic, as
2667 deleting bytes here makes the branch *further* away. We
2668 can be agressive with branches within this alignment
2669 block, but not branches outside it. */
2670 if ((prev_alignment == NULL
2671 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2672 && (next_alignment == NULL
2673 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2674 alignment_glue = section_alignment_glue;
2675
2676 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2677 && srel[1].r_addend & RX_RELAXA_BRA
2678 && srel[1].r_offset < irel->r_offset + pcrel)
2679 max_pcrel3 ++;
2680
2681 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2682
2683 /* The values we compare PCREL with are not what you'd
2684 expect; they're off by a little to compensate for (1)
2685 where the reloc is relative to the insn, and (2) how much
2686 the insn is going to change when we relax it. */
2687
2688 /* These we have to decode. */
2689 switch (insn[0])
2690 {
2691 case 0x04: /* BRA pcdsp:24 */
2692 if (-32768 + alignment_glue <= pcrel
2693 && pcrel <= 32765 - alignment_glue)
2694 {
2695 insn[0] = 0x38;
2696 SNIP (3, 1, newrel);
2697 *again = TRUE;
2698 }
2699 break;
2700
2701 case 0x38: /* BRA pcdsp:16 */
2702 if (-128 + alignment_glue <= pcrel
2703 && pcrel <= 127 - alignment_glue)
2704 {
2705 insn[0] = 0x2e;
2706 SNIP (2, 1, newrel);
2707 *again = TRUE;
2708 }
2709 break;
2710
2711 case 0x2e: /* BRA pcdsp:8 */
2712 /* Note that there's a risk here of shortening things so
2713 much that we no longer fit this reloc; it *should*
2714 only happen when you branch across a branch, and that
2715 branch also devolves into BRA.S. "Real" code should
2716 be OK. */
2717 if (max_pcrel3 + alignment_glue <= pcrel
2718 && pcrel <= 10 - alignment_glue
2719 && allow_pcrel3)
2720 {
2721 insn[0] = 0x08;
2722 SNIP (1, 1, newrel);
2723 move_reloc (irel, srel, -1);
2724 *again = TRUE;
2725 }
2726 break;
2727
2728 case 0x05: /* BSR pcdsp:24 */
2729 if (-32768 + alignment_glue <= pcrel
2730 && pcrel <= 32765 - alignment_glue)
2731 {
2732 insn[0] = 0x39;
2733 SNIP (1, 1, newrel);
2734 *again = TRUE;
2735 }
2736 break;
2737
2738 case 0x3a: /* BEQ.W pcdsp:16 */
2739 case 0x3b: /* BNE.W pcdsp:16 */
2740 if (-128 + alignment_glue <= pcrel
2741 && pcrel <= 127 - alignment_glue)
2742 {
2743 insn[0] = 0x20 | (insn[0] & 1);
2744 SNIP (1, 1, newrel);
2745 *again = TRUE;
2746 }
2747 break;
2748
2749 case 0x20: /* BEQ.B pcdsp:8 */
2750 case 0x21: /* BNE.B pcdsp:8 */
2751 if (max_pcrel3 + alignment_glue <= pcrel
2752 && pcrel - alignment_glue <= 10
2753 && allow_pcrel3)
2754 {
2755 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2756 SNIP (1, 1, newrel);
2757 move_reloc (irel, srel, -1);
2758 *again = TRUE;
2759 }
2760 break;
2761
2762 case 0x16: /* synthetic BNE dsp24 */
2763 case 0x1e: /* synthetic BEQ dsp24 */
2764 if (-32767 + alignment_glue <= pcrel
2765 && pcrel <= 32766 - alignment_glue
2766 && insn[1] == 0x04)
2767 {
2768 if (insn[0] == 0x16)
2769 insn[0] = 0x3b;
2770 else
2771 insn[0] = 0x3a;
2772 /* We snip out the bytes at the end else the reloc
2773 will get moved too, and too much. */
2774 SNIP (3, 2, newrel);
2775 move_reloc (irel, srel, -1);
2776 *again = TRUE;
2777 }
2778 break;
2779 }
2780
2781 /* Special case - synthetic conditional branches, pcrel24.
2782 Note that EQ and NE have been handled above. */
2783 if ((insn[0] & 0xf0) == 0x20
2784 && insn[1] == 0x06
2785 && insn[2] == 0x04
2786 && srel->r_offset != irel->r_offset + 1
2787 && -32767 + alignment_glue <= pcrel
2788 && pcrel <= 32766 - alignment_glue)
2789 {
2790 insn[1] = 0x05;
2791 insn[2] = 0x38;
2792 SNIP (5, 1, newrel);
2793 *again = TRUE;
2794 }
2795
2796 /* Special case - synthetic conditional branches, pcrel16 */
2797 if ((insn[0] & 0xf0) == 0x20
2798 && insn[1] == 0x05
2799 && insn[2] == 0x38
2800 && srel->r_offset != irel->r_offset + 1
2801 && -127 + alignment_glue <= pcrel
2802 && pcrel <= 126 - alignment_glue)
2803 {
2804 int cond = (insn[0] & 0x0f) ^ 0x01;
2805
2806 insn[0] = 0x20 | cond;
2807 /* By moving the reloc first, we avoid having
2808 delete_bytes move it also. */
2809 move_reloc (irel, srel, -2);
2810 SNIP (2, 3, newrel);
2811 *again = TRUE;
2812 }
2813 }
2814
2815 BFD_ASSERT (nrelocs == 0);
2816
2817 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2818 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2819 because it may have one or two relocations. */
2820 if ((insn[0] & 0xfc) == 0xf8
2821 && (insn[1] & 0x80) == 0x00
2822 && (insn[0] & 0x03) != 0x03)
2823 {
2824 int dcode, icode, reg, ioff, dscale, ilen;
2825 bfd_vma disp_val = 0;
2826 long imm_val = 0;
2827 Elf_Internal_Rela * disp_rel = 0;
2828 Elf_Internal_Rela * imm_rel = 0;
2829
2830 /* Reset this. */
2831 srel = irel;
2832
2833 dcode = insn[0] & 0x03;
2834 icode = (insn[1] >> 2) & 0x03;
2835 reg = (insn[1] >> 4) & 0x0f;
2836
2837 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2838
2839 /* Figure out what the dispacement is. */
2840 if (dcode == 1 || dcode == 2)
2841 {
2842 /* There's a displacement. See if there's a reloc for it. */
2843 if (srel[1].r_offset == irel->r_offset + 2)
2844 {
2845 GET_RELOC;
2846 disp_val = symval;
2847 disp_rel = srel;
2848 }
2849 else
2850 {
2851 if (dcode == 1)
2852 disp_val = insn[2];
2853 else
2854 {
2855#if RX_OPCODE_BIG_ENDIAN
2856 disp_val = insn[2] * 256 + insn[3];
2857#else
2858 disp_val = insn[2] + insn[3] * 256;
2859#endif
2860 }
2861 switch (insn[1] & 3)
2862 {
2863 case 1:
2864 disp_val *= 2;
2865 scale = 2;
2866 break;
2867 case 2:
2868 disp_val *= 4;
2869 scale = 4;
2870 break;
2871 }
2872 }
2873 }
2874
2875 dscale = scale;
2876
2877 /* Figure out what the immediate is. */
2878 if (srel[1].r_offset == irel->r_offset + ioff)
2879 {
2880 GET_RELOC;
2881 imm_val = (long) symval;
2882 imm_rel = srel;
2883 }
2884 else
2885 {
2886 unsigned char * ip = insn + ioff;
2887
2888 switch (icode)
2889 {
2890 case 1:
2891 /* For byte writes, we don't sign extend. Makes the math easier later. */
2892 if (scale == 1)
2893 imm_val = ip[0];
2894 else
2895 imm_val = (char) ip[0];
2896 break;
2897 case 2:
2898#if RX_OPCODE_BIG_ENDIAN
2899 imm_val = ((char) ip[0] << 8) | ip[1];
2900#else
2901 imm_val = ((char) ip[1] << 8) | ip[0];
2902#endif
2903 break;
2904 case 3:
2905#if RX_OPCODE_BIG_ENDIAN
2906 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2907#else
2908 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2909#endif
2910 break;
2911 case 0:
2912#if RX_OPCODE_BIG_ENDIAN
2913 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2914#else
2915 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2916#endif
2917 break;
2918 }
2919 }
2920
2921 ilen = 2;
2922
2923 switch (dcode)
2924 {
2925 case 1:
2926 ilen += 1;
2927 break;
2928 case 2:
2929 ilen += 2;
2930 break;
2931 }
2932
2933 switch (icode)
2934 {
2935 case 1:
2936 ilen += 1;
2937 break;
2938 case 2:
2939 ilen += 2;
2940 break;
2941 case 3:
2942 ilen += 3;
2943 break;
2944 case 4:
2945 ilen += 4;
2946 break;
2947 }
2948
2949 /* The shortcut happens when the immediate is 0..255,
2950 register r0 to r7, and displacement (scaled) 0..31. */
2951
2952 if (0 <= imm_val && imm_val <= 255
2953 && 0 <= reg && reg <= 7
2954 && disp_val / dscale <= 31)
2955 {
2956 insn[0] = 0x3c | (insn[1] & 0x03);
2957 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2958 insn[2] = imm_val;
2959
2960 if (disp_rel)
2961 {
2962 int newrel = R_RX_NONE;
2963
2964 switch (dscale)
2965 {
2966 case 1:
2967 newrel = R_RX_RH_ABS5p8B;
2968 break;
2969 case 2:
2970 newrel = R_RX_RH_ABS5p8W;
2971 break;
2972 case 4:
2973 newrel = R_RX_RH_ABS5p8L;
2974 break;
2975 }
2976 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2977 move_reloc (irel, disp_rel, -1);
2978 }
2979 if (imm_rel)
2980 {
2981 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2982 move_reloc (disp_rel ? disp_rel : irel,
2983 imm_rel,
2984 irel->r_offset - imm_rel->r_offset + 2);
2985 }
2986
2987 SNIPNR (3, ilen - 3);
2988 *again = TRUE;
2989
2990 /* We can't relax this new opcode. */
2991 irel->r_addend = 0;
2992 }
2993 }
2994 }
2995
2996 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2997 whatever they're branching over won't shrink any more. If we're
2998 basically done here, do one more pass just for branches - but
2999 don't request a pass after that one! */
3000 if (!*again && !allow_pcrel3)
3001 {
3002 bfd_boolean ignored;
3003
3004 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3005 }
3006
3007 return TRUE;
3008
3009 error_return:
c7927a3c
NC		 3010 if (free_contents != NULL)
3011 free (free_contents);
3012
3013 if (shndx_buf != NULL)
3014 {
3015 shndx_hdr->contents = NULL;
3016 free (shndx_buf);
3017 }
3018
3019 if (free_intsyms != NULL)
3020 free (free_intsyms);
3021
3022 return FALSE;
3023}
3024
3025static bfd_boolean
3026elf32_rx_relax_section_wrapper (bfd * abfd,
3027 asection * sec,
3028 struct bfd_link_info * link_info,
3029 bfd_boolean * again)
3030{
3031 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3032}
3033\f
3034/* Function to set the ELF flag bits. */
3035
3036static bfd_boolean
3037rx_elf_set_private_flags (bfd * abfd, flagword flags)
3038{
3039 elf_elfheader (abfd)->e_flags = flags;
3040 elf_flags_init (abfd) = TRUE;
3041 return TRUE;
3042}
3043
3044static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3045static bfd_boolean ignore_lma = TRUE;
c7927a3c 3046
84bff83f 3047void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3048
3049void
84bff83f
NC		 3050bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3051 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3052{
3053 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3054 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3055}
3056
708e2187
NC		 3057/* Converts FLAGS into a descriptive string.
3058 Returns a static pointer. */
3059
3060static const char *
3061describe_flags (flagword flags)
3062{
3063 static char buf [128];
3064
3065 buf[0] = 0;
3066
3067 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3068 strcat (buf, "64-bit doubles");
3069 else
3070 strcat (buf, "32-bit doubles");
3071
3072 if (flags & E_FLAG_RX_DSP)
3073 strcat (buf, ", dsp");
3074 else
3075 strcat (buf, ", no dsp");
3076
3077 if (flags & E_FLAG_RX_PID)
3078 strcat (buf, ", pid");
3079 else
3080 strcat (buf, ", no pid");
3081
3082 if (flags & E_FLAG_RX_ABI)
3083 strcat (buf, ", RX ABI");
3084 else
3085 strcat (buf, ", GCC ABI");
3086
3525236c
NC		 3087 if (flags & E_FLAG_RX_SINSNS_SET)
3088 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3089
708e2187
NC		 3090 return buf;
3091}
3092
c7927a3c
NC		 3093/* Merge backend specific data from an object file to the output
3094 object file when linking. */
3095
3096static bfd_boolean
50e03d47 3097rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
c7927a3c 3098{
50e03d47 3099 bfd *obfd = info->output_bfd;
c7927a3c
NC		 3100 flagword old_flags;
3101 flagword new_flags;
3102 bfd_boolean error = FALSE;
3103
3104 new_flags = elf_elfheader (ibfd)->e_flags;
3105 old_flags = elf_elfheader (obfd)->e_flags;
3106
3107 if (!elf_flags_init (obfd))
3108 {
3109 /* First call, no flags set. */
3110 elf_flags_init (obfd) = TRUE;
3111 elf_elfheader (obfd)->e_flags = new_flags;
3112 }
3113 else if (old_flags != new_flags)
3114 {
708e2187
NC		 3115 flagword known_flags;
3116
3525236c
NC		 3117 if (old_flags & E_FLAG_RX_SINSNS_SET)
3118 {
3119 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3120 {
3121 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3122 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3123 }
3124 }
3125 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3126 {
3127 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3128 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3129 }
3130
708e2187 3131 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3132 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3133
3134 if ((old_flags ^ new_flags) & known_flags)
3135 {
3136 /* Only complain if flag bits we care about do not match.
3137 Other bits may be set, since older binaries did use some
3138 deprecated flags. */
3139 if (no_warn_mismatch)
3140 {
3141 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3142 }
3143 else
3144 {
dae82561
AM		 3145 _bfd_error_handler (_("There is a conflict merging the"
3146 " ELF header flags from %B"),
3147 ibfd);
695344c0 3148 _bfd_error_handler (_(" the input file's flags: %s"),
708e2187 3149 describe_flags (new_flags));
695344c0 3150 _bfd_error_handler (_(" the output file's flags: %s"),
708e2187 3151 describe_flags (old_flags));
c7927a3c
NC		 3152 error = TRUE;
3153 }
3154 }
3155 else
3156 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3157 }
3158
3159 if (error)
3160 bfd_set_error (bfd_error_bad_value);
3161
3162 return !error;
3163}
3164\f
3165static bfd_boolean
3166rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3167{
3168 FILE * file = (FILE *) ptr;
3169 flagword flags;
3170
3171 BFD_ASSERT (abfd != NULL && ptr != NULL);
3172
3173 /* Print normal ELF private data. */
3174 _bfd_elf_print_private_bfd_data (abfd, ptr);
3175
3176 flags = elf_elfheader (abfd)->e_flags;
3177 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3178
6d8a3ede 3179 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3180 return TRUE;
3181}
3182
3183/* Return the MACH for an e_flags value. */
3184
3185static int
708e2187 3186elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3187{
708e2187
NC		 3188#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3189 Need to sort out how these flag bits are used.
3190 For now we assume that the flags are OK. */
c7927a3c 3191 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3192#endif
c7927a3c
NC		 3193 return bfd_mach_rx;
3194
3195 return 0;
3196}
3197
3198static bfd_boolean
3199rx_elf_object_p (bfd * abfd)
3200{
1ce74905
DD		 3201 int i;
3202 unsigned int u;
3203 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
63920300
AM		 3204 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3205 int nphdrs = ehdr->e_phnum;
1ce74905 3206 sec_ptr bsec;
fc87b9e8 3207 static int saw_be = FALSE;
63920300 3208 bfd_vma end_phdroff;
1ce74905 3209
4c422395
DD		 3210 /* We never want to automatically choose the non-swapping big-endian
3211 target. The user can only get that explicitly, such as with -I
3212 and objcopy. */
6d00b590 3213 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3214 && abfd->target_defaulted)
3215 return FALSE;
3216
fc87b9e8
DD		 3217 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3218 as a fallback, so we check for "scanning" to know when to stop
3219 using the non-swapping target. */
6d00b590 3220 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3221 && saw_be)
3222 return FALSE;
6d00b590 3223 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3224 saw_be = TRUE;
3225
c7927a3c
NC		 3226 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3227 elf32_rx_machine (abfd));
1ce74905
DD		 3228
3229 /* For each PHDR in the object, we must find some section that
3230 corresponds (based on matching file offsets) and use its VMA
3231 information to reconstruct the p_vaddr field we clobbered when we
3232 wrote it out. */
63920300
AM		 3233 /* If PT_LOAD headers include the ELF file header or program headers
3234 then the PT_LOAD header does not start with some section contents.
3235 Making adjustments based on the difference between sh_offset and
3236 p_offset is nonsense in such cases. Exclude them. Note that
3237 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3238 the linker won't normally create PT_LOAD segments covering the
3239 headers so this is mainly for passing the ld testsuite.
3240 FIXME. Why are we looking at non-PT_LOAD headers here? */
3241 end_phdroff = ehdr->e_ehsize;
3242 if (ehdr->e_phoff != 0)
3243 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
1ce74905
DD		 3244 for (i=0; i<nphdrs; i++)
3245 {
3246 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3247 {
3248 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3249
74b1e045 3250 if (phdr[i].p_filesz
63920300 3251 && phdr[i].p_offset >= end_phdroff
74b1e045 3252 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
7859afc4
DD		 3253 && sec->sh_size > 0
3254 && sec->sh_type != SHT_NOBITS
1ce74905
DD		 3255 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3256 {
3257 /* Found one! The difference between the two addresses,
3258 plus the difference between the two file offsets, is
3259 enough information to reconstruct the lma. */
3260
3261 /* Example where they aren't:
3262 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3263 SEC[6] = vma 00000050 offset 00002050 size 00000040
3264
3265 The correct LMA for the section is fffc0140 + (2050-2010).
3266 */
3267
92ff23a1 3268 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3269 break;
3270 }
3271 }
3272
3273 /* We must update the bfd sections as well, so we don't stop
3274 with one match. */
3275 bsec = abfd->sections;
3276 while (bsec)
3277 {
74b1e045
DD		 3278 if (phdr[i].p_filesz
3279 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3280 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3281 {
3282 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3283 }
3284 bsec = bsec->next;
3285 }
3286 }
3287
c7927a3c
NC		 3288 return TRUE;
3289}
3290 \f
3291
3292#ifdef DEBUG
3293void
9ccb8af9 3294rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3295{
3296 size_t locsymcount;
3297 Elf_Internal_Sym * isymbuf;
3298 Elf_Internal_Sym * isymend;
3299 Elf_Internal_Sym * isym;
3300 Elf_Internal_Shdr * symtab_hdr;
3301 bfd_boolean free_internal = FALSE, free_external = FALSE;
3302 char * st_info_str;
3303 char * st_info_stb_str;
3304 char * st_other_str;
3305 char * st_shndx_str;
3306
3307 if (! internal_syms)
3308 {
3309 internal_syms = bfd_malloc (1000);
3310 free_internal = 1;
3311 }
3312 if (! external_syms)
3313 {
3314 external_syms = bfd_malloc (1000);
3315 free_external = 1;
3316 }
3317
3318 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3319 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3320 if (free_internal)
3321 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3322 symtab_hdr->sh_info, 0,
3323 internal_syms, external_syms, NULL);
3324 else
3325 isymbuf = internal_syms;
3326 isymend = isymbuf + locsymcount;
3327
3328 for (isym = isymbuf ; isym < isymend ; isym++)
3329 {
3330 switch (ELF_ST_TYPE (isym->st_info))
3331 {
b707aa49
NC		 3332 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3333 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3334 case STT_FILE: st_info_str = "STT_FILE"; break;
3335 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3336 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3337 default: st_info_str = "";
3338 }
3339 switch (ELF_ST_BIND (isym->st_info))
3340 {
b707aa49
NC		 3341 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3342 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3343 default: st_info_stb_str = "";
3344 }
3345 switch (ELF_ST_VISIBILITY (isym->st_other))
3346 {
b707aa49
NC		 3347 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3348 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3349 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3350 default: st_other_str = "";
3351 }
3352 switch (isym->st_shndx)
3353 {
b707aa49
NC		 3354 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3355 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3356 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3357 default: st_shndx_str = "";
3358 }
3359
3360 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3361 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3362 isym,
3363 (unsigned long) isym->st_value,
3364 (unsigned long) isym->st_size,
3365 isym->st_name,
3366 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3367 isym->st_name),
3368 isym->st_info, st_info_str, st_info_stb_str,
3369 isym->st_other, st_other_str,
3370 isym->st_shndx, st_shndx_str);
3371 }
3372 if (free_internal)
3373 free (internal_syms);
3374 if (free_external)
3375 free (external_syms);
3376}
3377
3378char *
3379rx_get_reloc (long reloc)
3380{
3381 if (0 <= reloc && reloc < R_RX_max)
3382 return rx_elf_howto_table[reloc].name;
3383 return "";
3384}
3385#endif /* DEBUG */
3386
3387\f
3388/* We must take care to keep the on-disk copy of any code sections
3389 that are fully linked swapped if the target is big endian, to match
3390 the Renesas tools. */
3391
3392/* The rule is: big endian object that are final-link executables,
3393 have code sections stored with 32-bit words swapped relative to
3394 what you'd get by default. */
3395
3396static bfd_boolean
3397rx_get_section_contents (bfd * abfd,
3398 sec_ptr section,
3399 void * location,
3400 file_ptr offset,
3401 bfd_size_type count)
3402{
3403 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3404 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3405 bfd_boolean rv;
3406
3407#ifdef DJDEBUG
3408 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3409 (long) offset, (long) count, section->name,
3410 bfd_big_endian(abfd) ? "be" : "le",
3411 exec, s_code, (long unsigned) section->filepos,
3412 (long unsigned) offset);
3413#endif
3414
3415 if (exec && s_code && bfd_big_endian (abfd))
3416 {
3417 char * cloc = (char *) location;
3418 bfd_size_type cnt, end_cnt;
3419
3420 rv = TRUE;
3421
3422 /* Fetch and swap unaligned bytes at the beginning. */
3423 if (offset % 4)
3424 {
3425 char buf[4];
3426
3427 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3428 (offset & -4), 4);
3429 if (!rv)
3430 return FALSE;
3431
3432 bfd_putb32 (bfd_getl32 (buf), buf);
3433
3434 cnt = 4 - (offset % 4);
3435 if (cnt > count)
3436 cnt = count;
3437
3438 memcpy (location, buf + (offset % 4), cnt);
3439
3440 count -= cnt;
3441 offset += cnt;
3442 cloc += count;
3443 }
3444
3445 end_cnt = count % 4;
3446
3447 /* Fetch and swap the middle bytes. */
3448 if (count >= 4)
3449 {
3450 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3451 count - end_cnt);
3452 if (!rv)
3453 return FALSE;
3454
3455 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3456 bfd_putb32 (bfd_getl32 (cloc), cloc);
3457 }
3458
3459 /* Fetch and swap the end bytes. */
3460 if (end_cnt > 0)
3461 {
3462 char buf[4];
3463
3464 /* Fetch the end bytes. */
3465 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3466 offset + count - end_cnt, 4);
3467 if (!rv)
3468 return FALSE;
3469
3470 bfd_putb32 (bfd_getl32 (buf), buf);
3471 memcpy (cloc, buf, end_cnt);
3472 }
3473 }
3474 else
3475 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3476
3477 return rv;
3478}
3479
3480#ifdef DJDEBUG
3481static bfd_boolean
3482rx2_set_section_contents (bfd * abfd,
3483 sec_ptr section,
3484 const void * location,
3485 file_ptr offset,
3486 bfd_size_type count)
3487{
3488 bfd_size_type i;
3489
3490 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3491 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3492 for (i = 0; i < count; i++)
3493 {
3494 if (i % 16 == 0 && i > 0)
3495 fprintf (stderr, "\n");
3496
3497 if (i % 16 && i % 4 == 0)
3498 fprintf (stderr, " ");
3499
3500 if (i % 16 == 0)
3501 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3502
3503 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3504 }
3505 fprintf (stderr, "\n");
3506
3507 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3508}
3509#define _bfd_elf_set_section_contents rx2_set_section_contents
3510#endif
3511
3512static bfd_boolean
3513rx_set_section_contents (bfd * abfd,
3514 sec_ptr section,
3515 const void * location,
3516 file_ptr offset,
3517 bfd_size_type count)
3518{
3519 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3520 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3521 bfd_boolean rv;
3522 char * swapped_data = NULL;
3523 bfd_size_type i;
3524 bfd_vma caddr = section->vma + offset;
3525 file_ptr faddr = 0;
3526 bfd_size_type scount;
3527
3528#ifdef DJDEBUG
3529 bfd_size_type i;
3530
3531 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3532 (long) offset, (long) count, section->name,
3533 bfd_big_endian (abfd) ? "be" : "le",
3534 exec, s_code);
3535
3536 for (i = 0; i < count; i++)
3537 {
3538 int a = section->vma + offset + i;
3539
3540 if (a % 16 == 0 && a > 0)
3541 fprintf (stderr, "\n");
3542
3543 if (a % 16 && a % 4 == 0)
3544 fprintf (stderr, " ");
3545
3546 if (a % 16 == 0 || i == 0)
3547 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3548
3549 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3550 }
3551
3552 fprintf (stderr, "\n");
3553#endif
3554
3555 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3556 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3557
3558 while (count > 0 && caddr > 0 && caddr % 4)
3559 {
3560 switch (caddr % 4)
3561 {
3562 case 0: faddr = offset + 3; break;
3563 case 1: faddr = offset + 1; break;
3564 case 2: faddr = offset - 1; break;
3565 case 3: faddr = offset - 3; break;
3566 }
3567
3568 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3569 if (! rv)
3570 return rv;
3571
28cc9170 3572 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3573 offset ++;
3574 count --;
3575 caddr ++;
3576 }
3577
3578 scount = (int)(count / 4) * 4;
3579 if (scount > 0)
3580 {
3581 char * cloc = (char *) location;
3582
3583 swapped_data = (char *) bfd_alloc (abfd, count);
3584
3585 for (i = 0; i < count; i += 4)
3586 {
3587 bfd_vma v = bfd_getl32 (cloc + i);
3588 bfd_putb32 (v, swapped_data + i);
3589 }
3590
3591 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3592
3593 if (!rv)
3594 return rv;
3595 }
3596
3597 count -= scount;
28cc9170 3598 location = (bfd_byte *) location + scount;
c7927a3c
NC		 3599 offset += scount;
3600
3601 if (count > 0)
3602 {
3603 caddr = section->vma + offset;
3604 while (count > 0)
3605 {
3606 switch (caddr % 4)
3607 {
3608 case 0: faddr = offset + 3; break;
3609 case 1: faddr = offset + 1; break;
3610 case 2: faddr = offset - 1; break;
3611 case 3: faddr = offset - 3; break;
3612 }
3613 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3614 if (! rv)
3615 return rv;
3616
28cc9170 3617 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3618 offset ++;
3619 count --;
3620 caddr ++;
3621 }
3622 }
3623
3624 return TRUE;
3625}
3626
3627static bfd_boolean
3628rx_final_link (bfd * abfd, struct bfd_link_info * info)
3629{
3630 asection * o;
3631
3632 for (o = abfd->sections; o != NULL; o = o->next)
3633 {
3634#ifdef DJDEBUG
3635 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3636 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3637#endif
3638 if (o->flags & SEC_CODE
3639 && bfd_big_endian (abfd)
e57278ef 3640 && o->size % 4)
c7927a3c
NC		 3641 {
3642#ifdef DJDEBUG
3643 fprintf (stderr, "adjusting...\n");
3644#endif
3645 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3646 }
3647 }
3648
3649 return bfd_elf_final_link (abfd, info);
3650}
3651
3652static bfd_boolean
3653elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3654 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3655{
3656 const struct elf_backend_data * bed;
3657 struct elf_obj_tdata * tdata;
3658 Elf_Internal_Phdr * phdr;
3659 unsigned int count;
3660 unsigned int i;
3661
3662 bed = get_elf_backend_data (abfd);
3663 tdata = elf_tdata (abfd);
3664 phdr = tdata->phdr;
12bd6957 3665 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3666
84bff83f
NC		 3667 if (ignore_lma)
3668 for (i = count; i-- != 0;)
3669 if (phdr[i].p_type == PT_LOAD)
3670 {
3671 /* The Renesas tools expect p_paddr to be zero. However,
3672 there is no other way to store the writable data in ROM for
3673 startup initialization. So, we let the linker *think*
3674 we're using paddr and vaddr the "usual" way, but at the
3675 last minute we move the paddr into the vaddr (which is what
3676 the simulator uses) and zero out paddr. Note that this
3677 does not affect the section headers, just the program
3678 headers. We hope. */
c7927a3c 3679 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3680#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3681 becomes wrong. */
84bff83f
NC		 3682 phdr[i].p_paddr = 0;
3683#endif
3684 }
c7927a3c
NC		 3685
3686 return TRUE;
3687}
708e2187
NC		 3688
3689/* The default literal sections should always be marked as "code" (i.e.,
3690 SHF_EXECINSTR). This is particularly important for big-endian mode
3691 when we do not want their contents byte reversed. */
3692static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3693{
3694 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3695 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3696 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3697 { NULL, 0, 0, 0, 0 }
3698};
7a2f2d82
DD		 3699\f
3700typedef struct {
3701 bfd *abfd;
3702 struct bfd_link_info *info;
3703 bfd_vma table_start;
3704 int table_size;
3705 bfd_vma *table_handlers;
3706 bfd_vma table_default_handler;
3707 struct bfd_link_hash_entry **table_entries;
3708 struct bfd_link_hash_entry *table_default_entry;
3709 FILE *mapfile;
3710} RX_Table_Info;
3711
3712static bfd_boolean
3713rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3714{
3715 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3716 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3717 const char *name; /* of the symbol we've found */
3718 asection *sec;
3719 struct bfd *abfd;
3720 int idx;
3721 const char *tname; /* name of the table */
3722 bfd_vma start_addr, end_addr;
3723 char *buf;
3724 struct bfd_link_hash_entry * h;
3725
3726 /* We're looking for globally defined symbols of the form
3727 $tablestart$<NAME>. */
3728 if (ent->type != bfd_link_hash_defined
3729 && ent->type != bfd_link_hash_defweak)
3730 return TRUE;
3731
3732 name = ent->root.string;
3733 sec = ent->u.def.section;
3734 abfd = sec->owner;
3735
3736 if (strncmp (name, "$tablestart$", 12))
3737 return TRUE;
3738
3739 sec->flags |= SEC_KEEP;
3740
3741 tname = name + 12;
3742
3743 start_addr = ent->u.def.value;
3744
3745 /* At this point, we can't build the table but we can (and must)
3746 find all the related symbols and mark their sections as SEC_KEEP
3747 so we don't garbage collect them. */
3748
3749 buf = (char *) malloc (12 + 10 + strlen (tname));
3750
3751 sprintf (buf, "$tableend$%s", tname);
3752 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3753 if (!h || (h->type != bfd_link_hash_defined
3754 && h->type != bfd_link_hash_defweak))
3755 {
695344c0 3756 /* xgettext:c-format */
7a2f2d82
DD		 3757 _bfd_error_handler (_("%B:%A: table %s missing corresponding %s"),
3758 abfd, sec, name, buf);
3759 return TRUE;
3760 }
3761
3762 if (h->u.def.section != ent->u.def.section)
3763 {
695344c0 3764 /* xgettext:c-format */
7a2f2d82
DD		 3765 _bfd_error_handler (_("%B:%A: %s and %s must be in the same input section"),
3766 h->u.def.section->owner, h->u.def.section,
3767 name, buf);
3768 return TRUE;
3769 }
3770
3771 end_addr = h->u.def.value;
3772
3773 sprintf (buf, "$tableentry$default$%s", tname);
3774 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3775 if (h && (h->type == bfd_link_hash_defined
3776 || h->type == bfd_link_hash_defweak))
3777 {
3778 h->u.def.section->flags |= SEC_KEEP;
3779 }
3780
3781 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3782 {
3783 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3784 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3785 if (h && (h->type == bfd_link_hash_defined
3786 || h->type == bfd_link_hash_defweak))
3787 {
3788 h->u.def.section->flags |= SEC_KEEP;
3789 }
3790 }
3791
3792 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3793 return TRUE;
3794}
3795
3796/* We need to check for table entry symbols and build the tables, and
3797 we need to do it before the linker does garbage collection. This function is
3798 called once per input object file. */
3799static bfd_boolean
3800rx_check_directives
3801 (bfd * abfd ATTRIBUTE_UNUSED,
3802 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3803{
3804 RX_Table_Info stuff;
3805
3806 stuff.abfd = abfd;
3807 stuff.info = info;
3808 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3809
3810 return TRUE;
3811}
3812
3813\f
3814static bfd_boolean
3815rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3816{
3817 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3818 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3819 int idx;
3820 const char *name;
3821 bfd_vma addr;
3822
3823 /* See if the symbol ENT has an address listed in the table, and
3824 isn't a debug/special symbol. If so, put it in the table. */
3825
3826 if (ent->type != bfd_link_hash_defined
3827 && ent->type != bfd_link_hash_defweak)
3828 return TRUE;
3829
3830 name = ent->root.string;
3831
3832 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3833 return TRUE;
3834
3835 addr = (ent->u.def.value
3836 + ent->u.def.section->output_section->vma
3837 + ent->u.def.section->output_offset);
3838
3839 for (idx = 0; idx < info->table_size; idx ++)
3840 if (addr == info->table_handlers[idx])
3841 info->table_entries[idx] = ent;
3842
3843 if (addr == info->table_default_handler)
3844 info->table_default_entry = ent;
3845
3846 return TRUE;
3847}
3848
3849static bfd_boolean
3850rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3851{
3852 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3853 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3854 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3855 int idx;
3856 const char *tname; /* name of the table */
3857 bfd_vma start_addr, end_addr;
3858 char *buf;
3859 struct bfd_link_hash_entry * h;
3860 int need_elipses;
3861
3862 /* We're looking for globally defined symbols of the form
3863 $tablestart$<NAME>. */
3864 if (ent->type != bfd_link_hash_defined
3865 && ent->type != bfd_link_hash_defweak)
3866 return TRUE;
3867
3868 name = ent->root.string;
7a2f2d82
DD		 3869
3870 if (strncmp (name, "$tablestart$", 12))
3871 return TRUE;
3872
3873 tname = name + 12;
3874 start_addr = (ent->u.def.value
3875 + ent->u.def.section->output_section->vma
3876 + ent->u.def.section->output_offset);
3877
3878 buf = (char *) malloc (12 + 10 + strlen (tname));
3879
3880 sprintf (buf, "$tableend$%s", tname);
3881 end_addr = get_symbol_value_maybe (buf, info->info);
3882
3883 sprintf (buf, "$tableentry$default$%s", tname);
3884 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3885 if (h)
3886 {
3887 info->table_default_handler = (h->u.def.value
3888 + h->u.def.section->output_section->vma
3889 + h->u.def.section->output_offset);
3890 }
3891 else
3892 /* Zero is a valid handler address! */
3893 info->table_default_handler = (bfd_vma) (-1);
3894 info->table_default_entry = NULL;
3895
3896 info->table_start = start_addr;
3897 info->table_size = (int) (end_addr - start_addr) / 4;
3898 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3899 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3900
3901 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3902 {
3903 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3904 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3905 if (h && (h->type == bfd_link_hash_defined
3906 || h->type == bfd_link_hash_defweak))
3907 {
3908 info->table_handlers[idx] = (h->u.def.value
3909 + h->u.def.section->output_section->vma
3910 + h->u.def.section->output_offset);
3911 }
3912 else
3913 info->table_handlers[idx] = info->table_default_handler;
3914 info->table_entries[idx] = NULL;
3915 }
3916
3917 free (buf);
3918
3919 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3920
33ac0ca1 3921 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3922 tname, info->table_size, start_addr);
3923
3924 if (info->table_default_entry)
33ac0ca1 3925 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3926 info->table_default_entry->root.string,
3927 info->table_default_handler);
3928 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3929 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3930 info->table_default_handler);
3931 else
3932 fprintf (info->mapfile, " no default handler\n");
3933
3934 need_elipses = 1;
3935 for (idx = 0; idx < info->table_size; idx ++)
3936 {
3937 if (info->table_handlers[idx] == info->table_default_handler)
3938 {
3939 if (need_elipses)
3940 fprintf (info->mapfile, " . . .\n");
3941 need_elipses = 0;
3942 continue;
3943 }
3944 need_elipses = 1;
3945
33ac0ca1 3946 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3947
3948 if (info->table_handlers[idx] == (bfd_vma) (-1))
3949 fprintf (info->mapfile, "(no handler found)\n");
3950
3951 else if (info->table_handlers[idx] == info->table_default_handler)
3952 {
3953 if (info->table_default_entry)
3954 fprintf (info->mapfile, "(default)\n");
3955 else
3956 fprintf (info->mapfile, "(default)\n");
3957 }
3958
3959 else if (info->table_entries[idx])
3960 {
33ac0ca1 3961 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3962 }
3963
3964 else
3965 {
33ac0ca1 3966 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3967 }
3968 }
3969 if (need_elipses)
3970 fprintf (info->mapfile, " . . .\n");
3971
3972 return TRUE;
3973}
3974
3975void
3976rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3977{
3978 /* We scan the symbol table looking for $tableentry$'s, and for
3979 each, try to deduce which handlers go with which entries. */
3980
3981 RX_Table_Info stuff;
3982
3983 stuff.abfd = obfd;
3984 stuff.info = info;
3985 stuff.mapfile = mapfile;
3986 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
3987}
3988
c7927a3c
NC		 3989\f
3990#define ELF_ARCH bfd_arch_rx
3991#define ELF_MACHINE_CODE EM_RX
3992#define ELF_MAXPAGESIZE 0x1000
3993
6d00b590 3994#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 3995#define TARGET_BIG_NAME "elf32-rx-be"
3996
6d00b590 3997#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 3998#define TARGET_LITTLE_NAME "elf32-rx-le"
3999
4000#define elf_info_to_howto_rel NULL
4001#define elf_info_to_howto rx_info_to_howto_rela
4002#define elf_backend_object_p rx_elf_object_p
4003#define elf_backend_relocate_section rx_elf_relocate_section
4004#define elf_symbol_leading_char ('_')
4005#define elf_backend_can_gc_sections 1
4006#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
4007
4008#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4009#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4010#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4011#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4012#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4013#define bfd_elf32_get_section_contents rx_get_section_contents
4014#define bfd_elf32_set_section_contents rx_set_section_contents
4015#define bfd_elf32_bfd_final_link rx_final_link
4016#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
708e2187 4017#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4018#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4019
4020#include "elf32-target.h"
4c422395
DD		 4021
4022/* We define a second big-endian target that doesn't have the custom
4023 section get/set hooks, for times when we want to preserve the
4024 pre-swapped .text sections (like objcopy). */
4025
4026#undef TARGET_BIG_SYM
6d00b590 4027#define TARGET_BIG_SYM rx_elf32_be_ns_vec
4c422395
DD		 4028#undef TARGET_BIG_NAME
4029#define TARGET_BIG_NAME "elf32-rx-be-ns"
4030#undef TARGET_LITTLE_SYM
4031
4032#undef bfd_elf32_get_section_contents
4033#undef bfd_elf32_set_section_contents
4034
4035#undef elf32_bed
4036#define elf32_bed elf32_rx_be_ns_bed
4037
4038#include "elf32-target.h"
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