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* config/tc-xtensa.c (xtensa_insnbuf_set_operand): Clarify error
[binutils.git] / opcodes / iq2000-asm.c
CommitLineData
47b1a55a
SC		 1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
f4321104 2351 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
47b1a55a
SC		 24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "bfd.h"
32#include "symcat.h"
33#include "iq2000-desc.h"
34#include "iq2000-opc.h"
35#include "opintl.h"
36#include "xregex.h"
37#include "libiberty.h"
38#include "safe-ctype.h"
39
40#undef min
41#define min(a,b) ((a) < (b) ? (a) : (b))
42#undef max
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45static const char * parse_insn_normal
ffead7ae 46 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
47b1a55a
SC		 47\f
48/* -- assembler routines inserted here. */
49
50/* -- asm.c */
4030fa5a
NC		 51
52#include "safe-ctype.h"
53
54static int iq2000_cgen_isa_register PARAMS ((const char **));
bc18c937 55static const char * parse_jtargq10 PARAMS ((CGEN_CPU_DESC, const char **, int, int, enum cgen_parse_operand_result *, bfd_vma *));
33b71eeb 56static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
47b1a55a
SC		 57static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
58static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
33b71eeb
NC		 59static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
60static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
47b1a55a
SC		 61
62/* Special check to ensure that instruction exists for given machine */
63int
64iq2000_cgen_insn_supported (cd, insn)
65 CGEN_CPU_DESC cd;
4030fa5a 66 const CGEN_INSN *insn;
47b1a55a
SC		 67{
68 int machs = cd->machs;
69
70 return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
71}
72
73static int iq2000_cgen_isa_register (strp)
74 const char **strp;
75{
76 int len;
77 int ch1, ch2;
78 if (**strp == 'r' || **strp == 'R')
79 {
80 len = strlen (*strp);
81 if (len == 2)
82 {
83 ch1 = (*strp)[1];
84 if ('0' <= ch1 && ch1 <= '9')
85 return 1;
86 }
87 else if (len == 3)
88 {
89 ch1 = (*strp)[1];
90 ch2 = (*strp)[2];
91 if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
92 return 1;
93 if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
94 return 1;
95 }
96 }
4030fa5a 97 if (**strp == '%' && TOLOWER((*strp)[1]) != 'l' && TOLOWER((*strp)[1]) != 'h')
47b1a55a
SC		 98 return 1;
99 return 0;
100}
101
102/* Handle negated literal. */
103
104static const char *
105parse_mimm (cd, strp, opindex, valuep)
106 CGEN_CPU_DESC cd;
107 const char **strp;
108 int opindex;
33b71eeb 109 unsigned long *valuep;
47b1a55a
SC		 110{
111 const char *errmsg;
47b1a55a 112
33b71eeb 113 /* Verify this isn't a register. */
47b1a55a
SC		 114 if (iq2000_cgen_isa_register (strp))
115 errmsg = _("immediate value cannot be register");
116 else
117 {
118 long value;
119
120 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
121 if (errmsg == NULL)
122 {
123 long x = (-value) & 0xFFFF0000;
33b71eeb 124
4030fa5a 125 if (x != 0 && x != (long) 0xFFFF0000)
47b1a55a
SC		 126 errmsg = _("immediate value out of range");
127 else
128 *valuep = (-value & 0xFFFF);
129 }
130 }
131 return errmsg;
132}
133
134/* Handle signed/unsigned literal. */
135
136static const char *
137parse_imm (cd, strp, opindex, valuep)
138 CGEN_CPU_DESC cd;
139 const char **strp;
140 int opindex;
141 unsigned long *valuep;
142{
143 const char *errmsg;
47b1a55a
SC		 144
145 if (iq2000_cgen_isa_register (strp))
146 errmsg = _("immediate value cannot be register");
147 else
148 {
149 long value;
150
151 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
152 if (errmsg == NULL)
153 {
154 long x = value & 0xFFFF0000;
4030fa5a 155 if (x != 0 && x != (long) 0xFFFF0000)
47b1a55a
SC		 156 errmsg = _("immediate value out of range");
157 else
158 *valuep = (value & 0xFFFF);
159 }
160 }
161 return errmsg;
162}
163
164/* Handle iq10 21-bit jmp offset. */
165
166static const char *
167parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
168 CGEN_CPU_DESC cd;
169 const char **strp;
170 int opindex;
4030fa5a
NC		 171 int reloc ATTRIBUTE_UNUSED;
172 enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED;
bc18c937 173 bfd_vma *valuep;
47b1a55a
SC		 174{
175 const char *errmsg;
176 bfd_vma value;
177 enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
178
179 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
180 &result_type, &value);
181 if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
182 {
bc18c937 183 /* Check value is within 23-bits (remembering that 2-bit shift right will occur). */
47b1a55a
SC		 184 if (value > 0x7fffff)
185 return _("21-bit offset out of range");
186 }
187 *valuep = (value & 0x7FFFFF);
188 return errmsg;
189}
190
191/* Handle high(). */
192
193static const char *
194parse_hi16 (cd, strp, opindex, valuep)
195 CGEN_CPU_DESC cd;
196 const char **strp;
197 int opindex;
198 unsigned long *valuep;
199{
200 if (strncasecmp (*strp, "%hi(", 4) == 0)
201 {
202 enum cgen_parse_operand_result result_type;
203 bfd_vma value;
204 const char *errmsg;
205
206 *strp += 4;
207 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
208 &result_type, &value);
209 if (**strp != ')')
210 return _("missing `)'");
211
212 ++*strp;
213 if (errmsg == NULL
214 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
215 {
216 /* if value has top-bit of %lo on, then it will
217 sign-propagate and so we compensate by adding
218 1 to the resultant %hi value */
219 if (value & 0x8000)
220 value += 0x10000;
221 value >>= 16;
222 }
223 *valuep = value;
224
225 return errmsg;
226 }
227
228 /* we add %uhi in case a user just wants the high 16-bits or is using
229 an insn like ori for %lo which does not sign-propagate */
230 if (strncasecmp (*strp, "%uhi(", 5) == 0)
231 {
232 enum cgen_parse_operand_result result_type;
233 bfd_vma value;
234 const char *errmsg;
235
236 *strp += 5;
237 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
238 &result_type, &value);
239 if (**strp != ')')
240 return _("missing `)'");
241
242 ++*strp;
243 if (errmsg == NULL
244 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
245 {
246 value >>= 16;
247 }
248 *valuep = value;
249
250 return errmsg;
251 }
252
253 return parse_imm (cd, strp, opindex, valuep);
254}
255
256/* Handle %lo in a signed context.
257 The signedness of the value doesn't matter to %lo(), but this also
258 handles the case where %lo() isn't present. */
259
260static const char *
261parse_lo16 (cd, strp, opindex, valuep)
262 CGEN_CPU_DESC cd;
263 const char **strp;
264 int opindex;
33b71eeb 265 unsigned long *valuep;
47b1a55a
SC		 266{
267 if (strncasecmp (*strp, "%lo(", 4) == 0)
268 {
269 const char *errmsg;
270 enum cgen_parse_operand_result result_type;
271 bfd_vma value;
272
273 *strp += 4;
274 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
275 &result_type, &value);
276 if (**strp != ')')
277 return _("missing `)'");
278 ++*strp;
279 if (errmsg == NULL
280 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
281 value &= 0xffff;
282 *valuep = value;
283 return errmsg;
284 }
285
286 return parse_imm (cd, strp, opindex, valuep);
287}
288
289/* Handle %lo in a negated signed context.
290 The signedness of the value doesn't matter to %lo(), but this also
291 handles the case where %lo() isn't present. */
292
293static const char *
294parse_mlo16 (cd, strp, opindex, valuep)
295 CGEN_CPU_DESC cd;
296 const char **strp;
297 int opindex;
33b71eeb 298 unsigned long *valuep;
47b1a55a
SC		 299{
300 if (strncasecmp (*strp, "%lo(", 4) == 0)
301 {
302 const char *errmsg;
303 enum cgen_parse_operand_result result_type;
304 bfd_vma value;
305
306 *strp += 4;
307 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
308 &result_type, &value);
309 if (**strp != ')')
310 return _("missing `)'");
311 ++*strp;
312 if (errmsg == NULL
313 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
314 value = (-value) & 0xffff;
315 *valuep = value;
316 return errmsg;
317 }
318
319 return parse_mimm (cd, strp, opindex, valuep);
320}
321
322/* -- */
323
324const char * iq2000_cgen_parse_operand
325 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
326
327/* Main entry point for operand parsing.
328
329 This function is basically just a big switch statement. Earlier versions
330 used tables to look up the function to use, but
331 - if the table contains both assembler and disassembler functions then
332 the disassembler contains much of the assembler and vice-versa,
333 - there's a lot of inlining possibilities as things grow,
334 - using a switch statement avoids the function call overhead.
335
336 This function could be moved into `parse_insn_normal', but keeping it
337 separate makes clear the interface between `parse_insn_normal' and each of
338 the handlers. */
339
340const char *
341iq2000_cgen_parse_operand (cd, opindex, strp, fields)
342 CGEN_CPU_DESC cd;
343 int opindex;
344 const char ** strp;
345 CGEN_FIELDS * fields;
346{
347 const char * errmsg = NULL;
348 /* Used by scalar operands that still need to be parsed. */
349 long junk ATTRIBUTE_UNUSED;
350
351 switch (opindex)
352 {
4030fa5a 353 case IQ2000_OPERAND__INDEX :
33b71eeb 354 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index));
4030fa5a 355 break;
47b1a55a
SC		 356 case IQ2000_OPERAND_BASE :
357 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
358 break;
359 case IQ2000_OPERAND_BASEOFF :
360 {
9494d739 361 bfd_vma value = 0;
47b1a55a
SC		 362 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
363 fields->f_imm = value;
364 }
365 break;
366 case IQ2000_OPERAND_BITNUM :
33b71eeb 367 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt));
47b1a55a
SC		 368 break;
369 case IQ2000_OPERAND_BYTECOUNT :
33b71eeb 370 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount));
47b1a55a
SC		 371 break;
372 case IQ2000_OPERAND_CAM_Y :
33b71eeb 373 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y));
47b1a55a
SC		 374 break;
375 case IQ2000_OPERAND_CAM_Z :
33b71eeb 376 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z));
47b1a55a
SC		 377 break;
378 case IQ2000_OPERAND_CM_3FUNC :
33b71eeb 379 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func));
47b1a55a
SC		 380 break;
381 case IQ2000_OPERAND_CM_3Z :
33b71eeb 382 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z));
47b1a55a
SC		 383 break;
384 case IQ2000_OPERAND_CM_4FUNC :
33b71eeb 385 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func));
47b1a55a
SC		 386 break;
387 case IQ2000_OPERAND_CM_4Z :
33b71eeb 388 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z));
47b1a55a
SC		 389 break;
390 case IQ2000_OPERAND_COUNT :
33b71eeb 391 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count));
47b1a55a
SC		 392 break;
393 case IQ2000_OPERAND_EXECODE :
33b71eeb 394 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode));
47b1a55a
SC		 395 break;
396 case IQ2000_OPERAND_HI16 :
33b71eeb 397 errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm));
47b1a55a
SC		 398 break;
399 case IQ2000_OPERAND_IMM :
33b71eeb 400 errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm));
47b1a55a 401 break;
47b1a55a
SC		 402 case IQ2000_OPERAND_JMPTARG :
403 {
9494d739 404 bfd_vma value = 0;
47b1a55a
SC		 405 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
406 fields->f_jtarg = value;
407 }
408 break;
409 case IQ2000_OPERAND_JMPTARGQ10 :
410 {
33b71eeb 411 bfd_vma value = 0;
47b1a55a
SC		 412 errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
413 fields->f_jtargq10 = value;
414 }
415 break;
416 case IQ2000_OPERAND_LO16 :
33b71eeb 417 errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm));
47b1a55a
SC		 418 break;
419 case IQ2000_OPERAND_MASK :
33b71eeb 420 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask));
47b1a55a
SC		 421 break;
422 case IQ2000_OPERAND_MASKL :
33b71eeb 423 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl));
47b1a55a
SC		 424 break;
425 case IQ2000_OPERAND_MASKQ10 :
33b71eeb 426 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10));
47b1a55a
SC		 427 break;
428 case IQ2000_OPERAND_MASKR :
33b71eeb 429 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs));
47b1a55a
SC		 430 break;
431 case IQ2000_OPERAND_MLO16 :
33b71eeb 432 errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm));
47b1a55a
SC		 433 break;
434 case IQ2000_OPERAND_OFFSET :
435 {
9494d739 436 bfd_vma value = 0;
47b1a55a
SC		 437 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
438 fields->f_offset = value;
439 }
440 break;
441 case IQ2000_OPERAND_RD :
442 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
443 break;
444 case IQ2000_OPERAND_RD_RS :
445 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
446 break;
447 case IQ2000_OPERAND_RD_RT :
448 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
449 break;
450 case IQ2000_OPERAND_RS :
451 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
452 break;
453 case IQ2000_OPERAND_RT :
454 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
455 break;
456 case IQ2000_OPERAND_RT_RS :
457 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
458 break;
459 case IQ2000_OPERAND_SHAMT :
33b71eeb 460 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt));
47b1a55a
SC		 461 break;
462
463 default :
464 /* xgettext:c-format */
465 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
466 abort ();
467 }
468
469 return errmsg;
470}
471
472cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
473{
474 parse_insn_normal,
475};
476
477void
478iq2000_cgen_init_asm (cd)
479 CGEN_CPU_DESC cd;
480{
481 iq2000_cgen_init_opcode_table (cd);
482 iq2000_cgen_init_ibld_table (cd);
483 cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
484 cd->parse_operand = iq2000_cgen_parse_operand;
47b1a55a
SC		 485}
486
487\f
488
489/* Regex construction routine.
490
491 This translates an opcode syntax string into a regex string,
492 by replacing any non-character syntax element (such as an
493 opcode) with the pattern '.*'
494
495 It then compiles the regex and stores it in the opcode, for
496 later use by iq2000_cgen_assemble_insn
497
498 Returns NULL for success, an error message for failure. */
499
500char *
ffead7ae 501iq2000_cgen_build_insn_regex (CGEN_INSN *insn)
47b1a55a
SC		 502{
503 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
504 const char *mnem = CGEN_INSN_MNEMONIC (insn);
505 char rxbuf[CGEN_MAX_RX_ELEMENTS];
506 char *rx = rxbuf;
507 const CGEN_SYNTAX_CHAR_TYPE *syn;
508 int reg_err;
509
510 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
511
512 /* Mnemonics come first in the syntax string. */
513 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
514 return _("missing mnemonic in syntax string");
515 ++syn;
516
517 /* Generate a case sensitive regular expression that emulates case
518 insensitive matching in the "C" locale. We cannot generate a case
519 insensitive regular expression because in Turkish locales, 'i' and 'I'
520 are not equal modulo case conversion. */
521
522 /* Copy the literal mnemonic out of the insn. */
523 for (; *mnem; mnem++)
524 {
525 char c = *mnem;
526
527 if (ISALPHA (c))
528 {
529 *rx++ = '[';
530 *rx++ = TOLOWER (c);
531 *rx++ = TOUPPER (c);
532 *rx++ = ']';
533 }
534 else
535 *rx++ = c;
536 }
537
538 /* Copy any remaining literals from the syntax string into the rx. */
539 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
540 {
541 if (CGEN_SYNTAX_CHAR_P (* syn))
542 {
543 char c = CGEN_SYNTAX_CHAR (* syn);
544
545 switch (c)
546 {
547 /* Escape any regex metacharacters in the syntax. */
548 case '.': case '[': case '\\':
549 case '*': case '^': case '$':
550
551#ifdef CGEN_ESCAPE_EXTENDED_REGEX
552 case '?': case '{': case '}':
553 case '(': case ')': case '*':
554 case '|': case '+': case ']':
555#endif
556 *rx++ = '\\';
557 *rx++ = c;
558 break;
559
560 default:
561 if (ISALPHA (c))
562 {
563 *rx++ = '[';
564 *rx++ = TOLOWER (c);
565 *rx++ = TOUPPER (c);
566 *rx++ = ']';
567 }
568 else
569 *rx++ = c;
570 break;
571 }
572 }
573 else
574 {
575 /* Replace non-syntax fields with globs. */
576 *rx++ = '.';
577 *rx++ = '*';
578 }
579 }
580
581 /* Trailing whitespace ok. */
582 * rx++ = '[';
583 * rx++ = ' ';
584 * rx++ = '\t';
585 * rx++ = ']';
586 * rx++ = '*';
587
588 /* But anchor it after that. */
589 * rx++ = '$';
590 * rx = '\0';
591
592 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
593 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
594
595 if (reg_err == 0)
596 return NULL;
597 else
598 {
599 static char msg[80];
600
601 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
602 regfree ((regex_t *) CGEN_INSN_RX (insn));
603 free (CGEN_INSN_RX (insn));
604 (CGEN_INSN_RX (insn)) = NULL;
605 return msg;
606 }
607}
608
609\f
610/* Default insn parser.
611
612 The syntax string is scanned and operands are parsed and stored in FIELDS.
613 Relocs are queued as we go via other callbacks.
614
615 ??? Note that this is currently an all-or-nothing parser. If we fail to
616 parse the instruction, we return 0 and the caller will start over from
617 the beginning. Backtracking will be necessary in parsing subexpressions,
618 but that can be handled there. Not handling backtracking here may get
619 expensive in the case of the m68k. Deal with later.
620
621 Returns NULL for success, an error message for failure. */
622
623static const char *
ffead7ae
MM		 624parse_insn_normal (CGEN_CPU_DESC cd,
625 const CGEN_INSN *insn,
626 const char **strp,
627 CGEN_FIELDS *fields)
47b1a55a
SC		 628{
629 /* ??? Runtime added insns not handled yet. */
630 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
631 const char *str = *strp;
632 const char *errmsg;
633 const char *p;
634 const CGEN_SYNTAX_CHAR_TYPE * syn;
635#ifdef CGEN_MNEMONIC_OPERANDS
636 /* FIXME: wip */
637 int past_opcode_p;
638#endif
639
640 /* For now we assume the mnemonic is first (there are no leading operands).
641 We can parse it without needing to set up operand parsing.
642 GAS's input scrubber will ensure mnemonics are lowercase, but we may
643 not be called from GAS. */
644 p = CGEN_INSN_MNEMONIC (insn);
645 while (*p && TOLOWER (*p) == TOLOWER (*str))
646 ++p, ++str;
647
648 if (* p)
649 return _("unrecognized instruction");
650
651#ifndef CGEN_MNEMONIC_OPERANDS
652 if (* str && ! ISSPACE (* str))
653 return _("unrecognized instruction");
654#endif
655
656 CGEN_INIT_PARSE (cd);
657 cgen_init_parse_operand (cd);
658#ifdef CGEN_MNEMONIC_OPERANDS
659 past_opcode_p = 0;
660#endif
661
662 /* We don't check for (*str != '\0') here because we want to parse
663 any trailing fake arguments in the syntax string. */
664 syn = CGEN_SYNTAX_STRING (syntax);
665
666 /* Mnemonics come first for now, ensure valid string. */
667 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
668 abort ();
669
670 ++syn;
671
672 while (* syn != 0)
673 {
674 /* Non operand chars must match exactly. */
675 if (CGEN_SYNTAX_CHAR_P (* syn))
676 {
677 /* FIXME: While we allow for non-GAS callers above, we assume the
678 first char after the mnemonic part is a space. */
679 /* FIXME: We also take inappropriate advantage of the fact that
680 GAS's input scrubber will remove extraneous blanks. */
681 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
682 {
683#ifdef CGEN_MNEMONIC_OPERANDS
684 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
685 past_opcode_p = 1;
686#endif
687 ++ syn;
688 ++ str;
689 }
690 else if (*str)
691 {
692 /* Syntax char didn't match. Can't be this insn. */
693 static char msg [80];
694
695 /* xgettext:c-format */
696 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
697 CGEN_SYNTAX_CHAR(*syn), *str);
698 return msg;
699 }
700 else
701 {
702 /* Ran out of input. */
703 static char msg [80];
704
705 /* xgettext:c-format */
706 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
707 CGEN_SYNTAX_CHAR(*syn));
708 return msg;
709 }
710 continue;
711 }
712
713 /* We have an operand of some sort. */
714 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
715 &str, fields);
716 if (errmsg)
717 return errmsg;
718
719 /* Done with this operand, continue with next one. */
720 ++ syn;
721 }
722
723 /* If we're at the end of the syntax string, we're done. */
724 if (* syn == 0)
725 {
726 /* FIXME: For the moment we assume a valid `str' can only contain
727 blanks now. IE: We needn't try again with a longer version of
728 the insn and it is assumed that longer versions of insns appear
729 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
730 while (ISSPACE (* str))
731 ++ str;
732
733 if (* str != '\0')
734 return _("junk at end of line"); /* FIXME: would like to include `str' */
735
736 return NULL;
737 }
738
739 /* We couldn't parse it. */
740 return _("unrecognized instruction");
741}
742\f
743/* Main entry point.
744 This routine is called for each instruction to be assembled.
745 STR points to the insn to be assembled.
746 We assume all necessary tables have been initialized.
747 The assembled instruction, less any fixups, is stored in BUF.
748 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
749 still needs to be converted to target byte order, otherwise BUF is an array
750 of bytes in target byte order.
751 The result is a pointer to the insn's entry in the opcode table,
752 or NULL if an error occured (an error message will have already been
753 printed).
754
755 Note that when processing (non-alias) macro-insns,
756 this function recurses.
757
758 ??? It's possible to make this cpu-independent.
759 One would have to deal with a few minor things.
760 At this point in time doing so would be more of a curiosity than useful
761 [for example this file isn't _that_ big], but keeping the possibility in
762 mind helps keep the design clean. */
763
764const CGEN_INSN *
ffead7ae
MM		 765iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd,
766 const char *str,
767 CGEN_FIELDS *fields,
768 CGEN_INSN_BYTES_PTR buf,
769 char **errmsg)
47b1a55a
SC		 770{
771 const char *start;
772 CGEN_INSN_LIST *ilist;
773 const char *parse_errmsg = NULL;
774 const char *insert_errmsg = NULL;
775 int recognized_mnemonic = 0;
776
777 /* Skip leading white space. */
778 while (ISSPACE (* str))
779 ++ str;
780
781 /* The instructions are stored in hashed lists.
782 Get the first in the list. */
783 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
784
785 /* Keep looking until we find a match. */
786 start = str;
787 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
788 {
789 const CGEN_INSN *insn = ilist->insn;
790 recognized_mnemonic = 1;
791
792#ifdef CGEN_VALIDATE_INSN_SUPPORTED
793 /* Not usually needed as unsupported opcodes
794 shouldn't be in the hash lists. */
795 /* Is this insn supported by the selected cpu? */
796 if (! iq2000_cgen_insn_supported (cd, insn))
797 continue;
798#endif
b11dcf4e 799 /* If the RELAXED attribute is set, this is an insn that shouldn't be
47b1a55a
SC		 800 chosen immediately. Instead, it is used during assembler/linker
801 relaxation if possible. */
b11dcf4e 802 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
47b1a55a
SC		 803 continue;
804
805 str = start;
806
807 /* Skip this insn if str doesn't look right lexically. */
808 if (CGEN_INSN_RX (insn) != NULL &&
809 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
810 continue;
811
812 /* Allow parse/insert handlers to obtain length of insn. */
813 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
814
815 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
816 if (parse_errmsg != NULL)
817 continue;
818
819 /* ??? 0 is passed for `pc'. */
820 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
821 (bfd_vma) 0);
822 if (insert_errmsg != NULL)
823 continue;
824
825 /* It is up to the caller to actually output the insn and any
826 queued relocs. */
827 return insn;
828 }
829
830 {
831 static char errbuf[150];
832#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
833 const char *tmp_errmsg;
834
835 /* If requesting verbose error messages, use insert_errmsg.
836 Failing that, use parse_errmsg. */
837 tmp_errmsg = (insert_errmsg ? insert_errmsg :
838 parse_errmsg ? parse_errmsg :
839 recognized_mnemonic ?
840 _("unrecognized form of instruction") :
841 _("unrecognized instruction"));
842
843 if (strlen (start) > 50)
844 /* xgettext:c-format */
845 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
846 else
847 /* xgettext:c-format */
848 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
849#else
850 if (strlen (start) > 50)
851 /* xgettext:c-format */
852 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
853 else
854 /* xgettext:c-format */
855 sprintf (errbuf, _("bad instruction `%.50s'"), start);
856#endif
857
858 *errmsg = errbuf;
859 return NULL;
860 }
861}
862\f
863#if 0 /* This calls back to GAS which we can't do without care. */
864
865/* Record each member of OPVALS in the assembler's symbol table.
866 This lets GAS parse registers for us.
867 ??? Interesting idea but not currently used. */
868
869/* Record each member of OPVALS in the assembler's symbol table.
870 FIXME: Not currently used. */
871
872void
ffead7ae 873iq2000_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
47b1a55a
SC		 874{
875 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
876 const CGEN_KEYWORD_ENTRY * ke;
877
878 while ((ke = cgen_keyword_search_next (& search)) != NULL)
879 {
880#if 0 /* Unnecessary, should be done in the search routine. */
881 if (! iq2000_cgen_opval_supported (ke))
882 continue;
883#endif
884 cgen_asm_record_register (cd, ke->name, ke->value);
885 }
886}
887
888#endif /* 0 */
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