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2005-05-04 Paolo Bonzini <[email protected]>
[binutils.git] / bfd / elf32-msp430.c
CommitLineData
2469cfa2 1/* MSP430-specific support for 32-bit ELF
b2a8e766 2 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
2469cfa2
NC		 3 Contributed by Dmitry Diky <[email protected]>
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
53e09e0a 19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02110-1301, USA. */
2469cfa2
NC		 20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libiberty.h"
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/msp430.h"
27
2469cfa2
NC		 28/* Use RELA instead of REL. */
29#undef USE_REL
30
31static reloc_howto_type elf_msp430_howto_table[] =
32{
33 HOWTO (R_MSP430_NONE, /* type */
34 0, /* rightshift */
35 2, /* size (0 = byte, 1 = short, 2 = long) */
36 32, /* bitsize */
37 FALSE, /* pc_relative */
38 0, /* bitpos */
b18c562e 39 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 40 bfd_elf_generic_reloc, /* special_function */
41 "R_MSP430_NONE", /* name */
42 FALSE, /* partial_inplace */
43 0, /* src_mask */
44 0, /* dst_mask */
45 FALSE), /* pcrel_offset */
46
47 HOWTO (R_MSP430_32, /* type */
48 0, /* rightshift */
49 2, /* size (0 = byte, 1 = short, 2 = long) */
50 32, /* bitsize */
51 FALSE, /* pc_relative */
52 0, /* bitpos */
b18c562e 53 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 54 bfd_elf_generic_reloc, /* special_function */
55 "R_MSP430_32", /* name */
56 FALSE, /* partial_inplace */
57 0xffffffff, /* src_mask */
58 0xffffffff, /* dst_mask */
59 FALSE), /* pcrel_offset */
60
61 /* A 13 bit PC relative relocation. */
62 HOWTO (R_MSP430_10_PCREL, /* type */
63 1, /* rightshift */
64 1, /* size (0 = byte, 1 = short, 2 = long) */
65 10, /* bitsize */
66 TRUE, /* pc_relative */
67 0, /* bitpos */
b18c562e 68 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 69 bfd_elf_generic_reloc, /* special_function */
70 "R_MSP430_13_PCREL", /* name */
71 FALSE, /* partial_inplace */
72 0xfff, /* src_mask */
73 0xfff, /* dst_mask */
74 TRUE), /* pcrel_offset */
75
76 /* A 16 bit absolute relocation. */
77 HOWTO (R_MSP430_16, /* type */
78 0, /* rightshift */
79 1, /* size (0 = byte, 1 = short, 2 = long) */
80 16, /* bitsize */
81 FALSE, /* pc_relative */
82 0, /* bitpos */
83 complain_overflow_dont,/* complain_on_overflow */
84 bfd_elf_generic_reloc, /* special_function */
85 "R_MSP430_16", /* name */
86 FALSE, /* partial_inplace */
b18c562e 87 0, /* src_mask */
2469cfa2
NC		 88 0xffff, /* dst_mask */
89 FALSE), /* pcrel_offset */
90
91 /* A 16 bit absolute relocation for command address. */
92 HOWTO (R_MSP430_16_PCREL, /* type */
93 1, /* rightshift */
94 1, /* size (0 = byte, 1 = short, 2 = long) */
95 16, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_dont,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_MSP430_16_PCREL", /* name */
101 FALSE, /* partial_inplace */
b18c562e 102 0, /* src_mask */
2469cfa2
NC		 103 0xffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* A 16 bit absolute relocation, byte operations. */
107 HOWTO (R_MSP430_16_BYTE, /* type */
108 0, /* rightshift */
109 1, /* size (0 = byte, 1 = short, 2 = long) */
110 16, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_dont,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_MSP430_16_BYTE", /* name */
116 FALSE, /* partial_inplace */
117 0xffff, /* src_mask */
118 0xffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* A 16 bit absolute relocation for command address. */
122 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
123 1, /* rightshift */
124 1, /* size (0 = byte, 1 = short, 2 = long) */
125 16, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_dont,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
b18c562e 130 "R_MSP430_16_PCREL_BYTE",/* name */
2469cfa2
NC		 131 FALSE, /* partial_inplace */
132 0xffff, /* src_mask */
133 0xffff, /* dst_mask */
b18c562e
NC		 134 TRUE), /* pcrel_offset */
135
136 /* A 13 bit PC relative relocation for complicated polymorphs. */
137 HOWTO (R_MSP430_2X_PCREL, /* type */
138 1, /* rightshift */
139 2, /* size (0 = byte, 1 = short, 2 = long) */
140 10, /* bitsize */
141 TRUE, /* pc_relative */
142 0, /* bitpos */
143 complain_overflow_bitfield,/* complain_on_overflow */
144 bfd_elf_generic_reloc, /* special_function */
145 "R_MSP430_2X_PCREL", /* name */
146 FALSE, /* partial_inplace */
147 0xfff, /* src_mask */
148 0xfff, /* dst_mask */
149 TRUE), /* pcrel_offset */
150
151 /* A 16 bit relaxable relocation for command address. */
152 HOWTO (R_MSP430_RL_PCREL, /* type */
153 1, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 TRUE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_dont,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_MSP430_RL_PCREL", /* name */
161 FALSE, /* partial_inplace */
162 0, /* src_mask */
163 0xffff, /* dst_mask */
2469cfa2
NC		 164 TRUE) /* pcrel_offset */
165};
166
167/* Map BFD reloc types to MSP430 ELF reloc types. */
168
169struct msp430_reloc_map
170{
171 bfd_reloc_code_real_type bfd_reloc_val;
172 unsigned int elf_reloc_val;
173};
174
175static const struct msp430_reloc_map msp430_reloc_map[] =
176 {
b18c562e
NC		 177 {BFD_RELOC_NONE, R_MSP430_NONE},
178 {BFD_RELOC_32, R_MSP430_32},
179 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
180 {BFD_RELOC_16, R_MSP430_16_BYTE},
181 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
182 {BFD_RELOC_MSP430_16, R_MSP430_16},
2469cfa2 183 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
b18c562e
NC		 184 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
185 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
186 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
2469cfa2
NC		 187 };
188
189static reloc_howto_type *
b18c562e
NC		 190bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
191 bfd_reloc_code_real_type code)
2469cfa2
NC		 192{
193 unsigned int i;
194
195 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
196 if (msp430_reloc_map[i].bfd_reloc_val == code)
197 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
198
199 return NULL;
200}
201
202/* Set the howto pointer for an MSP430 ELF reloc. */
203
204static void
b18c562e
NC		 205msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
206 arelent * cache_ptr,
207 Elf_Internal_Rela * dst)
2469cfa2
NC		 208{
209 unsigned int r_type;
210
211 r_type = ELF32_R_TYPE (dst->r_info);
212 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
213 cache_ptr->howto = &elf_msp430_howto_table[r_type];
214}
215
216static asection *
b18c562e
NC		 217elf32_msp430_gc_mark_hook (asection * sec,
218 struct bfd_link_info * info ATTRIBUTE_UNUSED,
219 Elf_Internal_Rela * rel,
220 struct elf_link_hash_entry * h,
221 Elf_Internal_Sym * sym)
2469cfa2
NC		 222{
223 if (h != NULL)
224 {
225 switch (ELF32_R_TYPE (rel->r_info))
226 {
227 default:
228 switch (h->root.type)
229 {
230 case bfd_link_hash_defined:
231 case bfd_link_hash_defweak:
232 return h->root.u.def.section;
233
234 case bfd_link_hash_common:
235 return h->root.u.c.p->section;
236
237 default:
238 break;
239 }
240 }
241 }
242 else
243 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
244
245 return NULL;
246}
247
248static bfd_boolean
b18c562e
NC		 249elf32_msp430_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
250 struct bfd_link_info * info ATTRIBUTE_UNUSED,
251 asection * sec ATTRIBUTE_UNUSED,
252 const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
2469cfa2
NC		 253{
254 /* We don't use got and plt entries for msp430. */
255 return TRUE;
256}
257
258/* Look through the relocs for a section during the first phase.
259 Since we don't do .gots or .plts, we just need to consider the
260 virtual table relocs for gc. */
261
262static bfd_boolean
b18c562e
NC		 263elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
264 asection * sec, const Elf_Internal_Rela * relocs)
2469cfa2
NC		 265{
266 Elf_Internal_Shdr *symtab_hdr;
267 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
268 const Elf_Internal_Rela *rel;
269 const Elf_Internal_Rela *rel_end;
270
1049f94e 271 if (info->relocatable)
2469cfa2
NC		 272 return TRUE;
273
274 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
275 sym_hashes = elf_sym_hashes (abfd);
276 sym_hashes_end =
277 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
278 if (!elf_bad_symtab (abfd))
279 sym_hashes_end -= symtab_hdr->sh_info;
280
281 rel_end = relocs + sec->reloc_count;
282 for (rel = relocs; rel < rel_end; rel++)
283 {
284 struct elf_link_hash_entry *h;
285 unsigned long r_symndx;
286
287 r_symndx = ELF32_R_SYM (rel->r_info);
288 if (r_symndx < symtab_hdr->sh_info)
289 h = NULL;
290 else
291 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
292 }
293
294 return TRUE;
295}
296
297/* Perform a single relocation. By default we use the standard BFD
298 routines, but a few relocs, we have to do them ourselves. */
299
300static bfd_reloc_status_type
b18c562e
NC		 301msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
302 asection * input_section, bfd_byte * contents,
303 Elf_Internal_Rela * rel, bfd_vma relocation)
2469cfa2
NC		 304{
305 bfd_reloc_status_type r = bfd_reloc_ok;
306 bfd_vma x;
307 bfd_signed_vma srel;
308
309 switch (howto->type)
310 {
311 case R_MSP430_10_PCREL:
312 contents += rel->r_offset;
313 srel = (bfd_signed_vma) relocation;
314 srel += rel->r_addend;
315 srel -= rel->r_offset;
316 srel -= 2; /* Branch instructions add 2 to the PC... */
317 srel -= (input_section->output_section->vma +
318 input_section->output_offset);
319
320 if (srel & 1)
321 return bfd_reloc_outofrange;
322
323 /* MSP430 addresses commands as words. */
324 srel >>= 1;
325
326 /* Check for an overflow. */
327 if (srel < -512 || srel > 511)
328 return bfd_reloc_overflow;
329
330 x = bfd_get_16 (input_bfd, contents);
331 x = (x & 0xfc00) | (srel & 0x3ff);
332 bfd_put_16 (input_bfd, x, contents);
333 break;
334
b18c562e
NC		 335 case R_MSP430_2X_PCREL:
336 contents += rel->r_offset;
337 srel = (bfd_signed_vma) relocation;
338 srel += rel->r_addend;
339 srel -= rel->r_offset;
340 srel -= 2; /* Branch instructions add 2 to the PC... */
341 srel -= (input_section->output_section->vma +
342 input_section->output_offset);
343
344 if (srel & 1)
345 return bfd_reloc_outofrange;
346
347 /* MSP430 addresses commands as words. */
348 srel >>= 1;
349
350 /* Check for an overflow. */
351 if (srel < -512 || srel > 511)
352 return bfd_reloc_overflow;
353
354 x = bfd_get_16 (input_bfd, contents);
355 x = (x & 0xfc00) | (srel & 0x3ff);
356 bfd_put_16 (input_bfd, x, contents);
357 /* Handle second jump instruction. */
358 x = bfd_get_16 (input_bfd, contents - 2);
359 srel += 1;
360 x = (x & 0xfc00) | (srel & 0x3ff);
361 bfd_put_16 (input_bfd, x, contents - 2);
362 break;
363
2469cfa2 364 case R_MSP430_16_PCREL:
b18c562e 365 case R_MSP430_RL_PCREL:
2469cfa2
NC		 366 contents += rel->r_offset;
367 srel = (bfd_signed_vma) relocation;
368 srel += rel->r_addend;
369 srel -= rel->r_offset;
370 /* Only branch instructions add 2 to the PC... */
371 srel -= (input_section->output_section->vma +
372 input_section->output_offset);
373
374 if (srel & 1)
375 return bfd_reloc_outofrange;
376
377 bfd_put_16 (input_bfd, srel & 0xffff, contents);
378 break;
379
380 case R_MSP430_16_PCREL_BYTE:
381 contents += rel->r_offset;
382 srel = (bfd_signed_vma) relocation;
383 srel += rel->r_addend;
384 srel -= rel->r_offset;
385 /* Only branch instructions add 2 to the PC... */
386 srel -= (input_section->output_section->vma +
387 input_section->output_offset);
388
389 bfd_put_16 (input_bfd, srel & 0xffff, contents);
390 break;
391
392 case R_MSP430_16_BYTE:
393 contents += rel->r_offset;
394 srel = (bfd_signed_vma) relocation;
395 srel += rel->r_addend;
396 bfd_put_16 (input_bfd, srel & 0xffff, contents);
397 break;
398
399 case R_MSP430_16:
400 contents += rel->r_offset;
401 srel = (bfd_signed_vma) relocation;
402 srel += rel->r_addend;
403
404 if (srel & 1)
405 return bfd_reloc_notsupported;
406
407 bfd_put_16 (input_bfd, srel & 0xffff, contents);
408 break;
409
410 default:
411 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
412 contents, rel->r_offset,
413 relocation, rel->r_addend);
414 }
415
416 return r;
417}
418
419/* Relocate an MSP430 ELF section. */
420
421static bfd_boolean
b18c562e
NC		 422elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
423 struct bfd_link_info * info,
424 bfd * input_bfd,
425 asection * input_section,
426 bfd_byte * contents,
427 Elf_Internal_Rela * relocs,
428 Elf_Internal_Sym * local_syms,
429 asection ** local_sections)
2469cfa2
NC		 430{
431 Elf_Internal_Shdr *symtab_hdr;
432 struct elf_link_hash_entry **sym_hashes;
433 Elf_Internal_Rela *rel;
434 Elf_Internal_Rela *relend;
435
436 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
437 sym_hashes = elf_sym_hashes (input_bfd);
438 relend = relocs + input_section->reloc_count;
439
440 for (rel = relocs; rel < relend; rel++)
441 {
442 reloc_howto_type *howto;
443 unsigned long r_symndx;
444 Elf_Internal_Sym *sym;
445 asection *sec;
446 struct elf_link_hash_entry *h;
447 bfd_vma relocation;
448 bfd_reloc_status_type r;
449 const char *name = NULL;
450 int r_type;
451
452 /* This is a final link. */
453
454 r_type = ELF32_R_TYPE (rel->r_info);
455 r_symndx = ELF32_R_SYM (rel->r_info);
456 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
457 h = NULL;
458 sym = NULL;
459 sec = NULL;
460
461 if (r_symndx < symtab_hdr->sh_info)
462 {
463 sym = local_syms + r_symndx;
464 sec = local_sections[r_symndx];
8517fae7 465 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
2469cfa2
NC		 466
467 name = bfd_elf_string_from_elf_section
468 (input_bfd, symtab_hdr->sh_link, sym->st_name);
469 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
470 }
471 else
472 {
59c2e50f 473 bfd_boolean unresolved_reloc, warned;
2469cfa2 474
b2a8e766
AM		 475 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
476 r_symndx, symtab_hdr, sym_hashes,
477 h, sec, relocation,
478 unresolved_reloc, warned);
2469cfa2
NC		 479 }
480
481 r = msp430_final_link_relocate (howto, input_bfd, input_section,
482 contents, rel, relocation);
483
484 if (r != bfd_reloc_ok)
485 {
486 const char *msg = (const char *) NULL;
487
488 switch (r)
489 {
490 case bfd_reloc_overflow:
491 r = info->callbacks->reloc_overflow
dfeffb9f
L		 492 (info, (h ? &h->root : NULL), name, howto->name,
493 (bfd_vma) 0, input_bfd, input_section,
494 rel->r_offset);
2469cfa2
NC		 495 break;
496
497 case bfd_reloc_undefined:
498 r = info->callbacks->undefined_symbol
499 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
500 break;
501
502 case bfd_reloc_outofrange:
503 msg = _("internal error: out of range error");
504 break;
505
506 case bfd_reloc_notsupported:
507 msg = _("internal error: unsupported relocation error");
508 break;
509
510 case bfd_reloc_dangerous:
511 msg = _("internal error: dangerous relocation");
512 break;
513
514 default:
515 msg = _("internal error: unknown error");
516 break;
517 }
518
519 if (msg)
520 r = info->callbacks->warning
521 (info, msg, name, input_bfd, input_section, rel->r_offset);
522
523 if (!r)
524 return FALSE;
525 }
526
527 }
528
529 return TRUE;
530}
531
532/* The final processing done just before writing out a MSP430 ELF object
533 file. This gets the MSP430 architecture right based on the machine
534 number. */
535
536static void
b18c562e
NC		 537bfd_elf_msp430_final_write_processing (bfd * abfd,
538 bfd_boolean linker ATTRIBUTE_UNUSED)
2469cfa2
NC		 539{
540 unsigned long val;
541
542 switch (bfd_get_mach (abfd))
543 {
544 default:
2469cfa2
NC		 545 case bfd_mach_msp110:
546 val = E_MSP430_MACH_MSP430x11x1;
547 break;
548
549 case bfd_mach_msp11:
550 val = E_MSP430_MACH_MSP430x11;
551 break;
552
3b260895
NC		 553 case bfd_mach_msp12:
554 val = E_MSP430_MACH_MSP430x12;
555 break;
556
2469cfa2
NC		 557 case bfd_mach_msp13:
558 val = E_MSP430_MACH_MSP430x13;
559 break;
560
561 case bfd_mach_msp14:
562 val = E_MSP430_MACH_MSP430x14;
563 break;
564
3b260895
NC		 565 case bfd_mach_msp15:
566 val = E_MSP430_MACH_MSP430x15;
2469cfa2
NC		 567 break;
568
3b260895
NC		 569 case bfd_mach_msp16:
570 val = E_MSP430_MACH_MSP430x16;
2469cfa2
NC		 571 break;
572
573 case bfd_mach_msp31:
574 val = E_MSP430_MACH_MSP430x31;
575 break;
576
577 case bfd_mach_msp32:
578 val = E_MSP430_MACH_MSP430x32;
579 break;
580
581 case bfd_mach_msp33:
582 val = E_MSP430_MACH_MSP430x33;
583 break;
584
3b260895
NC		 585 case bfd_mach_msp41:
586 val = E_MSP430_MACH_MSP430x41;
2469cfa2
NC		 587 break;
588
3b260895
NC		 589 case bfd_mach_msp42:
590 val = E_MSP430_MACH_MSP430x42;
591 break;
592
593 case bfd_mach_msp43:
594 val = E_MSP430_MACH_MSP430x43;
595 break;
596
597 case bfd_mach_msp44:
598 val = E_MSP430_MACH_MSP430x44;
2469cfa2
NC		 599 break;
600 }
601
602 elf_elfheader (abfd)->e_machine = EM_MSP430;
603 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
604 elf_elfheader (abfd)->e_flags |= val;
605}
606
607/* Set the right machine number. */
608
609static bfd_boolean
b18c562e 610elf32_msp430_object_p (bfd * abfd)
2469cfa2
NC		 611{
612 int e_set = bfd_mach_msp14;
613
614 if (elf_elfheader (abfd)->e_machine == EM_MSP430
615 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
616 {
617 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
618
619 switch (e_mach)
620 {
621 default:
2469cfa2
NC		 622 case E_MSP430_MACH_MSP430x11:
623 e_set = bfd_mach_msp11;
624 break;
625
626 case E_MSP430_MACH_MSP430x11x1:
627 e_set = bfd_mach_msp110;
628 break;
629
3b260895
NC		 630 case E_MSP430_MACH_MSP430x12:
631 e_set = bfd_mach_msp12;
632 break;
633
2469cfa2
NC		 634 case E_MSP430_MACH_MSP430x13:
635 e_set = bfd_mach_msp13;
636 break;
637
638 case E_MSP430_MACH_MSP430x14:
639 e_set = bfd_mach_msp14;
640 break;
641
3b260895
NC		 642 case E_MSP430_MACH_MSP430x15:
643 e_set = bfd_mach_msp15;
644 break;
645
646 case E_MSP430_MACH_MSP430x16:
647 e_set = bfd_mach_msp16;
2469cfa2
NC		 648 break;
649
650 case E_MSP430_MACH_MSP430x31:
651 e_set = bfd_mach_msp31;
652 break;
653
654 case E_MSP430_MACH_MSP430x32:
655 e_set = bfd_mach_msp32;
656 break;
657
658 case E_MSP430_MACH_MSP430x33:
659 e_set = bfd_mach_msp33;
660 break;
661
3b260895
NC		 662 case E_MSP430_MACH_MSP430x41:
663 e_set = bfd_mach_msp41;
2469cfa2
NC		 664 break;
665
3b260895
NC		 666 case E_MSP430_MACH_MSP430x42:
667 e_set = bfd_mach_msp42;
2469cfa2
NC		 668 break;
669
3b260895
NC		 670 case E_MSP430_MACH_MSP430x43:
671 e_set = bfd_mach_msp43;
2469cfa2
NC		 672 break;
673
3b260895
NC		 674 case E_MSP430_MACH_MSP430x44:
675 e_set = bfd_mach_msp44;
2469cfa2
NC		 676 break;
677 }
678 }
679
680 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
681}
682
683static void
b18c562e
NC		 684elf32_msp430_post_process_headers (bfd * abfd,
685 struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
2469cfa2 686{
b18c562e 687 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
2469cfa2
NC		 688
689 i_ehdrp = elf_elfheader (abfd);
690
691#ifndef ELFOSABI_STANDALONE
692#define ELFOSABI_STANDALONE 255
693#endif
694
695 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
696}
697
b18c562e
NC		 698/* These functions handle relaxing for the msp430.
699 Relaxation required only in two cases:
700 - Bad hand coding like jumps from one section to another or
701 from file to file.
702 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
703 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
704 do not work in gcc's port by the reason I do not know.
705 Anyway, if a relaxation required, user should pass -relax option to the
706 linker.
707
708 There are quite a few relaxing opportunities available on the msp430:
709
710 ================================================================
711
712 1. 3 words -> 1 word
713
714 eq == jeq label jne +4; br lab
715 ne != jne label jeq +4; br lab
716 lt < jl label jge +4; br lab
717 ltu < jlo label lhs +4; br lab
718 ge >= jge label jl +4; br lab
719 geu >= jhs label jlo +4; br lab
720
721 2. 4 words -> 1 word
722
723 ltn < jn jn +2; jmp +4; br lab
724
725 3. 4 words -> 2 words
726
727 gt > jeq +2; jge label jeq +6; jl +4; br label
728 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
729
730 4. 4 words -> 2 words and 2 labels
731
732 leu <= jeq label; jlo label jeq +2; jhs +4; br label
733 le <= jeq label; jl label jeq +2; jge +4; br label
734 =================================================================
735
736 codemap for first cases is (labels masked ):
737 eq: 0x2002,0x4010,0x0000 -> 0x2400
738 ne: 0x2402,0x4010,0x0000 -> 0x2000
739 lt: 0x3402,0x4010,0x0000 -> 0x3800
740 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
741 ge: 0x3802,0x4010,0x0000 -> 0x3400
742 geu: 0x2802,0x4010,0x0000 -> 0x2c00
743
744 second case:
745 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
746
747 third case:
748 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
749 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
750
751 fourth case:
752 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
753 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
754
755 Unspecified case :)
756 jump: 0x4010,0x0000 -> 0x3c00. */
757
758#define NUMB_RELAX_CODES 12
759static struct rcodes_s
760{
761 int f0, f1; /* From code. */
762 int t0, t1; /* To code. */
763 int labels; /* Position of labels: 1 - one label at first
764 word, 2 - one at second word, 3 - two
765 labels at both. */
766 int cdx; /* Words to match. */
767 int bs; /* Shrink bytes. */
768 int off; /* Offset from old label for new code. */
769 int ncl; /* New code length. */
770} rcode[] =
771{/* lab,cdx,bs,off,ncl */
772 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
773 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
774 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
775 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
776 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
777 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
778 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
779 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
780 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
781 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
782 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
783 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
784 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
785};
786
787/* Return TRUE if a symbol exists at the given address. */
788
789static bfd_boolean
790msp430_elf_symbol_address_p (bfd * abfd,
791 asection * sec,
792 Elf_Internal_Sym * isym,
793 bfd_vma addr)
794{
795 Elf_Internal_Shdr *symtab_hdr;
796 unsigned int sec_shndx;
797 Elf_Internal_Sym *isymend;
798 struct elf_link_hash_entry **sym_hashes;
799 struct elf_link_hash_entry **end_hashes;
800 unsigned int symcount;
801
802 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
803
804 /* Examine all the local symbols. */
805 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
806 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
807 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
808 return TRUE;
809
810 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
811 - symtab_hdr->sh_info);
812 sym_hashes = elf_sym_hashes (abfd);
813 end_hashes = sym_hashes + symcount;
814 for (; sym_hashes < end_hashes; sym_hashes++)
815 {
816 struct elf_link_hash_entry *sym_hash = *sym_hashes;
817
818 if ((sym_hash->root.type == bfd_link_hash_defined
819 || sym_hash->root.type == bfd_link_hash_defweak)
820 && sym_hash->root.u.def.section == sec
821 && sym_hash->root.u.def.value == addr)
822 return TRUE;
823 }
824
825 return FALSE;
826}
827
828/* Delete some bytes from a section while relaxing. */
829
830static bfd_boolean
831msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
832 int count)
833{
834 Elf_Internal_Shdr *symtab_hdr;
835 unsigned int sec_shndx;
836 bfd_byte *contents;
837 Elf_Internal_Rela *irel;
838 Elf_Internal_Rela *irelend;
839 Elf_Internal_Rela *irelalign;
840 bfd_vma toaddr;
841 Elf_Internal_Sym *isym;
842 Elf_Internal_Sym *isymend;
843 struct elf_link_hash_entry **sym_hashes;
844 struct elf_link_hash_entry **end_hashes;
845 unsigned int symcount;
846
847 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
848
849 contents = elf_section_data (sec)->this_hdr.contents;
850
851 /* The deletion must stop at the next ALIGN reloc for an aligment
852 power larger than the number of bytes we are deleting. */
853
854 irelalign = NULL;
855 toaddr = sec->size;
856
857 irel = elf_section_data (sec)->relocs;
858 irelend = irel + sec->reloc_count;
859
860 /* Actually delete the bytes. */
861 memmove (contents + addr, contents + addr + count,
862 (size_t) (toaddr - addr - count));
863 sec->size -= count;
864
865 /* Adjust all the relocs. */
866 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
867 /* Get the new reloc address. */
868 if ((irel->r_offset > addr && irel->r_offset < toaddr))
869 irel->r_offset -= count;
870
871 /* Adjust the local symbols defined in this section. */
872 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
873 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
874 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
875 if (isym->st_shndx == sec_shndx
876 && isym->st_value > addr && isym->st_value < toaddr)
877 isym->st_value -= count;
878
879 /* Now adjust the global symbols defined in this section. */
880 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
881 - symtab_hdr->sh_info);
882 sym_hashes = elf_sym_hashes (abfd);
883 end_hashes = sym_hashes + symcount;
884 for (; sym_hashes < end_hashes; sym_hashes++)
885 {
886 struct elf_link_hash_entry *sym_hash = *sym_hashes;
887
888 if ((sym_hash->root.type == bfd_link_hash_defined
889 || sym_hash->root.type == bfd_link_hash_defweak)
890 && sym_hash->root.u.def.section == sec
891 && sym_hash->root.u.def.value > addr
892 && sym_hash->root.u.def.value < toaddr)
893 sym_hash->root.u.def.value -= count;
894 }
895
896 return TRUE;
897}
898
899
900static bfd_boolean
901msp430_elf_relax_section (bfd * abfd, asection * sec,
902 struct bfd_link_info * link_info,
903 bfd_boolean * again)
904{
905 Elf_Internal_Shdr * symtab_hdr;
906 Elf_Internal_Rela * internal_relocs;
907 Elf_Internal_Rela * irel;
908 Elf_Internal_Rela * irelend;
909 bfd_byte * contents = NULL;
910 Elf_Internal_Sym * isymbuf = NULL;
911
912 /* Assume nothing changes. */
913 *again = FALSE;
914
915 /* We don't have to do anything for a relocatable link, if
916 this section does not have relocs, or if this is not a
917 code section. */
918 if (link_info->relocatable
919 || (sec->flags & SEC_RELOC) == 0
920 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
921 return TRUE;
922
923 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
924
925 /* Get a copy of the native relocations. */
926 internal_relocs =
927 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
928 if (internal_relocs == NULL)
929 goto error_return;
930
931 /* Walk through them looking for relaxing opportunities. */
932 irelend = internal_relocs + sec->reloc_count;
933 for (irel = internal_relocs; irel < irelend; irel++)
934 {
935 bfd_vma symval;
936
937 /* If this isn't something that can be relaxed, then ignore
938 this reloc. */
939 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
940 continue;
941
942 /* Get the section contents if we haven't done so already. */
943 if (contents == NULL)
944 {
945 /* Get cached copy if it exists. */
946 if (elf_section_data (sec)->this_hdr.contents != NULL)
947 contents = elf_section_data (sec)->this_hdr.contents;
948 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
949 goto error_return;
950 }
951
952 /* Read this BFD's local symbols if we haven't done so already. */
953 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
954 {
955 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
956 if (isymbuf == NULL)
957 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
958 symtab_hdr->sh_info, 0,
959 NULL, NULL, NULL);
960 if (isymbuf == NULL)
961 goto error_return;
962 }
963
964 /* Get the value of the symbol referred to by the reloc. */
965 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
966 {
967 /* A local symbol. */
968 Elf_Internal_Sym *isym;
969 asection *sym_sec;
970
971 isym = isymbuf + ELF32_R_SYM (irel->r_info);
972 if (isym->st_shndx == SHN_UNDEF)
973 sym_sec = bfd_und_section_ptr;
974 else if (isym->st_shndx == SHN_ABS)
975 sym_sec = bfd_abs_section_ptr;
976 else if (isym->st_shndx == SHN_COMMON)
977 sym_sec = bfd_com_section_ptr;
978 else
979 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
980 symval = (isym->st_value
981 + sym_sec->output_section->vma + sym_sec->output_offset);
982 }
983 else
984 {
985 unsigned long indx;
986 struct elf_link_hash_entry *h;
987
988 /* An external symbol. */
989 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
990 h = elf_sym_hashes (abfd)[indx];
991 BFD_ASSERT (h != NULL);
992
993 if (h->root.type != bfd_link_hash_defined
994 && h->root.type != bfd_link_hash_defweak)
995 /* This appears to be a reference to an undefined
996 symbol. Just ignore it--it will be caught by the
997 regular reloc processing. */
998 continue;
999
1000 symval = (h->root.u.def.value
1001 + h->root.u.def.section->output_section->vma
1002 + h->root.u.def.section->output_offset);
1003 }
1004
1005 /* For simplicity of coding, we are going to modify the section
1006 contents, the section relocs, and the BFD symbol table. We
1007 must tell the rest of the code not to free up this
1008 information. It would be possible to instead create a table
1009 of changes which have to be made, as is done in coff-mips.c;
1010 that would be more work, but would require less memory when
1011 the linker is run. */
1012
1013 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1014 branch. */
1015 /* Paranoia? paranoia... */
1016 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1017 {
1018 bfd_vma value = symval;
1019
1020 /* Deal with pc-relative gunk. */
1021 value -= (sec->output_section->vma + sec->output_offset);
1022 value -= irel->r_offset;
1023 value += irel->r_addend;
1024
1025 /* See if the value will fit in 10 bits, note the high value is
1026 1016 as the target will be two bytes closer if we are
1027 able to relax. */
1028 if ((long) value < 1016 && (long) value > -1016)
1029 {
1030 int code0 = 0, code1 = 0, code2 = 0;
1031 int i;
1032 struct rcodes_s *rx;
1033
1034 /* Get the opcode. */
1035 if (irel->r_offset >= 6)
1036 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1037
1038 if (irel->r_offset >= 4)
1039 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1040
1041 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1042
1043 if (code2 != 0x4010)
1044 continue;
1045
1046 /* Check r4 and r3. */
1047 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1048 {
1049 rx = &rcode[i];
1050 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1051 break;
1052 else if (rx->cdx == 1 && rx->f1 == code1)
1053 break;
1054 else if (rx->cdx == 0) /* This is an unconditional jump. */
1055 break;
1056 }
1057
1058 /* Check labels:
1059 .Label0: ; we do not care about this label
1060 jeq +6
1061 .Label1: ; make sure there is no label here
1062 jl +4
1063 .Label2: ; make sure there is no label here
1064 br .Label_dst
1065
1066 So, if there is .Label1 or .Label2 we cannot relax this code.
1067 This actually should not happen, cause for relaxable
1068 instructions we use RL_PCREL reloc instead of 16_PCREL.
1069 Will change this in the future. */
1070
1071 if (rx->cdx > 0
1072 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1073 irel->r_offset - 2))
1074 continue;
1075 if (rx->cdx > 1
1076 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1077 irel->r_offset - 4))
1078 continue;
1079
1080 /* Note that we've changed the relocs, section contents, etc. */
1081 elf_section_data (sec)->relocs = internal_relocs;
1082 elf_section_data (sec)->this_hdr.contents = contents;
1083 symtab_hdr->contents = (unsigned char *) isymbuf;
1084
1085 /* Fix the relocation's type. */
1086 if (rx->labels == 3) /* Handle special cases. */
1087 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1088 R_MSP430_2X_PCREL);
1089 else
1090 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1091 R_MSP430_10_PCREL);
1092
1093 /* Fix the opcode right way. */
1094 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1095 if (rx->t1)
1096 bfd_put_16 (abfd, rx->t1,
1097 contents + irel->r_offset - rx->off + 2);
1098
1099 /* Delete bytes. */
1100 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1101 irel->r_offset - rx->off +
1102 rx->ncl, rx->bs))
1103 goto error_return;
1104
1105 /* Handle unconditional jumps. */
1106 if (rx->cdx == 0)
1107 irel->r_offset -= 2;
1108
1109 /* That will change things, so, we should relax again.
1110 Note that this is not required, and it may be slow. */
1111 *again = TRUE;
1112 }
1113 }
1114 }
1115
1116 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1117 {
1118 if (!link_info->keep_memory)
1119 free (isymbuf);
1120 else
1121 {
1122 /* Cache the symbols for elf_link_input_bfd. */
1123 symtab_hdr->contents = (unsigned char *) isymbuf;
1124 }
1125 }
1126
1127 if (contents != NULL
1128 && elf_section_data (sec)->this_hdr.contents != contents)
1129 {
1130 if (!link_info->keep_memory)
1131 free (contents);
1132 else
1133 {
1134 /* Cache the section contents for elf_link_input_bfd. */
1135 elf_section_data (sec)->this_hdr.contents = contents;
1136 }
1137 }
1138
1139 if (internal_relocs != NULL
1140 && elf_section_data (sec)->relocs != internal_relocs)
1141 free (internal_relocs);
1142
1143 return TRUE;
1144
1145error_return:
1146 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1147 free (isymbuf);
1148 if (contents != NULL
1149 && elf_section_data (sec)->this_hdr.contents != contents)
1150 free (contents);
1151 if (internal_relocs != NULL
1152 && elf_section_data (sec)->relocs != internal_relocs)
1153 free (internal_relocs);
1154
1155 return FALSE;
1156}
1157
2469cfa2
NC		 1158
1159#define ELF_ARCH bfd_arch_msp430
1160#define ELF_MACHINE_CODE EM_MSP430
1161#define ELF_MACHINE_ALT1 EM_MSP430_OLD
1162#define ELF_MAXPAGESIZE 1
1163
1164#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1165#define TARGET_LITTLE_NAME "elf32-msp430"
1166
1167#define elf_info_to_howto msp430_info_to_howto_rela
1168#define elf_info_to_howto_rel NULL
1169#define elf_backend_relocate_section elf32_msp430_relocate_section
1170#define elf_backend_gc_mark_hook elf32_msp430_gc_mark_hook
1171#define elf_backend_gc_sweep_hook elf32_msp430_gc_sweep_hook
1172#define elf_backend_check_relocs elf32_msp430_check_relocs
1173#define elf_backend_can_gc_sections 1
1174#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1175#define elf_backend_object_p elf32_msp430_object_p
1176#define elf_backend_post_process_headers elf32_msp430_post_process_headers
b18c562e 1177#define bfd_elf32_bfd_relax_section msp430_elf_relax_section
2469cfa2
NC		 1178
1179#include "elf32-target.h"
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