projects / binutils.git / blame
| Commit | Line | Data |
|---|---|---|
| 089aacdb RP |
1 | /* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger. |
| 2 | Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc. | |
| 3 | ||
| 4 | This file is part of GDB. | |
| 5 | ||
| 6 | GDB is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 1, or (at your option) | |
| 9 | any later version. | |
| 10 | ||
| 11 | GDB is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with GDB; see the file COPYING. If not, write to | |
| 18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
| 19 | ||
| 20 | struct gld_opcode | |
| 21 | { | |
| 22 | char *name; | |
| 23 | unsigned long opcode; | |
| 24 | unsigned long mask; | |
| 25 | char *args; | |
| 26 | int length; | |
| 27 | }; | |
| 28 | ||
| 29 | /* We store four bytes of opcode for all opcodes because that | |
| 30 | is the most any of them need. The actual length of an instruction | |
| 31 | is always at least 2 bytes, and at most four. The length of the | |
| 32 | instruction is based on the opcode. | |
| 33 | ||
| 34 | The mask component is a mask saying which bits must match | |
| 35 | particular opcode in order for an instruction to be an instance | |
| 36 | of that opcode. | |
| 37 | ||
| 38 | The args component is a string containing characters | |
| 39 | that are used to format the arguments to the instruction. */ | |
| 40 | ||
| 41 | /* Kinds of operands: | |
| 42 | r Register in first field | |
| 43 | R Register in second field | |
| 44 | b Base register in first field | |
| 45 | B Base register in second field | |
| 46 | v Vector register in first field | |
| 47 | V Vector register in first field | |
| 48 | A Optional address register (base register) | |
| 49 | X Optional index register | |
| 50 | I Immediate data (16bits signed) | |
| 51 | O Offset field (16bits signed) | |
| 52 | h Offset field (15bits signed) | |
| 53 | d Offset field (14bits signed) | |
| 54 | S Shift count field | |
| 55 | ||
| 56 | any other characters are printed as is... | |
| 57 | */ | |
| 58 | ||
| 59 | /* The assembler requires that this array be sorted as follows: | |
| 60 | all instances of the same mnemonic must be consecutive. | |
| 61 | All instances of the same mnemonic with the same number of operands | |
| 62 | must be consecutive. | |
| 63 | */ | |
| 64 | struct gld_opcode gld_opcodes[] = | |
| 65 | { | |
| 66 | { "abm", 0xa0080000, 0xfc080000, "f,xOA,X", 4 }, | |
| 67 | { "abr", 0x18080000, 0xfc0c0000, "r,f", 2 }, | |
| 68 | { "aci", 0xfc770000, 0xfc7f8000, "r,I", 4 }, | |
| 69 | { "adfd", 0xe0080002, 0xfc080002, "r,xOA,X", 4 }, | |
| 70 | { "adfw", 0xe0080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 71 | { "adi", 0xc8010000, 0xfc7f0000, "r,I", 4 }, | |
| 72 | { "admb", 0xb8080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 73 | { "admd", 0xb8000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 74 | { "admh", 0xb8000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 75 | { "admw", 0xb8000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 76 | { "adr", 0x38000000, 0xfc0f0000, "r,R", 2 }, | |
| 77 | { "adrfd", 0x38090000, 0xfc0f0000, "r,R", 2 }, | |
| 78 | { "adrfw", 0x38010000, 0xfc0f0000, "r,R", 2 }, | |
| 79 | { "adrm", 0x38080000, 0xfc0f0000, "r,R", 2 }, | |
| 80 | { "ai", 0xfc030000, 0xfc07ffff, "I", 4 }, | |
| 81 | { "anmb", 0x84080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 82 | { "anmd", 0x84000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 83 | { "anmh", 0x84000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 84 | { "anmw", 0x84000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 85 | { "anr", 0x04000000, 0xfc0f0000, "r,R", 2 }, | |
| 86 | { "armb", 0xe8080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 87 | { "armd", 0xe8000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 88 | { "armh", 0xe8000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 89 | { "armw", 0xe8000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 90 | { "bcf", 0xf0000000, 0xfc080000, "I,xOA,X", 4 }, | |
| 91 | { "bct", 0xec000000, 0xfc080000, "I,xOA,X", 4 }, | |
| 92 | { "bei", 0x00060000, 0xffff0000, "", 2 }, | |
| 93 | { "bft", 0xf0000000, 0xff880000, "xOA,X", 4 }, | |
| 94 | { "bib", 0xf4000000, 0xfc780000, "r,xOA", 4 }, | |
| 95 | { "bid", 0xf4600000, 0xfc780000, "r,xOA", 4 }, | |
| 96 | { "bih", 0xf4200000, 0xfc780000, "r,xOA", 4 }, | |
| 97 | { "biw", 0xf4400000, 0xfc780000, "r,xOA", 4 }, | |
| 98 | { "bl", 0xf8800000, 0xff880000, "xOA,X", 4 }, | |
| 99 | { "bsub", 0x5c080000, 0xff8f0000, "", 2 }, | |
| 100 | { "bsubm", 0x28080000, 0xfc080000, "", 4 }, | |
| 101 | { "bu", 0xec000000, 0xff880000, "xOA,X", 4 }, | |
| 102 | { "call", 0x28080000, 0xfc0f0000, "", 2 }, | |
| 103 | { "callm", 0x5c080000, 0xff880000, "", 4 }, | |
| 104 | { "camb", 0x90080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 105 | { "camd", 0x90000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 106 | { "camh", 0x90000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 107 | { "camw", 0x90000000, 0xfc080000, "r.xOA,X", 4 }, | |
| 108 | { "car", 0x10000000, 0xfc0f0000, "r,R", 2 }, | |
| 109 | { "cd", 0xfc060000, 0xfc070000, "r,f", 4 }, | |
| 110 | { "cea", 0x000f0000, 0xffff0000, "", 2 }, | |
| 111 | { "ci", 0xc8050000, 0xfc7f0000, "r,I", 4 }, | |
| 112 | { "cmc", 0x040a0000, 0xfc7f0000, "r", 2 }, | |
| 113 | { "cmmb", 0x94080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 114 | { "cmmd", 0x94000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 115 | { "cmmh", 0x94000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 116 | { "cmmw", 0x94000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 117 | { "cmr", 0x14000000, 0xfc0f0000, "r,R", 2 }, | |
| 118 | { "daci", 0xfc7f0000, 0xfc7f8000, "r,I", 4 }, | |
| 119 | { "dae", 0x000e0000, 0xffff0000, "", 2 }, | |
| 120 | { "dai", 0xfc040000, 0xfc07ffff, "I", 4 }, | |
| 121 | { "dci", 0xfc6f0000, 0xfc7f8000, "r,I", 4 }, | |
| 122 | { "di", 0xfc010000, 0xfc07ffff, "I", 4 }, | |
| 123 | { "dvfd", 0xe4000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 124 | { "dvfw", 0xe4000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 125 | { "dvi", 0xc8040000, 0xfc7f0000, "r,I", 4 }, | |
| 126 | { "dvmb", 0xc4080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 127 | { "dvmh", 0xc4000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 128 | { "dvmw", 0xc4000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 129 | { "dvr", 0x380a0000, 0xfc0f0000, "r,R", 2 }, | |
| 130 | { "dvrfd", 0x380c0000, 0xfc0f0000, "r,R", 4 }, | |
| 131 | { "dvrfw", 0x38040000, 0xfc0f0000, "r,xOA,X", 4 }, | |
| 132 | { "eae", 0x00080000, 0xffff0000, "", 2 }, | |
| 133 | { "eci", 0xfc670000, 0xfc7f8080, "r,I", 4 }, | |
| 134 | { "ecwcs", 0xfc4f0000, 0xfc7f8000, "", 4 }, | |
| 135 | { "ei", 0xfc000000, 0xfc07ffff, "I", 4 }, | |
| 136 | { "eomb", 0x8c080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 137 | { "eomd", 0x8c000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 138 | { "eomh", 0x8c000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 139 | { "eomw", 0x8c000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 140 | { "eor", 0x0c000000, 0xfc0f0000, "r,R", 2 }, | |
| 141 | { "eorm", 0x0c080000, 0xfc0f0000, "r,R", 2 }, | |
| 142 | { "es", 0x00040000, 0xfc7f0000, "r", 2 }, | |
| 143 | { "exm", 0xa8000000, 0xff880000, "xOA,X", 4 }, | |
| 144 | { "exr", 0xc8070000, 0xfc7f0000, "r", 2 }, | |
| 145 | { "exrr", 0xc8070002, 0xfc7f0002, "r", 2 }, | |
| 146 | { "fixd", 0x380d0000, 0xfc0f0000, "r,R", 2 }, | |
| 147 | { "fixw", 0x38050000, 0xfc0f0000, "r,R", 2 }, | |
| 148 | { "fltd", 0x380f0000, 0xfc0f0000, "r,R", 2 }, | |
| 149 | { "fltw", 0x38070000, 0xfc0f0000, "r,R", 2 }, | |
| 150 | { "grio", 0xfc3f0000, 0xfc7f8000, "r,I", 4 }, | |
| 151 | { "halt", 0x00000000, 0xffff0000, "", 2 }, | |
| 152 | { "hio", 0xfc370000, 0xfc7f8000, "r,I", 4 }, | |
| 153 | { "jwcs", 0xfa080000, 0xff880000, "xOA,X", 4 }, | |
| 154 | { "la", 0x50000000, 0xfc000000, "r,xOA,X", 4 }, | |
| 155 | { "labr", 0x58080000, 0xfc080000, "b,xOA,X", 4 }, | |
| 156 | { "lb", 0xac080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 157 | { "lcs", 0x00030000, 0xfc7f0000, "r", 2 }, | |
| 158 | { "ld", 0xac000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 159 | { "lear", 0x80000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 160 | { "lf", 0xcc000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 161 | { "lfbr", 0xcc080000, 0xfc080000, "b,xOA,X", 4 }, | |
| 162 | { "lh", 0xac000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 163 | { "li", 0xc8000000, 0xfc7f0000, "r,I", 4 }, | |
| 164 | { "lmap", 0x2c070000, 0xfc7f0000, "r", 2 }, | |
| 165 | { "lmb", 0xb0080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 166 | { "lmd", 0xb0000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 167 | { "lmh", 0xb0000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 168 | { "lmw", 0xb0000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 169 | { "lnb", 0xb4080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 170 | { "lnd", 0xb4000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 171 | { "lnh", 0xb4000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 172 | { "lnw", 0xb4000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 173 | { "lpsd", 0xf9800000, 0xff880000, "r,xOA,X", 4 }, | |
| 174 | { "lpsdcm", 0xfa800000, 0xff880000, "r,xOA,X", 4 }, | |
| 175 | { "lw", 0xac000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 176 | { "lwbr", 0x5c000000, 0xfc080000, "b,xOA,X", 4 }, | |
| 177 | { "mpfd", 0xe4080002, 0xfc080002, "r,xOA,X", 4 }, | |
| 178 | { "mpfw", 0xe4080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 179 | { "mpi", 0xc8030000, 0xfc7f0000, "r,I", 4 }, | |
| 180 | { "mpmb", 0xc0080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 181 | { "mpmh", 0xc0000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 182 | { "mpmw", 0xc0000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 183 | { "mpr", 0x38020000, 0xfc0f0000, "r,R", 2 }, | |
| 184 | { "mprfd", 0x380e0000, 0xfc0f0000, "r,R", 2 }, | |
| 185 | { "mprfw", 0x38060000, 0xfc0f0000, "r,R", 2 }, | |
| 186 | { "nop", 0x00020000, 0xffff0000, "", 2 }, | |
| 187 | { "ormb", 0x88080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 188 | { "ormd", 0x88000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 189 | { "ormh", 0x88000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 190 | { "ormw", 0x88000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 191 | { "orr", 0x08000000, 0xfc0f0000, "r,R", 2 }, | |
| 192 | { "orrm", 0x08080000, 0xfc0f0000, "r,R", 2 }, | |
| 193 | { "rdsts", 0x00090000, 0xfc7f0000, "r", 2 }, | |
| 194 | { "return", 0x280e0000, 0xfc7f0000, "", 2 }, | |
| 195 | { "ri", 0xfc020000, 0xfc07ffff, "I", 4 }, | |
| 196 | { "rnd", 0x00050000, 0xfc7f0000, "r", 2 }, | |
| 197 | { "rpswt", 0x040b0000, 0xfc7f0000, "r", 2 }, | |
| 198 | { "rschnl", 0xfc2f0000, 0xfc7f8000, "r,I", 4 }, | |
| 199 | { "rsctl", 0xfc470000, 0xfc7f8000, "r,I", 4 }, | |
| 200 | { "rwcs", 0x000b0000, 0xfc0f0000, "r,R", 2 }, | |
| 201 | { "sacz", 0x10080000, 0xfc0f0000, "r,R", 2 }, | |
| 202 | { "sbm", 0x98080000, 0xfc080000, "f,xOA,X", 4 }, | |
| 203 | { "sbr", 0x18000000, 0xfc0c0000, "r,f", 4 }, | |
| 204 | { "sea", 0x000d0000, 0xffff0000, "", 2 }, | |
| 205 | { "setcpu", 0x2c090000, 0xfc7f0000, "r", 2 }, | |
| 206 | { "sio", 0xfc170000, 0xfc7f8000, "r,I", 4 }, | |
| 207 | { "sipu", 0x000a0000, 0xffff0000, "", 2 }, | |
| 208 | { "sla", 0x1c400000, 0xfc600000, "r,S", 2 }, | |
| 209 | { "slad", 0x20400000, 0xfc600000, "r,S", 2 }, | |
| 210 | { "slc", 0x24400000, 0xfc600000, "r,S", 2 }, | |
| 211 | { "sll", 0x1c600000, 0xfc600000, "r,S", 2 }, | |
| 212 | { "slld", 0x20600000, 0xfc600000, "r,S", 2 }, | |
| 213 | { "smc", 0x04070000, 0xfc070000, "", 2 }, | |
| 214 | { "sra", 0x1c000000, 0xfc600000, "r,S", 2 }, | |
| 215 | { "srad", 0x20000000, 0xfc600000, "r,S", 2 }, | |
| 216 | { "src", 0x24000000, 0xfc600000, "r,S", 2 }, | |
| 217 | { "srl", 0x1c200000, 0xfc600000, "r,S", 2 }, | |
| 218 | { "srld", 0x20200000, 0xfc600000, "r,S", 2 }, | |
| 219 | { "stb", 0xd4080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 220 | { "std", 0xd4000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 221 | { "stf", 0xdc000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 222 | { "stfbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 }, | |
| 223 | { "sth", 0xd4000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 224 | { "stmb", 0xd8080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 225 | { "stmd", 0xd8000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 226 | { "stmh", 0xd8000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 227 | { "stmw", 0xd8000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 228 | { "stpio", 0xfc270000, 0xfc7f8000, "r,I", 4 }, | |
| 229 | { "stw", 0xd4000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 230 | { "stwbr", 0x54000000, 0xfc080000, "b,xOA,X", 4 }, | |
| 231 | { "suabr", 0x58000000, 0xfc080000, "b,xOA,X", 4 }, | |
| 232 | { "sufd", 0xe0000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 233 | { "sufw", 0xe0000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 234 | { "sui", 0xc8020000, 0xfc7f0000, "r,I", 4 }, | |
| 235 | { "sumb", 0xbc080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 236 | { "sumd", 0xbc000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 237 | { "sumh", 0xbc000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 238 | { "sumw", 0xbc000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 239 | { "sur", 0x3c000000, 0xfc0f0000, "r,R", 2 }, | |
| 240 | { "surfd", 0x380b0000, 0xfc0f0000, "r,xOA,X", 4 }, | |
| 241 | { "surfw", 0x38030000, 0xfc0f0000, "r,R", 2 }, | |
| 242 | { "surm", 0x3c080000, 0xfc0f0000, "r,R", 2 }, | |
| 243 | { "svc", 0xc8060000, 0xffff0000, "", 4 }, | |
| 244 | { "tbm", 0xa4080000, 0xfc080000, "f,xOA,X", 4 }, | |
| 245 | { "tbr", 0x180c0000, 0xfc0c0000, "r,f", 2 }, | |
| 246 | { "tbrr", 0x2c020000, 0xfc0f0000, "r,B", 2 }, | |
| 247 | { "tccr", 0x28040000, 0xfc7f0000, "", 2 }, | |
| 248 | { "td", 0xfc050000, 0xfc070000, "r,f", 4 }, | |
| 249 | { "tio", 0xfc1f0000, 0xfc7f8000, "r,I", 4 }, | |
| 250 | { "tmapr", 0x2c0a0000, 0xfc0f0000, "r,R", 2 }, | |
| 251 | { "tpcbr", 0x280c0000, 0xfc7f0000, "r", 2 }, | |
| 252 | { "trbr", 0x2c010000, 0xfc0f0000, "b,R", 2 }, | |
| 253 | { "trc", 0x2c030000, 0xfc0f0000, "r,R", 2 }, | |
| 254 | { "trcc", 0x28050000, 0xfc7f0000, "", 2 }, | |
| 255 | { "trcm", 0x2c0b0000, 0xfc0f0000, "r,R", 2 }, | |
| 256 | { "trn", 0x2c040000, 0xfc0f0000, "r,R", 2 }, | |
| 257 | { "trnm", 0x2c0c0000, 0xfc0f0000, "r,R", 2 }, | |
| 258 | { "trr", 0x2c000000, 0xfc0f0000, "r,R", 2 }, | |
| 259 | { "trrm", 0x2c080000, 0xfc0f0000, "r,R", 2 }, | |
| 260 | { "trsc", 0x2c0e0000, 0xfc0f0000, "r,R", 2 }, | |
| 261 | { "trsw", 0x28000000, 0xfc7f0000, "r", 2 }, | |
| 262 | { "tscr", 0x2c0f0000, 0xfc0f0000, "r,R", 2 }, | |
| 263 | { "uei", 0x00070000, 0xffff0000, "", 2 }, | |
| 264 | { "wait", 0x00010000, 0xffff0000, "", 2 }, | |
| 265 | { "wcwcs", 0xfc5f0000, 0xfc7f8000, "", 4 }, | |
| 266 | { "wwcs", 0x000c0000, 0xfc0f0000, "r,R", 2 }, | |
| 267 | { "xcbr", 0x28020000, 0xfc0f0000, "b,B", 2 }, | |
| 268 | { "xcr", 0x2c050000, 0xfc0f0000, "r,R", 2 }, | |
| 269 | { "xcrm", 0x2c0d0000, 0xfc0f0000, "r,R", 2 }, | |
| 270 | { "zbm", 0x9c080000, 0xfc080000, "f,xOA,X", 4 }, | |
| 271 | { "zbr", 0x18040000, 0xfc0c0000, "r,f", 2 }, | |
| 272 | { "zmb", 0xf8080000, 0xfc080000, "r,xOA,X", 4 }, | |
| 273 | { "zmd", 0xf8000002, 0xfc080002, "r,xOA,X", 4 }, | |
| 274 | { "zmh", 0xf8000001, 0xfc080001, "r,xOA,X", 4 }, | |
| 275 | { "zmw", 0xf8000000, 0xfc080000, "r,xOA,X", 4 }, | |
| 276 | { "zr", 0x0c000000, 0xfc0f0000, "r", 2 }, | |
| 277 | }; | |
| 278 | ||
| 279 | int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]); | |
| 280 | ||
| 281 | struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) / | |
| 282 | sizeof(gld_opcodes[0]); |