projects / binutils.git / blame
| Commit | Line | Data |
|---|---|---|
| 089aacdb RP |
1 | /* Mips opcde list for GDB, the GNU debugger. |
| 2 | Copyright (C) 1989 Free Software Foundation, Inc. | |
| 3 | Contributed by Nobuyuki Hikichi([email protected]) | |
| 4 | Made to work for little-endian machines, and debugged | |
| 5 | by Per Bothner ([email protected]). | |
| 6 | Many fixes contributed by Frank Yellin ([email protected]). | |
| 7 | ||
| 8 | This file is part of GDB. | |
| 9 | ||
| 10 | GDB is free software; you can redistribute it and/or modify | |
| 11 | it under the terms of the GNU General Public License as published by | |
| 12 | the Free Software Foundation; either version 1, or (at your option) | |
| 13 | any later version. | |
| 14 | ||
| 15 | GDB is distributed in the hope that it will be useful, | |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | GNU General Public License for more details. | |
| 19 | ||
| 20 | You should have received a copy of the GNU General Public License | |
| 21 | along with GDB; see the file COPYING. If not, write to | |
| 22 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
| 23 | ||
| 24 | #if BITS_BIG_ENDIAN | |
| 25 | #define BIT_FIELDS_2(a,b) a;b; | |
| 26 | #define BIT_FIELDS_4(a,b,c,d) a;b;c;d; | |
| 27 | #define BIT_FIELDS_6(a,b,c,d,e,f) a;b;c;d;e;f; | |
| 28 | #else | |
| 29 | #define BIT_FIELDS_2(a,b) b;a; | |
| 30 | #define BIT_FIELDS_4(a,b,c,d) d;c;b;a; | |
| 31 | #define BIT_FIELDS_6(a,b,c,d,e,f) f;e;d;c;b;a; | |
| 32 | #endif | |
| 33 | ||
| 34 | struct op_i_fmt | |
| 35 | { | |
| 36 | BIT_FIELDS_4( | |
| 37 | unsigned op : 6, | |
| 38 | unsigned rs : 5, | |
| 39 | unsigned rt : 5, | |
| 40 | unsigned immediate : 16) | |
| 41 | }; | |
| 42 | ||
| 43 | struct op_j_fmt | |
| 44 | { | |
| 45 | BIT_FIELDS_2( | |
| 46 | unsigned op : 6, | |
| 47 | unsigned target : 26) | |
| 48 | }; | |
| 49 | ||
| 50 | struct op_r_fmt | |
| 51 | { | |
| 52 | BIT_FIELDS_6( | |
| 53 | unsigned op : 6, | |
| 54 | unsigned rs : 5, | |
| 55 | unsigned rt : 5, | |
| 56 | unsigned rd : 5, | |
| 57 | unsigned shamt : 5, | |
| 58 | unsigned funct : 6) | |
| 59 | }; | |
| 60 | ||
| 61 | ||
| 62 | struct fop_i_fmt | |
| 63 | { | |
| 64 | BIT_FIELDS_4( | |
| 65 | unsigned op : 6, | |
| 66 | unsigned rs : 5, | |
| 67 | unsigned rt : 5, | |
| 68 | unsigned immediate : 16) | |
| 69 | }; | |
| 70 | ||
| 71 | struct op_b_fmt | |
| 72 | { | |
| 73 | BIT_FIELDS_4( | |
| 74 | unsigned op : 6, | |
| 75 | unsigned rs : 5, | |
| 76 | unsigned rt : 5, | |
| 77 | short delta : 16) | |
| 78 | }; | |
| 79 | ||
| 80 | struct fop_r_fmt | |
| 81 | { | |
| 82 | BIT_FIELDS_6( | |
| 83 | unsigned op : 6, | |
| 84 | unsigned fmt : 5, | |
| 85 | unsigned ft : 5, | |
| 86 | unsigned fs : 5, | |
| 87 | unsigned fd : 5, | |
| 88 | unsigned funct : 6) | |
| 89 | }; | |
| 90 | ||
| 91 | struct mips_opcode | |
| 92 | { | |
| 93 | char *name; | |
| 94 | unsigned long opcode; | |
| 95 | unsigned long match; | |
| 96 | char *args; | |
| 97 | int bdelay; /* Nonzero if delayed branch. */ | |
| 98 | }; | |
| 99 | ||
| 100 | /* args format; | |
| 101 | ||
| 102 | "s" rs: source register specifier | |
| 103 | "t" rt: target register | |
| 104 | "i" immediate | |
| 105 | "a" target address | |
| 106 | "c" branch condition | |
| 107 | "d" rd: destination register specifier | |
| 108 | "h" shamt: shift amount | |
| 109 | "f" funct: function field | |
| 110 | ||
| 111 | for fpu | |
| 112 | "S" fs source 1 register | |
| 113 | "T" ft source 2 register | |
| 114 | "D" distination register | |
| 115 | */ | |
| 116 | ||
| 117 | #define one(x) (x << 26) | |
| 118 | #define op_func(x, y) ((x << 26) | y) | |
| 119 | #define op_cond(x, y) ((x << 26) | (y << 16)) | |
| 120 | #define op_rs_func(x, y, z) ((x << 26) | (y << 21) | z) | |
| 121 | #define op_rs_b11(x, y, z) ((x << 26) | (y << 21) | z) | |
| 122 | #define op_o16(x, y) ((x << 26) | (y << 16)) | |
| 123 | #define op_bc(x, y, z) ((x << 26) | (y << 21) | (z << 16)) | |
| 124 | ||
| 125 | struct mips_opcode mips_opcodes[] = | |
| 126 | { | |
| 127 | /* These first opcodes are special cases of the ones in the comments */ | |
| 128 | {"nop", 0, 0xffffffff, /*li*/ "", 0}, | |
| 129 | {"li", op_bc(9,0,0), op_bc(0x3f,31,0), /*addiu*/ "t,j", 0}, | |
| 130 | {"b", one(4), 0xffff0000, /*beq*/ "b", 1}, | |
| 131 | {"move", op_func(0, 33), op_cond(0x3f,31)|0x7ff,/*addu*/ "d,s", 0}, | |
| 132 | ||
| 133 | {"sll", op_func(0, 0), op_func(0x3f, 0x3f), "d,t,h", 0}, | |
| 134 | {"srl", op_func(0, 2), op_func(0x3f, 0x3f), "d,t,h", 0}, | |
| 135 | {"sra", op_func(0, 3), op_func(0x3f, 0x3f), "d,t,h", 0}, | |
| 136 | {"sllv", op_func(0, 4), op_func(0x3f, 0x7ff), "d,t,s", 0}, | |
| 137 | {"srlv", op_func(0, 6), op_func(0x3f, 0x7ff), "d,t,s", 0}, | |
| 138 | {"srav", op_func(0, 7), op_func(0x3f, 0x7ff), "d,t,s", 0}, | |
| 139 | {"jr", op_func(0, 8), op_func(0x3f, 0x1fffff), "s", 1}, | |
| 140 | {"jalr", op_func(0, 9), op_func(0x3f, 0x1f07ff), "d,s", 1}, | |
| 141 | {"syscall", op_func(0, 12), op_func(0x3f, 0x3f), "", 0}, | |
| 142 | {"break", op_func(0, 13), op_func(0x3f, 0x3f), "", 0}, | |
| 143 | {"mfhi", op_func(0, 16), op_func(0x3f, 0x03ff07ff), "d", 0}, | |
| 144 | {"mthi", op_func(0, 17), op_func(0x3f, 0x1fffff), "s", 0}, | |
| 145 | {"mflo", op_func(0, 18), op_func(0x3f, 0x03ff07ff), "d", 0}, | |
| 146 | {"mtlo", op_func(0, 19), op_func(0x3f, 0x1fffff), "s", 0}, | |
| 147 | {"mult", op_func(0, 24), op_func(0x3f, 0xffff), "s,t", 0}, | |
| 148 | {"multu", op_func(0, 25), op_func(0x3f, 0xffff), "s,t", 0}, | |
| 149 | {"div", op_func(0, 26), op_func(0x3f, 0xffff), "s,t", 0}, | |
| 150 | {"divu", op_func(0, 27), op_func(0x3f, 0xffff), "s,t", 0}, | |
| 151 | {"add", op_func(0, 32), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 152 | {"addu", op_func(0, 33), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 153 | {"sub", op_func(0, 34), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 154 | {"subu", op_func(0, 35), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 155 | {"and", op_func(0, 36), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 156 | {"or", op_func(0, 37), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 157 | {"xor", op_func(0, 38), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 158 | {"nor", op_func(0, 39), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 159 | {"slt", op_func(0, 42), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 160 | {"sltu", op_func(0, 43), op_func(0x3f, 0x7ff), "d,s,t", 0}, | |
| 161 | ||
| 162 | {"bltz", op_cond (1, 0), op_cond(0x3f, 0x1f), "s,b", 1}, | |
| 163 | {"bgez", op_cond (1, 1), op_cond(0x3f, 0x1f), "s,b", 1}, | |
| 164 | {"bltzal", op_cond (1, 16),op_cond(0x3f, 0x1f), "s,b", 1}, | |
| 165 | {"bgezal", op_cond (1, 17),op_cond(0x3f, 0x1f), "s,b", 1}, | |
| 166 | ||
| 167 | ||
| 168 | {"j", one(2), one(0x3f), "a", 1}, | |
| 169 | {"jal", one(3), one(0x3f), "a", 1}, | |
| 170 | {"beq", one(4), one(0x3f), "s,t,b", 1}, | |
| 171 | {"bne", one(5), one(0x3f), "s,t,b", 1}, | |
| 172 | {"blez", one(6), one(0x3f) | 0x1f0000, "s,b", 1}, | |
| 173 | {"bgtz", one(7), one(0x3f) | 0x1f0000, "s,b", 1}, | |
| 174 | {"addi", one(8), one(0x3f), "t,s,j", 0}, | |
| 175 | {"addiu", one(9), one(0x3f), "t,s,j", 0}, | |
| 176 | {"slti", one(10), one(0x3f), "t,s,j", 0}, | |
| 177 | {"sltiu", one(11), one(0x3f), "t,s,j", 0}, | |
| 178 | {"andi", one(12), one(0x3f), "t,s,i", 0}, | |
| 179 | {"ori", one(13), one(0x3f), "t,s,i", 0}, | |
| 180 | {"xori", one(14), one(0x3f), "t,s,i", 0}, | |
| 181 | /* rs field is don't care field? */ | |
| 182 | {"lui", one(15), one(0x3f), "t,i", 0}, | |
| 183 | ||
| 184 | /* co processor 0 instruction */ | |
| 185 | {"mfc0", op_rs_b11 (16, 0, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 186 | {"cfc0", op_rs_b11 (16, 2, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 187 | {"mtc0", op_rs_b11 (16, 4, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 188 | {"ctc0", op_rs_b11 (16, 6, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 189 | ||
| 190 | {"bc0f", op_o16(16, 0x100), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 191 | {"bc0f", op_o16(16, 0x180), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 192 | {"bc0t", op_o16(16, 0x101), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 193 | {"bc0t", op_o16(16, 0x181), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 194 | ||
| 195 | {"tlbr", op_rs_func(16, 0x10, 1), ~0, "", 0}, | |
| 196 | {"tlbwi", op_rs_func(16, 0x10, 2), ~0, "", 0}, | |
| 197 | {"tlbwr", op_rs_func(16, 0x10, 6), ~0, "", 0}, | |
| 198 | {"tlbp", op_rs_func(16, 0x10, 8), ~0, "", 0}, | |
| 199 | {"rfe", op_rs_func(16, 0x10, 16), ~0, "", 0}, | |
| 200 | ||
| 201 | {"mfc1", op_rs_b11 (17, 0, 0), op_rs_b11(0x3f, 0x1f, 0),"t,S", 0}, | |
| 202 | {"cfc1", op_rs_b11 (17, 2, 0), op_rs_b11(0x3f, 0x1f, 0),"t,S", 0}, | |
| 203 | {"mtc1", op_rs_b11 (17, 4, 0), op_rs_b11(0x3f, 0x1f, 0),"t,S", 0}, | |
| 204 | {"ctc1", op_rs_b11 (17, 6, 0), op_rs_b11(0x3f, 0x1f, 0),"t,S", 0}, | |
| 205 | ||
| 206 | {"bc1f", op_o16(17, 0x100), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 207 | {"bc1f", op_o16(17, 0x180), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 208 | {"bc1t", op_o16(17, 0x101), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 209 | {"bc1t", op_o16(17, 0x181), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 210 | ||
| 211 | /* fpu instruction */ | |
| 212 | {"add.s", op_rs_func(17, 0x10, 0), | |
| 213 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 214 | {"add.d", op_rs_func(17, 0x11, 0), | |
| 215 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 216 | {"sub.s", op_rs_func(17, 0x10, 1), | |
| 217 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 218 | {"sub.d", op_rs_func(17, 0x11, 1), | |
| 219 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 220 | {"mul.s", op_rs_func(17, 0x10, 2), | |
| 221 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 222 | {"mul.d", op_rs_func(17, 0x11, 2), | |
| 223 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 224 | {"div.s", op_rs_func(17, 0x10, 3), | |
| 225 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 226 | {"div.d", op_rs_func(17, 0x11, 3), | |
| 227 | op_rs_func(0x3f, 0x1f, 0x3f), "D,S,T", 0}, | |
| 228 | {"abs.s", op_rs_func(17, 0x10, 5), | |
| 229 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 230 | {"abs.d", op_rs_func(17, 0x11, 5), | |
| 231 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 232 | {"mov.s", op_rs_func(17, 0x10, 6), | |
| 233 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 234 | {"mov.d", op_rs_func(17, 0x11, 6), | |
| 235 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 236 | {"neg.s", op_rs_func(17, 0x10, 7), | |
| 237 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 238 | {"neg.d", op_rs_func(17, 0x11, 7), | |
| 239 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 240 | {"cvt.s.s", op_rs_func(17, 0x10, 32), | |
| 241 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 242 | {"cvt.s.d", op_rs_func(17, 0x11, 32), | |
| 243 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 244 | {"cvt.s.w", op_rs_func(17, 0x14, 32), | |
| 245 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 246 | {"cvt.d.s", op_rs_func(17, 0x10, 33), | |
| 247 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 248 | {"cvt.d.d", op_rs_func(17, 0x11, 33), | |
| 249 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 250 | {"cvt.d.w", op_rs_func(17, 0x14, 33), | |
| 251 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 252 | {"cvt.w.s", op_rs_func(17, 0x10, 36), | |
| 253 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 254 | {"cvt.w.d", op_rs_func(17, 0x11, 36), | |
| 255 | op_rs_func(0x3f, 0x1f, 0x1f003f), "D,S", 0}, | |
| 256 | {"c.f.s", op_rs_func(17, 0x10, 48), | |
| 257 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 258 | {"c.f.d", op_rs_func(17, 0x11, 48), | |
| 259 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 260 | {"c.un.s", op_rs_func(17, 0x10, 49), | |
| 261 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 262 | {"c.un.d", op_rs_func(17, 0x11, 49), | |
| 263 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 264 | {"c.eq.s", op_rs_func(17, 0x10, 50), | |
| 265 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 266 | {"c.eq.d", op_rs_func(17, 0x11, 50), | |
| 267 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 268 | {"c.ueq.s", op_rs_func(17, 0x10, 51), | |
| 269 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 270 | {"c.ueq.d", op_rs_func(17, 0x11, 51), | |
| 271 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 272 | {"c.olt.s", op_rs_func(17, 0x10, 52), | |
| 273 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 274 | {"c.olt.d", op_rs_func(17, 0x11, 52), | |
| 275 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 276 | {"c.ult.s", op_rs_func(17, 0x10, 53), | |
| 277 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 278 | {"c.ult.d", op_rs_func(17, 0x11, 53), | |
| 279 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 280 | {"c.ole.s", op_rs_func(17, 0x10, 54), | |
| 281 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 282 | {"c.ole.d", op_rs_func(17, 0x11, 54), | |
| 283 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 284 | {"c.ule.s", op_rs_func(17, 0x10, 55), | |
| 285 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 286 | {"c.ule.d", op_rs_func(17, 0x11, 55), | |
| 287 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 288 | {"c.sf.s", op_rs_func(17, 0x10, 56), | |
| 289 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 290 | {"c.sf.d", op_rs_func(17, 0x11, 56), | |
| 291 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 292 | {"c.ngle.s", op_rs_func(17, 0x10, 57), | |
| 293 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 294 | {"c.ngle.d", op_rs_func(17, 0x11, 57), | |
| 295 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 296 | {"c.seq.s", op_rs_func(17, 0x10, 58), | |
| 297 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 298 | {"c.seq.d", op_rs_func(17, 0x11, 58), | |
| 299 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 300 | {"c.ngl.s", op_rs_func(17, 0x10, 59), | |
| 301 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 302 | {"c.ngl.d", op_rs_func(17, 0x11, 59), | |
| 303 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 304 | {"c.lt.s", op_rs_func(17, 0x10, 60), | |
| 305 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 306 | {"c.lt.d", op_rs_func(17, 0x11, 60), | |
| 307 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 308 | {"c.nge.s", op_rs_func(17, 0x10, 61), | |
| 309 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 310 | {"c.nge.d", op_rs_func(17, 0x11, 61), | |
| 311 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 312 | {"c.le.s", op_rs_func(17, 0x10, 62), | |
| 313 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 314 | {"c.le.d", op_rs_func(17, 0x11, 62), | |
| 315 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 316 | {"c.ngt.s", op_rs_func(17, 0x10, 63), | |
| 317 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 318 | {"c.ngt.d", op_rs_func(17, 0x11, 63), | |
| 319 | op_rs_func(0x3f, 0x1f, 0x7ff), "S,T", 0}, | |
| 320 | ||
| 321 | /* co processor 2 instruction */ | |
| 322 | {"mfc2", op_rs_b11 (18, 0, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 323 | {"cfc2", op_rs_b11 (18, 2, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 324 | {"mtc2", op_rs_b11 (18, 4, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 325 | {"ctc2", op_rs_b11 (18, 6, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 326 | {"bc2f", op_o16(18, 0x100), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 327 | {"bc2f", op_o16(18, 0x180), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 328 | {"bc2f", op_o16(18, 0x101), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 329 | {"bc2t", op_o16(18, 0x181), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 330 | ||
| 331 | /* co processor 3 instruction */ | |
| 332 | {"mtc3", op_rs_b11 (19, 0, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 333 | {"cfc3", op_rs_b11 (19, 2, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 334 | {"mtc3", op_rs_b11 (19, 4, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 335 | {"ctc3", op_rs_b11 (19, 6, 0), op_rs_b11(0x3f, 0x1f, 0x1ffff), "t,d", 0}, | |
| 336 | {"bc3f", op_o16(19, 0x100), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 337 | {"bc3f", op_o16(19, 0x180), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 338 | {"bc3t", op_o16(19, 0x101), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 339 | {"bc3t", op_o16(19, 0x181), op_o16(0x3f, 0x3ff), "b", 1}, | |
| 340 | ||
| 341 | {"lb", one(32), one(0x3f), "t,j(s)", 0}, | |
| 342 | {"lh", one(33), one(0x3f), "t,j(s)", 0}, | |
| 343 | {"lwl", one(34), one(0x3f), "t,j(s)", 0}, | |
| 344 | {"lw", one(35), one(0x3f), "t,j(s)", 0}, | |
| 345 | {"lbu", one(36), one(0x3f), "t,j(s)", 0}, | |
| 346 | {"lhu", one(37), one(0x3f), "t,j(s)", 0}, | |
| 347 | {"lwr", one(38), one(0x3f), "t,j(s)", 0}, | |
| 348 | {"sb", one(40), one(0x3f), "t,j(s)", 0}, | |
| 349 | {"sh", one(41), one(0x3f), "t,j(s)", 0}, | |
| 350 | {"swl", one(42), one(0x3f), "t,j(s)", 0}, | |
| 351 | {"swr", one(46), one(0x3f), "t,j(s)", 0}, | |
| 352 | {"sw", one(43), one(0x3f), "t,j(s)", 0}, | |
| 353 | {"lwc0", one(48), one(0x3f), "t,j(s)", 0}, | |
| 354 | /* for fpu */ | |
| 355 | {"lwc1", one(49), one(0x3f), "T,j(s)", 0}, | |
| 356 | {"lwc2", one(50), one(0x3f), "t,j(s)", 0}, | |
| 357 | {"lwc3", one(51), one(0x3f), "t,j(s)", 0}, | |
| 358 | {"swc0", one(56), one(0x3f), "t,j(s)", 0}, | |
| 359 | /* for fpu */ | |
| 360 | {"swc1", one(57), one(0x3f), "T,j(s)", 0}, | |
| 361 | {"swc2", one(58), one(0x3f), "t,j(s)", 0}, | |
| 362 | {"swc3", one(59), one(0x3f), "t,j(s)", 0}, | |
| 363 | }; |