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35c08157 1/* NDS32-specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2012-2015 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
35c08157
KLC		 101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 111(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
35c08157 114static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 115(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 116static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118static void nds32_elf_ex9_finish (struct bfd_link_info *);
119static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 120static void nds32_elf_get_insn_with_reg
1c8f6a4d 121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 122static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
1c8f6a4d 128static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 129static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 130static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 131static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
1c8f6a4d
KLC		 138static bfd_byte *
139nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
35c08157
KLC		 145
146enum
147{
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152};
153
154#define MIN(a, b) ((a) > (b) ? (b) : (a))
155#define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157/* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161/* The nop opcode we use. */
162#define NDS32_NOP32 0x40000009
163#define NDS32_NOP16 0x9200
164
165/* The size in bytes of an entry in the procedure linkage table. */
166#define PLT_ENTRY_SIZE 24
167#define PLT_HEADER_SIZE 24
168
169/* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178/* $ta is change to $r15 (from $r25). */
179#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
1c8f6a4d
KLC		 199/* These are macros used to get the relocation accurate value. */
200#define ACCURATE_8BIT_S1 (0x100)
201#define ACCURATE_U9BIT_S1 (0x400)
202#define ACCURATE_12BIT_S1 (0x2000)
203#define ACCURATE_14BIT_S1 (0x4000)
204#define ACCURATE_19BIT (0x40000)
205
206/* These are macros used to get the relocation conservative value. */
207#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211/* These must be more conservative because the address may be in
212 different segment. */
213#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
35c08157
KLC		 219/* Size of small data/bss sections, used to calculate SDA_BASE. */
220static long got_size = 0;
221static int is_SDA_BASE_set = 0;
222static int is_ITB_BASE_set = 0;
223
35c08157
KLC		 224/* Convert ELF-VER in eflags to string for debugging purpose. */
225static const char *const nds32_elfver_strtab[] =
226{
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230};
231
232/* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238/* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241struct elf_nds32_pcrel_relocs_copied
242{
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249};
250
251/* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257struct elf_nds32_dyn_relocs
258{
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269};
270
271/* Nds32 ELF linker hash entry. */
272
273struct elf_nds32_link_hash_entry
274{
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 279
280 /* For checking relocation type. */
281#define GOT_UNKNOWN 0
282#define GOT_NORMAL 1
283#define GOT_TLS_IE 2
284 unsigned int tls_type;
35c08157
KLC		 285};
286
287/* Get the nds32 ELF linker hash table from a link_info structure. */
288
289#define FP_BASE_NAME "_FP_BASE_"
290static int check_start_export_sym = 0;
291static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
1c8f6a4d
KLC		 293/* The offset for executable tls relaxation. */
294#define TP_OFFSET 0x0
295
296struct elf_nds32_obj_tdata
297{
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302};
303
304#define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307#define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312static bfd_boolean
313nds32_elf_mkobject (bfd *abfd)
314{
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317}
318
35c08157
KLC		 319/* Relocations used for relocation. */
320static reloc_howto_type nds32_elf_howto_table[] =
321{
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
6346d5ca
AM		 325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
35c08157
KLC		 327 FALSE, /* pc_relative */
328 0, /* bitpos */
6346d5ca 329 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
35c08157
KLC		 2000};
2001
2002/* Relocations used for relaxation. */
2003static reloc_howto_type nds32_elf_relax_howto_table[] =
2004{
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
35c08157
KLC		 2291};
2292
2293\f
2294/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297void
2298nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300{
2301 char *ptr = (char *) base;
1c8f6a4d 2302 int i, j;
35c08157
KLC		 2303 char *tmp = alloca (size);
2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
1c8f6a4d 2312 for (i = 1; i < (int) nmemb; i++)
35c08157 2313 {
1c8f6a4d
KLC		 2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2316 break;
2317
1c8f6a4d
KLC		 2318 j++;
2319
35c08157 2320 if (i == j)
1c8f6a4d 2321 continue; /* i is in order. */
35c08157
KLC		 2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
2327}
2328
2329/* Sort relocation by r_offset.
2330
2331 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2332 algorithm. Relocations at the same r_offset must keep their order.
2333 For example, RELAX_ENTRY must be the very first relocation entry.
2334
2335 Currently, this function implements insertion-sort.
2336
2337 FIXME: If we already sort them in assembler, why bother sort them
2338 here again? */
2339
2340static int
2341compar_reloc (const void *lhs, const void *rhs)
2342{
2343 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2344 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2345
2346 if (l->r_offset > r->r_offset)
2347 return 1;
2348 else if (l->r_offset == r->r_offset)
2349 return 0;
2350 else
2351 return -1;
2352}
2353
2354/* Functions listed below are only used for old relocs.
2355 * nds32_elf_9_pcrel_reloc
2356 * nds32_elf_do_9_pcrel_reloc
2357 * nds32_elf_hi20_reloc
2358 * nds32_elf_relocate_hi20
2359 * nds32_elf_lo12_reloc
2360 * nds32_elf_sda15_reloc
2361 * nds32_elf_generic_reloc
2362 */
2363
2364/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2365
2366static bfd_reloc_status_type
2367nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2368 void *data, asection *input_section, bfd *output_bfd,
2369 char **error_message ATTRIBUTE_UNUSED)
2370{
2371 /* This part is from bfd_elf_generic_reloc. */
2372 if (output_bfd != (bfd *) NULL
2373 && (symbol->flags & BSF_SECTION_SYM) == 0
2374 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2375 {
2376 reloc_entry->address += input_section->output_offset;
2377 return bfd_reloc_ok;
2378 }
2379
2380 if (output_bfd != NULL)
2381 {
2382 /* FIXME: See bfd_perform_relocation. Is this right? */
2383 return bfd_reloc_continue;
2384 }
2385
2386 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2387 input_section,
2388 data, reloc_entry->address,
2389 symbol->section,
2390 (symbol->value
2391 + symbol->section->output_section->vma
2392 + symbol->section->output_offset),
2393 reloc_entry->addend);
2394}
2395
2396/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2397#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2398
2399static bfd_reloc_status_type
2400nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2401 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2402 bfd_vma offset,
2403 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2404 bfd_vma symbol_value, bfd_vma addend)
2405{
2406 bfd_signed_vma relocation;
2407 unsigned short x;
2408 bfd_reloc_status_type status;
2409
2410 /* Sanity check the address (offset in section). */
2411 if (offset > bfd_get_section_limit (abfd, input_section))
2412 return bfd_reloc_outofrange;
2413
2414 relocation = symbol_value + addend;
2415 /* Make it pc relative. */
2416 relocation -= (input_section->output_section->vma
2417 + input_section->output_offset);
2418 /* These jumps mask off the lower two bits of the current address
2419 before doing pcrel calculations. */
2420 relocation -= (offset & -(bfd_vma) 2);
2421
1c8f6a4d 2422 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2423 status = bfd_reloc_overflow;
2424 else
2425 status = bfd_reloc_ok;
2426
2427 x = bfd_getb16 (data + offset);
2428
2429 relocation >>= howto->rightshift;
2430 relocation <<= howto->bitpos;
2431 x = (x & ~howto->dst_mask)
2432 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2433
2434 bfd_putb16 ((bfd_vma) x, data + offset);
2435
2436 return status;
2437}
2438
2439/* Handle the R_NDS32_HI20_[SU]LO relocs.
2440 HI20_SLO is for the add3 and load/store with displacement instructions.
2441 HI20 is for the or3 instruction.
2442 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2443 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2444 we must add one to the high 16 bytes (which will get subtracted off when
2445 the low 16 bits are added).
2446 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2447 because there is a carry from the LO12 to the HI20. Here we just save
2448 the information we need; we do the actual relocation when we see the LO12.
2449 This code is copied from the elf32-mips.c. We also support an arbitrary
2450 number of HI20 relocs to be associated with a single LO12 reloc. The
2451 assembler sorts the relocs to ensure each HI20 immediately precedes its
2452 LO12. However if there are multiple copies, the assembler may not find
2453 the real LO12 so it picks the first one it finds. */
2454
2455struct nds32_hi20
2456{
2457 struct nds32_hi20 *next;
2458 bfd_byte *addr;
2459 bfd_vma addend;
2460};
2461
2462static struct nds32_hi20 *nds32_hi20_list;
2463
2464static bfd_reloc_status_type
2465nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2466 asymbol *symbol, void *data, asection *input_section,
2467 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2468{
2469 bfd_reloc_status_type ret;
2470 bfd_vma relocation;
2471 struct nds32_hi20 *n;
2472
2473 /* This part is from bfd_elf_generic_reloc.
2474 If we're relocating, and this an external symbol, we don't want
2475 to change anything. */
2476 if (output_bfd != (bfd *) NULL
2477 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2478 {
2479 reloc_entry->address += input_section->output_offset;
2480 return bfd_reloc_ok;
2481 }
2482
2483 /* Sanity check the address (offset in section). */
2484 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2485 return bfd_reloc_outofrange;
2486
2487 ret = bfd_reloc_ok;
2488 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2489 ret = bfd_reloc_undefined;
2490
2491 if (bfd_is_com_section (symbol->section))
2492 relocation = 0;
2493 else
2494 relocation = symbol->value;
2495
2496 relocation += symbol->section->output_section->vma;
2497 relocation += symbol->section->output_offset;
2498 relocation += reloc_entry->addend;
2499
2500 /* Save the information, and let LO12 do the actual relocation. */
2501 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2502 if (n == NULL)
2503 return bfd_reloc_outofrange;
2504
2505 n->addr = (bfd_byte *) data + reloc_entry->address;
2506 n->addend = relocation;
2507 n->next = nds32_hi20_list;
2508 nds32_hi20_list = n;
2509
2510 if (output_bfd != (bfd *) NULL)
2511 reloc_entry->address += input_section->output_offset;
2512
2513 return ret;
2514}
2515
2516/* Handle an NDS32 ELF HI20 reloc. */
2517
2518static void
2519nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2520 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2521 Elf_Internal_Rela *rello, bfd_byte *contents,
2522 bfd_vma addend)
2523{
2524 unsigned long insn;
2525 bfd_vma addlo;
2526
2527 insn = bfd_getb32 (contents + relhi->r_offset);
2528
2529 addlo = bfd_getb32 (contents + rello->r_offset);
2530 addlo &= 0xfff;
2531
2532 addend += ((insn & 0xfffff) << 20) + addlo;
2533
2534 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2535 bfd_putb32 (insn, contents + relhi->r_offset);
2536}
2537
2538/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2539 inplace relocation; this function exists in order to do the
2540 R_NDS32_HI20_[SU]LO relocation described above. */
2541
2542static bfd_reloc_status_type
2543nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2544 void *data, asection *input_section, bfd *output_bfd,
2545 char **error_message)
2546{
2547 /* This part is from bfd_elf_generic_reloc.
2548 If we're relocating, and this an external symbol, we don't want
2549 to change anything. */
2550 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2551 && reloc_entry->addend == 0)
2552 {
2553 reloc_entry->address += input_section->output_offset;
2554 return bfd_reloc_ok;
2555 }
2556
2557 if (nds32_hi20_list != NULL)
2558 {
2559 struct nds32_hi20 *l;
2560
2561 l = nds32_hi20_list;
2562 while (l != NULL)
2563 {
2564 unsigned long insn;
2565 unsigned long val;
2566 unsigned long vallo;
2567 struct nds32_hi20 *next;
2568
2569 /* Do the HI20 relocation. Note that we actually don't need
2570 to know anything about the LO12 itself, except where to
2571 find the low 12 bits of the addend needed by the LO12. */
2572 insn = bfd_getb32 (l->addr);
2573 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2574 vallo &= 0xfff;
2575 switch (reloc_entry->howto->type)
2576 {
2577 case R_NDS32_LO12S3:
2578 vallo <<= 3;
2579 break;
2580
2581 case R_NDS32_LO12S2:
2582 vallo <<= 2;
2583 break;
2584
2585 case R_NDS32_LO12S1:
2586 vallo <<= 1;
2587 break;
2588
2589 case R_NDS32_LO12S0:
2590 vallo <<= 0;
2591 break;
2592 }
2593
2594 val = ((insn & 0xfffff) << 12) + vallo;
2595 val += l->addend;
2596
2597 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2598 bfd_putb32 ((bfd_vma) insn, l->addr);
2599
2600 next = l->next;
2601 free (l);
2602 l = next;
2603 }
2604
2605 nds32_hi20_list = NULL;
2606 }
2607
2608 /* Now do the LO12 reloc in the usual way.
2609 ??? It would be nice to call bfd_elf_generic_reloc here,
2610 but we have partial_inplace set. bfd_elf_generic_reloc will
2611 pass the handling back to bfd_install_relocation which will install
2612 a section relative addend which is wrong. */
2613 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2614 input_section, output_bfd, error_message);
2615}
2616
2617/* Do generic partial_inplace relocation.
2618 This is a local replacement for bfd_elf_generic_reloc. */
2619
2620static bfd_reloc_status_type
2621nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2622 asymbol *symbol, void *data, asection *input_section,
2623 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2624{
2625 bfd_reloc_status_type ret;
2626 bfd_vma relocation;
2627 bfd_byte *inplace_address;
2628
2629 /* This part is from bfd_elf_generic_reloc.
2630 If we're relocating, and this an external symbol, we don't want
2631 to change anything. */
2632 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2633 && reloc_entry->addend == 0)
2634 {
2635 reloc_entry->address += input_section->output_offset;
2636 return bfd_reloc_ok;
2637 }
2638
2639 /* Now do the reloc in the usual way.
2640 ??? It would be nice to call bfd_elf_generic_reloc here,
2641 but we have partial_inplace set. bfd_elf_generic_reloc will
2642 pass the handling back to bfd_install_relocation which will install
2643 a section relative addend which is wrong. */
2644
2645 /* Sanity check the address (offset in section). */
2646 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2647 return bfd_reloc_outofrange;
2648
2649 ret = bfd_reloc_ok;
2650 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2651 ret = bfd_reloc_undefined;
2652
2653 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2654 relocation = 0;
2655 else
2656 relocation = symbol->value;
2657
2658 /* Only do this for a final link. */
2659 if (output_bfd == (bfd *) NULL)
2660 {
2661 relocation += symbol->section->output_section->vma;
2662 relocation += symbol->section->output_offset;
2663 }
2664
2665 relocation += reloc_entry->addend;
2666 switch (reloc_entry->howto->type)
2667 {
2668 case R_NDS32_LO12S3:
2669 relocation >>= 3;
2670 break;
2671
2672 case R_NDS32_LO12S2:
2673 relocation >>= 2;
2674 break;
2675
2676 case R_NDS32_LO12S1:
2677 relocation >>= 1;
2678 break;
2679
2680 case R_NDS32_LO12S0:
2681 default:
2682 relocation >>= 0;
2683 break;
2684 }
2685
2686 inplace_address = (bfd_byte *) data + reloc_entry->address;
2687
2688#define DOIT(x) \
2689 x = ((x & ~reloc_entry->howto->dst_mask) | \
2690 (((x & reloc_entry->howto->src_mask) + relocation) & \
2691 reloc_entry->howto->dst_mask))
2692
2693 switch (reloc_entry->howto->size)
2694 {
2695 case 1:
2696 {
2697 short x = bfd_getb16 (inplace_address);
2698
2699 DOIT (x);
2700 bfd_putb16 ((bfd_vma) x, inplace_address);
2701 }
2702 break;
2703 case 2:
2704 {
2705 unsigned long x = bfd_getb32 (inplace_address);
2706
2707 DOIT (x);
2708 bfd_putb32 ((bfd_vma) x, inplace_address);
2709 }
2710 break;
2711 default:
2712 BFD_ASSERT (0);
2713 }
2714
2715 if (output_bfd != (bfd *) NULL)
2716 reloc_entry->address += input_section->output_offset;
2717
2718 return ret;
2719}
2720
2721/* Handle the R_NDS32_SDA15 reloc.
2722 This reloc is used to compute the address of objects in the small data area
2723 and to perform loads and stores from that area.
2724 The lower 15 bits are sign extended and added to the register specified
2725 in the instruction, which is assumed to point to _SDA_BASE_.
2726
2727 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2728 the access size, this must be taken care of. */
2729
2730static bfd_reloc_status_type
2731nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2732 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2733 asection *input_section, bfd *output_bfd,
2734 char **error_message ATTRIBUTE_UNUSED)
2735{
2736 /* This part is from bfd_elf_generic_reloc. */
2737 if (output_bfd != (bfd *) NULL
2738 && (symbol->flags & BSF_SECTION_SYM) == 0
2739 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2740 {
2741 reloc_entry->address += input_section->output_offset;
2742 return bfd_reloc_ok;
2743 }
2744
2745 if (output_bfd != NULL)
2746 {
2747 /* FIXME: See bfd_perform_relocation. Is this right? */
2748 return bfd_reloc_continue;
2749 }
2750
2751 /* FIXME: not sure what to do here yet. But then again, the linker
2752 may never call us. */
2753 abort ();
2754}
2755
2756/* nds32_elf_ignore_reloc is the special function for
2757 relocation types which don't need to be relocated
2758 like relaxation relocation types.
2759 This function simply return bfd_reloc_ok when it is
2760 invoked. */
2761
2762static bfd_reloc_status_type
2763nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2764 asymbol *symbol ATTRIBUTE_UNUSED,
2765 void *data ATTRIBUTE_UNUSED, asection *input_section,
2766 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2767{
2768 if (output_bfd != NULL)
2769 reloc_entry->address += input_section->output_offset;
2770
2771 return bfd_reloc_ok;
2772}
2773\f
2774
2775/* Map BFD reloc types to NDS32 ELF reloc types. */
2776
2777struct nds32_reloc_map_entry
2778{
2779 bfd_reloc_code_real_type bfd_reloc_val;
2780 unsigned char elf_reloc_val;
2781};
2782
2783static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2784{
2785 {BFD_RELOC_NONE, R_NDS32_NONE},
2786 {BFD_RELOC_16, R_NDS32_16_RELA},
2787 {BFD_RELOC_32, R_NDS32_32_RELA},
2788 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2789 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2790 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2791 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2793 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2794 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2795 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2796 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2797 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2798 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2799 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2800 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2801 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2802 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2803 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2804 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2805 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2806 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2807 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2808
2809 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2810 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2811 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2812 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2813 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2814 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2815 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2816 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2817 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2818 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2819 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2820 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2821 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2822 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2823 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2824 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2825 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2826 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2827 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2828 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2829 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2830 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2831 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2832 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2833 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2834 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2835 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2836 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2837 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2838 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2839 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2840 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2841 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2842 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2843 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2844 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2845 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2846 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2847 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2848 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2849 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2850 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2855 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2856 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2857 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2859 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2860 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2861 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2862 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2863 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2864 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2867 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2868 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2869 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2870 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2871 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2872 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2873 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2874 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2875 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2876 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2877 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2878 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2879 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2880 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2881 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2882 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2883 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2884
2885 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2886 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2887 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2888 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2889 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2890 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2891 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2892 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2893 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2894 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2895 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2896 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2897 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2898 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2899 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2900 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2901 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2902 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2903 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2904 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2905};
2906
2907/* Patch tag. */
2908
2909static reloc_howto_type *
2910bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2911 const char *r_name)
2912{
2913 unsigned int i;
2914
2915 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2916 if (nds32_elf_howto_table[i].name != NULL
2917 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2918 return &nds32_elf_howto_table[i];
2919
2920 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2921 if (nds32_elf_relax_howto_table[i].name != NULL
2922 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2923 return &nds32_elf_relax_howto_table[i];
2924
2925 return NULL;
2926}
2927
2928static reloc_howto_type *
2929bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2930{
2931 if (code < R_NDS32_RELAX_ENTRY)
2932 {
2933 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2934 return &nds32_elf_howto_table[code];
2935 }
2936 else
2937 {
2938 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2939 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2940 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2941 }
2942}
2943
2944static reloc_howto_type *
2945bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2946 bfd_reloc_code_real_type code)
2947{
2948 unsigned int i;
2949
2950 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2951 {
2952 if (nds32_reloc_map[i].bfd_reloc_val == code)
2953 return bfd_elf32_bfd_reloc_type_table_lookup
2954 (nds32_reloc_map[i].elf_reloc_val);
2955 }
2956
2957 return NULL;
2958}
2959
2960/* Set the howto pointer for an NDS32 ELF reloc. */
2961
2962static void
2963nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2964 Elf_Internal_Rela *dst)
2965{
2966 enum elf_nds32_reloc_type r_type;
2967
2968 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2969 if (r_type > R_NDS32_GNU_VTENTRY)
2970 {
64d29018 2971 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC		 2972 r_type = 0;
2973 }
35c08157
KLC		 2974 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2975}
2976
2977static void
2978nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2979 Elf_Internal_Rela *dst)
2980{
2981 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2982 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2983 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2984 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2985}
2986
2987/* Support for core dump NOTE sections.
2988 Reference to include/linux/elfcore.h in Linux. */
2989
2990static bfd_boolean
2991nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2992{
2993 int offset;
2994 size_t size;
2995
2996 switch (note->descsz)
2997 {
2998 case 0x114:
2999 /* Linux/NDS32 32-bit, ABI1 */
3000
3001 /* pr_cursig */
3002 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3003
3004 /* pr_pid */
3005 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3006
3007 /* pr_reg */
3008 offset = 72;
3009 size = 200;
3010 break;
3011
3012 case 0xfc:
3013 /* Linux/NDS32 32-bit */
3014
3015 /* pr_cursig */
3016 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3017
3018 /* pr_pid */
3019 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3020
3021 /* pr_reg */
3022 offset = 72;
3023 size = 176;
3024 break;
3025
3026 default:
3027 return FALSE;
3028 }
3029
3030 /* Make a ".reg" section. */
3031 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3032 size, note->descpos + offset);
3033}
3034
3035static bfd_boolean
3036nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3037{
3038 switch (note->descsz)
3039 {
3040 case 124:
3041 /* Linux/NDS32 */
3042
3043 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3044 elf_tdata (abfd)->core->program =
3045 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3046 elf_tdata (abfd)->core->command =
3047 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3048
3049 default:
3050 return FALSE;
3051 }
3052
3053 /* Note that for some reason, a spurious space is tacked
3054 onto the end of the args in some (at least one anyway)
3055 implementations, so strip it off if it exists. */
3056 {
3057 char *command = elf_tdata (abfd)->core->command;
3058 int n = strlen (command);
3059
3060 if (0 < n && command[n - 1] == ' ')
3061 command[n - 1] = '\0';
3062 }
3063
3064 return TRUE;
3065}
3066
3067/* Hook called by the linker routine which adds symbols from an object
3068 file. We must handle the special NDS32 section numbers here.
3069 We also keep watching for whether we need to create the sdata special
3070 linker sections. */
3071
3072static bfd_boolean
3073nds32_elf_add_symbol_hook (bfd *abfd,
3074 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3075 Elf_Internal_Sym *sym,
3076 const char **namep ATTRIBUTE_UNUSED,
3077 flagword *flagsp ATTRIBUTE_UNUSED,
3078 asection **secp, bfd_vma *valp)
3079{
3080 switch (sym->st_shndx)
3081 {
3082 case SHN_COMMON:
3083 /* Common symbols less than the GP size are automatically
3084 treated as SHN_MIPS_SCOMMON symbols. */
3085 if (sym->st_size > elf_gp_size (abfd)
3086 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3087 break;
3088
3089 /* st_value is the alignemnt constraint.
3090 That might be its actual size if it is an array or structure. */
3091 switch (sym->st_value)
3092 {
3093 case 1:
3094 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3095 break;
3096 case 2:
3097 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3098 break;
3099 case 4:
3100 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3101 break;
3102 case 8:
3103 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3104 break;
3105 default:
3106 return TRUE;
3107 }
3108
3109 (*secp)->flags |= SEC_IS_COMMON;
3110 *valp = sym->st_size;
3111 break;
3112 }
3113
3114 return TRUE;
3115}
3116
3117
3118/* This function can figure out the best location for a base register to access
3119 data relative to this base register
3120 INPUT:
3121 sda_d0: size of first DOUBLE WORD data section
3122 sda_w0: size of first WORD data section
3123 sda_h0: size of first HALF WORD data section
3124 sda_b : size of BYTE data section
3125 sda_hi: size of second HALF WORD data section
3126 sda_w1: size of second WORD data section
3127 sda_d1: size of second DOUBLE WORD data section
3128 OUTPUT:
3129 offset (always positive) from the beginning of sda_d0 if OK
3130 a negative error value if fail
3131 NOTE:
3132 these 7 sections have to be located back to back if exist
3133 a pass in 0 value for non-existing section */
3134
3135/* Due to the interpretation of simm15 field of load/store depending on
3136 data accessing size, the organization of base register relative data shall
3137 like the following figure
3138 -------------------------------------------
3139 | DOUBLE WORD sized data (range +/- 128K)
3140 -------------------------------------------
3141 | WORD sized data (range +/- 64K)
3142 -------------------------------------------
3143 | HALF WORD sized data (range +/- 32K)
3144 -------------------------------------------
3145 | BYTE sized data (range +/- 16K)
3146 -------------------------------------------
3147 | HALF WORD sized data (range +/- 32K)
3148 -------------------------------------------
3149 | WORD sized data (range +/- 64K)
3150 -------------------------------------------
3151 | DOUBLE WORD sized data (range +/- 128K)
3152 -------------------------------------------
3153 Its base register shall be set to access these data freely. */
3154
3155/* We have to figure out the SDA_BASE value, so that we can adjust the
3156 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3157 BFD. If we can't find it, we're stuck. We cache it in the ELF
3158 target data. We don't need to adjust the symbol value for an
3159 external symbol if we are producing relocatable output. */
3160
3161static asection *sda_rela_sec = NULL;
3162
1c8f6a4d 3163#define SDA_SECTION_NUM 10
35c08157
KLC		 3164
3165static bfd_reloc_status_type
3166nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3167 bfd_vma *psb, bfd_boolean add_symbol)
3168{
3169 int relax_fp_as_gp;
3170 struct elf_nds32_link_hash_table *table;
3171 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3172 long unsigned int total = 0;
35c08157
KLC		 3173
3174 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3175 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3176 {
3177 asection *first = NULL, *final = NULL, *temp;
3178 bfd_vma sda_base;
3179 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3180 4 byte-aligned. Therefore, it has to set the first section ".data"
3181 4 byte-aligned. */
3182 static const char sec_name[SDA_SECTION_NUM][10] =
3183 {
3184 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3185 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3186 };
3187 size_t i = 0;
3188
3189 if (output_bfd->sections == NULL)
3190 {
3191 *psb = elf_gp (output_bfd);
3192 return bfd_reloc_ok;
3193 }
3194
3195 /* Get the first and final section. */
1c8f6a4d 3196 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3197 {
3198 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3199 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3200 first = temp;
3201 if (temp && (temp->size != 0 || temp->rawsize != 0))
3202 final = temp;
1c8f6a4d
KLC		 3203
3204 /* Summarize the sections in order to check if joining .bss. */
3205 if (temp && temp->size != 0)
3206 total += temp->size;
3207 else if (temp && temp->rawsize != 0)
3208 total += temp->rawsize;
3209
35c08157
KLC		 3210 i++;
3211 }
3212
1c8f6a4d
KLC		 3213 /* Check .bss size. */
3214 temp = bfd_get_section_by_name (output_bfd, ".bss");
3215 if (temp)
3216 {
3217 if (temp->size != 0)
3218 total += temp->size;
3219 else if (temp->rawsize != 0)
3220 total += temp->rawsize;
3221
3222 if (total < 0x80000)
3223 {
3224 if (!first && (temp->size != 0 || temp->rawsize != 0))
3225 first = temp;
3226 if ((temp->size != 0 || temp->rawsize != 0))
3227 final = temp;
3228 }
3229 }
3230
35c08157
KLC		 3231 if (first && final)
3232 {
3233 /* The middle of data region. */
1c8f6a4d 3234 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3235
3236 /* Find the section sda_base located. */
3237 i = 0;
1c8f6a4d 3238 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3239 {
3240 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3241 if (final && (final->size != 0 || final->rawsize != 0)
3242 && sda_base >= final->vma)
3243 {
3244 first = final;
3245 i++;
3246 }
3247 else
3248 break;
3249 }
3250 }
3251 else
3252 {
3253 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3254 first output section. */
3255 first = output_bfd->sections;
3256 while (first && first->size == 0 && first->rawsize == 0)
3257 first = first->next;
3258 if (!first)
3259 {
3260 *psb = elf_gp (output_bfd);
3261 return bfd_reloc_ok;
3262 }
1c8f6a4d 3263 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3264 }
3265
3266 sda_base -= first->vma;
3267 sda_base = sda_base & (~7);
3268
3269 if (!_bfd_generic_link_add_one_symbol
3270 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3271 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3272 get_elf_backend_data (output_bfd)->collect, &h))
3273 return FALSE;
3274
3275 sda_rela_sec = first;
3276
3277 table = nds32_elf_hash_table (info);
3278 relax_fp_as_gp = table->relax_fp_as_gp;
3279 if (relax_fp_as_gp)
3280 {
3281 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3282 FALSE, FALSE, FALSE);
3283 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3284 And set FP equal to SDA_BASE to do relaxation for
3285 la $fp, _FP_BASE_. */
3286 if (!_bfd_generic_link_add_one_symbol
3287 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3288 first, (bfd_vma) sda_base, (const char *) NULL,
3289 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3290 return FALSE;
3291 }
3292 }
3293
3294 if (add_symbol == TRUE)
3295 {
3296 if (h)
3297 {
3298 /* Now set gp. */
3299 elf_gp (output_bfd) = (h->u.def.value
3300 + h->u.def.section->output_section->vma
3301 + h->u.def.section->output_offset);
3302 }
3303 else
3304 {
3305 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3306 return bfd_reloc_dangerous;
3307 }
3308 }
3309
3310 *psb = h->u.def.value + h->u.def.section->output_section->vma
3311 + h->u.def.section->output_offset;
3312 return bfd_reloc_ok;
3313}
3314\f
3315
3316/* Return size of a PLT entry. */
3317#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3318
3319
3320/* Create an entry in an nds32 ELF linker hash table. */
3321
3322static struct bfd_hash_entry *
3323nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3324 struct bfd_hash_table *table,
3325 const char *string)
3326{
3327 struct elf_nds32_link_hash_entry *ret;
3328
3329 ret = (struct elf_nds32_link_hash_entry *) entry;
3330
3331 /* Allocate the structure if it has not already been allocated by a
3332 subclass. */
3333 if (ret == NULL)
3334 ret = (struct elf_nds32_link_hash_entry *)
3335 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3336
3337 if (ret == NULL)
3338 return (struct bfd_hash_entry *) ret;
3339
3340 /* Call the allocation method of the superclass. */
3341 ret = (struct elf_nds32_link_hash_entry *)
3342 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3343
3344 if (ret != NULL)
3345 {
3346 struct elf_nds32_link_hash_entry *eh;
3347
3348 eh = (struct elf_nds32_link_hash_entry *) ret;
3349 eh->dyn_relocs = NULL;
1c8f6a4d 3350 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3351 }
3352
3353 return (struct bfd_hash_entry *) ret;
3354}
3355
3356/* Create an nds32 ELF linker hash table. */
3357
3358static struct bfd_link_hash_table *
3359nds32_elf_link_hash_table_create (bfd *abfd)
3360{
3361 struct elf_nds32_link_hash_table *ret;
3362
3363 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3364
3365 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3366 if (ret == NULL)
3367 return NULL;
3368
3369 /* patch tag. */
3370 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3371 nds32_elf_link_hash_newfunc,
3372 sizeof (struct elf_nds32_link_hash_entry),
3373 NDS32_ELF_DATA))
3374 {
3375 free (ret);
3376 return NULL;
3377 }
3378
3379 ret->sgot = NULL;
3380 ret->sgotplt = NULL;
3381 ret->srelgot = NULL;
3382 ret->splt = NULL;
3383 ret->srelplt = NULL;
3384 ret->sdynbss = NULL;
3385 ret->srelbss = NULL;
3386 ret->sym_ld_script = NULL;
3387 ret->ex9_export_file = NULL;
3388 ret->ex9_import_file = NULL;
3389
3390 return &ret->root.root;
3391}
3392
3393/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3394 shortcuts to them in our hash table. */
3395
3396static bfd_boolean
3397create_got_section (bfd *dynobj, struct bfd_link_info *info)
3398{
3399 struct elf_nds32_link_hash_table *htab;
3400
3401 if (!_bfd_elf_create_got_section (dynobj, info))
3402 return FALSE;
3403
3404 htab = nds32_elf_hash_table (info);
3405 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3406 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3407 if (!htab->sgot || !htab->sgotplt)
3408 abort ();
3409
3410 /* _bfd_elf_create_got_section will create it for us. */
3411 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3412 if (htab->srelgot == NULL
3413 || !bfd_set_section_flags (dynobj, htab->srelgot,
3414 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3415 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3416 | SEC_READONLY))
3417 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3418 return FALSE;
3419
3420 return TRUE;
3421}
3422
3423/* Create dynamic sections when linking against a dynamic object. */
3424
3425static bfd_boolean
3426nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3427{
3428 struct elf_nds32_link_hash_table *htab;
3429 flagword flags, pltflags;
3430 register asection *s;
3431 const struct elf_backend_data *bed;
3432 int ptralign = 2; /* 32-bit */
3433
3434 bed = get_elf_backend_data (abfd);
3435
3436 htab = nds32_elf_hash_table (info);
3437
3438 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3439 .rel[a].bss sections. */
3440
3441 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3442 | SEC_LINKER_CREATED);
3443
3444 pltflags = flags;
3445 pltflags |= SEC_CODE;
3446 if (bed->plt_not_loaded)
3447 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3448 if (bed->plt_readonly)
3449 pltflags |= SEC_READONLY;
3450
3451 s = bfd_make_section (abfd, ".plt");
3452 htab->splt = s;
3453 if (s == NULL
3454 || !bfd_set_section_flags (abfd, s, pltflags)
3455 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3456 return FALSE;
3457
3458 if (bed->want_plt_sym)
3459 {
3460 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3461 .plt section. */
3462 struct bfd_link_hash_entry *bh = NULL;
3463 struct elf_link_hash_entry *h;
3464
3465 if (!(_bfd_generic_link_add_one_symbol
3466 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3467 (bfd_vma) 0, (const char *) NULL, FALSE,
3468 get_elf_backend_data (abfd)->collect, &bh)))
3469 return FALSE;
3470
3471 h = (struct elf_link_hash_entry *) bh;
3472 h->def_regular = 1;
3473 h->type = STT_OBJECT;
3474
3475 if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
3476 return FALSE;
3477 }
3478
3479 s = bfd_make_section (abfd,
3480 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3481 htab->srelplt = s;
3482 if (s == NULL
3483 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3484 || !bfd_set_section_alignment (abfd, s, ptralign))
3485 return FALSE;
3486
3487 if (htab->sgot == NULL && !create_got_section (abfd, info))
3488 return FALSE;
3489
3490 {
3491 const char *secname;
3492 char *relname;
3493 flagword secflags;
3494 asection *sec;
3495
3496 for (sec = abfd->sections; sec; sec = sec->next)
3497 {
3498 secflags = bfd_get_section_flags (abfd, sec);
3499 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3500 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3501 continue;
3502 secname = bfd_get_section_name (abfd, sec);
3503 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3504 strcpy (relname, ".rela");
3505 strcat (relname, secname);
3506 if (bfd_get_section_by_name (abfd, secname))
3507 continue;
3508 s = bfd_make_section (abfd, relname);
3509 if (s == NULL
3510 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3511 || !bfd_set_section_alignment (abfd, s, ptralign))
3512 return FALSE;
3513 }
3514 }
3515
3516 if (bed->want_dynbss)
3517 {
3518 /* The .dynbss section is a place to put symbols which are defined
3519 by dynamic objects, are referenced by regular objects, and are
3520 not functions. We must allocate space for them in the process
3521 image and use a R_*_COPY reloc to tell the dynamic linker to
3522 initialize them at run time. The linker script puts the .dynbss
3523 section into the .bss section of the final image. */
3524 s = bfd_make_section (abfd, ".dynbss");
3525 htab->sdynbss = s;
3526 if (s == NULL
3527 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3528 return FALSE;
3529 /* The .rel[a].bss section holds copy relocs. This section is not
3530 normally needed. We need to create it here, though, so that the
3531 linker will map it to an output section. We can't just create it
3532 only if we need it, because we will not know whether we need it
3533 until we have seen all the input files, and the first time the
3534 main linker code calls BFD after examining all the input files
3535 (size_dynamic_sections) the input sections have already been
3536 mapped to the output sections. If the section turns out not to
3537 be needed, we can discard it later. We will never need this
3538 section when generating a shared object, since they do not use
3539 copy relocs. */
3540 if (!info->shared)
3541 {
3542 s = bfd_make_section (abfd, (bed->default_use_rela_p
3543 ? ".rela.bss" : ".rel.bss"));
3544 htab->srelbss = s;
3545 if (s == NULL
3546 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3547 || !bfd_set_section_alignment (abfd, s, ptralign))
3548 return FALSE;
3549 }
3550 }
3551
3552 return TRUE;
3553}
3554
3555/* Copy the extra info we tack onto an elf_link_hash_entry. */
3556static void
3557nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3558 struct elf_link_hash_entry *dir,
3559 struct elf_link_hash_entry *ind)
3560{
3561 struct elf_nds32_link_hash_entry *edir, *eind;
3562
3563 edir = (struct elf_nds32_link_hash_entry *) dir;
3564 eind = (struct elf_nds32_link_hash_entry *) ind;
3565
3566 if (eind->dyn_relocs != NULL)
3567 {
3568 if (edir->dyn_relocs != NULL)
3569 {
3570 struct elf_nds32_dyn_relocs **pp;
3571 struct elf_nds32_dyn_relocs *p;
3572
3573 if (ind->root.type == bfd_link_hash_indirect)
3574 abort ();
3575
3576 /* Add reloc counts against the weak sym to the strong sym
3577 list. Merge any entries against the same section. */
3578 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3579 {
3580 struct elf_nds32_dyn_relocs *q;
3581
3582 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3583 if (q->sec == p->sec)
3584 {
3585 q->pc_count += p->pc_count;
3586 q->count += p->count;
3587 *pp = p->next;
3588 break;
3589 }
3590 if (q == NULL)
3591 pp = &p->next;
3592 }
3593 *pp = edir->dyn_relocs;
3594 }
3595
3596 edir->dyn_relocs = eind->dyn_relocs;
3597 eind->dyn_relocs = NULL;
3598 }
3599
3600 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3601}
3602\f
3603
3604/* Adjust a symbol defined by a dynamic object and referenced by a
3605 regular object. The current definition is in some section of the
3606 dynamic object, but we're not including those sections. We have to
3607 change the definition to something the rest of the link can
3608 understand. */
3609
3610static bfd_boolean
3611nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3612 struct elf_link_hash_entry *h)
3613{
3614 struct elf_nds32_link_hash_table *htab;
3615 struct elf_nds32_link_hash_entry *eh;
3616 struct elf_nds32_dyn_relocs *p;
3617 bfd *dynobj;
3618 asection *s;
3619 unsigned int power_of_two;
3620
3621 dynobj = elf_hash_table (info)->dynobj;
3622
3623 /* Make sure we know what is going on here. */
3624 BFD_ASSERT (dynobj != NULL
3625 && (h->needs_plt
3626 || h->u.weakdef != NULL
3627 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3628
3629
3630 /* If this is a function, put it in the procedure linkage table. We
3631 will fill in the contents of the procedure linkage table later,
3632 when we know the address of the .got section. */
3633 if (h->type == STT_FUNC || h->needs_plt)
3634 {
3635 if (!info->shared
3636 && !h->def_dynamic
3637 && !h->ref_dynamic
3638 && h->root.type != bfd_link_hash_undefweak
3639 && h->root.type != bfd_link_hash_undefined)
3640 {
3641 /* This case can occur if we saw a PLT reloc in an input
3642 file, but the symbol was never referred to by a dynamic
3643 object. In such a case, we don't actually need to build
3644 a procedure linkage table, and we can just do a PCREL
3645 reloc instead. */
3646 h->plt.offset = (bfd_vma) - 1;
3647 h->needs_plt = 0;
3648 }
3649
3650 return TRUE;
3651 }
3652 else
3653 h->plt.offset = (bfd_vma) - 1;
3654
3655 /* If this is a weak symbol, and there is a real definition, the
3656 processor independent code will have arranged for us to see the
3657 real definition first, and we can just use the same value. */
3658 if (h->u.weakdef != NULL)
3659 {
3660 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3661 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3662 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3663 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3664 return TRUE;
3665 }
3666
3667 /* This is a reference to a symbol defined by a dynamic object which
3668 is not a function. */
3669
3670 /* If we are creating a shared library, we must presume that the
3671 only references to the symbol are via the global offset table.
3672 For such cases we need not do anything here; the relocations will
3673 be handled correctly by relocate_section. */
3674 if (info->shared)
3675 return TRUE;
3676
3677 /* If there are no references to this symbol that do not use the
3678 GOT, we don't need to generate a copy reloc. */
3679 if (!h->non_got_ref)
3680 return TRUE;
3681
3682 /* If -z nocopyreloc was given, we won't generate them either. */
3683 if (info->nocopyreloc)
3684 {
3685 h->non_got_ref = 0;
3686 return TRUE;
3687 }
3688
3689 eh = (struct elf_nds32_link_hash_entry *) h;
3690 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3691 {
3692 s = p->sec->output_section;
3693 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3694 break;
3695 }
3696
3697 /* If we didn't find any dynamic relocs in sections which needs the
3698 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3699 the copy reloc. */
3700 if (p == NULL)
3701 {
3702 h->non_got_ref = 0;
3703 return TRUE;
3704 }
3705
3706 /* We must allocate the symbol in our .dynbss section, which will
3707 become part of the .bss section of the executable. There will be
3708 an entry for this symbol in the .dynsym section. The dynamic
3709 object will contain position independent code, so all references
3710 from the dynamic object to this symbol will go through the global
3711 offset table. The dynamic linker will use the .dynsym entry to
3712 determine the address it must put in the global offset table, so
3713 both the dynamic object and the regular object will refer to the
3714 same memory location for the variable. */
3715
3716 htab = nds32_elf_hash_table (info);
3717 s = htab->sdynbss;
3718 BFD_ASSERT (s != NULL);
3719
3720 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3721 to copy the initial value out of the dynamic object and into the
3722 runtime process image. We need to remember the offset into the
3723 .rela.bss section we are going to use. */
3724 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3725 {
3726 asection *srel;
3727
3728 srel = htab->srelbss;
3729 BFD_ASSERT (srel != NULL);
3730 srel->size += sizeof (Elf32_External_Rela);
3731 h->needs_copy = 1;
3732 }
3733
3734 /* We need to figure out the alignment required for this symbol. I
3735 have no idea how ELF linkers handle this. */
3736 power_of_two = bfd_log2 (h->size);
3737 if (power_of_two > 3)
3738 power_of_two = 3;
3739
3740 /* Apply the required alignment. */
3741 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3742 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3743 {
3744 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3745 return FALSE;
3746 }
3747
3748 /* Define the symbol as being at this point in the section. */
3749 h->root.u.def.section = s;
3750 h->root.u.def.value = s->size;
3751
3752 /* Increment the section size to make room for the symbol. */
3753 s->size += h->size;
3754
3755 return TRUE;
3756}
3757
3758/* Allocate space in .plt, .got and associated reloc sections for
3759 dynamic relocs. */
3760
3761static bfd_boolean
3762allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3763{
3764 struct bfd_link_info *info;
3765 struct elf_nds32_link_hash_table *htab;
3766 struct elf_nds32_link_hash_entry *eh;
3767 struct elf_nds32_dyn_relocs *p;
3768
3769 if (h->root.type == bfd_link_hash_indirect)
3770 return TRUE;
3771
3772 if (h->root.type == bfd_link_hash_warning)
3773 /* When warning symbols are created, they **replace** the "real"
3774 entry in the hash table, thus we never get to see the real
3775 symbol in a hash traversal. So look at it now. */
3776 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3777
3778 info = (struct bfd_link_info *) inf;
3779 htab = nds32_elf_hash_table (info);
3780
3781 eh = (struct elf_nds32_link_hash_entry *) h;
3782
3783 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3784 {
3785 /* Make sure this symbol is output as a dynamic symbol.
3786 Undefined weak syms won't yet be marked as dynamic. */
3787 if (h->dynindx == -1 && !h->forced_local)
3788 {
3789 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3790 return FALSE;
3791 }
3792
3793 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
3794 {
3795 asection *s = htab->splt;
3796
3797 /* If this is the first .plt entry, make room for the special
3798 first entry. */
3799 if (s->size == 0)
3800 s->size += PLT_ENTRY_SIZE;
3801
3802 h->plt.offset = s->size;
3803
3804 /* If this symbol is not defined in a regular file, and we are
3805 not generating a shared library, then set the symbol to this
3806 location in the .plt. This is required to make function
3807 pointers compare as equal between the normal executable and
3808 the shared library. */
3809 if (!info->shared && !h->def_regular)
3810 {
3811 h->root.u.def.section = s;
3812 h->root.u.def.value = h->plt.offset;
3813 }
3814
3815 /* Make room for this entry. */
3816 s->size += PLT_ENTRY_SIZE;
3817
3818 /* We also need to make an entry in the .got.plt section, which
3819 will be placed in the .got section by the linker script. */
3820 htab->sgotplt->size += 4;
3821
3822 /* We also need to make an entry in the .rel.plt section. */
3823 htab->srelplt->size += sizeof (Elf32_External_Rela);
3824 }
3825 else
3826 {
3827 h->plt.offset = (bfd_vma) - 1;
3828 h->needs_plt = 0;
3829 }
3830 }
3831 else
3832 {
3833 h->plt.offset = (bfd_vma) - 1;
3834 h->needs_plt = 0;
3835 }
3836
3837 if (h->got.refcount > 0)
3838 {
3839 asection *s;
3840 bfd_boolean dyn;
1c8f6a4d 3841 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3842
3843 /* Make sure this symbol is output as a dynamic symbol.
3844 Undefined weak syms won't yet be marked as dynamic. */
3845 if (h->dynindx == -1 && !h->forced_local)
3846 {
3847 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3848 return FALSE;
3849 }
3850
3851 s = htab->sgot;
35c08157 3852 h->got.offset = s->size;
1c8f6a4d
KLC		 3853
3854 if (tls_type == GOT_UNKNOWN)
3855 abort ();
3856 else if (tls_type == GOT_NORMAL
3857 || tls_type == GOT_TLS_IE)
3858 /* Need a GOT slot. */
3859 s->size += 4;
3860
35c08157
KLC		 3861 dyn = htab->root.dynamic_sections_created;
3862 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
3863 htab->srelgot->size += sizeof (Elf32_External_Rela);
3864 }
3865 else
3866 h->got.offset = (bfd_vma) - 1;
3867
3868 if (eh->dyn_relocs == NULL)
3869 return TRUE;
3870
3871 /* In the shared -Bsymbolic case, discard space allocated for
3872 dynamic pc-relative relocs against symbols which turn out to be
3873 defined in regular objects. For the normal shared case, discard
3874 space for pc-relative relocs that have become local due to symbol
3875 visibility changes. */
3876
3877 if (info->shared)
3878 {
3879 if (h->def_regular && (h->forced_local || info->symbolic))
3880 {
3881 struct elf_nds32_dyn_relocs **pp;
3882
3883 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3884 {
3885 p->count -= p->pc_count;
3886 p->pc_count = 0;
3887 if (p->count == 0)
3888 *pp = p->next;
3889 else
3890 pp = &p->next;
3891 }
3892 }
3893 }
3894 else
3895 {
3896 /* For the non-shared case, discard space for relocs against
3897 symbols which turn out to need copy relocs or are not dynamic. */
3898
3899 if (!h->non_got_ref
3900 && ((h->def_dynamic
3901 && !h->def_regular)
3902 || (htab->root.dynamic_sections_created
3903 && (h->root.type == bfd_link_hash_undefweak
3904 || h->root.type == bfd_link_hash_undefined))))
3905 {
3906 /* Make sure this symbol is output as a dynamic symbol.
3907 Undefined weak syms won't yet be marked as dynamic. */
3908 if (h->dynindx == -1 && !h->forced_local)
3909 {
3910 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3911 return FALSE;
3912 }
3913
3914 /* If that succeeded, we know we'll be keeping all the
3915 relocs. */
3916 if (h->dynindx != -1)
3917 goto keep;
3918 }
3919
3920 eh->dyn_relocs = NULL;
3921
3922 keep:;
3923 }
3924
3925 /* Finally, allocate space. */
3926 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3927 {
3928 asection *sreloc = elf_section_data (p->sec)->sreloc;
3929 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3930 }
3931
3932 return TRUE;
3933}
3934
3935/* Find any dynamic relocs that apply to read-only sections. */
3936
3937static bfd_boolean
3938readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3939{
3940 struct elf_nds32_link_hash_entry *eh;
3941 struct elf_nds32_dyn_relocs *p;
3942
3943 if (h->root.type == bfd_link_hash_warning)
3944 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3945
3946 eh = (struct elf_nds32_link_hash_entry *) h;
3947 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3948 {
3949 asection *s = p->sec->output_section;
3950
3951 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3952 {
3953 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3954
3955 info->flags |= DF_TEXTREL;
3956
3957 /* Not an error, just cut short the traversal. */
3958 return FALSE;
3959 }
3960 }
3961 return TRUE;
3962}
3963
3964/* Set the sizes of the dynamic sections. */
3965
3966static bfd_boolean
3967nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3968 struct bfd_link_info *info)
3969{
3970 struct elf_nds32_link_hash_table *htab;
3971 bfd *dynobj;
3972 asection *s;
3973 bfd_boolean relocs;
3974 bfd *ibfd;
3975
3976 htab = nds32_elf_hash_table (info);
3977 dynobj = htab->root.dynobj;
3978 BFD_ASSERT (dynobj != NULL);
3979
3980 if (htab->root.dynamic_sections_created)
3981 {
3982 /* Set the contents of the .interp section to the interpreter. */
3983 if (!info->shared)
3984 {
3985 s = bfd_get_section_by_name (dynobj, ".interp");
3986 BFD_ASSERT (s != NULL);
3987 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3988 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3989 }
3990 }
3991
3992 /* Set up .got offsets for local syms, and space for local dynamic
3993 relocs. */
c72f2fb2 3994 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3995 {
3996 bfd_signed_vma *local_got;
3997 bfd_signed_vma *end_local_got;
3998 bfd_size_type locsymcount;
3999 Elf_Internal_Shdr *symtab_hdr;
4000 asection *srel;
4001
4002 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4003 continue;
4004
4005 for (s = ibfd->sections; s != NULL; s = s->next)
4006 {
4007 struct elf_nds32_dyn_relocs *p;
4008
4009 for (p = ((struct elf_nds32_dyn_relocs *)
4010 elf_section_data (s)->local_dynrel);
4011 p != NULL; p = p->next)
4012 {
4013 if (!bfd_is_abs_section (p->sec)
4014 && bfd_is_abs_section (p->sec->output_section))
4015 {
4016 /* Input section has been discarded, either because
4017 it is a copy of a linkonce section or due to
4018 linker script /DISCARD/, so we'll be discarding
4019 the relocs too. */
4020 }
4021 else if (p->count != 0)
4022 {
4023 srel = elf_section_data (p->sec)->sreloc;
4024 srel->size += p->count * sizeof (Elf32_External_Rela);
4025 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4026 info->flags |= DF_TEXTREL;
4027 }
4028 }
4029 }
4030
4031 local_got = elf_local_got_refcounts (ibfd);
4032 if (!local_got)
4033 continue;
4034
4035 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4036 locsymcount = symtab_hdr->sh_info;
4037 end_local_got = local_got + locsymcount;
4038 s = htab->sgot;
4039 srel = htab->srelgot;
4040 for (; local_got < end_local_got; ++local_got)
4041 {
4042 if (*local_got > 0)
4043 {
4044 *local_got = s->size;
4045 s->size += 4;
4046 if (info->shared)
4047 srel->size += sizeof (Elf32_External_Rela);
4048 }
4049 else
4050 *local_got = (bfd_vma) - 1;
4051 }
4052 }
4053
4054 /* Allocate global sym .plt and .got entries, and space for global
4055 sym dynamic relocs. */
4056 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4057
4058 /* We now have determined the sizes of the various dynamic sections.
4059 Allocate memory for them. */
4060 relocs = FALSE;
4061 for (s = dynobj->sections; s != NULL; s = s->next)
4062 {
4063 if ((s->flags & SEC_LINKER_CREATED) == 0)
4064 continue;
4065
4066 if (s == htab->splt)
4067 {
4068 /* Strip this section if we don't need it; see the
4069 comment below. */
4070 }
4071 else if (s == htab->sgot)
4072 {
4073 got_size += s->size;
4074 }
4075 else if (s == htab->sgotplt)
4076 {
4077 got_size += s->size;
4078 }
4079 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4080 {
4081 if (s->size != 0 && s != htab->srelplt)
4082 relocs = TRUE;
4083
4084 /* We use the reloc_count field as a counter if we need
4085 to copy relocs into the output file. */
4086 s->reloc_count = 0;
4087 }
4088 else
4089 {
4090 /* It's not one of our sections, so don't allocate space. */
4091 continue;
4092 }
4093
4094 if (s->size == 0)
4095 {
4096 /* If we don't need this section, strip it from the
4097 output file. This is mostly to handle .rela.bss and
4098 .rela.plt. We must create both sections in
4099 create_dynamic_sections, because they must be created
4100 before the linker maps input sections to output
4101 sections. The linker does that before
4102 adjust_dynamic_symbol is called, and it is that
4103 function which decides whether anything needs to go
4104 into these sections. */
4105 s->flags |= SEC_EXCLUDE;
4106 continue;
4107 }
4108
4109 /* Allocate memory for the section contents. We use bfd_zalloc
4110 here in case unused entries are not reclaimed before the
4111 section's contents are written out. This should not happen,
4112 but this way if it does, we get a R_NDS32_NONE reloc instead
4113 of garbage. */
4114 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4115 if (s->contents == NULL)
4116 return FALSE;
4117 }
4118
4119
4120 if (htab->root.dynamic_sections_created)
4121 {
4122 /* Add some entries to the .dynamic section. We fill in the
4123 values later, in nds32_elf_finish_dynamic_sections, but we
4124 must add the entries now so that we get the correct size for
4125 the .dynamic section. The DT_DEBUG entry is filled in by the
4126 dynamic linker and used by the debugger. */
4127#define add_dynamic_entry(TAG, VAL) \
4128 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4129
4130 if (!info->shared)
4131 {
4132 if (!add_dynamic_entry (DT_DEBUG, 0))
4133 return FALSE;
4134 }
4135
4136 if (htab->splt->size != 0)
4137 {
4138 if (!add_dynamic_entry (DT_PLTGOT, 0)
4139 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4140 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4141 || !add_dynamic_entry (DT_JMPREL, 0))
4142 return FALSE;
4143 }
4144
4145 if (relocs)
4146 {
4147 if (!add_dynamic_entry (DT_RELA, 0)
4148 || !add_dynamic_entry (DT_RELASZ, 0)
4149 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4150 return FALSE;
4151
4152 /* If any dynamic relocs apply to a read-only section,
4153 then we need a DT_TEXTREL entry. */
4154 if ((info->flags & DF_TEXTREL) == 0)
4155 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4156 (void *) info);
4157
4158 if ((info->flags & DF_TEXTREL) != 0)
4159 {
4160 if (!add_dynamic_entry (DT_TEXTREL, 0))
4161 return FALSE;
4162 }
4163 }
4164 }
4165#undef add_dynamic_entry
4166
4167 return TRUE;
4168}
4169
4170static bfd_reloc_status_type
4171nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4172 bfd_vma relocation, bfd_byte *location)
4173{
4174 int size;
4175 bfd_vma x = 0;
4176 bfd_reloc_status_type flag;
4177 unsigned int rightshift = howto->rightshift;
4178 unsigned int bitpos = howto->bitpos;
4179
4180 /* If the size is negative, negate RELOCATION. This isn't very
4181 general. */
4182 if (howto->size < 0)
4183 relocation = -relocation;
4184
4185 /* Get the value we are going to relocate. */
4186 size = bfd_get_reloc_size (howto);
4187 switch (size)
4188 {
4189 default:
35c08157
KLC		 4190 abort ();
4191 break;
6346d5ca
AM		 4192 case 0:
4193 return bfd_reloc_ok;
35c08157
KLC		 4194 case 2:
4195 x = bfd_getb16 (location);
4196 break;
4197 case 4:
4198 x = bfd_getb32 (location);
4199 break;
4200 }
4201
4202 /* Check for overflow. FIXME: We may drop bits during the addition
4203 which we don't check for. We must either check at every single
4204 operation, which would be tedious, or we must do the computations
4205 in a type larger than bfd_vma, which would be inefficient. */
4206 flag = bfd_reloc_ok;
4207 if (howto->complain_on_overflow != complain_overflow_dont)
4208 {
4209 bfd_vma addrmask, fieldmask, signmask, ss;
4210 bfd_vma a, b, sum;
4211
4212 /* Get the values to be added together. For signed and unsigned
4213 relocations, we assume that all values should be truncated to
4214 the size of an address. For bitfields, all the bits matter.
4215 See also bfd_check_overflow. */
4216 fieldmask = N_ONES (howto->bitsize);
4217 signmask = ~fieldmask;
4218 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4219 a = (relocation & addrmask) >> rightshift;
4220 b = (x & howto->src_mask & addrmask) >> bitpos;
4221
4222 switch (howto->complain_on_overflow)
4223 {
4224 case complain_overflow_signed:
4225 /* If any sign bits are set, all sign bits must be set.
4226 That is, A must be a valid negative address after
4227 shifting. */
4228 signmask = ~(fieldmask >> 1);
4229 /* Fall through. */
4230
4231 case complain_overflow_bitfield:
4232 /* Much like the signed check, but for a field one bit
4233 wider. We allow a bitfield to represent numbers in the
4234 range -2**n to 2**n-1, where n is the number of bits in the
4235 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4236 can't overflow, which is exactly what we want. */
4237 ss = a & signmask;
4238 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4239 flag = bfd_reloc_overflow;
4240
4241 /* We only need this next bit of code if the sign bit of B
4242 is below the sign bit of A. This would only happen if
4243 SRC_MASK had fewer bits than BITSIZE. Note that if
4244 SRC_MASK has more bits than BITSIZE, we can get into
4245 trouble; we would need to verify that B is in range, as
4246 we do for A above. */
4247 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4248 ss >>= bitpos;
4249
4250 /* Set all the bits above the sign bit. */
4251 b = (b ^ ss) - ss;
4252
4253 /* Now we can do the addition. */
4254 sum = a + b;
4255
4256 /* See if the result has the correct sign. Bits above the
4257 sign bit are junk now; ignore them. If the sum is
4258 positive, make sure we did not have all negative inputs;
4259 if the sum is negative, make sure we did not have all
4260 positive inputs. The test below looks only at the sign
4261 bits, and it really just
4262 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4263
4264 We mask with addrmask here to explicitly allow an address
4265 wrap-around. The Linux kernel relies on it, and it is
4266 the only way to write assembler code which can run when
4267 loaded at a location 0x80000000 away from the location at
4268 which it is linked. */
4269 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4270 flag = bfd_reloc_overflow;
4271
4272 break;
4273
4274 case complain_overflow_unsigned:
4275 /* Checking for an unsigned overflow is relatively easy:
4276 trim the addresses and add, and trim the result as well.
4277 Overflow is normally indicated when the result does not
4278 fit in the field. However, we also need to consider the
4279 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4280 input is 0x80000000, and bfd_vma is only 32 bits; then we
4281 will get sum == 0, but there is an overflow, since the
4282 inputs did not fit in the field. Instead of doing a
4283 separate test, we can check for this by or-ing in the
4284 operands when testing for the sum overflowing its final
4285 field. */
4286 sum = (a + b) & addrmask;
4287 if ((a | b | sum) & signmask)
4288 flag = bfd_reloc_overflow;
4289 break;
4290
4291 default:
4292 abort ();
4293 }
4294 }
4295
4296 /* Put RELOCATION in the right bits. */
4297 relocation >>= (bfd_vma) rightshift;
4298 relocation <<= (bfd_vma) bitpos;
4299
4300 /* Add RELOCATION to the right bits of X. */
4301 /* FIXME : 090616
4302 Because the relaxation may generate duplicate relocation at one address,
4303 an addition to immediate in the instruction may cause the relocation added
4304 several times.
4305 This bug should be fixed in assembler, but a check is also needed here. */
4306 if (howto->partial_inplace)
4307 x = ((x & ~howto->dst_mask)
4308 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4309 else
4310 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4311
4312
4313 /* Put the relocated value back in the object file. */
4314 switch (size)
4315 {
4316 default:
4317 case 0:
4318 case 1:
4319 case 8:
4320 abort ();
4321 break;
4322 case 2:
4323 bfd_putb16 (x, location);
4324 break;
4325 case 4:
4326 bfd_putb32 (x, location);
4327 break;
4328 }
4329
4330 return flag;
4331}
4332
4333static bfd_reloc_status_type
4334nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4335 asection *input_section, bfd_byte *contents,
4336 bfd_vma address, bfd_vma value, bfd_vma addend)
4337{
4338 bfd_vma relocation;
4339
4340 /* Sanity check the address. */
4341 if (address > bfd_get_section_limit (input_bfd, input_section))
4342 return bfd_reloc_outofrange;
4343
4344 /* This function assumes that we are dealing with a basic relocation
4345 against a symbol. We want to compute the value of the symbol to
4346 relocate to. This is just VALUE, the value of the symbol, plus
4347 ADDEND, any addend associated with the reloc. */
4348 relocation = value + addend;
4349
4350 /* If the relocation is PC relative, we want to set RELOCATION to
4351 the distance between the symbol (currently in RELOCATION) and the
4352 location we are relocating. Some targets (e.g., i386-aout)
4353 arrange for the contents of the section to be the negative of the
4354 offset of the location within the section; for such targets
4355 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4356 simply leave the contents of the section as zero; for such
4357 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4358 need to subtract out the offset of the location within the
4359 section (which is just ADDRESS). */
4360 if (howto->pc_relative)
4361 {
4362 relocation -= (input_section->output_section->vma
4363 + input_section->output_offset);
4364 if (howto->pcrel_offset)
4365 relocation -= address;
4366 }
4367
4368 return nds32_relocate_contents (howto, input_bfd, relocation,
4369 contents + address);
4370}
4371
4372static bfd_boolean
4373nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4374 const char *name,
4375 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4376 asection *input_sec,
4377 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4378{
4379 const char *source;
4380 FILE *sym_ld_script = NULL;
4381 struct elf_nds32_link_hash_table *table;
4382
4383 table = nds32_elf_hash_table (info);
4384 sym_ld_script = table->sym_ld_script;
4385 if (!sym_ld_script)
4386 return TRUE;
4387
4388 if (!h || !name || *name == '\0')
4389 return TRUE;
4390
4391 if (input_sec->flags & SEC_EXCLUDE)
4392 return TRUE;
4393
4394 if (!check_start_export_sym)
4395 {
4396 fprintf (sym_ld_script, "SECTIONS\n{\n");
4397 check_start_export_sym = 1;
4398 }
4399
4400 if (h->root.type == bfd_link_hash_defined
4401 || h->root.type == bfd_link_hash_defweak)
4402 {
4403 if (!h->root.u.def.section->output_section)
4404 return TRUE;
4405
4406 if (bfd_is_const_section (input_sec))
4407 source = input_sec->name;
4408 else
4409 source = input_sec->owner->filename;
4410
4411 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4412 h->root.root.string,
4413 (long) (h->root.u.def.value
4414 + h->root.u.def.section->output_section->vma
4415 + h->root.u.def.section->output_offset), source);
4416 }
4417
4418 return TRUE;
4419}
4420
4421/* Relocate an NDS32/D ELF section.
4422 There is some attempt to make this function usable for many architectures,
4423 both for RELA and REL type relocs, if only to serve as a learning tool.
4424
4425 The RELOCATE_SECTION function is called by the new ELF backend linker
4426 to handle the relocations for a section.
4427
4428 The relocs are always passed as Rela structures; if the section
4429 actually uses Rel structures, the r_addend field will always be
4430 zero.
4431
4432 This function is responsible for adjust the section contents as
4433 necessary, and (if using Rela relocs and generating a
4434 relocatable output file) adjusting the reloc addend as
4435 necessary.
4436
4437 This function does not have to worry about setting the reloc
4438 address or the reloc symbol index.
4439
4440 LOCAL_SYMS is a pointer to the swapped in local symbols.
4441
4442 LOCAL_SECTIONS is an array giving the section in the input file
4443 corresponding to the st_shndx field of each local symbol.
4444
4445 The global hash table entry for the global symbols can be found
4446 via elf_sym_hashes (input_bfd).
4447
4448 When generating relocatable output, this function must handle
4449 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4450 going to be the section symbol corresponding to the output
4451 section, which means that the addend must be adjusted
4452 accordingly. */
4453
1c8f6a4d
KLC		 4454static bfd_vma
4455dtpoff_base (struct bfd_link_info *info)
4456{
4457 /* If tls_sec is NULL, we should have signalled an error already. */
4458 if (elf_hash_table (info)->tls_sec == NULL)
4459 return 0;
4460 return elf_hash_table (info)->tls_sec->vma;
4461}
4462
35c08157
KLC		 4463static bfd_boolean
4464nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4465 struct bfd_link_info * info,
4466 bfd * input_bfd,
4467 asection * input_section,
4468 bfd_byte * contents,
4469 Elf_Internal_Rela * relocs,
4470 Elf_Internal_Sym * local_syms,
4471 asection ** local_sections)
4472{
4473 Elf_Internal_Shdr *symtab_hdr;
4474 struct elf_link_hash_entry **sym_hashes;
4475 Elf_Internal_Rela *rel, *relend;
4476 bfd_boolean ret = TRUE; /* Assume success. */
4477 int align = 0;
4478 bfd_reloc_status_type r;
4479 const char *errmsg = NULL;
4480 bfd_vma gp;
4481 struct elf_nds32_link_hash_table *htab;
4482 bfd *dynobj;
4483 bfd_vma *local_got_offsets;
4484 asection *sgot, *splt, *sreloc;
4485 bfd_vma high_address;
4486 struct elf_nds32_link_hash_table *table;
4487 int eliminate_gc_relocs;
4488 bfd_vma fpbase_addr;
4489
4490 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4491 sym_hashes = elf_sym_hashes (input_bfd);
4492 htab = nds32_elf_hash_table (info);
4493 high_address = bfd_get_section_limit (input_bfd, input_section);
4494
4495 dynobj = htab->root.dynobj;
4496 local_got_offsets = elf_local_got_offsets (input_bfd);
4497
4498 sgot = htab->sgot;
4499 splt = htab->splt;
4500 sreloc = NULL;
4501
4502 rel = relocs;
4503 relend = relocs + input_section->reloc_count;
4504
4505 table = nds32_elf_hash_table (info);
4506 eliminate_gc_relocs = table->eliminate_gc_relocs;
4507 /* By this time, we can adjust the value of _SDA_BASE_. */
4508 if ((!info->relocatable))
4509 {
4510 is_SDA_BASE_set = 1;
4511 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4512 if (r != bfd_reloc_ok)
4513 return FALSE;
4514 }
4515
0c4bd9d9
KLC		 4516 if (is_ITB_BASE_set == 0)
4517 {
4518 /* Set the _ITB_BASE_. */
4519 if (!nds32_elf_ex9_itb_base (info))
4520 {
4521 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
4522 output_bfd);
4523 bfd_set_error (bfd_error_bad_value);
4524 }
4525 }
4526
1c8f6a4d
KLC		 4527 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4528 if (!nds32_elf_ifc_reloc ())
4529 (*_bfd_error_handler) (_("error: IFC relocation error."));
4530
4531 /* Relocation for .ex9.itable. */
4532 if (table->target_optimize & NDS32_RELAX_EX9_ON
4533 || (table->ex9_import_file && table->update_ex9_table))
4534 nds32_elf_ex9_reloc_jmp (info);
4535
35c08157
KLC		 4536 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4537 the fp value is set as gp, and it has be reverted for instruction
4538 setting fp. */
4539 fpbase_addr = elf_gp (output_bfd);
4540
4541 for (rel = relocs; rel < relend; rel++)
4542 {
4543 enum elf_nds32_reloc_type r_type;
4544 reloc_howto_type *howto = NULL;
4545 unsigned long r_symndx;
4546 struct elf_link_hash_entry *h = NULL;
4547 Elf_Internal_Sym *sym = NULL;
4548 asection *sec;
4549 bfd_vma relocation;
4550
4551 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4552 ensure it's zero (we use REL relocs, not RELA). Therefore this
4553 should be assigning zero to `addend', but for clarity we use
4554 `r_addend'. */
4555
4556 bfd_vma addend = rel->r_addend;
4557 bfd_vma offset = rel->r_offset;
4558
4559 r_type = ELF32_R_TYPE (rel->r_info);
4560 if (r_type >= R_NDS32_max)
4561 {
4562 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4563 input_bfd, r_type);
4564 bfd_set_error (bfd_error_bad_value);
4565 ret = FALSE;
4566 continue;
4567 }
4568
4569 if (r_type == R_NDS32_GNU_VTENTRY
4570 || r_type == R_NDS32_GNU_VTINHERIT
4571 || r_type == R_NDS32_NONE
4572 || r_type == R_NDS32_RELA_GNU_VTENTRY
4573 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4574 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4575 || r_type == R_NDS32_DATA
1c8f6a4d 4576 || r_type == R_NDS32_TRAN
0c4bd9d9 4577 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4578 continue;
4579
0c4bd9d9
KLC		 4580 /* If we enter the fp-as-gp region. Resolve the address
4581 of best fp-base. */
35c08157
KLC		 4582 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4583 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4584 {
4585 int dist;
4586
4587 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4588 dist = rel->r_addend >> 16;
4589 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4590 local_syms, symtab_hdr);
4591 }
4592 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4593 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4594 {
4595 fpbase_addr = elf_gp (output_bfd);
4596 }
4597
4598 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4599 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4600 || r_type >= R_NDS32_RELAX_ENTRY) && !info->relocatable)
4601 continue;
4602
4603 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4604 r_symndx = ELF32_R_SYM (rel->r_info);
4605
4606 /* This is a final link. */
4607 sym = NULL;
4608 sec = NULL;
4609 h = NULL;
4610
4611 if (r_symndx < symtab_hdr->sh_info)
4612 {
4613 /* Local symbol. */
4614 sym = local_syms + r_symndx;
4615 sec = local_sections[r_symndx];
4616
4617 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4618 addend = rel->r_addend;
4619 }
4620 else
4621 {
4622 /* External symbol. */
4623 bfd_boolean warned, ignored, unresolved_reloc;
4624 int symndx = r_symndx - symtab_hdr->sh_info;
4625
4626 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4627 r_symndx, symtab_hdr, sym_hashes, h, sec,
4628 relocation, unresolved_reloc, warned,
4629 ignored);
4630
4631 /* la $fp, _FP_BASE_ is per-function (region).
4632 Handle it specially. */
4633 switch ((int) r_type)
4634 {
4635 case R_NDS32_SDA19S0_RELA:
4636 case R_NDS32_SDA15S0_RELA:
4637 case R_NDS32_20_RELA:
4638 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4639 FP_BASE_NAME) == 0)
4640 {
4641 relocation = fpbase_addr;
4642 break;
4643 }
4644 }
4645
4646 }
4647
4648 if (info->relocatable)
4649 {
4650 /* This is a relocatable link. We don't have to change
4651 anything, unless the reloc is against a section symbol,
4652 in which case we have to adjust according to where the
4653 section symbol winds up in the output section. */
4654 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4655 rel->r_addend += sec->output_offset + sym->st_value;
4656
4657 continue;
4658 }
4659
4660 /* Sanity check the address. */
4661 if (offset > high_address)
4662 {
4663 r = bfd_reloc_outofrange;
4664 goto check_reloc;
4665 }
4666
4667 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4668 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4669 || r_type >= R_NDS32_RELAX_ENTRY)
4670 continue;
4671
4672 switch ((int) r_type)
4673 {
4674 case R_NDS32_GOTOFF:
4675 /* Relocation is relative to the start of the global offset
4676 table (for ld24 rx, #uimm24), e.g. access at label+addend
4677
4678 ld24 rx. #label@GOTOFF + addend
4679 sub rx, r12. */
4680 case R_NDS32_GOTOFF_HI20:
4681 case R_NDS32_GOTOFF_LO12:
4682 case R_NDS32_GOTOFF_LO15:
4683 case R_NDS32_GOTOFF_LO19:
4684 BFD_ASSERT (sgot != NULL);
4685
4686 relocation -= elf_gp (output_bfd);
4687 break;
4688
4689 case R_NDS32_9_PLTREL:
4690 case R_NDS32_25_PLTREL:
4691 /* Relocation is to the entry for this symbol in the
4692 procedure linkage table. */
4693
4694 /* The native assembler will generate a 25_PLTREL reloc
4695 for a local symbol if you assemble a call from one
4696 section to another when using -K pic. */
4697 if (h == NULL)
4698 break;
4699
4700 if (h->forced_local)
4701 break;
4702
4703 /* We didn't make a PLT entry for this symbol. This
4704 happens when statically linking PIC code, or when
4705 using -Bsymbolic. */
4706 if (h->plt.offset == (bfd_vma) - 1)
4707 break;
4708
4709 relocation = (splt->output_section->vma
4710 + splt->output_offset + h->plt.offset);
4711 break;
4712
4713 case R_NDS32_PLT_GOTREL_HI20:
4714 case R_NDS32_PLT_GOTREL_LO12:
4715 case R_NDS32_PLT_GOTREL_LO15:
4716 case R_NDS32_PLT_GOTREL_LO19:
4717 case R_NDS32_PLT_GOTREL_LO20:
4718 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4719 {
4720 /* We didn't make a PLT entry for this symbol. This
4721 happens when statically linking PIC code, or when
4722 using -Bsymbolic. */
4723 relocation -= elf_gp (output_bfd);
4724 break;
4725 }
4726
4727 relocation = (splt->output_section->vma
4728 + splt->output_offset + h->plt.offset);
4729
4730 relocation -= elf_gp (output_bfd);
4731 break;
4732
4733 case R_NDS32_PLTREL_HI20:
4734 case R_NDS32_PLTREL_LO12:
4735
4736 /* Relocation is to the entry for this symbol in the
4737 procedure linkage table. */
4738
4739 /* The native assembler will generate a 25_PLTREL reloc
4740 for a local symbol if you assemble a call from one
4741 section to another when using -K pic. */
4742 if (h == NULL)
4743 break;
4744
4745 if (h->forced_local)
4746 break;
4747
4748 if (h->plt.offset == (bfd_vma) - 1)
4749 /* We didn't make a PLT entry for this symbol. This
4750 happens when statically linking PIC code, or when
4751 using -Bsymbolic. */
4752 break;
4753
4754 if (splt == NULL)
4755 break;
4756
4757 relocation = (splt->output_section->vma
4758 + splt->output_offset
4759 + h->plt.offset + 4)
4760 - (input_section->output_section->vma
4761 + input_section->output_offset
4762 + rel->r_offset);
4763
4764 break;
4765
4766 case R_NDS32_GOTPC20:
4767 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4768 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4769 relocation = elf_gp (output_bfd);
4770 break;
4771
4772 case R_NDS32_GOTPC_HI20:
4773 case R_NDS32_GOTPC_LO12:
4774 {
4775 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4776 bl .+4
4777 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4778 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4779 or
4780 bl .+4
4781 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4782 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4783 */
4784 relocation = elf_gp (output_bfd);
4785 relocation -= (input_section->output_section->vma
4786 + input_section->output_offset + rel->r_offset);
4787 break;
4788 }
4789
4790 case R_NDS32_GOT20:
4791 /* Fall through. */
4792 case R_NDS32_GOT_HI20:
4793 case R_NDS32_GOT_LO12:
4794 case R_NDS32_GOT_LO15:
4795 case R_NDS32_GOT_LO19:
4796 /* Relocation is to the entry for this symbol in the global
4797 offset table. */
4798 BFD_ASSERT (sgot != NULL);
4799
4800 if (h != NULL)
4801 {
4802 bfd_boolean dyn;
4803 bfd_vma off;
4804
4805 off = h->got.offset;
4806 BFD_ASSERT (off != (bfd_vma) - 1);
4807 dyn = htab->root.dynamic_sections_created;
4808 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
4809 || (info->shared
4810 && (info->symbolic
4811 || h->dynindx == -1
4812 || h->forced_local) && h->def_regular))
4813 {
4814 /* This is actually a static link, or it is a
4815 -Bsymbolic link and the symbol is defined
4816 locally, or the symbol was forced to be local
4817 because of a version file. We must initialize
4818 this entry in the global offset table. Since the
4819 offset must always be a multiple of 4, we use the
4820 least significant bit to record whether we have
4821 initialized it already.
4822
4823 When doing a dynamic link, we create a .rela.got
4824 relocation entry to initialize the value. This
4825 is done in the finish_dynamic_symbol routine. */
4826 if ((off & 1) != 0)
4827 off &= ~1;
4828 else
4829 {
4830 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4831 h->got.offset |= 1;
4832 }
4833 }
4834 relocation = sgot->output_section->vma + sgot->output_offset + off
4835 - elf_gp (output_bfd);
4836 }
4837 else
4838 {
4839 bfd_vma off;
4840 bfd_byte *loc;
4841
4842 BFD_ASSERT (local_got_offsets != NULL
4843 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4844
4845 off = local_got_offsets[r_symndx];
4846
4847 /* The offset must always be a multiple of 4. We use
4848 the least significant bit to record whether we have
4849 already processed this entry. */
4850 if ((off & 1) != 0)
4851 off &= ~1;
4852 else
4853 {
4854 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4855
4856 if (info->shared)
4857 {
4858 asection *srelgot;
4859 Elf_Internal_Rela outrel;
4860
4861 /* We need to generate a R_NDS32_RELATIVE reloc
4862 for the dynamic linker. */
4863 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4864 BFD_ASSERT (srelgot != NULL);
4865
4866 outrel.r_offset = (elf_gp (output_bfd)
4867 + sgot->output_offset + off);
4868 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4869 outrel.r_addend = relocation;
4870 loc = srelgot->contents;
4871 loc +=
4872 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4873 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4874 ++srelgot->reloc_count;
4875 }
4876 local_got_offsets[r_symndx] |= 1;
4877 }
4878 relocation = sgot->output_section->vma + sgot->output_offset + off
4879 - elf_gp (output_bfd);
4880 }
4881
4882 break;
4883
4884 case R_NDS32_16_RELA:
4885 case R_NDS32_20_RELA:
4886 case R_NDS32_5_RELA:
4887 case R_NDS32_32_RELA:
4888 case R_NDS32_9_PCREL_RELA:
4889 case R_NDS32_WORD_9_PCREL_RELA:
4890 case R_NDS32_10_UPCREL_RELA:
4891 case R_NDS32_15_PCREL_RELA:
4892 case R_NDS32_17_PCREL_RELA:
4893 case R_NDS32_25_PCREL_RELA:
4894 case R_NDS32_HI20_RELA:
4895 case R_NDS32_LO12S3_RELA:
4896 case R_NDS32_LO12S2_RELA:
4897 case R_NDS32_LO12S2_DP_RELA:
4898 case R_NDS32_LO12S2_SP_RELA:
4899 case R_NDS32_LO12S1_RELA:
4900 case R_NDS32_LO12S0_RELA:
4901 case R_NDS32_LO12S0_ORI_RELA:
4902 if (info->shared && r_symndx != 0
4903 && (input_section->flags & SEC_ALLOC) != 0
4904 && (eliminate_gc_relocs == 0
4905 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4906 && ((r_type != R_NDS32_9_PCREL_RELA
4907 && r_type != R_NDS32_WORD_9_PCREL_RELA
4908 && r_type != R_NDS32_10_UPCREL_RELA
4909 && r_type != R_NDS32_15_PCREL_RELA
4910 && r_type != R_NDS32_17_PCREL_RELA
4911 && r_type != R_NDS32_25_PCREL_RELA
4912 && !(r_type == R_NDS32_32_RELA
4913 && strcmp (input_section->name, ".eh_frame") == 0))
4914 || (h != NULL && h->dynindx != -1
4915 && (!info->symbolic || !h->def_regular))))
4916 {
4917 Elf_Internal_Rela outrel;
4918 bfd_boolean skip, relocate;
4919 bfd_byte *loc;
4920
4921 /* When generating a shared object, these relocations
4922 are copied into the output file to be resolved at run
4923 time. */
4924
4925 if (sreloc == NULL)
4926 {
4927 const char *name;
4928
4929 name = bfd_elf_string_from_elf_section
4930 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4931 elf_section_data (input_section)->rela.hdr->sh_name);
4932 if (name == NULL)
4933 return FALSE;
4934
4935 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4936 && strcmp (bfd_get_section_name (input_bfd,
4937 input_section),
4938 name + 5) == 0);
4939
4940 sreloc = bfd_get_section_by_name (dynobj, name);
4941 BFD_ASSERT (sreloc != NULL);
4942 }
4943
4944 skip = FALSE;
4945 relocate = FALSE;
4946
4947 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4948 info,
4949 input_section,
4950 rel->r_offset);
4951 if (outrel.r_offset == (bfd_vma) - 1)
4952 skip = TRUE;
4953 else if (outrel.r_offset == (bfd_vma) - 2)
4954 skip = TRUE, relocate = TRUE;
4955 outrel.r_offset += (input_section->output_section->vma
4956 + input_section->output_offset);
4957
4958 if (skip)
4959 memset (&outrel, 0, sizeof outrel);
4960 else if (r_type == R_NDS32_17_PCREL_RELA
4961 || r_type == R_NDS32_15_PCREL_RELA
4962 || r_type == R_NDS32_25_PCREL_RELA)
4963 {
4964 BFD_ASSERT (h != NULL && h->dynindx != -1);
4965 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4966 outrel.r_addend = rel->r_addend;
4967 }
4968 else
4969 {
4970 /* h->dynindx may be -1 if this symbol was marked to
4971 become local. */
4972 if (h == NULL
4973 || ((info->symbolic || h->dynindx == -1)
4974 && h->def_regular))
4975 {
4976 relocate = TRUE;
4977 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4978 outrel.r_addend = relocation + rel->r_addend;
4979 }
4980 else
4981 {
4982 BFD_ASSERT (h->dynindx != -1);
4983 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4984 outrel.r_addend = rel->r_addend;
4985 }
4986 }
4987
4988 loc = sreloc->contents;
4989 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4990 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4991 ++sreloc->reloc_count;
4992
4993 /* If this reloc is against an external symbol, we do
4994 not want to fiddle with the addend. Otherwise, we
4995 need to include the symbol value so that it becomes
4996 an addend for the dynamic reloc. */
4997 if (!relocate)
4998 continue;
4999 }
5000 break;
5001
5002 case R_NDS32_25_ABS_RELA:
5003 if (info->shared)
5004 {
5005 (*_bfd_error_handler)
1c8f6a4d
KLC		 5006 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5007 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC		 5008 return FALSE;
5009 }
5010 break;
5011
5012 case R_NDS32_9_PCREL:
5013 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5014 contents, offset,
5015 sec, relocation, addend);
5016 goto check_reloc;
5017
5018 case R_NDS32_HI20:
5019 {
5020 Elf_Internal_Rela *lorel;
5021
5022 /* We allow an arbitrary number of HI20 relocs before the
5023 LO12 reloc. This permits gcc to emit the HI and LO relocs
5024 itself. */
5025 for (lorel = rel + 1;
5026 (lorel < relend
5027 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5028 continue;
5029 if (lorel < relend
5030 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5031 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5032 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5033 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5034 {
5035 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5036 contents, relocation + addend);
5037 r = bfd_reloc_ok;
5038 }
5039 else
5040 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 5041 contents, offset, relocation,
5042 addend);
35c08157
KLC		 5043 }
5044
5045 goto check_reloc;
5046
5047 case R_NDS32_GOT17S2_RELA:
5048 case R_NDS32_GOT15S2_RELA:
5049 {
5050 bfd_vma off;
5051
5052 BFD_ASSERT (sgot != NULL);
5053
5054 if (h != NULL)
5055 {
5056 bfd_boolean dyn;
5057
5058 off = h->got.offset;
5059 BFD_ASSERT (off != (bfd_vma) - 1);
5060
5061 dyn = htab->root.dynamic_sections_created;
5062 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5063 (dyn, info->shared, h) || (info->shared
5064 && (info->symbolic
5065 || h->dynindx == -1
5066 || h->forced_local)
5067 && h->def_regular))
5068 {
5069 /* This is actually a static link, or it is a
5070 -Bsymbolic link and the symbol is defined
5071 locally, or the symbol was forced to be local
5072 because of a version file. We must initialize
5073 this entry in the global offset table. Since the
5074 offset must always be a multiple of 4, we use the
5075 least significant bit to record whether we have
5076 initialized it already.
5077
5078 When doing a dynamic link, we create a .rela.got
5079 relocation entry to initialize the value. This
5080 is done in the finish_dynamic_symbol routine. */
5081 if ((off & 1) != 0)
5082 off &= ~1;
5083 else
5084 {
5085 bfd_put_32 (output_bfd, relocation,
5086 sgot->contents + off);
5087 h->got.offset |= 1;
5088 }
5089 }
5090 }
5091 else
5092 {
5093 bfd_byte *loc;
5094
5095 BFD_ASSERT (local_got_offsets != NULL
5096 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5097
5098 off = local_got_offsets[r_symndx];
5099
5100 /* The offset must always be a multiple of 4. We use
5101 the least significant bit to record whether we have
5102 already processed this entry. */
5103 if ((off & 1) != 0)
5104 off &= ~1;
5105 else
5106 {
5107 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5108
5109 if (info->shared)
5110 {
5111 asection *srelgot;
5112 Elf_Internal_Rela outrel;
5113
5114 /* We need to generate a R_NDS32_RELATIVE reloc
5115 for the dynamic linker. */
5116 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5117 BFD_ASSERT (srelgot != NULL);
5118
5119 outrel.r_offset = (elf_gp (output_bfd)
5120 + sgot->output_offset + off);
5121 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5122 outrel.r_addend = relocation;
5123 loc = srelgot->contents;
5124 loc +=
5125 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5126 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5127 ++srelgot->reloc_count;
5128 }
5129 local_got_offsets[r_symndx] |= 1;
5130 }
5131 }
5132 relocation = sgot->output_section->vma + sgot->output_offset + off
5133 - elf_gp (output_bfd);
5134 }
5135 if (relocation & align)
5136 {
5137 /* Incorrect alignment. */
5138 (*_bfd_error_handler)
5139 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5140 ret = FALSE;
5141 r = bfd_reloc_dangerous;
5142 goto check_reloc;
5143 }
5144 break;
5145
5146 case R_NDS32_SDA16S3_RELA:
5147 case R_NDS32_SDA15S3_RELA:
5148 case R_NDS32_SDA15S3:
5149 align = 0x7;
5150 goto handle_sda;
5151
5152 case R_NDS32_SDA17S2_RELA:
5153 case R_NDS32_SDA15S2_RELA:
5154 case R_NDS32_SDA12S2_SP_RELA:
5155 case R_NDS32_SDA12S2_DP_RELA:
5156 case R_NDS32_SDA15S2:
5157 case R_NDS32_SDA_FP7U2_RELA:
5158 align = 0x3;
5159 goto handle_sda;
5160
5161 case R_NDS32_SDA18S1_RELA:
5162 case R_NDS32_SDA15S1_RELA:
5163 case R_NDS32_SDA15S1:
5164 align = 0x1;
5165 goto handle_sda;
5166
5167 case R_NDS32_SDA19S0_RELA:
5168 case R_NDS32_SDA15S0_RELA:
5169 case R_NDS32_SDA15S0:
5170 {
5171 align = 0x0;
5172handle_sda:
5173 BFD_ASSERT (sec != NULL);
5174
5175 /* If the symbol is in the abs section, the out_bfd will be null.
5176 This happens when the relocation has a symbol@GOTOFF. */
5177 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5178 if (r != bfd_reloc_ok)
5179 {
5180 (*_bfd_error_handler)
5181 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5182 ret = FALSE;
5183 goto check_reloc;
5184 }
5185
5186 /* At this point `relocation' contains the object's
5187 address. */
5188 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5189 {
5190 relocation -= fpbase_addr;
5191 }
5192 else
5193 relocation -= gp;
5194 /* Now it contains the offset from _SDA_BASE_. */
5195
5196 /* Make sure alignment is correct. */
5197
5198 if (relocation & align)
5199 {
5200 /* Incorrect alignment. */
5201 (*_bfd_error_handler)
5202 (_("%B(%A): warning: unaligned small data access of type %d."),
5203 input_bfd, input_section, r_type);
5204 ret = FALSE;
5205 goto check_reloc;
5206 }
5207 }
5208
5209 break;
5210 case R_NDS32_17IFC_PCREL_RELA:
5211 case R_NDS32_10IFCU_PCREL_RELA:
5212 /* do nothing */
5213 break;
5214
1c8f6a4d
KLC		 5215 case R_NDS32_TLS_LE_HI20:
5216 case R_NDS32_TLS_LE_LO12:
5217 case R_NDS32_TLS_LE_20:
5218 case R_NDS32_TLS_LE_15S0:
5219 case R_NDS32_TLS_LE_15S1:
5220 case R_NDS32_TLS_LE_15S2:
5221 if (elf_hash_table (info)->tls_sec != NULL)
5222 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5223 break;
5224 case R_NDS32_TLS_IE_HI20:
5225 case R_NDS32_TLS_IE_LO12S2:
5226 {
5227 /* Relocation is to the entry for this symbol in the global
5228 offset table. */
5229 unsigned int tls_type;
5230 asection *srelgot;
5231 Elf_Internal_Rela outrel;
5232 bfd_vma off;
5233 bfd_byte *loc;
5234 int indx = 0;
5235
5236 BFD_ASSERT (sgot != NULL);
5237 if (h != NULL)
5238 {
5239 bfd_boolean dyn;
5240
5241 off = h->got.offset;
5242 BFD_ASSERT (off != (bfd_vma) - 1);
5243 dyn = htab->root.dynamic_sections_created;
5244 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5245 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5246 && (!info->shared
5247 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5248 indx = h->dynindx;
5249 }
5250 else
5251 {
5252 /* Never happen currently. */
5253 BFD_ASSERT (local_got_offsets != NULL
5254 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5255
5256 off = local_got_offsets[r_symndx];
5257
5258 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5259 }
5260 relocation = sgot->output_section->vma + sgot->output_offset + off;
5261
5262 if (r_type == R_NDS32_TLS_IE_LO12S2)
5263 break;
5264
5265 /* The offset must always be a multiple of 4. We use
5266 the least significant bit to record whether we have
5267 already processed this entry. */
5268 if ((off & 1) != 0)
5269 off &= ~1;
5270 else
5271 {
5272 bfd_boolean need_relocs = FALSE;
5273 srelgot = htab->srelgot;
5274 if ((info->shared || indx != 0)
5275 && (h == NULL
5276 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5277 || h->root.type != bfd_link_hash_undefweak))
5278 {
5279 need_relocs = TRUE;
5280 BFD_ASSERT (srelgot != NULL);
5281 }
5282 if (tls_type & GOT_TLS_IE)
5283 {
5284 if (need_relocs)
5285 {
5286 if (h->dynindx == 0)
5287 outrel.r_addend = relocation - dtpoff_base (info);
5288 else
5289 outrel.r_addend = 0;
5290 outrel.r_offset = (sgot->output_section->vma
5291 + sgot->output_offset
5292 + off);
5293 outrel.r_info =
5294 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5295
5296 loc = srelgot->contents;
5297 loc +=
5298 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5299 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5300 ++srelgot->reloc_count;
5301 }
5302 else
5303 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5304 sgot->contents + off);
5305 }
5306 }
5307 }
5308 break;
5309
35c08157
KLC		 5310 /* DON'T fall through. */
5311
5312 default:
5313 /* OLD_NDS32_RELOC. */
5314
5315 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5316 contents, offset, relocation, addend);
5317 goto check_reloc;
5318 }
5319
5320 switch ((int) r_type)
5321 {
5322 case R_NDS32_20_RELA:
5323 case R_NDS32_5_RELA:
5324 case R_NDS32_9_PCREL_RELA:
5325 case R_NDS32_WORD_9_PCREL_RELA:
5326 case R_NDS32_10_UPCREL_RELA:
5327 case R_NDS32_15_PCREL_RELA:
5328 case R_NDS32_17_PCREL_RELA:
5329 case R_NDS32_25_PCREL_RELA:
5330 case R_NDS32_25_ABS_RELA:
5331 case R_NDS32_HI20_RELA:
5332 case R_NDS32_LO12S3_RELA:
5333 case R_NDS32_LO12S2_RELA:
5334 case R_NDS32_LO12S2_DP_RELA:
5335 case R_NDS32_LO12S2_SP_RELA:
5336 case R_NDS32_LO12S1_RELA:
5337 case R_NDS32_LO12S0_RELA:
5338 case R_NDS32_LO12S0_ORI_RELA:
5339 case R_NDS32_SDA16S3_RELA:
5340 case R_NDS32_SDA17S2_RELA:
5341 case R_NDS32_SDA18S1_RELA:
5342 case R_NDS32_SDA19S0_RELA:
5343 case R_NDS32_SDA15S3_RELA:
5344 case R_NDS32_SDA15S2_RELA:
5345 case R_NDS32_SDA12S2_DP_RELA:
5346 case R_NDS32_SDA12S2_SP_RELA:
5347 case R_NDS32_SDA15S1_RELA:
5348 case R_NDS32_SDA15S0_RELA:
5349 case R_NDS32_SDA_FP7U2_RELA:
5350 case R_NDS32_9_PLTREL:
5351 case R_NDS32_25_PLTREL:
5352 case R_NDS32_GOT20:
5353 case R_NDS32_GOT_HI20:
5354 case R_NDS32_GOT_LO12:
5355 case R_NDS32_GOT_LO15:
5356 case R_NDS32_GOT_LO19:
5357 case R_NDS32_GOT15S2_RELA:
5358 case R_NDS32_GOT17S2_RELA:
5359 case R_NDS32_GOTPC20:
5360 case R_NDS32_GOTPC_HI20:
5361 case R_NDS32_GOTPC_LO12:
5362 case R_NDS32_GOTOFF:
5363 case R_NDS32_GOTOFF_HI20:
5364 case R_NDS32_GOTOFF_LO12:
5365 case R_NDS32_GOTOFF_LO15:
5366 case R_NDS32_GOTOFF_LO19:
5367 case R_NDS32_PLTREL_HI20:
5368 case R_NDS32_PLTREL_LO12:
5369 case R_NDS32_PLT_GOTREL_HI20:
5370 case R_NDS32_PLT_GOTREL_LO12:
5371 case R_NDS32_PLT_GOTREL_LO15:
5372 case R_NDS32_PLT_GOTREL_LO19:
5373 case R_NDS32_PLT_GOTREL_LO20:
5374 case R_NDS32_17IFC_PCREL_RELA:
5375 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5376 case R_NDS32_TLS_LE_HI20:
5377 case R_NDS32_TLS_LE_LO12:
5378 case R_NDS32_TLS_IE_HI20:
5379 case R_NDS32_TLS_IE_LO12S2:
5380 case R_NDS32_TLS_LE_20:
5381 case R_NDS32_TLS_LE_15S0:
5382 case R_NDS32_TLS_LE_15S1:
5383 case R_NDS32_TLS_LE_15S2:
35c08157 5384 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5385 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5386 r = nds32_elf_final_link_relocate (howto, input_bfd,
5387 input_section, contents,
5388 rel->r_offset, relocation,
5389 rel->r_addend);
5390 break;
5391
5392 default:
5393 /* All other relocs can use default handler. */
5394 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5395 contents, rel->r_offset,
5396 relocation, rel->r_addend);
5397 break;
5398 }
5399
5400check_reloc:
5401
5402 if (r != bfd_reloc_ok)
5403 {
5404 /* FIXME: This should be generic enough to go in a utility. */
5405 const char *name;
5406
5407 if (h != NULL)
5408 name = h->root.root.string;
5409 else
5410 {
5411 name = bfd_elf_string_from_elf_section
5412 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5413 if (name == NULL || *name == '\0')
5414 name = bfd_section_name (input_bfd, sec);
5415 }
5416
5417 if (errmsg != NULL)
5418 goto common_error;
5419
5420 switch (r)
5421 {
5422 case bfd_reloc_overflow:
5423 if (!((*info->callbacks->reloc_overflow)
5424 (info, (h ? &h->root : NULL), name, howto->name,
5425 (bfd_vma) 0, input_bfd, input_section, offset)))
5426 return FALSE;
5427 break;
5428
5429 case bfd_reloc_undefined:
5430 if (!((*info->callbacks->undefined_symbol)
5431 (info, name, input_bfd, input_section, offset, TRUE)))
5432 return FALSE;
5433 break;
5434
5435 case bfd_reloc_outofrange:
5436 errmsg = _("internal error: out of range error");
5437 goto common_error;
5438
5439 case bfd_reloc_notsupported:
5440 errmsg = _("internal error: unsupported relocation error");
5441 goto common_error;
5442
5443 case bfd_reloc_dangerous:
5444 errmsg = _("internal error: dangerous error");
5445 goto common_error;
5446
5447 default:
5448 errmsg = _("internal error: unknown error");
5449 /* Fall through. */
5450
5451common_error:
5452 if (!((*info->callbacks->warning)
5453 (info, errmsg, name, input_bfd, input_section, offset)))
5454 return FALSE;
5455 break;
5456 }
5457 }
5458 }
5459
5460 return ret;
5461}
5462
5463/* Finish up dynamic symbol handling. We set the contents of various
5464 dynamic sections here. */
5465
5466static bfd_boolean
5467nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5468 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5469{
5470 struct elf_nds32_link_hash_table *htab;
5471 bfd_byte *loc;
5472
5473 htab = nds32_elf_hash_table (info);
5474
5475 if (h->plt.offset != (bfd_vma) - 1)
5476 {
5477 asection *splt;
5478 asection *sgot;
5479 asection *srela;
5480
5481 bfd_vma plt_index;
5482 bfd_vma got_offset;
5483 bfd_vma local_plt_offset;
5484 Elf_Internal_Rela rela;
5485
5486 /* This symbol has an entry in the procedure linkage table. Set
5487 it up. */
5488
5489 BFD_ASSERT (h->dynindx != -1);
5490
5491 splt = htab->splt;
5492 sgot = htab->sgotplt;
5493 srela = htab->srelplt;
5494 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5495
5496 /* Get the index in the procedure linkage table which
5497 corresponds to this symbol. This is the index of this symbol
5498 in all the symbols for which we are making plt entries. The
5499 first entry in the procedure linkage table is reserved. */
5500 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5501
5502 /* Get the offset into the .got table of the entry that
5503 corresponds to this function. Each .got entry is 4 bytes.
5504 The first three are reserved. */
5505 got_offset = (plt_index + 3) * 4;
5506
5507 /* Fill in the entry in the procedure linkage table. */
5508 if (!info->shared)
5509 {
5510 unsigned long insn;
5511
5512 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5513 + sgot->output_offset + got_offset) >> 12)
5514 & 0xfffff);
5515 bfd_putb32 (insn, splt->contents + h->plt.offset);
5516
5517 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5518 + sgot->output_offset + got_offset) & 0x0fff)
5519 >> 2);
5520 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5521
5522 insn = PLT_ENTRY_WORD2;
5523 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5524
5525 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5526 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5527
5528 insn = PLT_ENTRY_WORD4
5529 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5530 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5531 local_plt_offset = 12;
5532 }
5533 else
5534 {
5535 /* sda_base must be set at this time. */
5536 unsigned long insn;
5537 long offset;
5538
5539 /* FIXME, sda_base is 65536, it will damage opcode. */
5540 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5541 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5542 - elf_gp (output_bfd);
5543 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5544 bfd_putb32 (insn, splt->contents + h->plt.offset);
5545
5546 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5547 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5548
5549 insn = PLT_PIC_ENTRY_WORD2;
5550 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5551
5552 insn = PLT_PIC_ENTRY_WORD3;
5553 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5554
5555 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5556 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5557
5558 insn = PLT_PIC_ENTRY_WORD5
5559 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5560 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5561
5562 local_plt_offset = 16;
5563 }
5564
5565 /* Fill in the entry in the global offset table,
5566 so it will fall through to the next instruction for the first time. */
5567 bfd_put_32 (output_bfd,
5568 (splt->output_section->vma + splt->output_offset
5569 + h->plt.offset + local_plt_offset),
5570 sgot->contents + got_offset);
5571
5572 /* Fill in the entry in the .rela.plt section. */
5573 rela.r_offset = (sgot->output_section->vma
5574 + sgot->output_offset + got_offset);
5575 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5576 rela.r_addend = 0;
5577 loc = srela->contents;
5578 loc += plt_index * sizeof (Elf32_External_Rela);
5579 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5580
5581 if (!h->def_regular)
5582 {
5583 /* Mark the symbol as undefined, rather than as defined in
5584 the .plt section. Leave the value alone. */
5585 sym->st_shndx = SHN_UNDEF;
5586 if (!h->ref_regular_nonweak)
5587 sym->st_value = 0;
5588 }
5589 }
5590
5591 if (h->got.offset != (bfd_vma) - 1)
5592 {
5593 asection *sgot;
5594 asection *srela;
5595 Elf_Internal_Rela rela;
5596
5597 /* This symbol has an entry in the global offset table.
5598 Set it up. */
5599
5600 sgot = htab->sgot;
5601 srela = htab->srelgot;
5602 BFD_ASSERT (sgot != NULL && srela != NULL);
5603
5604 rela.r_offset = (sgot->output_section->vma
5605 + sgot->output_offset + (h->got.offset & ~1));
5606
5607 /* If this is a -Bsymbolic link, and the symbol is defined
5608 locally, we just want to emit a RELATIVE reloc. Likewise if
5609 the symbol was forced to be local because of a version file.
5610 The entry in the global offset table will already have been
5611 initialized in the relocate_section function. */
5612 if (info->shared
5613 && (info->symbolic
5614 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5615 {
5616 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5617 rela.r_addend = (h->root.u.def.value
5618 + h->root.u.def.section->output_section->vma
5619 + h->root.u.def.section->output_offset);
5620 }
5621 else
5622 {
5623 BFD_ASSERT ((h->got.offset & 1) == 0);
5624 bfd_put_32 (output_bfd, (bfd_vma) 0,
5625 sgot->contents + h->got.offset);
5626 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5627 rela.r_addend = 0;
5628 }
5629
5630 loc = srela->contents;
5631 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5632 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5633 ++srela->reloc_count;
5634 }
5635
5636 if (h->needs_copy)
5637 {
5638 asection *s;
5639 Elf_Internal_Rela rela;
5640
5641 /* This symbols needs a copy reloc. Set it up. */
5642
5643 BFD_ASSERT (h->dynindx != -1
5644 && (h->root.type == bfd_link_hash_defined
5645 || h->root.type == bfd_link_hash_defweak));
5646
5647 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5648 BFD_ASSERT (s != NULL);
5649
5650 rela.r_offset = (h->root.u.def.value
5651 + h->root.u.def.section->output_section->vma
5652 + h->root.u.def.section->output_offset);
5653 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5654 rela.r_addend = 0;
5655 loc = s->contents;
5656 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5657 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5658 ++s->reloc_count;
5659 }
5660
5661 /* Mark some specially defined symbols as absolute. */
5662 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5663 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5664 sym->st_shndx = SHN_ABS;
5665
5666 return TRUE;
5667}
5668
5669
5670/* Finish up the dynamic sections. */
5671
5672static bfd_boolean
5673nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5674{
5675 struct elf_nds32_link_hash_table *htab;
5676 bfd *dynobj;
5677 asection *sdyn;
5678 asection *sgot;
5679
5680 htab = nds32_elf_hash_table (info);
5681 dynobj = htab->root.dynobj;
5682
5683 sgot = htab->sgotplt;
5684 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5685
5686 if (htab->root.dynamic_sections_created)
5687 {
5688 asection *splt;
5689 Elf32_External_Dyn *dyncon, *dynconend;
5690
5691 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5692
5693 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5694 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5695
5696 for (; dyncon < dynconend; dyncon++)
5697 {
5698 Elf_Internal_Dyn dyn;
5699 asection *s;
5700
5701 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5702
5703 switch (dyn.d_tag)
5704 {
5705 default:
5706 break;
5707
5708 case DT_PLTGOT:
5709 /* name = ".got"; */
5710 s = htab->sgot->output_section;
5711 goto get_vma;
5712 case DT_JMPREL:
5713 s = htab->srelplt->output_section;
5714 get_vma:
5715 BFD_ASSERT (s != NULL);
5716 dyn.d_un.d_ptr = s->vma;
5717 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5718 break;
5719
5720 case DT_PLTRELSZ:
5721 s = htab->srelplt->output_section;
5722 BFD_ASSERT (s != NULL);
5723 dyn.d_un.d_val = s->size;
5724 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5725 break;
5726
5727 case DT_RELASZ:
5728 /* My reading of the SVR4 ABI indicates that the
5729 procedure linkage table relocs (DT_JMPREL) should be
5730 included in the overall relocs (DT_RELA). This is
5731 what Solaris does. However, UnixWare can not handle
5732 that case. Therefore, we override the DT_RELASZ entry
5733 here to make it not include the JMPREL relocs. Since
5734 the linker script arranges for .rela.plt to follow all
5735 other relocation sections, we don't have to worry
5736 about changing the DT_RELA entry. */
5737 if (htab->srelplt != NULL)
5738 {
5739 s = htab->srelplt->output_section;
5740 dyn.d_un.d_val -= s->size;
5741 }
5742 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5743 break;
5744 }
5745 }
5746
5747 /* Fill in the first entry in the procedure linkage table. */
5748 splt = htab->splt;
5749 if (splt && splt->size > 0)
5750 {
5751 if (info->shared)
5752 {
5753 unsigned long insn;
5754 long offset;
5755
5756 /* FIXME, sda_base is 65536, it will damage opcode. */
5757 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5758 offset = sgot->output_section->vma + sgot->output_offset + 4
5759 - elf_gp (output_bfd);
5760 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5761 bfd_putb32 (insn, splt->contents);
5762
5763 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5764 /* here has a typo? */
5765 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5766 bfd_putb32 (insn, splt->contents + 4);
5767
5768 insn = PLT0_PIC_ENTRY_WORD2;
5769 bfd_putb32 (insn, splt->contents + 8);
5770
5771 insn = PLT0_PIC_ENTRY_WORD3;
5772 bfd_putb32 (insn, splt->contents + 12);
5773
5774 insn = PLT0_PIC_ENTRY_WORD4;
5775 bfd_putb32 (insn, splt->contents + 16);
5776
5777 insn = PLT0_PIC_ENTRY_WORD5;
5778 bfd_putb32 (insn, splt->contents + 20);
5779 }
5780 else
5781 {
5782 unsigned long insn;
5783 unsigned long addr;
5784
5785 /* addr = .got + 4 */
5786 addr = sgot->output_section->vma + sgot->output_offset + 4;
5787 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5788 bfd_putb32 (insn, splt->contents);
5789
5790 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5791 bfd_putb32 (insn, splt->contents + 4);
5792
5793 insn = PLT0_ENTRY_WORD2;
5794 bfd_putb32 (insn, splt->contents + 8);
5795
5796 insn = PLT0_ENTRY_WORD3;
5797 bfd_putb32 (insn, splt->contents + 12);
5798
5799 insn = PLT0_ENTRY_WORD4;
5800 bfd_putb32 (insn, splt->contents + 16);
5801 }
5802
5803 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5804 PLT_ENTRY_SIZE;
5805 }
5806 }
5807
5808 /* Fill in the first three entries in the global offset table. */
5809 if (sgot && sgot->size > 0)
5810 {
5811 if (sdyn == NULL)
5812 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5813 else
5814 bfd_put_32 (output_bfd,
5815 sdyn->output_section->vma + sdyn->output_offset,
5816 sgot->contents);
5817 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5818 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5819
5820 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5821 }
5822
5823 return TRUE;
5824}
5825\f
5826
5827/* Set the right machine number. */
5828
5829static bfd_boolean
5830nds32_elf_object_p (bfd *abfd)
5831{
5832 static unsigned int cur_arch = 0;
5833
5834 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5835 {
5836 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5837 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5838 }
5839
5840 switch (cur_arch)
5841 {
5842 default:
5843 case E_N1_ARCH:
5844 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5845 break;
5846 case E_N1H_ARCH:
5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5848 break;
5849 case E_NDS_ARCH_STAR_V2_0:
5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5851 break;
5852 case E_NDS_ARCH_STAR_V3_0:
5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5854 break;
5855 case E_NDS_ARCH_STAR_V3_M:
5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5857 break;
5858 }
5859
5860 return TRUE;
5861}
5862
5863/* Store the machine number in the flags field. */
5864
5865static void
5866nds32_elf_final_write_processing (bfd *abfd,
5867 bfd_boolean linker ATTRIBUTE_UNUSED)
5868{
5869 unsigned long val;
5870 static unsigned int cur_mach = 0;
5871
5872 if (bfd_mach_n1 != bfd_get_mach (abfd))
5873 {
5874 cur_mach = bfd_get_mach (abfd);
5875 }
5876
5877 switch (cur_mach)
5878 {
5879 case bfd_mach_n1:
5880 /* Only happen when object is empty, since the case is abandon. */
5881 val = E_N1_ARCH;
5882 val |= E_NDS_ABI_AABI;
5883 val |= E_NDS32_ELF_VER_1_4;
5884 break;
5885 case bfd_mach_n1h:
5886 val = E_N1H_ARCH;
5887 break;
5888 case bfd_mach_n1h_v2:
5889 val = E_NDS_ARCH_STAR_V2_0;
5890 break;
5891 case bfd_mach_n1h_v3:
5892 val = E_NDS_ARCH_STAR_V3_0;
5893 break;
5894 case bfd_mach_n1h_v3m:
5895 val = E_NDS_ARCH_STAR_V3_M;
5896 break;
5897 default:
5898 val = 0;
5899 break;
5900 }
5901
5902 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5903 elf_elfheader (abfd)->e_flags |= val;
5904}
5905
5906/* Function to keep NDS32 specific file flags. */
5907
5908static bfd_boolean
5909nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5910{
5911 BFD_ASSERT (!elf_flags_init (abfd)
5912 || elf_elfheader (abfd)->e_flags == flags);
5913
5914 elf_elfheader (abfd)->e_flags = flags;
5915 elf_flags_init (abfd) = TRUE;
5916 return TRUE;
5917}
5918
5919static unsigned int
5920convert_e_flags (unsigned int e_flags, unsigned int arch)
5921{
5922 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5923 {
5924 /* From 0.9 to 1.0. */
5925 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5926
5927 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5928 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5929 if (arch == E_NDS_ARCH_STAR_V1_0)
5930 {
5931 /* Done. */
5932 return e_flags;
5933 }
5934 }
5935
5936 /* From 1.0 to 2.0. */
5937 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5938
5939 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5940 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5941
5942 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5943 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5944 return e_flags;
5945}
5946
5947static bfd_boolean
5948nds32_check_vec_size (bfd *ibfd)
5949{
5950 static unsigned int nds32_vec_size = 0;
5951
5952 asection *sec_t = NULL;
5953 bfd_byte *contents = NULL;
5954
5955 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5956
5957 if (sec_t && sec_t->size >= 4)
5958 {
5959 /* Get vec_size in file. */
5960 unsigned int flag_t;
5961
0c4bd9d9 5962 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5963 flag_t = bfd_get_32 (ibfd, contents);
5964
5965 /* The value could only be 4 or 16. */
5966
5967 if (!nds32_vec_size)
5968 /* Set if not set yet. */
5969 nds32_vec_size = (flag_t & 0x3);
5970 else if (nds32_vec_size != (flag_t & 0x3))
5971 {
5972 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5973 " with previous modules, previous %u-byte, current %u-byte"),
5974 ibfd,
5975 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5976 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5977 return FALSE;
5978 }
5979 else
5980 /* Only keep the first vec_size section. */
5981 sec_t->flags |= SEC_EXCLUDE;
5982 }
5983
5984 return TRUE;
5985}
5986
5987/* Merge backend specific data from an object file to the output
5988 object file when linking. */
5989
5990static bfd_boolean
5991nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5992{
5993 flagword out_flags;
5994 flagword in_flags;
5995 flagword out_16regs;
5996 flagword in_no_mac;
5997 flagword out_no_mac;
5998 flagword in_16regs;
5999 flagword out_version;
6000 flagword in_version;
6001 flagword out_fpu_config;
6002 flagword in_fpu_config;
6003
6004 /* TODO: Revise to use object-attributes instead. */
6005 if (!nds32_check_vec_size (ibfd))
6006 return FALSE;
6007
6008 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6009 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6010 return TRUE;
6011
6012 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6013 {
6014 (*_bfd_error_handler)
6015 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6016
6017 bfd_set_error (bfd_error_bad_value);
6018 return FALSE;
6019 }
6020
6021 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6022 if (in_version == E_NDS32_ELF_VER_1_2)
6023 {
6024 (*_bfd_error_handler)
6025 (_("%B: warning: Older version of object file encountered, "
6026 "Please recompile with current tool chain."), ibfd);
6027 }
6028
6029 /* We may need to merge V1 and V2 arch object files to V2. */
6030 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6031 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6032 {
6033 /* Need to convert version. */
6034 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6035 == E_NDS_ARCH_STAR_RESERVED)
6036 {
6037 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6038 }
6039 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6040 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6041 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6042 {
6043 elf_elfheader (obfd)->e_flags =
6044 convert_e_flags (elf_elfheader (obfd)->e_flags,
6045 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6046 }
6047 else
6048 {
6049 elf_elfheader (ibfd)->e_flags =
6050 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6051 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6052 }
6053 }
6054
6055 /* Extract some flags. */
6056 in_flags = elf_elfheader (ibfd)->e_flags
6057 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6058 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6059
6060 /* The following flags need special treatment. */
6061 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6062 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6063 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6064
6065 /* Extract some flags. */
6066 out_flags = elf_elfheader (obfd)->e_flags
6067 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6068 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6069
6070 /* The following flags need special treatment. */
6071 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6072 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6073 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6074 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6075 if (!elf_flags_init (obfd))
6076 {
6077 /* If the input is the default architecture then do not
6078 bother setting the flags for the output architecture,
6079 instead allow future merges to do this. If no future
6080 merges ever set these flags then they will retain their
6081 unitialised values, which surprise surprise, correspond
6082 to the default values. */
6083 if (bfd_get_arch_info (ibfd)->the_default)
6084 return TRUE;
6085
6086 elf_flags_init (obfd) = TRUE;
6087 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6088
6089 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6090 && bfd_get_arch_info (obfd)->the_default)
6091 {
6092 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6093 bfd_get_mach (ibfd));
6094 }
6095
6096 return TRUE;
6097 }
6098
6099 /* Check flag compatibility. */
6100 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6101 {
6102 (*_bfd_error_handler)
6103 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6104
6105 bfd_set_error (bfd_error_bad_value);
6106 return FALSE;
6107 }
6108
6109 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6110 {
6111 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6112 {
6113 (*_bfd_error_handler)
6114 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6115
6116 bfd_set_error (bfd_error_bad_value);
6117 return FALSE;
6118 }
6119 }
6120
6121 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6122 and perf ext1 and DIV are mergerd to perf ext1. */
6123 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6124 {
6125 elf_elfheader (obfd)->e_flags =
6126 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6127 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6128 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6129 ? E_NDS32_HAS_EXT_INST : 0)
6130 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6131 ? E_NDS32_HAS_EXT_INST : 0)
6132 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6133 | ((in_version > out_version) ? out_version : in_version);
6134 }
6135 else
6136 {
6137 if (in_version != out_version)
6138 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6139 ibfd, nds32_elfver_strtab[out_version],
6140 nds32_elfver_strtab[in_version]);
6141
6142 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6143 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6144 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6145 | (in_version > out_version ? out_version : in_version);
6146 }
6147
6148 return TRUE;
6149}
6150
6151/* Display the flags field. */
6152
6153static bfd_boolean
6154nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6155{
6156 FILE *file = (FILE *) ptr;
6157
6158 BFD_ASSERT (abfd != NULL && ptr != NULL);
6159
6160 _bfd_elf_print_private_bfd_data (abfd, ptr);
6161
6162 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6163
6164 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6165 {
6166 default:
6167 case E_N1_ARCH:
6168 fprintf (file, _(": n1 instructions"));
6169 break;
6170 case E_N1H_ARCH:
6171 fprintf (file, _(": n1h instructions"));
6172 break;
6173 }
6174
6175 fputc ('\n', file);
6176
6177 return TRUE;
6178}
6179
6180static unsigned int
6181nds32_elf_action_discarded (asection *sec)
6182{
6183
6184 if (strncmp
6185 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6186 return 0;
6187
6188 return _bfd_elf_default_action_discarded (sec);
6189}
6190
6191static asection *
6192nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6193 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6194 Elf_Internal_Sym *sym)
6195{
6196 if (h != NULL)
6197 switch (ELF32_R_TYPE (rel->r_info))
6198 {
6199 case R_NDS32_GNU_VTINHERIT:
6200 case R_NDS32_GNU_VTENTRY:
6201 case R_NDS32_RELA_GNU_VTINHERIT:
6202 case R_NDS32_RELA_GNU_VTENTRY:
6203 return NULL;
6204 }
6205
6206 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6207}
6208
6209static bfd_boolean
6210nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6211 const Elf_Internal_Rela *relocs)
6212{
6213 /* Update the got entry reference counts for the section being removed. */
6214 Elf_Internal_Shdr *symtab_hdr;
6215 struct elf_link_hash_entry **sym_hashes;
6216 bfd_signed_vma *local_got_refcounts;
6217 const Elf_Internal_Rela *rel, *relend;
6218
6219 elf_section_data (sec)->local_dynrel = NULL;
6220
6221 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6222 sym_hashes = elf_sym_hashes (abfd);
6223 local_got_refcounts = elf_local_got_refcounts (abfd);
6224
6225 relend = relocs + sec->reloc_count;
6226 for (rel = relocs; rel < relend; rel++)
6227 {
6228 unsigned long r_symndx;
6229 struct elf_link_hash_entry *h = NULL;
6230
6231 r_symndx = ELF32_R_SYM (rel->r_info);
6232 if (r_symndx >= symtab_hdr->sh_info)
6233 {
6234 /* External symbol. */
6235 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6236 while (h->root.type == bfd_link_hash_indirect
6237 || h->root.type == bfd_link_hash_warning)
6238 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6239 }
6240
6241 switch (ELF32_R_TYPE (rel->r_info))
6242 {
6243 case R_NDS32_GOT_HI20:
6244 case R_NDS32_GOT_LO12:
6245 case R_NDS32_GOT_LO15:
6246 case R_NDS32_GOT_LO19:
6247 case R_NDS32_GOT17S2_RELA:
6248 case R_NDS32_GOT15S2_RELA:
6249 case R_NDS32_GOTOFF:
6250 case R_NDS32_GOTOFF_HI20:
6251 case R_NDS32_GOTOFF_LO12:
6252 case R_NDS32_GOTOFF_LO15:
6253 case R_NDS32_GOTOFF_LO19:
6254 case R_NDS32_GOT20:
6255 case R_NDS32_GOTPC_HI20:
6256 case R_NDS32_GOTPC_LO12:
6257 case R_NDS32_GOTPC20:
6258 if (h != NULL)
6259 {
6260 if (h->got.refcount > 0)
6261 h->got.refcount--;
6262 }
6263 else
6264 {
6265 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6266 local_got_refcounts[r_symndx]--;
6267 }
6268 break;
6269
6270 case R_NDS32_16_RELA:
6271 case R_NDS32_20_RELA:
6272 case R_NDS32_5_RELA:
6273 case R_NDS32_32_RELA:
6274 case R_NDS32_HI20_RELA:
6275 case R_NDS32_LO12S3_RELA:
6276 case R_NDS32_LO12S2_RELA:
6277 case R_NDS32_LO12S2_DP_RELA:
6278 case R_NDS32_LO12S2_SP_RELA:
6279 case R_NDS32_LO12S1_RELA:
6280 case R_NDS32_LO12S0_RELA:
6281 case R_NDS32_LO12S0_ORI_RELA:
6282 case R_NDS32_SDA16S3_RELA:
6283 case R_NDS32_SDA17S2_RELA:
6284 case R_NDS32_SDA18S1_RELA:
6285 case R_NDS32_SDA19S0_RELA:
6286 case R_NDS32_SDA15S3_RELA:
6287 case R_NDS32_SDA15S2_RELA:
6288 case R_NDS32_SDA12S2_DP_RELA:
6289 case R_NDS32_SDA12S2_SP_RELA:
6290 case R_NDS32_SDA15S1_RELA:
6291 case R_NDS32_SDA15S0_RELA:
6292 case R_NDS32_SDA_FP7U2_RELA:
6293 case R_NDS32_15_PCREL_RELA:
6294 case R_NDS32_17_PCREL_RELA:
6295 case R_NDS32_25_PCREL_RELA:
6296 if (h != NULL)
6297 {
6298 struct elf_nds32_link_hash_entry *eh;
6299 struct elf_nds32_dyn_relocs **pp;
6300 struct elf_nds32_dyn_relocs *p;
6301
6302 if (!info->shared && h->plt.refcount > 0)
6303 h->plt.refcount -= 1;
6304
6305 eh = (struct elf_nds32_link_hash_entry *) h;
6306
6307 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6308 if (p->sec == sec)
6309 {
6310 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6311 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6312 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6313 p->pc_count -= 1;
6314 p->count -= 1;
6315 if (p->count == 0)
6316 *pp = p->next;
6317 break;
6318 }
6319 }
6320 break;
6321
6322 case R_NDS32_9_PLTREL:
6323 case R_NDS32_25_PLTREL:
6324 if (h != NULL)
6325 {
6326 if (h->plt.refcount > 0)
6327 h->plt.refcount--;
6328 }
6329 break;
6330
6331 default:
6332 break;
6333 }
6334 }
6335
6336 return TRUE;
6337}
6338
6339/* Look through the relocs for a section during the first phase.
6340 Since we don't do .gots or .plts, we just need to consider the
6341 virtual table relocs for gc. */
6342
6343static bfd_boolean
6344nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6345 asection *sec, const Elf_Internal_Rela *relocs)
6346{
6347 Elf_Internal_Shdr *symtab_hdr;
6348 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6349 const Elf_Internal_Rela *rel;
6350 const Elf_Internal_Rela *rel_end;
6351 struct elf_nds32_link_hash_table *htab;
6352 bfd *dynobj;
6353 asection *sreloc = NULL;
6354
6355 if (info->relocatable)
6356 return TRUE;
6357
6358 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6359 sym_hashes = elf_sym_hashes (abfd);
6360 sym_hashes_end =
6361 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6362 if (!elf_bad_symtab (abfd))
6363 sym_hashes_end -= symtab_hdr->sh_info;
6364
6365 htab = nds32_elf_hash_table (info);
6366 dynobj = htab->root.dynobj;
6367
6368 rel_end = relocs + sec->reloc_count;
6369 for (rel = relocs; rel < rel_end; rel++)
6370 {
6371 enum elf_nds32_reloc_type r_type;
6372 struct elf_link_hash_entry *h;
6373 unsigned long r_symndx;
1c8f6a4d 6374 int tls_type, old_tls_type;
35c08157
KLC		 6375
6376 r_symndx = ELF32_R_SYM (rel->r_info);
6377 r_type = ELF32_R_TYPE (rel->r_info);
6378 if (r_symndx < symtab_hdr->sh_info)
6379 h = NULL;
6380 else
6381 {
6382 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6383 while (h->root.type == bfd_link_hash_indirect
6384 || h->root.type == bfd_link_hash_warning)
6385 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6386 }
6387
1c8f6a4d
KLC		 6388 /* Some relocs require a global offset table. We create
6389 got section here, since these relocation need got section
6390 and it is not created yet. */
35c08157
KLC		 6391 if (htab->sgot == NULL)
6392 {
6393 switch (r_type)
6394 {
6395 case R_NDS32_GOT_HI20:
6396 case R_NDS32_GOT_LO12:
6397 case R_NDS32_GOT_LO15:
6398 case R_NDS32_GOT_LO19:
6399 case R_NDS32_GOT17S2_RELA:
6400 case R_NDS32_GOT15S2_RELA:
6401 case R_NDS32_GOTOFF:
6402 case R_NDS32_GOTOFF_HI20:
6403 case R_NDS32_GOTOFF_LO12:
6404 case R_NDS32_GOTOFF_LO15:
6405 case R_NDS32_GOTOFF_LO19:
6406 case R_NDS32_GOTPC20:
6407 case R_NDS32_GOTPC_HI20:
6408 case R_NDS32_GOTPC_LO12:
6409 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6410 case R_NDS32_TLS_IE_HI20:
6411 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6412 if (dynobj == NULL)
6413 htab->root.dynobj = dynobj = abfd;
6414 if (!create_got_section (dynobj, info))
6415 return FALSE;
6416 break;
6417
6418 default:
6419 break;
6420 }
6421 }
6422
6423 switch ((int) r_type)
6424 {
6425 case R_NDS32_GOT_HI20:
6426 case R_NDS32_GOT_LO12:
6427 case R_NDS32_GOT_LO15:
6428 case R_NDS32_GOT_LO19:
6429 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6430 case R_NDS32_TLS_IE_HI20:
6431 case R_NDS32_TLS_IE_LO12S2:
6432 switch (r_type)
6433 {
6434 case R_NDS32_TLS_IE_HI20:
6435 case R_NDS32_TLS_IE_LO12S2:
6436 tls_type = GOT_TLS_IE;
6437 break;
6438 default:
6439 tls_type = GOT_NORMAL;
6440 break;
6441 }
35c08157 6442 if (h != NULL)
1c8f6a4d
KLC		 6443 {
6444 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6445 h->got.refcount += 1;
6446 }
35c08157
KLC		 6447 else
6448 {
6449 bfd_signed_vma *local_got_refcounts;
6450
6451 /* This is a global offset table entry for a local
6452 symbol. */
6453 local_got_refcounts = elf_local_got_refcounts (abfd);
6454 if (local_got_refcounts == NULL)
6455 {
6456 bfd_size_type size;
6457
6458 size = symtab_hdr->sh_info;
6459 size *= sizeof (bfd_signed_vma);
6460 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6461 if (local_got_refcounts == NULL)
6462 return FALSE;
6463 elf_local_got_refcounts (abfd) = local_got_refcounts;
6464 }
6465 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6466 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6467 }
35c08157 6468
1c8f6a4d
KLC		 6469 /* We will already have issued an error message if there
6470 is a TLS/non-TLS mismatch, based on the symbol
6471 type. So just combine any TLS types needed. */
6472 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6473 && tls_type != GOT_NORMAL)
6474 tls_type |= old_tls_type;
6475
6476 if (old_tls_type != tls_type)
6477 {
6478 if (h != NULL)
6479 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6480 else
6481 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6482 }
6483 break;
6484 case R_NDS32_9_PLTREL:
35c08157
KLC		 6485 case R_NDS32_25_PLTREL:
6486 case R_NDS32_PLTREL_HI20:
6487 case R_NDS32_PLTREL_LO12:
6488 case R_NDS32_PLT_GOTREL_HI20:
6489 case R_NDS32_PLT_GOTREL_LO12:
6490 case R_NDS32_PLT_GOTREL_LO15:
6491 case R_NDS32_PLT_GOTREL_LO19:
6492 case R_NDS32_PLT_GOTREL_LO20:
6493
6494 /* This symbol requires a procedure linkage table entry. We
6495 actually build the entry in adjust_dynamic_symbol,
6496 because this might be a case of linking PIC code without
6497 linking in any dynamic objects, in which case we don't
6498 need to generate a procedure linkage table after all. */
6499
6500 /* If this is a local symbol, we resolve it directly without
6501 creating a procedure linkage table entry. */
6502 if (h == NULL)
6503 continue;
6504
6505 if (h->forced_local)
6506 break;
6507
1c8f6a4d 6508 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6509 h->needs_plt = 1;
6510 h->plt.refcount += 1;
6511 break;
6512
6513 case R_NDS32_16_RELA:
6514 case R_NDS32_20_RELA:
6515 case R_NDS32_5_RELA:
6516 case R_NDS32_32_RELA:
6517 case R_NDS32_HI20_RELA:
6518 case R_NDS32_LO12S3_RELA:
6519 case R_NDS32_LO12S2_RELA:
6520 case R_NDS32_LO12S2_DP_RELA:
6521 case R_NDS32_LO12S2_SP_RELA:
6522 case R_NDS32_LO12S1_RELA:
6523 case R_NDS32_LO12S0_RELA:
6524 case R_NDS32_LO12S0_ORI_RELA:
6525 case R_NDS32_SDA16S3_RELA:
6526 case R_NDS32_SDA17S2_RELA:
6527 case R_NDS32_SDA18S1_RELA:
6528 case R_NDS32_SDA19S0_RELA:
6529 case R_NDS32_SDA15S3_RELA:
6530 case R_NDS32_SDA15S2_RELA:
6531 case R_NDS32_SDA12S2_DP_RELA:
6532 case R_NDS32_SDA12S2_SP_RELA:
6533 case R_NDS32_SDA15S1_RELA:
6534 case R_NDS32_SDA15S0_RELA:
6535 case R_NDS32_SDA_FP7U2_RELA:
6536 case R_NDS32_15_PCREL_RELA:
6537 case R_NDS32_17_PCREL_RELA:
6538 case R_NDS32_25_PCREL_RELA:
6539
6540 if (h != NULL && !info->shared)
6541 {
6542 h->non_got_ref = 1;
6543 h->plt.refcount += 1;
6544 }
6545
6546 /* If we are creating a shared library, and this is a reloc against
6547 a global symbol, or a non PC relative reloc against a local
6548 symbol, then we need to copy the reloc into the shared library.
6549 However, if we are linking with -Bsymbolic, we do not need to
6550 copy a reloc against a global symbol which is defined in an
6551 object we are including in the link (i.e., DEF_REGULAR is set).
6552 At this point we have not seen all the input files, so it is
6553 possible that DEF_REGULAR is not set now but will be set later
6554 (it is never cleared). We account for that possibility below by
6555 storing information in the dyn_relocs field of the hash table
6556 entry. A similar situation occurs when creating shared libraries
6557 and symbol visibility changes render the symbol local.
6558
6559 If on the other hand, we are creating an executable, we may need
6560 to keep relocations for symbols satisfied by a dynamic library
6561 if we manage to avoid copy relocs for the symbol. */
6562 if ((info->shared
6563 && (sec->flags & SEC_ALLOC) != 0
6564 && ((r_type != R_NDS32_25_PCREL_RELA
6565 && r_type != R_NDS32_15_PCREL_RELA
6566 && r_type != R_NDS32_17_PCREL_RELA
6567 && !(r_type == R_NDS32_32_RELA
6568 && strcmp (sec->name, ".eh_frame") == 0))
6569 || (h != NULL
6570 && (!info->symbolic
6571 || h->root.type == bfd_link_hash_defweak
6572 || !h->def_regular))))
6573 || (!info->shared
6574 && (sec->flags & SEC_ALLOC) != 0
6575 && h != NULL
6576 && (h->root.type == bfd_link_hash_defweak
6577 || !h->def_regular)))
6578 {
6579 struct elf_nds32_dyn_relocs *p;
6580 struct elf_nds32_dyn_relocs **head;
6581
6582 if (dynobj == NULL)
6583 htab->root.dynobj = dynobj = abfd;
6584
6585 /* When creating a shared object, we must copy these
6586 relocs into the output file. We create a reloc
6587 section in dynobj and make room for the reloc. */
6588 if (sreloc == NULL)
6589 {
6590 const char *name;
6591
6592 name = bfd_elf_string_from_elf_section
6593 (abfd, elf_elfheader (abfd)->e_shstrndx,
6594 elf_section_data (sec)->rela.hdr->sh_name);
6595 if (name == NULL)
6596 return FALSE;
6597
6598 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6599 && strcmp (bfd_get_section_name (abfd, sec),
6600 name + 5) == 0);
6601
6602 sreloc = bfd_get_section_by_name (dynobj, name);
6603 if (sreloc == NULL)
6604 {
6605 flagword flags;
6606
6607 sreloc = bfd_make_section (dynobj, name);
6608 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6609 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6610 if ((sec->flags & SEC_ALLOC) != 0)
6611 flags |= SEC_ALLOC | SEC_LOAD;
6612 if (sreloc == NULL
6613 || !bfd_set_section_flags (dynobj, sreloc, flags)
6614 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6615 return FALSE;
6616
6617 elf_section_type (sreloc) = SHT_RELA;
6618 }
6619 elf_section_data (sec)->sreloc = sreloc;
6620 }
6621
6622 /* If this is a global symbol, we count the number of
6623 relocations we need for this symbol. */
6624 if (h != NULL)
6625 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6626 else
6627 {
6628 asection *s;
6629
6630 Elf_Internal_Sym *isym;
6631 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6632 if (isym == NULL)
6633 return FALSE;
6634
6635 /* Track dynamic relocs needed for local syms too. */
6636 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6637 if (s == NULL)
6638 return FALSE;
6639
6640 head = ((struct elf_nds32_dyn_relocs **)
6641 &elf_section_data (s)->local_dynrel);
6642 }
6643
6644 p = *head;
6645 if (p == NULL || p->sec != sec)
6646 {
6647 bfd_size_type amt = sizeof (*p);
6648 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6649 if (p == NULL)
6650 return FALSE;
6651 p->next = *head;
6652 *head = p;
6653 p->sec = sec;
6654 p->count = 0;
6655 p->pc_count = 0;
6656 }
6657
6658 p->count += 1;
6659 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6660 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6661 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6662 p->pc_count += 1;
6663 }
6664 break;
6665
6666 /* This relocation describes the C++ object vtable hierarchy.
6667 Reconstruct it for later use during GC. */
6668 case R_NDS32_RELA_GNU_VTINHERIT:
6669 case R_NDS32_GNU_VTINHERIT:
6670 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6671 return FALSE;
6672 break;
6673
6674 /* This relocation describes which C++ vtable entries are actually
6675 used. Record for later use during GC. */
6676 case R_NDS32_GNU_VTENTRY:
6677 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6678 return FALSE;
6679 break;
6680 case R_NDS32_RELA_GNU_VTENTRY:
6681 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6682 return FALSE;
6683 break;
6684 }
6685 }
6686
6687 return TRUE;
6688}
6689
6690/* Write VAL in uleb128 format to P, returning a pointer to the
6691 following byte.
6692 This code is copied from elf-attr.c. */
6693
6694static bfd_byte *
6695write_uleb128 (bfd_byte *p, unsigned int val)
6696{
6697 bfd_byte c;
6698 do
6699 {
6700 c = val & 0x7f;
6701 val >>= 7;
6702 if (val)
6703 c |= 0x80;
6704 *(p++) = c;
6705 }
6706 while (val);
6707 return p;
6708}
6709
6710static bfd_signed_vma
6711calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6712 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6713 int *pic_ext_target)
6714{
6715 bfd_signed_vma foff;
6716 bfd_vma symval, addend;
6717 asection *sym_sec;
6718
6719 /* Get the value of the symbol referred to by the reloc. */
6720 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6721 {
6722 Elf_Internal_Sym *isym;
6723
6724 /* A local symbol. */
6725 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6726
6727 if (isym->st_shndx == SHN_UNDEF)
6728 sym_sec = bfd_und_section_ptr;
6729 else if (isym->st_shndx == SHN_ABS)
6730 sym_sec = bfd_abs_section_ptr;
6731 else if (isym->st_shndx == SHN_COMMON)
6732 sym_sec = bfd_com_section_ptr;
6733 else
6734 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6735 symval = isym->st_value + sym_sec->output_section->vma
6736 + sym_sec->output_offset;
6737 }
6738 else
6739 {
6740 unsigned long indx;
6741 struct elf_link_hash_entry *h;
6742 bfd *owner;
6743
6744 /* An external symbol. */
6745 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6746 h = elf_sym_hashes (abfd)[indx];
6747 BFD_ASSERT (h != NULL);
6748
6749 if (h->root.type != bfd_link_hash_defined
6750 && h->root.type != bfd_link_hash_defweak)
6751 /* This appears to be a reference to an undefined
6752 symbol. Just ignore it--it will be caught by the
6753 regular reloc processing. */
6754 return 0;
6755 owner = h->root.u.def.section->owner;
6756 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6757 *pic_ext_target = 1;
6758
6759 if (h->root.u.def.section->flags & SEC_MERGE)
6760 {
6761 sym_sec = h->root.u.def.section;
6762 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6763 elf_section_data (sym_sec)->sec_info,
6764 h->root.u.def.value);
6765 symval = symval + sym_sec->output_section->vma
6766 + sym_sec->output_offset;
6767 }
6768 else
6769 symval = (h->root.u.def.value
6770 + h->root.u.def.section->output_section->vma
6771 + h->root.u.def.section->output_offset);
6772 }
6773
6774 addend = irel->r_addend;
6775
6776 foff = (symval + addend
6777 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6778 return foff;
6779}
6780
6781static bfd_vma
6782calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6783 Elf_Internal_Sym *isymbuf,
6784 Elf_Internal_Rela *irel,
6785 Elf_Internal_Shdr *symtab_hdr)
6786{
6787 bfd_vma symval;
6788
6789 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6790 {
6791 Elf_Internal_Sym *isym;
6792 asection *sym_sec;
6793 /* A local symbol. */
6794 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6795
6796 if (isym->st_shndx == SHN_UNDEF)
6797 sym_sec = bfd_und_section_ptr;
6798 else if (isym->st_shndx == SHN_ABS)
6799 sym_sec = bfd_abs_section_ptr;
6800 else if (isym->st_shndx == SHN_COMMON)
6801 sym_sec = bfd_com_section_ptr;
6802 else
6803 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6804 symval = isym->st_value + sym_sec->output_section->vma
6805 + sym_sec->output_offset;
6806 }
6807 else
6808 {
6809 unsigned long indx;
6810 struct elf_link_hash_entry *h;
6811 struct elf_nds32_link_hash_table *htab;
6812 asection *splt;
6813
6814 /* An external symbol. */
6815 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6816 h = elf_sym_hashes (abfd)[indx];
6817 BFD_ASSERT (h != NULL);
6818 htab = nds32_elf_hash_table (link_info);
6819 splt = htab->splt;
6820
6821 while (h->root.type == bfd_link_hash_indirect
6822 || h->root.type == bfd_link_hash_warning)
6823 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6824
6825 if (h->plt.offset == (bfd_vma) - 1)
6826 {
6827 if (h->root.type != bfd_link_hash_defined
6828 && h->root.type != bfd_link_hash_defweak)
6829 /* This appears to be a reference to an undefined
6830 * symbol. Just ignore it--it will be caught by the
6831 * regular reloc processing. */
6832 return 0;
6833 symval = (h->root.u.def.value
6834 + h->root.u.def.section->output_section->vma
6835 + h->root.u.def.section->output_offset);
6836 }
6837 else
6838 symval = splt->output_section->vma + h->plt.offset;
6839 }
6840
6841 return symval;
6842}
6843
6844static bfd_signed_vma
6845calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6846 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6847 Elf_Internal_Shdr *symtab_hdr)
6848{
6849 bfd_vma foff;
6850 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6851 symtab_hdr)) == 0)
6852 return 0;
6853 else
6854 return foff - (irel->r_offset
6855 + sec->output_section->vma + sec->output_offset);
6856}
6857\f
6858/* Convert a 32-bit instruction to 16-bit one.
6859 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6860 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6861 type of INSN16. Return 1 if successful. */
6862
6863static int
6864nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6865 int *pinsn_type)
6866{
6867 uint16_t insn16 = 0;
6868 int insn_type;
6869 unsigned long mach = bfd_get_mach (abfd);
6870
6871 if (N32_SH5 (insn) != 0)
6872 return 0;
6873
6874 switch (N32_SUB5 (insn))
6875 {
6876 case N32_ALU1_ADD_SLLI:
6877 case N32_ALU1_ADD_SRLI:
6878 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6879 {
6880 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6881 N32_RB5 (insn));
6882 insn_type = NDS32_INSN_ADD333;
6883 }
6884 else if (N32_IS_RT4 (insn))
6885 {
6886 if (N32_RT5 (insn) == N32_RA5 (insn))
6887 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6888 else if (N32_RT5 (insn) == N32_RB5 (insn))
6889 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6890 insn_type = NDS32_INSN_ADD45;
6891 }
6892 break;
6893
6894 case N32_ALU1_SUB_SLLI:
6895 case N32_ALU1_SUB_SRLI:
6896 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6897 {
6898 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6899 N32_RB5 (insn));
6900 insn_type = NDS32_INSN_SUB333;
6901 }
6902 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6903 {
6904 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6905 insn_type = NDS32_INSN_SUB45;
6906 }
6907 break;
6908
6909 case N32_ALU1_AND_SLLI:
6910 case N32_ALU1_AND_SRLI:
6911 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6912 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6913 && N32_IS_RB3 (insn))
6914 {
6915 if (N32_RT5 (insn) == N32_RA5 (insn))
6916 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6917 else if (N32_RT5 (insn) == N32_RB5 (insn))
6918 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6919 if (insn16)
6920 insn_type = NDS32_INSN_AND33;
6921 }
6922 break;
6923
6924 case N32_ALU1_XOR_SLLI:
6925 case N32_ALU1_XOR_SRLI:
6926 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6927 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6928 && N32_IS_RB3 (insn))
6929 {
6930 if (N32_RT5 (insn) == N32_RA5 (insn))
6931 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6932 else if (N32_RT5 (insn) == N32_RB5 (insn))
6933 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6934 if (insn16)
6935 insn_type = NDS32_INSN_XOR33;
6936 }
6937 break;
6938
6939 case N32_ALU1_OR_SLLI:
6940 case N32_ALU1_OR_SRLI:
6941 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6942 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6943 && N32_IS_RB3 (insn))
6944 {
6945 if (N32_RT5 (insn) == N32_RA5 (insn))
6946 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6947 else if (N32_RT5 (insn) == N32_RB5 (insn))
6948 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6949 if (insn16)
6950 insn_type = NDS32_INSN_OR33;
6951 }
6952 break;
6953 case N32_ALU1_NOR:
6954 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6955 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6956 && N32_RA5 (insn) == N32_RB5 (insn))
6957 {
6958 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6959 insn_type = NDS32_INSN_NOT33;
6960 }
6961 break;
6962 case N32_ALU1_SRAI:
6963 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6964 {
6965 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6966 insn_type = NDS32_INSN_SRAI45;
6967 }
6968 break;
6969
6970 case N32_ALU1_SRLI:
6971 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6972 {
6973 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6974 insn_type = NDS32_INSN_SRLI45;
6975 }
6976 break;
6977
6978 case N32_ALU1_SLLI:
6979 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6980 {
6981 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6982 N32_UB5 (insn));
6983 insn_type = NDS32_INSN_SLLI333;
6984 }
6985 break;
6986
6987 case N32_ALU1_ZEH:
6988 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6989 {
6990 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6991 insn_type = NDS32_INSN_ZEH33;
6992 }
6993 break;
6994
6995 case N32_ALU1_SEB:
6996 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6997 {
6998 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6999 insn_type = NDS32_INSN_SEB33;
7000 }
7001 break;
7002
7003 case N32_ALU1_SEH:
7004 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7005 {
7006 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7007 insn_type = NDS32_INSN_SEH33;
7008 }
7009 break;
7010
7011 case N32_ALU1_SLT:
7012 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7013 {
7014 /* Implicit r15. */
7015 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7016 insn_type = NDS32_INSN_SLT45;
7017 }
7018 break;
7019
7020 case N32_ALU1_SLTS:
7021 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7022 {
7023 /* Implicit r15. */
7024 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7025 insn_type = NDS32_INSN_SLTS45;
7026 }
7027 break;
7028 }
7029
7030 if ((insn16 & 0x8000) == 0)
7031 return 0;
7032
7033 if (pinsn16)
7034 *pinsn16 = insn16;
7035 if (pinsn_type)
7036 *pinsn_type = insn_type;
7037 return 1;
7038}
7039
7040static int
7041nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7042 int *pinsn_type)
7043{
7044 uint16_t insn16 = 0;
7045 int insn_type;
7046 unsigned long mach = bfd_get_mach (abfd);
7047
7048 /* TODO: bset, bclr, btgl, btst. */
7049 if (__GF (insn, 6, 4) != 0)
7050 return 0;
7051
7052 switch (N32_IMMU (insn, 6))
7053 {
7054 case N32_ALU2_MUL:
7055 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7056 && N32_IS_RB3 (insn))
7057 {
7058 if (N32_RT5 (insn) == N32_RA5 (insn))
7059 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7060 else if (N32_RT5 (insn) == N32_RB5 (insn))
7061 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7062 if (insn16)
7063 insn_type = NDS32_INSN_MUL33;
7064 }
7065 }
7066
7067 if ((insn16 & 0x8000) == 0)
7068 return 0;
7069
7070 if (pinsn16)
7071 *pinsn16 = insn16;
7072 if (pinsn_type)
7073 *pinsn_type = insn_type;
7074 return 1;
7075}
7076
7077int
7078nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7079 int *pinsn_type)
7080{
7081 int op6;
7082 uint16_t insn16 = 0;
7083 int insn_type;
7084 unsigned long mach = bfd_get_mach (abfd);
7085
7086 /* Decode 32-bit instruction. */
7087 if (insn & 0x80000000)
7088 {
7089 /* Not 32-bit insn. */
7090 return 0;
7091 }
7092
7093 op6 = N32_OP6 (insn);
7094
7095 /* Convert it to 16-bit instruction. */
7096 switch (op6)
7097 {
7098 case N32_OP6_MOVI:
7099 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7100 {
7101 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7102 insn_type = NDS32_INSN_MOVI55;
7103 }
7104 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7105 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7106 {
7107 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7108 N32_IMM20S (insn) - 16);
7109 insn_type = NDS32_INSN_MOVPI45;
7110 }
7111 break;
7112
7113 case N32_OP6_ADDI:
7114 if (N32_IMM15S (insn) == 0)
7115 {
7116 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7117 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7118 if (mach <= MACH_V2
7119 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7120 {
7121 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7122 insn_type = NDS32_INSN_MOV55;
7123 }
7124 }
7125 else if (N32_IMM15S (insn) > 0)
7126 {
7127 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7128 {
7129 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7130 N32_IMM15S (insn));
7131 insn_type = NDS32_INSN_ADDI333;
7132 }
7133 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7134 && N32_IMM15S (insn) < 32)
7135 {
7136 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7137 insn_type = NDS32_INSN_ADDI45;
7138 }
7139 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7140 && N32_RT5 (insn) == N32_RA5 (insn)
7141 && N32_IMM15S (insn) < 512)
7142 {
7143 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7144 insn_type = NDS32_INSN_ADDI10_SP;
7145 }
7146 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7147 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7148 && (N32_IMM15S (insn) % 4 == 0))
7149 {
7150 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7151 N32_IMM15S (insn) >> 2);
7152 insn_type = NDS32_INSN_ADDRI36_SP;
7153 }
7154 }
7155 else
7156 {
7157 /* Less than 0. */
7158 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7159 {
7160 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7161 0 - N32_IMM15S (insn));
7162 insn_type = NDS32_INSN_SUBI333;
7163 }
7164 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7165 && N32_IMM15S (insn) > -32)
7166 {
1c8f6a4d
KLC		 7167 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7168 0 - N32_IMM15S (insn));
35c08157
KLC		 7169 insn_type = NDS32_INSN_SUBI45;
7170 }
7171 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7172 && N32_RT5 (insn) == N32_RA5 (insn)
7173 && N32_IMM15S (insn) >= -512)
7174 {
7175 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7176 insn_type = NDS32_INSN_ADDI10_SP;
7177 }
7178 }
7179 break;
7180
7181 case N32_OP6_ORI:
7182 if (N32_IMM15S (insn) == 0)
7183 {
7184 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7185 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7186 if (mach <= MACH_V2
7187 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7188 {
7189 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7190 insn_type = NDS32_INSN_MOV55;
7191 }
7192 }
7193 break;
7194
7195 case N32_OP6_SUBRI:
7196 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7197 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7198 {
7199 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7200 insn_type = NDS32_INSN_NEG33;
7201 }
7202 break;
7203
7204 case N32_OP6_ANDI:
7205 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7206 {
7207 if (N32_IMM15U (insn) == 1)
7208 {
7209 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7210 insn_type = NDS32_INSN_XLSB33;
7211 }
7212 else if (N32_IMM15U (insn) == 0x7ff)
7213 {
7214 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7215 insn_type = NDS32_INSN_X11B33;
7216 }
7217 else if (N32_IMM15U (insn) == 0xff)
7218 {
7219 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7220 insn_type = NDS32_INSN_ZEB33;
7221 }
7222 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7223 && N32_IMM15U (insn) < 256)
7224 {
7225 int imm15u = N32_IMM15U (insn);
7226
7227 if (__builtin_popcount (imm15u) == 1)
7228 {
7229 /* BMSKI33 */
7230 int imm3u = __builtin_ctz (imm15u);
7231
7232 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7233 insn_type = NDS32_INSN_BMSKI33;
7234 }
7235 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7236 {
7237 /* FEXTI33 */
7238 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7239
7240 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7241 insn_type = NDS32_INSN_FEXTI33;
7242 }
7243 }
7244 }
7245 break;
7246
7247 case N32_OP6_SLTI:
7248 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7249 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7250 {
7251 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7252 insn_type = NDS32_INSN_SLTI45;
7253 }
7254 break;
7255
7256 case N32_OP6_SLTSI:
7257 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7258 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7259 {
7260 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7261 insn_type = NDS32_INSN_SLTSI45;
7262 }
7263 break;
7264
7265 case N32_OP6_LWI:
7266 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7267 {
7268 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7269 insn_type = NDS32_INSN_LWI450;
7270 }
7271 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7272 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7273 {
7274 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7275 N32_IMM15S (insn));
7276 insn_type = NDS32_INSN_LWI333;
7277 }
7278 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7279 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7280 {
7281 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7282 insn_type = NDS32_INSN_LWI37;
7283 }
7284 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7285 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7286 {
7287 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7288 insn_type = NDS32_INSN_LWI37_SP;
7289 }
7290 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7291 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7292 {
1c8f6a4d
KLC		 7293 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7294 N32_IMM15S (insn) + 32);
35c08157
KLC		 7295 insn_type = NDS32_INSN_LWI45_FE;
7296 }
7297 break;
7298
7299 case N32_OP6_SWI:
7300 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7301 {
7302 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7303 insn_type = NDS32_INSN_SWI450;
7304 }
7305 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7306 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7307 {
1c8f6a4d
KLC		 7308 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7309 N32_IMM15S (insn));
35c08157
KLC		 7310 insn_type = NDS32_INSN_SWI333;
7311 }
7312 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7313 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7314 {
7315 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7316 insn_type = NDS32_INSN_SWI37;
7317 }
7318 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7319 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7320 {
7321 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7322 insn_type = NDS32_INSN_SWI37_SP;
7323 }
7324 break;
7325
7326 case N32_OP6_LWI_BI:
7327 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7328 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7329 {
7330 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7331 N32_IMM15S (insn));
7332 insn_type = NDS32_INSN_LWI333_BI;
7333 }
7334 break;
7335
7336 case N32_OP6_SWI_BI:
7337 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7338 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7339 {
7340 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7341 N32_IMM15S (insn));
7342 insn_type = NDS32_INSN_SWI333_BI;
7343 }
7344 break;
7345
7346 case N32_OP6_LHI:
7347 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7348 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7349 {
7350 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7351 N32_IMM15S (insn));
7352 insn_type = NDS32_INSN_LHI333;
7353 }
7354 break;
7355
7356 case N32_OP6_SHI:
7357 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7358 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7359 {
7360 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7361 N32_IMM15S (insn));
7362 insn_type = NDS32_INSN_SHI333;
7363 }
7364 break;
7365
7366 case N32_OP6_LBI:
7367 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7368 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7369 {
7370 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7371 N32_IMM15S (insn));
7372 insn_type = NDS32_INSN_LBI333;
7373 }
7374 break;
7375
7376 case N32_OP6_SBI:
7377 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7378 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7379 {
7380 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7381 N32_IMM15S (insn));
7382 insn_type = NDS32_INSN_SBI333;
7383 }
7384 break;
7385
7386 case N32_OP6_ALU1:
7387 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7388
7389 case N32_OP6_ALU2:
7390 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7391
7392 case N32_OP6_BR1:
7393 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7394 goto done;
7395
7396 if ((insn & __BIT (14)) == 0)
7397 {
7398 /* N32_BR1_BEQ */
7399 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7400 && N32_RT5 (insn) != REG_R5)
7401 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7402 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7403 && N32_RA5 (insn) != REG_R5)
7404 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7405 insn_type = NDS32_INSN_BEQS38;
7406 break;
7407 }
7408 else
7409 {
7410 /* N32_BR1_BNE */
7411 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7412 && N32_RT5 (insn) != REG_R5)
7413 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7414 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7415 && N32_RA5 (insn) != REG_R5)
7416 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7417 insn_type = NDS32_INSN_BNES38;
7418 break;
7419 }
7420 break;
7421
7422 case N32_OP6_BR2:
7423 switch (N32_BR2_SUB (insn))
7424 {
7425 case N32_BR2_BEQZ:
7426 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7427 {
7428 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7429 insn_type = NDS32_INSN_BEQZ38;
7430 }
1c8f6a4d
KLC		 7431 else if (N32_RT5 (insn) == REG_R15
7432 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7433 {
7434 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7435 insn_type = NDS32_INSN_BEQZS8;
7436 }
7437 break;
7438
7439 case N32_BR2_BNEZ:
7440 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7441 {
7442 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7443 insn_type = NDS32_INSN_BNEZ38;
7444 }
1c8f6a4d
KLC		 7445 else if (N32_RT5 (insn) == REG_R15
7446 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7447 {
7448 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7449 insn_type = NDS32_INSN_BNEZS8;
7450 }
7451 break;
7452
7453 case N32_BR2_IFCALL:
7454 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7455 {
7456 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7457 insn_type = NDS32_INSN_IFCALL9;
7458 }
7459 break;
7460 }
7461 break;
7462
7463 case N32_OP6_JI:
7464 if ((insn & __BIT (24)) == 0)
7465 {
7466 /* N32_JI_J */
7467 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7468 {
7469 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7470 insn_type = NDS32_INSN_J8;
7471 }
7472 }
7473 break;
7474
7475 case N32_OP6_JREG:
7476 if (__GF (insn, 8, 2) != 0)
7477 goto done;
7478
7479 switch (N32_IMMU (insn, 5))
7480 {
7481 case N32_JREG_JR:
7482 if (N32_JREG_HINT (insn) == 0)
7483 {
7484 /* jr */
7485 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7486 insn_type = NDS32_INSN_JR5;
7487 }
7488 else if (N32_JREG_HINT (insn) == 1)
7489 {
7490 /* ret */
7491 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7492 insn_type = NDS32_INSN_RET5;
7493 }
7494 else if (N32_JREG_HINT (insn) == 3)
7495 {
7496 /* ifret = mov55 $sp, $sp */
7497 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7498 insn_type = NDS32_INSN_IFRET;
7499 }
7500 break;
7501
7502 case N32_JREG_JRAL:
7503 /* It's convertible when return rt5 is $lp and address
7504 translation is kept. */
7505 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7506 {
7507 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7508 insn_type = NDS32_INSN_JRAL5;
7509 }
7510 break;
7511 }
7512 break;
7513
7514 case N32_OP6_MISC:
7515 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7516 {
7517 /* For v3, swid above 31 are used for ex9.it. */
7518 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7519 insn_type = NDS32_INSN_BREAK16;
7520 }
7521 break;
7522
7523 default:
7524 /* This instruction has no 16-bit variant. */
7525 goto done;
7526 }
7527
7528done:
7529 /* Bit-15 of insn16 should be set for a valid instruction. */
7530 if ((insn16 & 0x8000) == 0)
7531 return 0;
7532
7533 if (pinsn16)
7534 *pinsn16 = insn16;
7535 if (pinsn_type)
7536 *pinsn_type = insn_type;
7537 return 1;
7538}
7539
7540static int
7541special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7542 Elf_Internal_Rela *reloc)
7543{
7544 uint16_t insn16 = 0;
7545
7546 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7547 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7548 return 0;
7549
7550 if (!N32_IS_RT3 (insn))
7551 return 0;
7552
7553 switch (N32_OP6 (insn))
7554 {
7555 case N32_OP6_LWI:
7556 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7557 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7558 break;
7559 case N32_OP6_SWI:
7560 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7561 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7562 break;
7563 case N32_OP6_HWGP:
7564 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7565 break;
7566
7567 if (__GF (insn, 17, 3) == 6)
7568 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7569 else if (__GF (insn, 17, 3) == 7)
7570 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7571 break;
7572 }
7573
7574 if ((insn16 & 0x8000) == 0)
7575 return 0;
7576
7577 *pinsn16 = insn16;
7578 return 1;
7579}
7580
7581/* Convert a 16-bit instruction to 32-bit one.
7582 INSN16 it the input and PINSN it the point to output.
7583 Return non-zero on successful. Otherwise 0 is returned. */
7584
7585int
7586nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7587{
7588 uint32_t insn = 0xffffffff;
7589 unsigned long mach = bfd_get_mach (abfd);
7590
7591 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7592
7593 switch (__GF (insn16, 9, 6))
7594 {
7595 case 0x4: /* add45 */
1c8f6a4d
KLC		 7596 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7597 N16_RA5 (insn16));
35c08157
KLC		 7598 goto done;
7599 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7600 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7601 N16_RA5 (insn16));
35c08157
KLC		 7602 goto done;
7603 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7604 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7605 N16_IMM5U (insn16));
35c08157
KLC		 7606 goto done;
7607 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7608 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7609 -N16_IMM5U (insn16));
35c08157
KLC		 7610 goto done;
7611 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7612 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7613 N16_IMM5U (insn16));
35c08157
KLC		 7614 goto done;
7615 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7616 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7617 N16_IMM5U (insn16));
35c08157 7618 goto done;
35c08157 7619 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7620 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7621 N16_IMM3U (insn16));
35c08157
KLC		 7622 goto done;
7623 case 0xc: /* add333 */
1c8f6a4d
KLC		 7624 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7625 N16_RB3 (insn16));
35c08157
KLC		 7626 goto done;
7627 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7628 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7629 N16_RB3 (insn16));
35c08157
KLC		 7630 goto done;
7631 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7632 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7633 N16_IMM3U (insn16));
35c08157
KLC		 7634 goto done;
7635 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7636 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7637 -N16_IMM3U (insn16));
35c08157 7638 goto done;
35c08157 7639 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7640 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7641 N16_IMM3U (insn16));
35c08157
KLC		 7642 goto done;
7643 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7644 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7645 N16_IMM3U (insn16));
35c08157
KLC		 7646 goto done;
7647 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7648 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7649 N16_IMM3U (insn16));
35c08157
KLC		 7650 goto done;
7651 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7652 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7653 N16_IMM3U (insn16));
35c08157
KLC		 7654 goto done;
7655 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7656 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7657 N16_IMM3U (insn16));
35c08157
KLC		 7658 goto done;
7659 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7660 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7661 N16_IMM3U (insn16));
35c08157
KLC		 7662 goto done;
7663 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7664 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7665 N16_IMM3U (insn16));
35c08157
KLC		 7666 goto done;
7667 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7668 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7669 N16_IMM3U (insn16));
35c08157 7670 goto done;
35c08157 7671 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7672 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7673 N16_IMM6U (insn16) << 2);
35c08157 7674 goto done;
35c08157 7675 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7676 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7677 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7678 goto done;
7679 case 0x1a: /* lwi450 */
7680 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7681 goto done;
7682 case 0x1b: /* swi450 */
7683 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7684 goto done;
7685
1c8f6a4d 7686 /* These are r15 implied instructions. */
35c08157
KLC		 7687 case 0x30: /* slts45 */
7688 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7689 goto done;
7690 case 0x31: /* slt45 */
7691 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7692 goto done;
7693 case 0x32: /* sltsi45 */
7694 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7695 goto done;
7696 case 0x33: /* slti45 */
7697 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7698 goto done;
7699 case 0x34: /* beqzs8, bnezs8 */
7700 if (insn16 & __BIT (8))
7701 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7702 else
7703 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7704 goto done;
7705
7706 case 0x35: /* break16, ex9.it */
7707 /* Only consider range of v3 break16. */
7708 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7709 goto done;
7710
7711 case 0x3c: /* ifcall9 */
7712 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7713 goto done;
7714 case 0x3d: /* movpi45 */
7715 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7716 goto done;
7717
7718 case 0x3f: /* MISC33 */
1c8f6a4d 7719 switch (insn16 & 0x7)
35c08157
KLC		 7720 {
7721 case 2: /* neg33 */
7722 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7723 break;
7724 case 3: /* not33 */
1c8f6a4d
KLC		 7725 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7726 N16_RA3 (insn16));
35c08157
KLC		 7727 break;
7728 case 4: /* mul33 */
1c8f6a4d
KLC		 7729 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7730 N16_RA3 (insn16));
35c08157
KLC		 7731 break;
7732 case 5: /* xor33 */
1c8f6a4d
KLC		 7733 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7734 N16_RA3 (insn16));
35c08157
KLC		 7735 break;
7736 case 6: /* and33 */
1c8f6a4d
KLC		 7737 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7738 N16_RA3 (insn16));
35c08157
KLC		 7739 break;
7740 case 7: /* or33 */
1c8f6a4d
KLC		 7741 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7742 N16_RA3 (insn16));
35c08157
KLC		 7743 break;
7744 }
7745 goto done;
7746
1c8f6a4d 7747 case 0xb:
35c08157
KLC		 7748 switch (insn16 & 0x7)
7749 {
7750 case 0: /* zeb33 */
7751 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7752 break;
7753 case 1: /* zeh33 */
7754 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7755 break;
7756 case 2: /* seb33 */
7757 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7758 break;
7759 case 3: /* seh33 */
7760 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7761 break;
7762 case 4: /* xlsb33 */
7763 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7764 break;
7765 case 5: /* x11b33 */
7766 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7767 break;
7768 case 6: /* bmski33 */
7769 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7770 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7771 break;
7772 case 7: /* fexti33 */
7773 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7774 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7775 break;
7776 }
7777 goto done;
7778 }
7779
7780 switch (__GF (insn16, 10, 5))
7781 {
7782 case 0x0: /* mov55 or ifret16 */
7783 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7784 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7785 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7786 else
1c8f6a4d 7787 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7788 goto done;
7789 case 0x1: /* movi55 */
7790 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7791 goto done;
7792 case 0x1b: /* addi10s (V2) */
7793 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7794 goto done;
7795 }
7796
7797 switch (__GF (insn16, 11, 4))
7798 {
7799 case 0x7: /* lwi37.fp/swi37.fp */
7800 if (insn16 & __BIT (7)) /* swi37.fp */
7801 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7802 else /* lwi37.fp */
7803 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7804 goto done;
7805 case 0x8: /* beqz38 */
7806 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7807 goto done;
7808 case 0x9: /* bnez38 */
7809 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7810 goto done;
7811 case 0xa: /* beqs38/j8, implied r5 */
7812 if (N16_RT38 (insn16) == 5)
7813 insn = N32_JI (J, N16_IMM8S (insn16));
7814 else
7815 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7816 goto done;
7817 case 0xb: /* bnes38 and others */
7818 if (N16_RT38 (insn16) == 5)
7819 {
7820 switch (__GF (insn16, 5, 3))
7821 {
7822 case 0: /* jr5 */
7823 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7824 break;
7825 case 4: /* ret5 */
7826 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7827 break;
7828 case 1: /* jral5 */
7829 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7830 break;
7831 case 2: /* ex9.it imm5 */
7832 /* ex9.it had no 32-bit variantl. */
7833 break;
7834 case 5: /* add5.pc */
7835 /* add5.pc had no 32-bit variantl. */
7836 break;
7837 }
7838 }
7839 else /* bnes38 */
7840 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7841 goto done;
7842 case 0xe: /* lwi37/swi37 */
7843 if (insn16 & (1 << 7)) /* swi37.sp */
7844 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7845 else /* lwi37.sp */
7846 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7847 goto done;
7848 }
7849
7850done:
7851 if (insn & 0x80000000)
7852 return 0;
7853
7854 if (pinsn)
7855 *pinsn = insn;
7856 return 1;
7857}
7858\f
7859static bfd_boolean
7860is_sda_access_insn (unsigned long insn)
7861{
7862 switch (N32_OP6 (insn))
7863 {
7864 case N32_OP6_LWI:
7865 case N32_OP6_LHI:
7866 case N32_OP6_LHSI:
7867 case N32_OP6_LBI:
7868 case N32_OP6_LBSI:
7869 case N32_OP6_SWI:
7870 case N32_OP6_SHI:
7871 case N32_OP6_SBI:
7872 case N32_OP6_LWC:
7873 case N32_OP6_LDC:
7874 case N32_OP6_SWC:
7875 case N32_OP6_SDC:
7876 return TRUE;
7877 default:
7878 ;
7879 }
7880 return FALSE;
7881}
7882
7883static unsigned long
7884turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7885{
7886 uint32_t oinsn = 0;
7887
7888 switch (type)
7889 {
7890 case R_NDS32_GOT_LO12:
7891 case R_NDS32_GOTOFF_LO12:
7892 case R_NDS32_PLTREL_LO12:
7893 case R_NDS32_PLT_GOTREL_LO12:
7894 case R_NDS32_LO12S0_RELA:
7895 switch (N32_OP6 (insn))
7896 {
7897 case N32_OP6_LBI:
7898 /* lbi.gp */
7899 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7900 break;
7901 case N32_OP6_LBSI:
7902 /* lbsi.gp */
7903 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7904 break;
7905 case N32_OP6_SBI:
7906 /* sbi.gp */
7907 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7908 break;
7909 case N32_OP6_ORI:
7910 /* addi.gp */
7911 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7912 break;
7913 }
7914 break;
7915
7916 case R_NDS32_LO12S1_RELA:
7917 switch (N32_OP6 (insn))
7918 {
7919 case N32_OP6_LHI:
7920 /* lhi.gp */
7921 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7922 break;
7923 case N32_OP6_LHSI:
7924 /* lhsi.gp */
7925 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7926 break;
7927 case N32_OP6_SHI:
7928 /* shi.gp */
7929 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7930 break;
7931 }
7932 break;
7933
7934 case R_NDS32_LO12S2_RELA:
7935 switch (N32_OP6 (insn))
7936 {
7937 case N32_OP6_LWI:
7938 /* lwi.gp */
7939 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7940 break;
7941 case N32_OP6_SWI:
7942 /* swi.gp */
7943 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7944 break;
7945 }
7946 break;
7947
7948 case R_NDS32_LO12S2_DP_RELA:
7949 case R_NDS32_LO12S2_SP_RELA:
7950 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7951 break;
7952 }
7953
7954 if (oinsn)
7955 *pinsn = oinsn;
7956
7957 return oinsn != 0;
7958}
7959
7960/* Linker hasn't found the correct merge section for non-section symbol
7961 in relax time, this work is left to the function elf_link_input_bfd().
7962 So for non-section symbol, _bfd_merged_section_offset is also needed
7963 to find the correct symbol address. */
7964
7965static bfd_vma
7966nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7967 asection **psec, Elf_Internal_Rela *rel)
7968{
7969 asection *sec = *psec;
7970 bfd_vma relocation;
7971
7972 relocation = (sec->output_section->vma
7973 + sec->output_offset + sym->st_value);
7974 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7975 {
7976 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7977 rel->r_addend =
7978 _bfd_merged_section_offset (abfd, psec,
7979 elf_section_data (sec)->sec_info,
7980 sym->st_value + rel->r_addend);
7981 else
7982 rel->r_addend =
7983 _bfd_merged_section_offset (abfd, psec,
7984 elf_section_data (sec)->sec_info,
7985 sym->st_value) + rel->r_addend;
7986
7987 if (sec != *psec)
7988 {
7989 /* If we have changed the section, and our original section is
7990 marked with SEC_EXCLUDE, it means that the original
7991 SEC_MERGE section has been completely subsumed in some
7992 other SEC_MERGE section. In this case, we need to leave
7993 some info around for --emit-relocs. */
7994 if ((sec->flags & SEC_EXCLUDE) != 0)
7995 sec->kept_section = *psec;
7996 sec = *psec;
7997 }
7998 rel->r_addend -= relocation;
7999 rel->r_addend += sec->output_section->vma + sec->output_offset;
8000 }
8001 return relocation;
8002}
8003
8004static bfd_vma
8005calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8006 Elf_Internal_Sym *isymbuf,
8007 Elf_Internal_Shdr *symtab_hdr)
8008{
8009 bfd_signed_vma foff;
8010 bfd_vma symval, addend;
8011 Elf_Internal_Rela irel_fn;
8012 Elf_Internal_Sym *isym;
8013 asection *sym_sec;
8014
8015 /* Get the value of the symbol referred to by the reloc. */
8016 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8017 {
8018 /* A local symbol. */
8019 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8020
8021 if (isym->st_shndx == SHN_UNDEF)
8022 sym_sec = bfd_und_section_ptr;
8023 else if (isym->st_shndx == SHN_ABS)
8024 sym_sec = bfd_abs_section_ptr;
8025 else if (isym->st_shndx == SHN_COMMON)
8026 sym_sec = bfd_com_section_ptr;
8027 else
8028 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8029 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8030 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8031 addend = irel_fn.r_addend;
8032 }
8033 else
8034 {
8035 unsigned long indx;
8036 struct elf_link_hash_entry *h;
8037
8038 /* An external symbol. */
8039 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8040 h = elf_sym_hashes (abfd)[indx];
8041 BFD_ASSERT (h != NULL);
8042
8043 while (h->root.type == bfd_link_hash_indirect
8044 || h->root.type == bfd_link_hash_warning)
8045 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8046
8047 if (h->root.type != bfd_link_hash_defined
8048 && h->root.type != bfd_link_hash_defweak)
8049 /* This appears to be a reference to an undefined
8050 symbol. Just ignore it--it will be caught by the
8051 regular reloc processing. */
8052 return 0;
8053
8054 if (h->root.u.def.section->flags & SEC_MERGE)
8055 {
8056 sym_sec = h->root.u.def.section;
8057 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8058 (sym_sec)->sec_info, h->root.u.def.value);
8059 symval = symval + sym_sec->output_section->vma
8060 + sym_sec->output_offset;
8061 }
8062 else
8063 symval = (h->root.u.def.value
8064 + h->root.u.def.section->output_section->vma
8065 + h->root.u.def.section->output_offset);
8066 addend = irel->r_addend;
8067 }
8068
8069 foff = symval + addend;
8070
8071 return foff;
8072}
8073
8074static bfd_vma
8075calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8076 Elf_Internal_Rela *irel,
8077 Elf_Internal_Shdr *symtab_hdr)
8078{
8079 int symndx;
8080 bfd_vma *local_got_offsets;
8081 /* Get the value of the symbol referred to by the reloc. */
8082 struct elf_link_hash_entry *h;
8083 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8084
8085 /* An external symbol. */
8086 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8087 h = elf_sym_hashes (abfd)[symndx];
8088 while (h->root.type == bfd_link_hash_indirect
8089 || h->root.type == bfd_link_hash_warning)
8090 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8091
8092 if (symndx >= 0)
8093 {
8094 BFD_ASSERT (h != NULL);
8095 return htab->sgot->output_section->vma + htab->sgot->output_offset
8096 + h->got.offset;
8097 }
8098 else
8099 {
8100 local_got_offsets = elf_local_got_offsets (abfd);
8101 BFD_ASSERT (local_got_offsets != NULL);
8102 return htab->sgot->output_section->vma + htab->sgot->output_offset
8103 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8104 }
8105
8106 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8107 /* The check of h->root.type is passed. */
8108}
8109
8110static int
8111is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8112 asection *sec, Elf_Internal_Rela *rel)
8113{
8114 bfd_byte *contents;
8115 unsigned short insn16;
8116
8117 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8118 return FALSE;
8119 contents = elf_section_data (sec)->this_hdr.contents;
8120 insn16 = bfd_getb16 (contents + rel->r_offset);
8121 if (insn16 == NDS32_NOP16)
8122 return TRUE;
8123 return FALSE;
8124}
8125
8126/* It checks whether the instruction could be converted to
8127 16-bit form and returns the converted one.
8128
8129 `internal_relocs' is supposed to be sorted. */
8130
8131static int
8132is_convert_32_to_16 (bfd *abfd, asection *sec,
8133 Elf_Internal_Rela *reloc,
8134 Elf_Internal_Rela *internal_relocs,
8135 Elf_Internal_Rela *irelend,
8136 uint16_t *insn16)
8137{
8138#define NORMAL_32_TO_16 (1 << 0)
8139#define SPECIAL_32_TO_16 (1 << 1)
8140 bfd_byte *contents = NULL;
8141 bfd_signed_vma off;
8142 bfd_vma mem_addr;
8143 uint32_t insn = 0;
8144 Elf_Internal_Rela *pc_rel;
8145 int pic_ext_target = 0;
8146 Elf_Internal_Shdr *symtab_hdr;
8147 Elf_Internal_Sym *isymbuf = NULL;
8148 int convert_type;
8149 bfd_vma offset;
8150
8151 if (reloc->r_offset + 4 > sec->size)
8152 return FALSE;
8153
8154 offset = reloc->r_offset;
8155
0c4bd9d9 8156 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 8157 return FALSE;
8158 insn = bfd_getb32 (contents + offset);
8159
8160 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8161 convert_type = NORMAL_32_TO_16;
8162 else if (special_convert_32_to_16 (insn, insn16, reloc))
8163 convert_type = SPECIAL_32_TO_16;
8164 else
8165 return FALSE;
8166
8167 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8168 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8169 return FALSE;
8170
8171 /* Find the first relocation of the same relocation-type,
8172 so we iteratie them forward. */
8173 pc_rel = reloc;
1c8f6a4d 8174 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8175 pc_rel--;
8176
8177 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8178 {
8179 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8180 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8181 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8182 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8183 {
8184 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8185 &pic_ext_target);
1c8f6a4d
KLC		 8186 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8187 || off == 0)
35c08157
KLC		 8188 return FALSE;
8189 break;
8190 }
8191 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8192 {
8193 /* movi => movi55 */
1c8f6a4d
KLC		 8194 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8195 symtab_hdr);
8196 /* mem_addr is unsigned, but the value should
8197 be between [-16, 15]. */
35c08157
KLC		 8198 if ((mem_addr + 0x10) >> 5)
8199 return FALSE;
8200 break;
8201 }
1c8f6a4d
KLC		 8202 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8203 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8204 {
8205 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8206 because it can be relaxed to addi for TLS_LE_ADD. */
8207 return FALSE;
8208 }
35c08157
KLC		 8209 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8210 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8211 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8212 && convert_type == SPECIAL_32_TO_16)
8213 {
8214 /* fp-as-gp
8215 We've selected a best fp-base for this access, so we can
8216 always resolve it anyway. Do nothing. */
8217 break;
8218 }
8219 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8220 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8221 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8222 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8223 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8224 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8225 {
1c8f6a4d
KLC		 8226 /* Prevent unresolved addi instruction translate
8227 to addi45 or addi333. */
35c08157
KLC		 8228 return FALSE;
8229 }
1c8f6a4d
KLC		 8230 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8231 {
8232 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8233 &pic_ext_target);
8234 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8235 return FALSE;
8236 break;
8237 }
35c08157
KLC		 8238 }
8239
8240 return TRUE;
8241}
8242
8243static void
8244nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8245 Elf_Internal_Rela *reloc,
8246 Elf_Internal_Rela *internal_relocs,
8247 Elf_Internal_Rela *irelend,
8248 unsigned short insn16)
8249{
8250 Elf_Internal_Rela *pc_rel;
8251 bfd_vma offset;
8252
8253 offset = reloc->r_offset;
8254 bfd_putb16 (insn16, contents + offset);
8255 /* Find the first relocation of the same relocation-type,
8256 so we iteratie them forward. */
8257 pc_rel = reloc;
8258 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8259 pc_rel--;
8260
8261 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8262 {
8263 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8264 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8265 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8266 {
8267 pc_rel->r_info =
8268 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8269 }
8270 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8271 pc_rel->r_info =
8272 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8273 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8274 pc_rel->r_info =
8275 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8276 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8277 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8278 pc_rel->r_info =
8279 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8280 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8281 pc_rel->r_info =
8282 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8283 }
8284}
8285
8286/* Find a relocation of type specified by `reloc_type'
8287 of the same r_offset with reloc.
8288 If not found, return irelend.
8289
8290 Assuming relocations are sorted by r_offset,
8291 we find the relocation from `reloc' backward untill relocs,
8292 or find it from `reloc' forward untill irelend. */
8293
8294static Elf_Internal_Rela *
8295find_relocs_at_address (Elf_Internal_Rela *reloc,
8296 Elf_Internal_Rela *relocs,
8297 Elf_Internal_Rela *irelend,
8298 enum elf_nds32_reloc_type reloc_type)
8299{
8300 Elf_Internal_Rela *rel_t;
8301
8302 /* Find backward. */
8303 for (rel_t = reloc;
8304 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8305 rel_t--)
8306 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8307 return rel_t;
8308
1c8f6a4d 8309 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8310 for (rel_t = reloc;
8311 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8312 rel_t++)
8313 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8314 return rel_t;
8315
8316 return irelend;
8317}
8318
8319/* Find a relocation of specified type and offset.
8320 `reloc' is just a refence point to find a relocation at specified offset.
8321 If not found, return irelend.
8322
8323 Assuming relocations are sorted by r_offset,
8324 we find the relocation from `reloc' backward untill relocs,
8325 or find it from `reloc' forward untill irelend. */
8326
8327static Elf_Internal_Rela *
8328find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8329 Elf_Internal_Rela *relocs,
8330 Elf_Internal_Rela *irelend,
8331 unsigned char reloc_type,
8332 bfd_vma offset_p)
8333{
8334 Elf_Internal_Rela *rel_t = NULL;
8335
8336 /* First, we try to find a relocation of offset `offset_p',
8337 and then we use find_relocs_at_address to find specific type. */
8338
8339 if (reloc->r_offset > offset_p)
8340 {
8341 /* Find backward. */
8342 for (rel_t = reloc;
8343 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8344 /* Do nothing. */;
8345 }
8346 else if (reloc->r_offset < offset_p)
8347 {
8348 /* Find forward. */
8349 for (rel_t = reloc;
8350 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8351 /* Do nothing. */;
8352 }
8353 else
8354 rel_t = reloc;
8355
8356 /* Not found? */
8357 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8358 return irelend;
8359
8360 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8361}
8362
8363static bfd_boolean
8364nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8365 Elf_Internal_Rela *internal_relocs,
8366 Elf_Internal_Rela *irelend,
8367 unsigned char reloc_type)
8368{
8369 Elf_Internal_Rela *rel_t;
8370
8371 for (rel_t = reloc;
8372 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8373 rel_t--)
8374 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8375 {
8376 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8377 && rel_t->r_addend == reloc->r_addend)
8378 continue;
8379 return TRUE;
8380 }
8381
8382 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8383 rel_t++)
8384 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8385 {
8386 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8387 && rel_t->r_addend == reloc->r_addend)
8388 continue;
8389 return TRUE;
8390 }
8391
8392 return FALSE;
8393}
8394
8395typedef struct nds32_elf_blank nds32_elf_blank_t;
8396struct nds32_elf_blank
8397{
8398 /* Where the blank begins. */
8399 bfd_vma offset;
8400 /* The size of the blank. */
8401 bfd_vma size;
8402 /* The accumulative size before this blank. */
8403 bfd_vma total_size;
8404 nds32_elf_blank_t *next;
8405 nds32_elf_blank_t *prev;
8406};
8407
8408static nds32_elf_blank_t *blank_free_list = NULL;
8409
8410static nds32_elf_blank_t *
8411create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8412{
8413 nds32_elf_blank_t *blank_t;
8414
8415 if (blank_free_list)
8416 {
8417 blank_t = blank_free_list;
8418 blank_free_list = blank_free_list->next;
8419 }
8420 else
8421 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8422
8423 if (blank_t == NULL)
8424 return NULL;
8425
8426 blank_t->offset = offset_p;
8427 blank_t->size = size_p;
8428 blank_t->total_size = 0;
8429 blank_t->next = NULL;
8430 blank_t->prev = NULL;
8431
8432 return blank_t;
8433}
8434
8435static void
8436remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8437{
8438 if (blank_free_list)
8439 {
8440 blank_free_list->prev = blank_p;
8441 blank_p->next = blank_free_list;
8442 }
8443 else
8444 blank_p->next = NULL;
8445
8446 blank_p->prev = NULL;
8447 blank_free_list = blank_p;
8448}
8449
8450static void
8451clean_nds32_elf_blank (void)
8452{
8453 nds32_elf_blank_t *blank_t;
8454
8455 while (blank_free_list)
8456 {
8457 blank_t = blank_free_list;
8458 blank_free_list = blank_free_list->next;
8459 free (blank_t);
8460 }
8461}
8462
8463static nds32_elf_blank_t *
8464search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8465{
8466 nds32_elf_blank_t *blank_t;
8467
8468 if (!blank_p)
8469 return NULL;
8470 blank_t = blank_p;
8471
8472 while (blank_t && addr < blank_t->offset)
8473 blank_t = blank_t->prev;
8474 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8475 blank_t = blank_t->next;
8476
8477 return blank_t;
8478}
8479
8480static bfd_vma
8481get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8482 int overwrite)
8483{
8484 nds32_elf_blank_t *blank_t;
8485
8486 blank_t = search_nds32_elf_blank (*blank_p, addr);
8487 if (!blank_t)
8488 return 0;
8489
8490 if (overwrite)
8491 *blank_p = blank_t;
8492
8493 if (addr < blank_t->offset + blank_t->size)
8494 return blank_t->total_size + (addr - blank_t->offset);
8495 else
8496 return blank_t->total_size + blank_t->size;
8497}
8498
8499static bfd_boolean
8500insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8501{
8502 nds32_elf_blank_t *blank_t, *blank_t2;
8503
8504 if (!*blank_p)
8505 {
8506 *blank_p = create_nds32_elf_blank (addr, len);
8507 return *blank_p ? TRUE : FALSE;
8508 }
8509
8510 blank_t = search_nds32_elf_blank (*blank_p, addr);
8511
8512 if (blank_t == NULL)
8513 {
8514 blank_t = create_nds32_elf_blank (addr, len);
8515 if (!blank_t)
8516 return FALSE;
8517 while ((*blank_p)->prev != NULL)
8518 *blank_p = (*blank_p)->prev;
8519 blank_t->next = *blank_p;
8520 (*blank_p)->prev = blank_t;
8521 (*blank_p) = blank_t;
8522 return TRUE;
8523 }
8524
8525 if (addr < blank_t->offset + blank_t->size)
8526 {
8527 if (addr > blank_t->offset + blank_t->size)
8528 blank_t->size = addr - blank_t->offset;
8529 }
8530 else
8531 {
8532 blank_t2 = create_nds32_elf_blank (addr, len);
8533 if (!blank_t2)
8534 return FALSE;
8535 if (blank_t->next)
8536 {
8537 blank_t->next->prev = blank_t2;
8538 blank_t2->next = blank_t->next;
8539 }
8540 blank_t2->prev = blank_t;
8541 blank_t->next = blank_t2;
8542 *blank_p = blank_t2;
8543 }
8544
8545 return TRUE;
8546}
8547
8548static bfd_boolean
8549insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8550 bfd_vma len)
8551{
8552 nds32_elf_blank_t *blank_t;
8553
8554 if (!insert_nds32_elf_blank (blank_p, addr, len))
8555 return FALSE;
8556
8557 blank_t = *blank_p;
8558
8559 if (!blank_t->prev)
8560 {
8561 blank_t->total_size = 0;
8562 blank_t = blank_t->next;
8563 }
8564
8565 while (blank_t)
8566 {
8567 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8568 blank_t = blank_t->next;
8569 }
8570
8571 return TRUE;
8572}
8573
8574static void
8575calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8576{
8577 nds32_elf_blank_t *blank_t;
8578 bfd_vma total_size = 0;
8579
8580 if (!blank_p)
8581 return;
8582
8583 blank_t = blank_p;
8584 while (blank_t->prev)
8585 blank_t = blank_t->prev;
8586 while (blank_t)
8587 {
8588 blank_t->total_size = total_size;
8589 total_size += blank_t->size;
8590 blank_t = blank_t->next;
8591 }
8592}
8593
8594static bfd_boolean
8595nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8596 nds32_elf_blank_t *blank_p)
8597{
8598 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8599 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8600 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8601 unsigned int sec_shndx; /* The section the be relaxed. */
8602 bfd_byte *contents; /* Contents data of iterating section. */
8603 Elf_Internal_Rela *internal_relocs;
8604 Elf_Internal_Rela *irel;
8605 Elf_Internal_Rela *irelend;
8606 struct elf_link_hash_entry **sym_hashes;
8607 struct elf_link_hash_entry **end_hashes;
8608 unsigned int symcount;
8609 asection *sect;
8610 nds32_elf_blank_t *blank_t;
8611 nds32_elf_blank_t *blank_t2;
8612 nds32_elf_blank_t *blank_head;
8613
8614 blank_head = blank_t = blank_p;
8615 while (blank_head->prev != NULL)
8616 blank_head = blank_head->prev;
8617 while (blank_t->next != NULL)
8618 blank_t = blank_t->next;
8619
8620 if (blank_t->offset + blank_t->size <= sec->size)
8621 {
8622 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8623 blank_t->next->prev = blank_t;
8624 }
8625 if (blank_head->offset > 0)
8626 {
8627 blank_head->prev = create_nds32_elf_blank (0, 0);
8628 blank_head->prev->next = blank_head;
8629 blank_head = blank_head->prev;
8630 }
8631
8632 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8633
8634 /* The deletion must stop at the next ALIGN reloc for an alignment
8635 power larger than the number of bytes we are deleting. */
8636
8637 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8638 if (!nds32_get_local_syms (abfd, sec, &isym))
8639 return FALSE;
8640
8641 if (isym == NULL)
8642 {
8643 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8644 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8645 symtab_hdr->contents = (bfd_byte *) isym;
8646 }
8647
8648 if (isym == NULL || symtab_hdr->sh_info == 0)
8649 return FALSE;
8650
8651 blank_t = blank_head;
8652 calc_nds32_blank_total (blank_head);
8653
8654 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8655 {
8656 /* Adjust all the relocs. */
8657
8658 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8659 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8660 TRUE /* keep_memory */);
8661 irelend = internal_relocs + sect->reloc_count;
8662
8663 blank_t = blank_head;
8664 blank_t2 = blank_head;
8665
8666 if (!(sect->flags & SEC_RELOC))
8667 continue;
8668
0c4bd9d9 8669 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8670
8671 for (irel = internal_relocs; irel < irelend; irel++)
8672 {
8673 bfd_vma raddr;
8674
8675 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8676 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8677 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8678 {
8679 unsigned long val = 0;
1c8f6a4d
KLC		 8680 unsigned long mask;
8681 long before, between;
8682 long offset;
35c08157
KLC		 8683
8684 switch (ELF32_R_TYPE (irel->r_info))
8685 {
8686 case R_NDS32_DIFF8:
1c8f6a4d 8687 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8688 break;
8689 case R_NDS32_DIFF16:
1c8f6a4d 8690 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8691 break;
8692 case R_NDS32_DIFF32:
8693 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8694 /* Get the signed bit and mask for the high part. The
8695 gcc will alarm when right shift 32-bit since the
8696 type size of long may be 32-bit. */
8697 mask = 0 - (val >> 31);
8698 if (mask)
8699 offset = (val | (mask - 0xffffffff));
8700 else
8701 offset = val;
35c08157
KLC		 8702 break;
8703 default:
8704 BFD_ASSERT (0);
8705 }
8706
8707 /* DIFF value
8708 0 |encoded in location|
8709 |------------|-------------------|---------
8710 sym+off(addend)
8711 -- before ---| *****************
8712 --------------------- between ---|
8713
1c8f6a4d
KLC		 8714 We only care how much data are relax between DIFF,
8715 marked as ***. */
35c08157
KLC		 8716
8717 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8718 between = get_nds32_elf_blank_total (&blank_t,
8719 irel->r_addend + offset, 0);
35c08157
KLC		 8720 if (between == before)
8721 goto done_adjust_diff;
8722
8723 switch (ELF32_R_TYPE (irel->r_info))
8724 {
8725 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8726 bfd_put_8 (abfd, offset - (between - before),
8727 contents + irel->r_offset);
35c08157
KLC		 8728 break;
8729 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8730 bfd_put_16 (abfd, offset - (between - before),
8731 contents + irel->r_offset);
35c08157
KLC		 8732 break;
8733 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8734 bfd_put_32 (abfd, offset - (between - before),
8735 contents + irel->r_offset);
35c08157
KLC		 8736 break;
8737 }
8738 }
8739 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8740 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8741 {
8742 bfd_vma val = 0;
8743 unsigned int len = 0;
8744 unsigned long before, between;
8745 bfd_byte *endp, *p;
8746
1c8f6a4d
KLC		 8747 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8748 &len);
35c08157
KLC		 8749
8750 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8751 between = get_nds32_elf_blank_total (&blank_t,
8752 irel->r_addend + val, 0);
35c08157
KLC		 8753 if (between == before)
8754 goto done_adjust_diff;
8755
8756 p = contents + irel->r_offset;
8757 endp = p + len -1;
8758 memset (p, 0x80, len);
8759 *(endp) = 0;
8760 p = write_uleb128 (p, val - (between - before)) - 1;
8761 if (p < endp)
8762 *p |= 0x80;
8763 }
8764done_adjust_diff:
8765
8766 if (sec == sect)
8767 {
8768 raddr = irel->r_offset;
1c8f6a4d
KLC		 8769 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8770 irel->r_offset, 1);
35c08157
KLC		 8771
8772 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8773 continue;
8774 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8775 && (blank_t2->offset > raddr
8776 || blank_t2->next->offset <= raddr))
8777 (*_bfd_error_handler)
8778 (_("%B: %s\n"), abfd,
8779 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC		 8780
8781 /* Mark reloc in deleted portion as NONE.
8782 For some relocs like R_NDS32_LABEL that doesn't modify the
8783 content in the section. R_NDS32_LABEL doesn't belong to the
8784 instruction in the section, so we should preserve it. */
8785 if (raddr >= blank_t2->offset
8786 && raddr < blank_t2->offset + blank_t2->size
8787 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8788 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8789 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8790 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8793 {
8794 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8795 R_NDS32_NONE);
8796 continue;
8797 }
8798 }
8799
8800 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8801 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8802 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8803 continue;
8804
8805 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8806 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8807 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8808 {
8809 if (irel->r_addend <= sec->size)
8810 irel->r_addend -=
8811 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8812 }
8813 }
8814 }
8815
8816 /* Adjust the local symbols defined in this section. */
8817 blank_t = blank_head;
8818 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8819 {
8820 if (isym->st_shndx == sec_shndx)
8821 {
8822 if (isym->st_value <= sec->size)
8823 {
8824 bfd_vma ahead;
8825 bfd_vma orig_addr = isym->st_value;
8826
8827 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8828 isym->st_value -= ahead;
8829
8830 /* Adjust function size. */
1c8f6a4d
KLC		 8831 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8832 && isym->st_size > 0)
8833 isym->st_size -=
8834 get_nds32_elf_blank_total
8835 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8836 }
8837 }
8838 }
8839
8840 /* Now adjust the global symbols defined in this section. */
8841 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8842 - symtab_hdr->sh_info);
8843 sym_hashes = elf_sym_hashes (abfd);
8844 end_hashes = sym_hashes + symcount;
8845 blank_t = blank_head;
8846 for (; sym_hashes < end_hashes; sym_hashes++)
8847 {
8848 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8849
8850 if ((sym_hash->root.type == bfd_link_hash_defined
8851 || sym_hash->root.type == bfd_link_hash_defweak)
8852 && sym_hash->root.u.def.section == sec)
8853 {
8854 if (sym_hash->root.u.def.value <= sec->size)
8855 {
8856 bfd_vma ahead;
8857 bfd_vma orig_addr = sym_hash->root.u.def.value;
8858
8859 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8860 sym_hash->root.u.def.value -= ahead;
8861
8862 /* Adjust function size. */
8863 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8864 sym_hash->size -=
8865 get_nds32_elf_blank_total
8866 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8867
8868 }
8869 }
8870 }
8871
8872 contents = elf_section_data (sec)->this_hdr.contents;
8873 blank_t = blank_head;
8874 while (blank_t->next)
8875 {
8876 /* Actually delete the bytes. */
8877
8878 /* If current blank is the last blank overlap with current section,
8879 go to finish process. */
8880 if (sec->size <= (blank_t->next->offset))
8881 break;
8882
8883 memmove (contents + blank_t->offset - blank_t->total_size,
8884 contents + blank_t->offset + blank_t->size,
8885 blank_t->next->offset - (blank_t->offset + blank_t->size));
8886
8887 blank_t = blank_t->next;
8888 }
8889
8890 if (sec->size > (blank_t->offset + blank_t->size))
8891 {
8892 /* There are remaining code between blank and section boundary.
8893 Move the remaining code to appropriate location. */
8894 memmove (contents + blank_t->offset - blank_t->total_size,
8895 contents + blank_t->offset + blank_t->size,
8896 sec->size - (blank_t->offset + blank_t->size));
8897 sec->size -= blank_t->total_size + blank_t->size;
8898 }
8899 else
8900 /* This blank is not entirely included in the section,
8901 reduce the section size by only part of the blank size. */
8902 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8903
8904 while (blank_head)
8905 {
8906 blank_t = blank_head;
8907 blank_head = blank_head->next;
8908 remove_nds32_elf_blank (blank_t);
8909 }
8910
8911 return TRUE;
8912}
8913
8914/* Get the contents of a section. */
8915
8916static int
0c4bd9d9
KLC		 8917nds32_get_section_contents (bfd *abfd, asection *sec,
8918 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8919{
8920 /* Get the section contents. */
8921 if (elf_section_data (sec)->this_hdr.contents != NULL)
8922 *contents_p = elf_section_data (sec)->this_hdr.contents;
8923 else
8924 {
8925 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8926 return FALSE;
0c4bd9d9
KLC		 8927 if (cache)
8928 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8929 }
8930
8931 return TRUE;
8932}
8933
8934/* Get the contents of the internal symbol of abfd. */
8935
8936static int
8937nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8938 Elf_Internal_Sym **isymbuf_p)
8939{
8940 Elf_Internal_Shdr *symtab_hdr;
8941 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8942
8943 /* Read this BFD's local symbols if we haven't done so already. */
8944 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8945 {
8946 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8947 if (*isymbuf_p == NULL)
8948 {
8949 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8950 symtab_hdr->sh_info, 0,
8951 NULL, NULL, NULL);
8952 if (*isymbuf_p == NULL)
8953 return FALSE;
8954 }
8955 }
8956 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8957
8958 return TRUE;
8959}
8960
8961/* Range of small data. */
1c8f6a4d
KLC		 8962static bfd_vma sdata_range[2][2];
8963static bfd_vma const sdata_init_range[2] =
8964{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8965
8966static int
8967nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8968 bfd_byte *contents, bfd_vma addr)
8969{
8970 unsigned long insn = bfd_getb32 (contents + addr);
8971
8972 if (insn & 0x80000000)
8973 return 2;
8974
8975 return 4;
8976}
8977
8978/* Set the gp relax range. We have to measure the safe range
8979 to do gp relaxation. */
8980
8981static void
8982relax_range_measurement (bfd *abfd)
8983{
8984 asection *sec_f, *sec_b;
8985 /* For upper bound. */
8986 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8987 bfd_vma align;
35c08157
KLC		 8988 static int decide_relax_range = 0;
8989 int i;
1c8f6a4d 8990 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8991
8992 if (decide_relax_range)
8993 return;
8994 decide_relax_range = 1;
8995
8996 if (sda_rela_sec == NULL)
8997 {
8998 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8999 for (i = 0; i < range_number; i++)
35c08157
KLC		 9000 {
9001 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9002 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9003 }
9004 return;
9005 }
9006
9007 /* Get the biggest alignment power after the gp located section. */
9008 sec_f = sda_rela_sec->output_section;
9009 sec_b = sec_f->next;
9010 align = 0;
9011 while (sec_b != NULL)
9012 {
9013 if ((unsigned)(1 << sec_b->alignment_power) > align)
9014 align = (1 << sec_b->alignment_power);
9015 sec_b = sec_b->next;
9016 }
9017
9018 /* I guess we can not determine the section before
9019 gp located section, so we assume the align is max page size. */
1c8f6a4d 9020 for (i = 0; i < range_number; i++)
35c08157 9021 {
1c8f6a4d 9022 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9023 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9024 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9025 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9026 }
9027}
9028
9029/* These are macros used to check flags encoded in r_addend.
9030 They are only used by nds32_elf_relax_section (). */
9031#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9032#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9033#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9034#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9035
1c8f6a4d
KLC		 9036/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9037
35c08157 9038static bfd_boolean
1c8f6a4d
KLC		 9039nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9040 Elf_Internal_Rela *internal_relocs, int *insn_len,
9041 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9042 Elf_Internal_Shdr *symtab_hdr)
9043{
9044 /* There are 3 variations for LONGCALL1
9045 case 4-4-2; 16-bit on, optimize off or optimize for space
9046 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9047 ori ta, ta, lo12(symbol) ; LO12S0
9048 jral5 ta ;
9049
9050 case 4-4-4; 16-bit off, optimize don't care
9051 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9052 ori ta, ta, lo12(symbol) ; LO12S0
9053 jral ta ;
9054
9055 case 4-4-4; 16-bit on, optimize for speed
9056 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9057 ori ta, ta, lo12(symbol) ; LO12S0
9058 jral ta ;
9059 Check code for -mlong-calls output. */
9060
9061 /* Get the reloc for the address from which the register is
9062 being loaded. This reloc will tell us which function is
9063 actually being called. */
9064
9065 bfd_vma laddr;
9066 int seq_len; /* Original length of instruction sequence. */
35c08157 9067 uint32_t insn;
1c8f6a4d
KLC		 9068 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9069 int pic_ext_target = 0;
9070 bfd_signed_vma foff;
35c08157 9071 uint16_t insn16;
35c08157 9072
1c8f6a4d
KLC		 9073 irelend = internal_relocs + sec->reloc_count;
9074 seq_len = GET_SEQ_LEN (irel->r_addend);
9075 laddr = irel->r_offset;
9076 *insn_len = seq_len;
35c08157 9077
1c8f6a4d
KLC		 9078 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9079 R_NDS32_HI20_RELA, laddr);
9080 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9081 R_NDS32_LO12S0_ORI_RELA,
9082 laddr + 4);
35c08157 9083
1c8f6a4d 9084 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157
KLC		 9085 {
9086 (*_bfd_error_handler)
1c8f6a4d
KLC		 9087 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9088 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9089 return FALSE;
35c08157
KLC		 9090 }
9091
1c8f6a4d
KLC		 9092 /* Get the value of the symbol referred to by the reloc. */
9093 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9094 &pic_ext_target);
35c08157 9095
1c8f6a4d
KLC		 9096 /* This condition only happened when symbol is undefined. */
9097 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9098 || foff >= CONSERVATIVE_24BIT_S1)
9099 return FALSE;
35c08157 9100
1c8f6a4d
KLC		 9101 /* Relax to: jal symbol; 25_PCREL */
9102 /* For simplicity of coding, we are going to modify the section
9103 contents, the section relocs, and the BFD symbol table. We
9104 must tell the rest of the code not to free up this
9105 information. It would be possible to instead create a table
9106 of changes which have to be made, as is done in coff-mips.c;
9107 that would be more work, but would require less memory when
9108 the linker is run. */
9109
9110 /* Replace the long call with a jal. */
9111 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9112 R_NDS32_25_PCREL_RELA);
9113 irel->r_addend = hi_irelfn->r_addend;
9114
9115 /* We don't resolve this here but resolve it in relocate_section. */
9116 insn = INSN_JAL;
9117 bfd_putb32 (insn, contents + irel->r_offset);
9118
9119 hi_irelfn->r_info =
9120 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9121 lo_irelfn->r_info =
9122 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9123 *insn_len = 4;
9124
9125 if (seq_len & 0x2)
9126 {
9127 insn16 = NDS32_NOP16;
9128 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9129 lo_irelfn->r_info =
9130 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9131 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9132 *insn_len += 2;
9133 }
9134 return TRUE;
9135}
35c08157 9136
1c8f6a4d
KLC		 9137#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9138/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9139
1c8f6a4d
KLC		 9140static bfd_boolean
9141nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9142 Elf_Internal_Rela *internal_relocs, int *insn_len,
9143 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9144 Elf_Internal_Shdr *symtab_hdr)
9145{
9146 /* bltz rt, .L1 ; LONGCALL2
9147 jal symbol ; 25_PCREL
9148 .L1: */
35c08157 9149
1c8f6a4d
KLC		 9150 /* Get the reloc for the address from which the register is
9151 being loaded. This reloc will tell us which function is
9152 actually being called. */
35c08157 9153
1c8f6a4d
KLC		 9154 bfd_vma laddr;
9155 uint32_t insn;
9156 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9157 int pic_ext_target = 0;
9158 bfd_signed_vma foff;
35c08157 9159
1c8f6a4d
KLC		 9160 irelend = internal_relocs + sec->reloc_count;
9161 laddr = irel->r_offset;
9162 i1_irelfn =
9163 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9164 R_NDS32_25_PCREL_RELA, laddr + 4);
9165
9166 if (i1_irelfn == irelend)
35c08157 9167 {
1c8f6a4d
KLC		 9168 (*_bfd_error_handler)
9169 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9170 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9171 return FALSE;
35c08157
KLC		 9172 }
9173
1c8f6a4d 9174 insn = bfd_getb32 (contents + laddr);
35c08157 9175
1c8f6a4d
KLC		 9176 /* Get the value of the symbol referred to by the reloc. */
9177 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9178 &pic_ext_target);
35c08157 9179
1c8f6a4d
KLC		 9180 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9181 || foff >= CONSERVATIVE_16BIT_S1)
9182 return FALSE;
35c08157 9183
1c8f6a4d
KLC		 9184 /* Relax to bgezal rt, label ; 17_PCREL
9185 or bltzal rt, label ; 17_PCREL */
9186
9187 /* Convert to complimentary conditional call. */
9188 insn = CONVERT_CONDITION_CALL (insn);
9189
9190 /* For simplicity of coding, we are going to modify the section
9191 contents, the section relocs, and the BFD symbol table. We
9192 must tell the rest of the code not to free up this
9193 information. It would be possible to instead create a table
9194 of changes which have to be made, as is done in coff-mips.c;
9195 that would be more work, but would require less memory when
9196 the linker is run. */
9197
9198 /* Clean unnessary relocations. */
9199 i1_irelfn->r_info =
9200 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9201 cond_irelfn =
9202 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9203 R_NDS32_17_PCREL_RELA, laddr);
9204 if (cond_irelfn != irelend)
9205 cond_irelfn->r_info =
9206 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9207
9208 /* Replace the long call with a bgezal. */
9209 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9210 R_NDS32_17_PCREL_RELA);
9211 irel->r_addend = i1_irelfn->r_addend;
9212
9213 bfd_putb32 (insn, contents + irel->r_offset);
9214
9215 *insn_len = 4;
9216 return TRUE;
9217}
35c08157 9218
1c8f6a4d
KLC		 9219/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9220
9221static bfd_boolean
9222nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9223 Elf_Internal_Rela *internal_relocs, int *insn_len,
9224 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9225 Elf_Internal_Shdr *symtab_hdr)
9226{
9227 /* There are 3 variations for LONGCALL3
9228 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9229 bltz rt, $1 ; LONGCALL3
9230 sethi ta, hi20(symbol) ; HI20
9231 ori ta, ta, lo12(symbol) ; LO12S0
9232 jral5 ta ;
9233 $1
9234
9235 case 4-4-4-4; 16-bit off, optimize don't care
9236 bltz rt, $1 ; LONGCALL3
9237 sethi ta, hi20(symbol) ; HI20
9238 ori ta, ta, lo12(symbol) ; LO12S0
9239 jral ta ;
9240 $1
9241
9242 case 4-4-4-4; 16-bit on, optimize for speed
9243 bltz rt, $1 ; LONGCALL3
9244 sethi ta, hi20(symbol) ; HI20
9245 ori ta, ta, lo12(symbol) ; LO12S0
9246 jral ta ;
9247 $1 */
9248
9249 /* Get the reloc for the address from which the register is
9250 being loaded. This reloc will tell us which function is
9251 actually being called. */
9252
9253 bfd_vma laddr;
9254 int seq_len; /* Original length of instruction sequence. */
9255 uint32_t insn;
9256 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9257 int pic_ext_target = 0;
9258 bfd_signed_vma foff;
9259 uint16_t insn16;
9260
9261 irelend = internal_relocs + sec->reloc_count;
9262 seq_len = GET_SEQ_LEN (irel->r_addend);
9263 laddr = irel->r_offset;
9264 *insn_len = seq_len;
9265
9266 hi_irelfn =
9267 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9268 R_NDS32_HI20_RELA, laddr + 4);
9269 lo_irelfn =
9270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9271 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9272
9273 if (hi_irelfn == irelend || lo_irelfn == irelend)
9274 {
9275 (*_bfd_error_handler)
9276 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9277 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9278 return FALSE;
35c08157
KLC		 9279 }
9280
1c8f6a4d
KLC		 9281 /* Get the value of the symbol referred to by the reloc. */
9282 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9283 &pic_ext_target);
35c08157 9284
1c8f6a4d
KLC		 9285 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9286 || foff >= CONSERVATIVE_24BIT_S1)
9287 return FALSE;
35c08157 9288
1c8f6a4d
KLC		 9289 insn = bfd_getb32 (contents + laddr);
9290 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9291 {
1c8f6a4d
KLC		 9292 /* Relax to bgezal rt, label ; 17_PCREL
9293 or bltzal rt, label ; 17_PCREL */
35c08157 9294
1c8f6a4d
KLC		 9295 /* Convert to complimentary conditional call. */
9296 insn = CONVERT_CONDITION_CALL (insn);
9297 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9298
1c8f6a4d
KLC		 9299 *insn_len = 4;
9300 irel->r_info =
9301 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9302 hi_irelfn->r_info =
9303 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9304 lo_irelfn->r_info =
9305 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9306
9307 cond_irelfn =
9308 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9309 R_NDS32_17_PCREL_RELA, laddr);
9310 if (cond_irelfn != irelend)
35c08157 9311 {
1c8f6a4d
KLC		 9312 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9313 R_NDS32_17_PCREL_RELA);
9314 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9315 }
1c8f6a4d
KLC		 9316
9317 if (seq_len & 0x2)
35c08157 9318 {
1c8f6a4d
KLC		 9319 insn16 = NDS32_NOP16;
9320 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9321 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9322 R_NDS32_INSN16);
9323 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9324 insn_len += 2;
35c08157 9325 }
1c8f6a4d
KLC		 9326 }
9327 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9328 {
9329 /* Relax to the following instruction sequence
9330 bltz rt, $1 ; LONGCALL2
9331 jal symbol ; 25_PCREL
9332 $1 */
9333 *insn_len = 8;
9334 insn = INSN_JAL;
9335 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9336
1c8f6a4d
KLC		 9337 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9338 R_NDS32_25_PCREL_RELA);
9339 irel->r_info =
9340 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9341
9342 lo_irelfn->r_info =
9343 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9344
1c8f6a4d 9345 if (seq_len & 0x2)
35c08157 9346 {
1c8f6a4d
KLC		 9347 insn16 = NDS32_NOP16;
9348 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9349 lo_irelfn->r_info =
9350 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9351 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9352 insn_len += 2;
9353 }
9354 }
9355 return TRUE;
9356}
35c08157 9357
1c8f6a4d 9358/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9359
1c8f6a4d
KLC		 9360static bfd_boolean
9361nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9362 Elf_Internal_Rela *internal_relocs, int *insn_len,
9363 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9364 Elf_Internal_Shdr *symtab_hdr)
9365{
9366 /* There are 3 variations for LONGJUMP1
9367 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9368 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9369 ori ta, ta, lo12(symbol) ; LO12S0
9370 jr5 ta ;
9371
9372 case 4-4-4; 16-bit off, optimize don't care
9373 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9374 ori ta, ta, lo12(symbol) ; LO12S0
9375 jr ta ;
9376
9377 case 4-4-4; 16-bit on, optimize for speed
9378 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9379 ori ta, ta, lo12(symbol) ; LO12S0
9380 jr ta ; */
9381
9382 /* Get the reloc for the address from which the register is
9383 being loaded. This reloc will tell us which function is
9384 actually being called. */
9385
9386 bfd_vma laddr;
9387 int seq_len; /* Original length of instruction sequence. */
9388 int insn16_on; /* 16-bit on/off. */
9389 uint32_t insn;
9390 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9391 int pic_ext_target = 0;
9392 bfd_signed_vma foff;
9393 uint16_t insn16;
9394 unsigned long reloc;
35c08157 9395
1c8f6a4d
KLC		 9396 irelend = internal_relocs + sec->reloc_count;
9397 seq_len = GET_SEQ_LEN (irel->r_addend);
9398 laddr = irel->r_offset;
9399 *insn_len = seq_len;
9400 insn16_on = IS_16BIT_ON (irel->r_addend);
9401
9402 hi_irelfn =
9403 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9404 R_NDS32_HI20_RELA, laddr);
9405 lo_irelfn =
9406 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9407 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9408 if (hi_irelfn == irelend || lo_irelfn == irelend)
9409 {
9410 (*_bfd_error_handler)
9411 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9412 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9413 return FALSE;
9414 }
35c08157 9415
1c8f6a4d
KLC		 9416 /* Get the value of the symbol referred to by the reloc. */
9417 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9418 &pic_ext_target);
35c08157 9419
1c8f6a4d
KLC		 9420 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9421 || foff < -CONSERVATIVE_24BIT_S1)
9422 return FALSE;
35c08157 9423
1c8f6a4d
KLC		 9424 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9425 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9426 {
9427 /* j8 label */
9428 /* 16-bit on, but not optimized for speed. */
9429 reloc = R_NDS32_9_PCREL_RELA;
9430 insn16 = INSN_J8;
9431 bfd_putb16 (insn16, contents + irel->r_offset);
9432 *insn_len = 2;
9433 irel->r_info =
9434 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9435 }
9436 else
9437 {
9438 /* j label */
9439 reloc = R_NDS32_25_PCREL_RELA;
9440 insn = INSN_J;
9441 bfd_putb32 (insn, contents + irel->r_offset);
9442 *insn_len = 4;
9443 irel->r_info =
9444 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9445 irel->r_addend = 0;
9446 }
35c08157 9447
1c8f6a4d
KLC		 9448 hi_irelfn->r_info =
9449 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9450 lo_irelfn->r_info =
9451 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9452
1c8f6a4d
KLC		 9453 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9454 {
9455 insn16 = NDS32_NOP16;
9456 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9457 lo_irelfn->r_info =
9458 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9459 R_NDS32_INSN16);
9460 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9461 *insn_len += 2;
9462 }
9463 return TRUE;
9464}
9465
9466/* Revert condition branch. This function does not check if the input
9467 instruction is condition branch or not. */
9468
9469static void
9470nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9471 uint16_t *re_insn16, uint32_t *re_insn)
9472{
9473 uint32_t comp_insn = 0;
9474 uint16_t comp_insn16 = 0;
9475
9476 if (insn)
9477 {
9478 if (N32_OP6 (insn) == N32_OP6_BR1)
9479 {
9480 /* beqs label. */
9481 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9482 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9483 {
1c8f6a4d
KLC		 9484 /* Insn can be contracted to 16-bit implied r5. */
9485 comp_insn16 =
9486 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9487 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9488 }
1c8f6a4d
KLC		 9489 }
9490 else if (N32_OP6 (insn) == N32_OP6_BR3)
9491 {
9492 /* bnec $ta, imm11, label. */
9493 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9494 }
9495 else
9496 {
9497 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9498 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9499 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9500 {
1c8f6a4d 9501 if (N32_IS_RT3 (insn))
35c08157 9502 {
1c8f6a4d
KLC		 9503 /* Insn can be contracted to 16-bit. */
9504 comp_insn16 =
9505 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9506 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9507 }
9508 else if (N32_RT5 (insn) == REG_R15)
9509 {
9510 /* Insn can be contracted to 16-bit. */
9511 comp_insn16 =
9512 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9513 }
35c08157
KLC		 9514 }
9515 }
1c8f6a4d
KLC		 9516 }
9517 else
9518 {
9519 switch ((insn16 & 0xf000) >> 12)
35c08157 9520 {
1c8f6a4d
KLC		 9521 case 0xc:
9522 /* beqz38 or bnez38 */
9523 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9524 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9525 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9526 break;
35c08157 9527
1c8f6a4d
KLC		 9528 case 0xd:
9529 /* beqs38 or bnes38 */
9530 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9531 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9532 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9533 | (REG_R5 << 15);
9534 break;
35c08157 9535
1c8f6a4d
KLC		 9536 case 0xe:
9537 /* beqzS8 or bnezS8 */
9538 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9539 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9540 comp_insn |= REG_R15 << 20;
9541 break;
35c08157 9542
1c8f6a4d
KLC		 9543 default:
9544 break;
9545 }
9546 }
9547 if (comp_insn && re_insn)
9548 *re_insn = comp_insn;
9549 if (comp_insn16 && re_insn16)
9550 *re_insn16 = comp_insn16;
9551}
35c08157 9552
1c8f6a4d 9553/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9554
1c8f6a4d
KLC		 9555static bfd_boolean
9556nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9557 Elf_Internal_Rela *internal_relocs, int *insn_len,
9558 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9559 Elf_Internal_Shdr *symtab_hdr)
9560{
9561 /* There are 3 variations for LONGJUMP2
9562 case 2-4; 1st insn convertible, 16-bit on,
9563 optimize off or optimize for space
9564 bnes38 rt, ra, $1 ; LONGJUMP2
9565 j label ; 25_PCREL
9566 $1:
9567
9568 case 4-4; 1st insn not convertible
9569 bne rt, ra, $1 ; LONGJUMP2
9570 j label ; 25_PCREL
9571 $1:
9572
9573 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9574 bne rt, ra, $1 ; LONGJUMP2
9575 j label ; 25_PCREL
9576 $1: */
9577
9578 /* Get the reloc for the address from which the register is
9579 being loaded. This reloc will tell us which function is
9580 actually being called. */
9581
9582 bfd_vma laddr;
9583 int seq_len; /* Original length of instruction sequence. */
9584 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9585 int pic_ext_target = 0, first_size;
9586 unsigned int i;
9587 bfd_signed_vma foff;
9588 uint32_t insn, re_insn = 0;
9589 uint16_t insn16, re_insn16 = 0;
9590 unsigned long reloc, cond_reloc;
35c08157 9591
1c8f6a4d
KLC		 9592 enum elf_nds32_reloc_type checked_types[] =
9593 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9594
1c8f6a4d
KLC		 9595 irelend = internal_relocs + sec->reloc_count;
9596 seq_len = GET_SEQ_LEN (irel->r_addend);
9597 laddr = irel->r_offset;
9598 *insn_len = seq_len;
9599 first_size = (seq_len == 6) ? 2 : 4;
9600
9601 i2_irelfn =
9602 find_relocs_at_address_addr (irel, internal_relocs,
9603 irelend, R_NDS32_25_PCREL_RELA,
9604 laddr + first_size);
9605
9606 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9607 {
9608 cond_irelfn =
9609 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9610 checked_types[i], laddr);
9611 if (cond_irelfn != irelend)
9612 break;
9613 }
35c08157 9614
1c8f6a4d
KLC		 9615 if (i2_irelfn == irelend || cond_irelfn == irelend)
9616 {
9617 (*_bfd_error_handler)
9618 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9619 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9620 return FALSE;
9621 }
35c08157 9622
1c8f6a4d
KLC		 9623 /* Get the value of the symbol referred to by the reloc. */
9624 foff =
9625 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9626 &pic_ext_target);
9627 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9628 || foff >= CONSERVATIVE_16BIT_S1)
9629 return FALSE;
35c08157 9630
1c8f6a4d
KLC		 9631 /* Get the all corresponding instructions. */
9632 if (first_size == 4)
9633 {
9634 insn = bfd_getb32 (contents + laddr);
9635 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9636 }
9637 else
9638 {
9639 insn16 = bfd_getb16 (contents + laddr);
9640 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9641 }
35c08157 9642
1c8f6a4d
KLC		 9643 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9644 && foff < ACCURATE_8BIT_S1 - first_size)
9645 {
9646 if (first_size == 4)
9647 {
9648 /* Don't convert it to 16-bit now, keep this as relaxable for
9649 ``label reloc; INSN16''. */
35c08157 9650
1c8f6a4d
KLC		 9651 /* Save comp_insn32 to buffer. */
9652 bfd_putb32 (re_insn, contents + irel->r_offset);
9653 *insn_len = 4;
9654 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9655 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9656 cond_reloc = R_NDS32_INSN16;
9657 }
9658 else
9659 {
9660 bfd_putb16 (re_insn16, contents + irel->r_offset);
9661 *insn_len = 2;
9662 reloc = R_NDS32_9_PCREL_RELA;
9663 cond_reloc = R_NDS32_NONE;
9664 }
9665 }
9666 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9667 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9668 && foff < ACCURATE_14BIT_S1 - first_size))
9669 {
9670 /* beqs label ; 15_PCREL */
9671 bfd_putb32 (re_insn, contents + irel->r_offset);
9672 *insn_len = 4;
9673 reloc = R_NDS32_15_PCREL_RELA;
9674 cond_reloc = R_NDS32_NONE;
9675 }
9676 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9677 && foff >= -CONSERVATIVE_16BIT_S1
9678 && foff < CONSERVATIVE_16BIT_S1)
9679 {
9680 /* beqz label ; 17_PCREL */
9681 bfd_putb32 (re_insn, contents + irel->r_offset);
9682 *insn_len = 4;
9683 reloc = R_NDS32_17_PCREL_RELA;
9684 cond_reloc = R_NDS32_NONE;
9685 }
9686 else
9687 return FALSE;
35c08157 9688
1c8f6a4d
KLC		 9689 /* Set all relocations. */
9690 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9691 irel->r_addend = i2_irelfn->r_addend;
35c08157 9692
1c8f6a4d
KLC		 9693 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9694 cond_reloc);
9695 cond_irelfn->r_addend = 0;
35c08157 9696
1c8f6a4d
KLC		 9697 if ((seq_len ^ *insn_len ) & 0x2)
9698 {
9699 insn16 = NDS32_NOP16;
9700 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9701 i2_irelfn->r_offset = 4;
9702 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9703 R_NDS32_INSN16);
9704 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9705 *insn_len += 2;
9706 }
9707 else
9708 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9709 R_NDS32_NONE);
9710 return TRUE;
9711}
35c08157 9712
1c8f6a4d 9713/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9714
1c8f6a4d
KLC		 9715static bfd_boolean
9716nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9717 Elf_Internal_Rela *internal_relocs, int *insn_len,
9718 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9719 Elf_Internal_Shdr *symtab_hdr)
9720{
9721 /* There are 5 variations for LONGJUMP3
9722 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9723 optimize off or optimize for space
9724 bnes38 rt, ra, $1 ; LONGJUMP3
9725 sethi ta, hi20(symbol) ; HI20
9726 ori ta, ta, lo12(symbol) ; LO12S0
9727 jr5 ta ;
9728 $1: ;
9729
9730 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9731 bnes38 rt, ra, $1 ; LONGJUMP3
9732 sethi ta, hi20(symbol) ; HI20
9733 ori ta, ta, lo12(symbol) ; LO12S0
9734 jr5 ta ;
9735 $1: ; LABEL
9736
9737 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9738 optimize off or optimize for space
9739 bne rt, ra, $1 ; LONGJUMP3
9740 sethi ta, hi20(symbol) ; HI20
9741 ori ta, ta, lo12(symbol) ; LO12S0
9742 jr5 ta ;
9743 $1: ;
9744
9745 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9746 16-bit off if no INSN16
9747 bne rt, ra, $1 ; LONGJUMP3
9748 sethi ta, hi20(symbol) ; HI20
9749 ori ta, ta, lo12(symbol) ; LO12S0
9750 jr ta ;
9751 $1: ;
9752
9753 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9754 16-bit off if no INSN16
9755 bne rt, ra, $1 ; LONGJUMP3
9756 sethi ta, hi20(symbol) ; HI20
9757 ori ta, ta, lo12(symbol) ; LO12S0
9758 jr ta ;
9759 $1: ; LABEL */
9760
9761 /* Get the reloc for the address from which the register is
9762 being loaded. This reloc will tell us which function is
9763 actually being called. */
9764 enum elf_nds32_reloc_type checked_types[] =
9765 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9766
9767 int reloc_off = 0, cond_removed = 0, convertible;
9768 bfd_vma laddr;
9769 int seq_len; /* Original length of instruction sequence. */
9770 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9771 int pic_ext_target = 0, first_size;
9772 unsigned int i;
9773 bfd_signed_vma foff;
9774 uint32_t insn, re_insn = 0;
9775 uint16_t insn16, re_insn16 = 0;
9776 unsigned long reloc, cond_reloc;
35c08157 9777
1c8f6a4d
KLC		 9778 irelend = internal_relocs + sec->reloc_count;
9779 seq_len = GET_SEQ_LEN (irel->r_addend);
9780 laddr = irel->r_offset;
9781 *insn_len = seq_len;
35c08157 9782
1c8f6a4d 9783 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9784
1c8f6a4d
KLC		 9785 if (convertible)
9786 first_size = 2;
9787 else
9788 first_size = 4;
9789
9790 /* Get all needed relocations. */
9791 hi_irelfn =
9792 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9793 R_NDS32_HI20_RELA, laddr + first_size);
9794 lo_irelfn =
9795 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9796 R_NDS32_LO12S0_ORI_RELA,
9797 laddr + first_size + 4);
9798
9799 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9800 {
9801 cond_irelfn =
9802 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9803 checked_types[i], laddr);
9804 if (cond_irelfn != irelend)
9805 break;
9806 }
35c08157 9807
1c8f6a4d
KLC		 9808 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9809 {
9810 (*_bfd_error_handler)
9811 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9812 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9813 return FALSE;
9814 }
35c08157 9815
1c8f6a4d
KLC		 9816 /* Get the value of the symbol referred to by the reloc. */
9817 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9818 &pic_ext_target);
35c08157 9819
1c8f6a4d
KLC		 9820 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9821 || foff >= CONSERVATIVE_24BIT_S1)
9822 return FALSE;
35c08157 9823
1c8f6a4d
KLC		 9824 /* Get the all corresponding instructions. */
9825 if (first_size == 4)
9826 {
9827 insn = bfd_getb32 (contents + laddr);
9828 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9829 }
9830 else
9831 {
9832 insn16 = bfd_getb16 (contents + laddr);
9833 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9834 }
35c08157 9835
1c8f6a4d
KLC		 9836 /* For simplicity of coding, we are going to modify the section
9837 contents, the section relocs, and the BFD symbol table. We
9838 must tell the rest of the code not to free up this
9839 information. It would be possible to instead create a table
9840 of changes which have to be made, as is done in coff-mips.c;
9841 that would be more work, but would require less memory when
9842 the linker is run. */
35c08157 9843
1c8f6a4d
KLC		 9844 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9845 && foff < ACCURATE_8BIT_S1 - first_size)
9846 {
9847 if (!(seq_len & 0x2))
9848 {
9849 /* Don't convert it to 16-bit now, keep this as relaxable
9850 for ``label reloc; INSN1a''6. */
9851 /* Save comp_insn32 to buffer. */
9852 bfd_putb32 (re_insn, contents + irel->r_offset);
9853 *insn_len = 4;
9854 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9855 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9856 cond_reloc = R_NDS32_INSN16;
9857 }
9858 else
9859 {
9860 /* Not optimize for speed; convert sequence to 16-bit. */
9861 /* Save comp_insn16 to buffer. */
9862 bfd_putb16 (re_insn16, contents + irel->r_offset);
9863 *insn_len = 2;
9864 reloc = R_NDS32_9_PCREL_RELA;
9865 cond_reloc = R_NDS32_NONE;
9866 }
9867 cond_removed = 1;
9868 }
9869 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9870 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9871 && foff < ACCURATE_14BIT_S1 - first_size))
9872 {
9873 /* beqs label ; 15_PCREL */
9874 bfd_putb32 (re_insn, contents + irel->r_offset);
9875 *insn_len = 4;
9876 reloc = R_NDS32_15_PCREL_RELA;
9877 cond_reloc = R_NDS32_NONE;
9878 cond_removed = 1;
9879 }
9880 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9881 && foff >= -CONSERVATIVE_16BIT_S1
9882 && foff < CONSERVATIVE_16BIT_S1)
9883 {
9884 /* beqz label ; 17_PCREL */
9885 bfd_putb32 (re_insn, contents + irel->r_offset);
9886 *insn_len = 4;
9887 reloc = R_NDS32_17_PCREL_RELA;
9888 cond_reloc = R_NDS32_NONE;
9889 cond_removed = 1;
9890 }
9891 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9892 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9893 {
9894 /* Relax to one of the following 3 variations
9895
9896 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9897 for space
9898 bnes38 rt, $1 ; LONGJUMP2
9899 j label ; 25_PCREL
9900 $1
9901
9902 case 4-4; 1st insn not convertible, others don't care
9903 bne rt, ra, $1 ; LONGJUMP2
9904 j label ; 25_PCREL
9905 $1
9906
9907 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9908 bne rt, ra, $1 ; LONGJUMP2
9909 j label ; 25_PCREL
9910 $1 */
9911
9912 /* Offset for first instruction. */
9913
9914 /* Use j label as second instruction. */
9915 *insn_len = 4 + first_size;
9916 insn = INSN_J;
9917 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9918 reloc = R_NDS32_LONGJUMP2;
9919 cond_reloc = R_NDS32_25_PLTREL;
9920 }
9921 else
9922 return FALSE;
35c08157 9923
1c8f6a4d
KLC		 9924 if (cond_removed == 1)
9925 {
9926 /* Set all relocations. */
9927 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9928 irel->r_addend = hi_irelfn->r_addend;
9929
9930 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9931 cond_reloc);
9932 cond_irelfn->r_addend = 0;
9933 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9934 R_NDS32_NONE);
9935 }
9936 else
9937 {
9938 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9939 irel->r_addend = irel->r_addend;
9940 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9941 cond_reloc);
9942 }
35c08157 9943
1c8f6a4d
KLC		 9944 if ((seq_len ^ *insn_len ) & 0x2)
9945 {
9946 insn16 = NDS32_NOP16;
9947 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9948 lo_irelfn->r_offset = *insn_len;
9949 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9950 R_NDS32_INSN16);
9951 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9952 *insn_len += 2;
9953 }
9954 else
9955 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9956 R_NDS32_NONE);
9957 return TRUE;
9958}
35c08157 9959
1c8f6a4d 9960/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9961
1c8f6a4d
KLC		 9962static bfd_boolean
9963nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9964 Elf_Internal_Rela *internal_relocs, int *insn_len,
9965 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9966 Elf_Internal_Shdr *symtab_hdr)
9967{
9968 /* The pattern for LONGCALL4. Support for function cse.
9969 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9970 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9971 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9972
1c8f6a4d
KLC		 9973 bfd_vma laddr;
9974 uint32_t insn;
9975 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9976 Elf_Internal_Rela *irelend;
9977 int pic_ext_target = 0;
9978 bfd_signed_vma foff;
35c08157 9979
1c8f6a4d
KLC		 9980 irelend = internal_relocs + sec->reloc_count;
9981 laddr = irel->r_offset;
35c08157 9982
1c8f6a4d
KLC		 9983 /* Get the reloc for the address from which the register is
9984 being loaded. This reloc will tell us which function is
9985 actually being called. */
9986 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9987 R_NDS32_HI20_RELA, laddr);
35c08157 9988
1c8f6a4d
KLC		 9989 if (hi_irel == irelend)
9990 {
9991 (*_bfd_error_handler)
9992 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9993 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9994 return FALSE;
9995 }
35c08157 9996
1c8f6a4d
KLC		 9997 /* Get the value of the symbol referred to by the reloc. */
9998 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9999 &pic_ext_target);
35c08157 10000
1c8f6a4d
KLC		 10001 /* This condition only happened when symbol is undefined. */
10002 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10003 || foff >= CONSERVATIVE_24BIT_S1)
10004 return FALSE;
35c08157 10005
1c8f6a4d
KLC		 10006 /* Relax to: jal symbol; 25_PCREL */
10007 /* For simplicity of coding, we are going to modify the section
10008 contents, the section relocs, and the BFD symbol table. We
10009 must tell the rest of the code not to free up this
10010 information. It would be possible to instead create a table
10011 of changes which have to be made, as is done in coff-mips.c;
10012 that would be more work, but would require less memory when
10013 the linker is run. */
35c08157 10014
1c8f6a4d
KLC		 10015 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10016 R_NDS32_PTR_RESOLVED, irel->r_addend);
10017 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10018 R_NDS32_EMPTY, irel->r_addend);
35c08157 10019
1c8f6a4d
KLC		 10020 if (ptr_irel == irelend || em_irel == irelend)
10021 {
10022 (*_bfd_error_handler)
10023 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10024 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10025 return FALSE;
10026 }
10027 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10028 insn = bfd_getb32 (contents + irel->r_addend);
10029 if (insn & 0x80000000)
10030 return FALSE;
35c08157 10031
1c8f6a4d
KLC		 10032 /* Replace the long call with a jal. */
10033 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10034 R_NDS32_25_PCREL_RELA);
10035 ptr_irel->r_addend = 1;
35c08157 10036
1c8f6a4d
KLC		 10037 /* We don't resolve this here but resolve it in relocate_section. */
10038 insn = INSN_JAL;
10039 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10040
1c8f6a4d
KLC		 10041 irel->r_info =
10042 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10043
1c8f6a4d
KLC		 10044 /* If there is function cse, HI20 can not remove now. */
10045 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10046 R_NDS32_LONGCALL4, laddr);
10047 if (call_irel == irelend)
10048 {
10049 *insn_len = 0;
10050 hi_irel->r_info =
10051 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10052 }
35c08157 10053
1c8f6a4d
KLC		 10054 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10055 R_NDS32_INSN16, irel->r_addend);
10056 if (insn_irel != irelend)
10057 insn_irel->r_info =
10058 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10059
1c8f6a4d
KLC		 10060 return TRUE;
10061}
35c08157 10062
1c8f6a4d 10063/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10064
1c8f6a4d
KLC		 10065static bfd_boolean
10066nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10067 Elf_Internal_Rela *internal_relocs, int *insn_len,
10068 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10069 Elf_Internal_Shdr *symtab_hdr)
10070{
10071 /* The pattern for LONGCALL5.
10072 bltz rt, .L1 ; LONGCALL5/17_PCREL
10073 jal symbol ; 25_PCREL
10074 .L1: */
35c08157 10075
1c8f6a4d
KLC		 10076 bfd_vma laddr;
10077 uint32_t insn;
10078 Elf_Internal_Rela *cond_irel, *irelend;
10079 int pic_ext_target = 0;
10080 bfd_signed_vma foff;
35c08157 10081
1c8f6a4d
KLC		 10082 irelend = internal_relocs + sec->reloc_count;
10083 laddr = irel->r_offset;
10084 insn = bfd_getb32 (contents + laddr);
35c08157 10085
1c8f6a4d
KLC		 10086 /* Get the reloc for the address from which the register is
10087 being loaded. This reloc will tell us which function is
10088 actually being called. */
10089 cond_irel =
10090 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10091 R_NDS32_25_PCREL_RELA, irel->r_addend);
10092 if (cond_irel == irelend)
10093 {
10094 (*_bfd_error_handler)
10095 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10096 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10097 return FALSE;
10098 }
35c08157 10099
1c8f6a4d
KLC		 10100 /* Get the value of the symbol referred to by the reloc. */
10101 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10102 &pic_ext_target);
35c08157 10103
1c8f6a4d
KLC		 10104 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10105 || foff >= CONSERVATIVE_16BIT_S1)
10106 return FALSE;
35c08157 10107
1c8f6a4d
KLC		 10108 /* Relax to bgezal rt, label ; 17_PCREL
10109 or bltzal rt, label ; 17_PCREL */
35c08157 10110
1c8f6a4d
KLC		 10111 /* Convert to complimentary conditional call. */
10112 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10113
1c8f6a4d
KLC		 10114 /* For simplicity of coding, we are going to modify the section
10115 contents, the section relocs, and the BFD symbol table. We
10116 must tell the rest of the code not to free up this
10117 information. It would be possible to instead create a table
10118 of changes which have to be made, as is done in coff-mips.c;
10119 that would be more work, but would require less memory when
10120 the linker is run. */
35c08157 10121
1c8f6a4d
KLC		 10122 /* Modify relocation and contents. */
10123 cond_irel->r_info =
10124 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10125
1c8f6a4d
KLC		 10126 /* Replace the long call with a bgezal. */
10127 bfd_putb32 (insn, contents + cond_irel->r_offset);
10128 *insn_len = 0;
35c08157 10129
1c8f6a4d
KLC		 10130 /* Clean unnessary relocations. */
10131 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10132
1c8f6a4d
KLC		 10133 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10134 R_NDS32_17_PCREL_RELA, laddr);
10135 cond_irel->r_info =
10136 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10137
1c8f6a4d
KLC		 10138 return TRUE;
10139}
35c08157 10140
1c8f6a4d 10141/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10142
1c8f6a4d
KLC		 10143static bfd_boolean
10144nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10145 Elf_Internal_Rela *internal_relocs, int *insn_len,
10146 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10147 Elf_Internal_Shdr *symtab_hdr)
10148{
10149 /* The pattern for LONGCALL6.
10150 bltz rt, .L1 ; LONGCALL6/17_PCREL
10151 sethi ta, hi20(symbol) ; HI20/PTR
10152 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10153 jral ta ; PTR_RES/EMPTY/INSN16
10154 .L1 */
10155
10156 bfd_vma laddr;
10157 uint32_t insn;
10158 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10159 int pic_ext_target = 0;
10160 bfd_signed_vma foff;
35c08157 10161
1c8f6a4d
KLC		 10162 irelend = internal_relocs + sec->reloc_count;
10163 laddr = irel->r_offset;
35c08157 10164
1c8f6a4d
KLC		 10165 /* Get the reloc for the address from which the register is
10166 being loaded. This reloc will tell us which function is
10167 actually being called. */
10168 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10169 R_NDS32_EMPTY, irel->r_addend);
35c08157 10170
1c8f6a4d
KLC		 10171 if (em_irel == irelend)
10172 {
10173 (*_bfd_error_handler)
10174 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10175 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10176 return FALSE;
10177 }
35c08157 10178
1c8f6a4d
KLC		 10179 /* Get the value of the symbol referred to by the reloc. */
10180 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10181 &pic_ext_target);
35c08157 10182
1c8f6a4d
KLC		 10183 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10184 || foff >= CONSERVATIVE_24BIT_S1)
10185 return FALSE;
35c08157 10186
1c8f6a4d
KLC		 10187 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10188 insn = bfd_getb32 (contents + irel->r_addend);
10189 if (insn & 0x80000000)
10190 return FALSE;
35c08157 10191
1c8f6a4d
KLC		 10192 insn = bfd_getb32 (contents + laddr);
10193 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10194 {
10195 /* Relax to bgezal rt, label ; 17_PCREL
10196 or bltzal rt, label ; 17_PCREL */
35c08157 10197
1c8f6a4d
KLC		 10198 /* Convert to complimentary conditional call. */
10199 *insn_len = 0;
10200 insn = CONVERT_CONDITION_CALL (insn);
10201 bfd_putb32 (insn, contents + em_irel->r_offset);
10202
10203 em_irel->r_info =
10204 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10205
10206 /* Set resolved relocation. */
10207 cond_irel =
10208 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10209 R_NDS32_PTR_RESOLVED, irel->r_addend);
10210 if (cond_irel == irelend)
35c08157 10211 {
1c8f6a4d
KLC		 10212 (*_bfd_error_handler)
10213 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10214 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10215 return FALSE;
10216 }
10217 cond_irel->r_addend = 1;
35c08157 10218
1c8f6a4d 10219 /* Clear relocations. */
35c08157 10220
1c8f6a4d
KLC		 10221 irel->r_info =
10222 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10223
1c8f6a4d
KLC		 10224 cond_irel =
10225 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10226 R_NDS32_17_PCREL_RELA, laddr);
10227 if (cond_irel != irelend)
10228 cond_irel->r_info =
10229 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10230
1c8f6a4d
KLC		 10231 cond_irel =
10232 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10233 R_NDS32_INSN16, irel->r_addend);
10234 if (cond_irel != irelend)
10235 cond_irel->r_info =
10236 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10237
1c8f6a4d
KLC		 10238 }
10239 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10240 {
10241 /* Relax to the following instruction sequence
10242 bltz rt, .L1 ; LONGCALL2/17_PCREL
10243 jal symbol ; 25_PCREL/PTR_RES
10244 .L1 */
10245 *insn_len = 4;
10246 /* Convert instruction. */
10247 insn = INSN_JAL;
10248 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10249
1c8f6a4d
KLC		 10250 /* Convert relocations. */
10251 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10252 R_NDS32_25_PCREL_RELA);
10253 irel->r_info =
10254 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10255
1c8f6a4d
KLC		 10256 /* Set resolved relocation. */
10257 cond_irel =
10258 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10259 R_NDS32_PTR_RESOLVED, irel->r_addend);
10260 if (cond_irel == irelend)
10261 {
10262 (*_bfd_error_handler)
10263 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10264 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10265 return FALSE;
10266 }
10267 cond_irel->r_addend = 1;
35c08157 10268
1c8f6a4d
KLC		 10269 cond_irel =
10270 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10271 R_NDS32_INSN16, irel->r_addend);
10272 if (cond_irel != irelend)
10273 cond_irel->r_info =
10274 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10275 }
10276 return TRUE;
10277}
35c08157 10278
1c8f6a4d 10279/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10280
1c8f6a4d
KLC		 10281static bfd_boolean
10282nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10283 Elf_Internal_Rela *internal_relocs, int *insn_len,
10284 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10285 Elf_Internal_Shdr *symtab_hdr)
10286{
10287 /* The pattern for LONGJUMP4.
10288 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10289 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10290 jr ta ; PTR_RES/INSN16/EMPTY */
10291
10292 bfd_vma laddr;
10293 int seq_len; /* Original length of instruction sequence. */
10294 uint32_t insn;
10295 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10296 int pic_ext_target = 0;
10297 bfd_signed_vma foff;
35c08157 10298
1c8f6a4d
KLC		 10299 irelend = internal_relocs + sec->reloc_count;
10300 seq_len = GET_SEQ_LEN (irel->r_addend);
10301 laddr = irel->r_offset;
10302 *insn_len = seq_len;
35c08157 10303
1c8f6a4d
KLC		 10304 /* Get the reloc for the address from which the register is
10305 being loaded. This reloc will tell us which function is
10306 actually being called. */
35c08157 10307
1c8f6a4d
KLC		 10308 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10309 R_NDS32_HI20_RELA, laddr);
35c08157 10310
1c8f6a4d
KLC		 10311 if (hi_irel == irelend)
10312 {
10313 (*_bfd_error_handler)
10314 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10315 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10316 return FALSE;
10317 }
35c08157 10318
1c8f6a4d
KLC		 10319 /* Get the value of the symbol referred to by the reloc. */
10320 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10321 &pic_ext_target);
35c08157 10322
1c8f6a4d
KLC		 10323 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10324 || foff < -CONSERVATIVE_24BIT_S1)
10325 return FALSE;
35c08157 10326
1c8f6a4d
KLC		 10327 /* Convert it to "j label", it may be converted to j8 in the final
10328 pass of relaxation. Therefore, we do not consider this currently. */
10329 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10330 R_NDS32_PTR_RESOLVED, irel->r_addend);
10331 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10332 R_NDS32_EMPTY, irel->r_addend);
35c08157 10333
1c8f6a4d
KLC		 10334 if (ptr_irel == irelend || em_irel == irelend)
10335 {
10336 (*_bfd_error_handler)
10337 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10338 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10339 return FALSE;
10340 }
35c08157 10341
1c8f6a4d
KLC		 10342 em_irel->r_info =
10343 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10344 ptr_irel->r_addend = 1;
35c08157 10345
1c8f6a4d
KLC		 10346 /* Write instruction. */
10347 insn = INSN_J;
10348 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10349
1c8f6a4d
KLC		 10350 /* Clear relocations. */
10351 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10352
1c8f6a4d
KLC		 10353 /* If there is function cse, HI20 can not remove now. */
10354 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10355 R_NDS32_LONGJUMP4, laddr);
10356 if (call_irel == irelend)
10357 {
10358 *insn_len = 0;
10359 hi_irel->r_info =
10360 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10361 }
35c08157 10362
1c8f6a4d
KLC		 10363 return TRUE;
10364}
35c08157 10365
1c8f6a4d 10366/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10367
1c8f6a4d
KLC		 10368static bfd_boolean
10369nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10370 Elf_Internal_Rela *internal_relocs, int *insn_len,
10371 int *seq_len, bfd_byte *contents,
10372 Elf_Internal_Sym *isymbuf,
10373 Elf_Internal_Shdr *symtab_hdr)
10374{
10375 /* There are 2 variations for LONGJUMP5
10376 case 2-4; 1st insn convertible, 16-bit on.
10377 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10378 j label ; 25_PCREL/INSN16
10379 $1:
10380
10381 case 4-4; 1st insn not convertible
10382 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10383 j label ; 25_PCREL/INSN16
10384 .L1: */
10385
10386 bfd_vma laddr;
10387 Elf_Internal_Rela *cond_irel, *irelend;
10388 int pic_ext_target = 0;
10389 unsigned int i;
10390 bfd_signed_vma foff;
10391 uint32_t insn, re_insn = 0;
10392 uint16_t insn16, re_insn16 = 0;
10393 unsigned long reloc;
35c08157 10394
1c8f6a4d
KLC		 10395 enum elf_nds32_reloc_type checked_types[] =
10396 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10397 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10398
1c8f6a4d
KLC		 10399 irelend = internal_relocs + sec->reloc_count;
10400 laddr = irel->r_offset;
35c08157 10401
1c8f6a4d
KLC		 10402 /* Get the reloc for the address from which the register is
10403 being loaded. This reloc will tell us which function is
10404 actually being called. */
35c08157 10405
1c8f6a4d
KLC		 10406 cond_irel =
10407 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10408 R_NDS32_25_PCREL_RELA, irel->r_addend);
10409 if (cond_irel == irelend)
10410 {
10411 (*_bfd_error_handler)
10412 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10413 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10414 return FALSE;
10415 }
35c08157 10416
1c8f6a4d
KLC		 10417 /* Get the value of the symbol referred to by the reloc. */
10418 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10419 &pic_ext_target);
35c08157 10420
1c8f6a4d
KLC		 10421 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10422 || foff >= CONSERVATIVE_16BIT_S1)
10423 return FALSE;
35c08157 10424
1c8f6a4d
KLC		 10425 /* Get the all corresponding instructions. */
10426 insn = bfd_getb32 (contents + laddr);
10427 /* Check instruction size. */
10428 if (insn & 0x80000000)
10429 {
10430 *seq_len = 0;
10431 insn16 = insn >> 16;
10432 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10433 }
10434 else
10435 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10436
1c8f6a4d
KLC		 10437 if (N32_OP6 (re_insn) == N32_OP6_BR1
10438 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10439 {
10440 /* beqs label ; 15_PCREL. */
10441 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10442 reloc = R_NDS32_15_PCREL_RELA;
10443 }
10444 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10445 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10446 {
10447 /* beqz label ; 17_PCREL. */
10448 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10449 reloc = R_NDS32_17_PCREL_RELA;
10450 }
10451 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10452 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10453 {
10454 /* beqc label ; 9_PCREL. */
10455 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10456 reloc = R_NDS32_WORD_9_PCREL_RELA;
10457 }
10458 else
10459 return FALSE;
35c08157 10460
1c8f6a4d
KLC		 10461 /* Set all relocations. */
10462 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10463
1c8f6a4d
KLC		 10464 /* Clean relocations. */
10465 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10466 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10467 {
10468 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10469 checked_types[i], laddr);
10470 if (cond_irel != irelend)
10471 {
10472 if (*seq_len == 0
10473 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10474 {
1c8f6a4d
KLC		 10475 /* If the branch instruction is 2 byte, it cannot remove
10476 directly. Only convert it to nop16 and remove it after
10477 checking alignment issue. */
10478 insn16 = NDS32_NOP16;
10479 bfd_putb16 (insn16, contents + laddr);
10480 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10481 }
10482 else
1c8f6a4d
KLC		 10483 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10484 R_NDS32_NONE);
35c08157 10485 }
1c8f6a4d
KLC		 10486 }
10487 *insn_len = 0;
35c08157 10488
1c8f6a4d
KLC		 10489 return TRUE;
10490}
35c08157 10491
1c8f6a4d 10492/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10493
1c8f6a4d
KLC		 10494static bfd_boolean
10495nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10496 Elf_Internal_Rela *internal_relocs, int *insn_len,
10497 int *seq_len, bfd_byte *contents,
10498 Elf_Internal_Sym *isymbuf,
10499 Elf_Internal_Shdr *symtab_hdr)
10500{
10501 /* There are 5 variations for LONGJUMP6
10502 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10503 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10504 sethi ta, hi20(symbol) ; HI20/PTR
10505 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10506 jr ta ; PTR_RES/INSN16/EMPTY
10507 .L1:
10508
10509 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10510 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10511 sethi ta, hi20(symbol) ; HI20/PTR
10512 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10513 jr ta ; PTR_RES/INSN16/EMPTY
10514 .L1: */
10515
10516 enum elf_nds32_reloc_type checked_types[] =
10517 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10518 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10519
10520 int reloc_off = 0, cond_removed = 0;
10521 bfd_vma laddr;
10522 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10523 int pic_ext_target = 0;
10524 unsigned int i;
10525 bfd_signed_vma foff;
10526 uint32_t insn, re_insn = 0;
10527 uint16_t insn16, re_insn16 = 0;
10528 unsigned long reloc;
35c08157 10529
1c8f6a4d
KLC		 10530 irelend = internal_relocs + sec->reloc_count;
10531 laddr = irel->r_offset;
35c08157 10532
1c8f6a4d
KLC		 10533 /* Get the reloc for the address from which the register is
10534 being loaded. This reloc will tell us which function is
10535 actually being called. */
10536 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10537 R_NDS32_EMPTY, irel->r_addend);
35c08157 10538
1c8f6a4d
KLC		 10539 if (em_irel == irelend)
10540 {
10541 (*_bfd_error_handler)
10542 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10543 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10544 return FALSE;
10545 }
35c08157 10546
1c8f6a4d
KLC		 10547 /* Get the value of the symbol referred to by the reloc. */
10548 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10549 &pic_ext_target);
35c08157 10550
1c8f6a4d
KLC		 10551 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10552 || foff >= CONSERVATIVE_24BIT_S1)
10553 return FALSE;
35c08157 10554
1c8f6a4d
KLC		 10555 insn = bfd_getb32 (contents + laddr);
10556 /* Check instruction size. */
10557 if (insn & 0x80000000)
10558 {
10559 *seq_len = 0;
10560 insn16 = insn >> 16;
10561 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10562 }
10563 else
10564 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10565
1c8f6a4d
KLC		 10566 /* For simplicity of coding, we are going to modify the section
10567 contents, the section relocs, and the BFD symbol table. We
10568 must tell the rest of the code not to free up this
10569 information. It would be possible to instead create a table
10570 of changes which have to be made, as is done in coff-mips.c;
10571 that would be more work, but would require less memory when
10572 the linker is run. */
35c08157 10573
1c8f6a4d
KLC		 10574 if (N32_OP6 (re_insn) == N32_OP6_BR1
10575 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10576 {
10577 /* beqs label ; 15_PCREL */
10578 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10579 reloc = R_NDS32_15_PCREL_RELA;
10580 cond_removed = 1;
10581 }
10582 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10583 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10584 {
10585 /* beqz label ; 17_PCREL */
10586 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10587 reloc = R_NDS32_17_PCREL_RELA;
10588 cond_removed = 1;
10589 }
10590 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10591 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10592 {
10593 /* Relax to one of the following 2 variations
35c08157 10594
1c8f6a4d
KLC		 10595 case 2-4; 1st insn convertible, 16-bit on.
10596 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10597 j label ; 25_PCREL/INSN16
10598 $1:
35c08157 10599
1c8f6a4d
KLC		 10600 case 4-4; 1st insn not convertible
10601 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10602 j label ; 25_PCREL/INSN16
10603 .L1: */
35c08157 10604
1c8f6a4d
KLC		 10605 /* Use j label as second instruction. */
10606 insn = INSN_J;
10607 reloc = R_NDS32_25_PCREL_RELA;
10608 bfd_putb32 (insn, contents + em_irel->r_offset);
10609 }
10610 else
10611 return FALSE;
35c08157 10612
1c8f6a4d
KLC		 10613 /* Set all relocations. */
10614 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10615
1c8f6a4d
KLC		 10616 cond_irel =
10617 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10618 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10619 cond_irel->r_addend = 1;
35c08157 10620
1c8f6a4d
KLC		 10621 /* Use INSN16 of first branch instruction to distinguish if keeping
10622 INSN16 of final instruction or not. */
10623 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10624 R_NDS32_INSN16, irel->r_offset);
10625 if (insn_irel == irelend)
10626 {
10627 /* Clean the final INSN16. */
10628 insn_irel =
10629 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10630 R_NDS32_INSN16, em_irel->r_offset);
10631 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10632 R_NDS32_NONE);
10633 }
10634
10635 if (cond_removed == 1)
10636 {
10637 *insn_len = 0;
10638
10639 /* Clear relocations. */
10640 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10641
1c8f6a4d
KLC		 10642 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10643 {
10644 cond_irel =
10645 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10646 checked_types[i], laddr);
10647 if (cond_irel != irelend)
35c08157 10648 {
1c8f6a4d
KLC		 10649 if (*seq_len == 0
10650 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10651 {
10652 /* If the branch instruction is 2 byte, it cannot remove
10653 directly. Only convert it to nop16 and remove it after
10654 checking alignment issue. */
10655 insn16 = NDS32_NOP16;
10656 bfd_putb16 (insn16, contents + laddr);
10657 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10658 }
10659 else
10660 cond_irel->r_info =
10661 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10662 }
35c08157 10663 }
1c8f6a4d
KLC		 10664 }
10665 else
10666 {
10667 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10668 R_NDS32_LONGJUMP5);
10669 }
35c08157 10670
1c8f6a4d
KLC		 10671 return TRUE;
10672}
35c08157 10673
1c8f6a4d 10674/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10675
1c8f6a4d
KLC		 10676static bfd_boolean
10677nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10678 Elf_Internal_Rela *internal_relocs, int *insn_len,
10679 int *seq_len, bfd_byte *contents,
10680 Elf_Internal_Sym *isymbuf,
10681 Elf_Internal_Shdr *symtab_hdr)
10682{
10683 /* There are 2 variations for LONGJUMP5
10684 case 2-4; 1st insn convertible, 16-bit on.
10685 movi55 ta, imm11 ; LONGJUMP7/INSN16
10686 beq rt, ta, label ; 15_PCREL
10687
10688 case 4-4; 1st insn not convertible
10689 movi55 ta, imm11 ; LONGJUMP7/INSN16
10690 beq rt, ta, label ; 15_PCREL */
10691
10692 bfd_vma laddr;
10693 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10694 int pic_ext_target = 0;
10695 bfd_signed_vma foff;
10696 uint32_t insn, re_insn = 0;
10697 uint16_t insn16;
10698 uint32_t imm11;
35c08157 10699
1c8f6a4d
KLC		 10700 irelend = internal_relocs + sec->reloc_count;
10701 laddr = irel->r_offset;
35c08157 10702
1c8f6a4d
KLC		 10703 /* Get the reloc for the address from which the register is
10704 being loaded. This reloc will tell us which function is
10705 actually being called. */
35c08157 10706
1c8f6a4d
KLC		 10707 cond_irel =
10708 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10709 R_NDS32_15_PCREL_RELA, irel->r_addend);
10710 if (cond_irel == irelend)
10711 {
10712 (*_bfd_error_handler)
10713 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10714 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10715 return FALSE;
10716 }
35c08157 10717
1c8f6a4d
KLC		 10718 /* Get the value of the symbol referred to by the reloc. */
10719 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10720 &pic_ext_target);
35c08157 10721
1c8f6a4d
KLC		 10722 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10723 || foff >= CONSERVATIVE_8BIT_S1)
10724 return FALSE;
35c08157 10725
1c8f6a4d
KLC		 10726 /* Get the first instruction for its size. */
10727 insn = bfd_getb32 (contents + laddr);
10728 if (insn & 0x80000000)
10729 {
10730 *seq_len = 0;
10731 /* Get the immediate from movi55. */
10732 imm11 = N16_IMM5S (insn >> 16);
10733 }
10734 else
10735 {
10736 /* Get the immediate from movi. */
10737 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10738 }
10739
1c8f6a4d
KLC		 10740 /* Get the branch instruction. */
10741 insn = bfd_getb32 (contents + irel->r_addend);
10742 /* Convert instruction to BR3. */
10743 if ((insn >> 14) & 0x1)
10744 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10745 else
10746 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10747
1c8f6a4d 10748 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10749
1c8f6a4d
KLC		 10750 /* Set all relocations. */
10751 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10752 R_NDS32_WORD_9_PCREL_RELA);
10753
10754 /* Clean relocations. */
10755 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10756 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10757 R_NDS32_INSN16, irel->r_offset);
10758 if (insn_irel != irelend)
10759 {
10760 if (*seq_len == 0)
35c08157 10761 {
1c8f6a4d
KLC		 10762 /* If the first insntruction is 16bit, convert it to nop16. */
10763 insn16 = NDS32_NOP16;
10764 bfd_putb16 (insn16, contents + laddr);
10765 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10766 }
1c8f6a4d
KLC		 10767 else
10768 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10769 R_NDS32_NONE);
35c08157 10770 }
1c8f6a4d 10771 *insn_len = 0;
35c08157 10772
1c8f6a4d
KLC		 10773 return TRUE;
10774}
35c08157 10775
1c8f6a4d 10776#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10777
1c8f6a4d 10778/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10779
1c8f6a4d
KLC		 10780static bfd_boolean
10781nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10782 asection *sec, Elf_Internal_Rela *irel,
10783 Elf_Internal_Rela *internal_relocs, int *insn_len,
10784 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10785 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10786{
10787 int eliminate_sethi = 0, range_type, i;
10788 bfd_vma local_sda, laddr;
10789 int seq_len; /* Original length of instruction sequence. */
10790 uint32_t insn;
10791 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10792 bfd_vma access_addr = 0;
10793 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10794 enum elf_nds32_reloc_type checked_types[] =
10795 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10796 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10797 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10798 R_NDS32_TLS_LE_HI20
10799 };
35c08157 10800
1c8f6a4d
KLC		 10801 irelend = internal_relocs + sec->reloc_count;
10802 seq_len = GET_SEQ_LEN (irel->r_addend);
10803 laddr = irel->r_offset;
10804 *insn_len = seq_len;
35c08157 10805
1c8f6a4d
KLC		 10806 /* Get the high part relocation. */
10807 for (i = 0; (unsigned) i < sizeof (checked_types); i++)
10808 {
10809 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10810 checked_types[i], laddr);
10811 if (hi_irelfn != irelend)
10812 break;
10813 }
35c08157 10814
1c8f6a4d
KLC		 10815 if (hi_irelfn == irelend)
10816 {
10817 (*_bfd_error_handler)
10818 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10819 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10820 return FALSE;
10821 }
35c08157 10822
1c8f6a4d
KLC		 10823 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10824 nds32_elf_final_sda_base (sec->output_section->owner,
10825 link_info, &local_sda, FALSE);
35c08157 10826
1c8f6a4d
KLC		 10827 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10828 {
10829 case R_NDS32_HI20_RELA:
10830 insn = bfd_getb32 (contents + laddr);
10831 access_addr =
10832 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10833
10834 if (range_type == NDS32_LOADSTORE_IMM)
10835 {
10836 struct elf_link_hash_entry *h = NULL;
10837 int indx;
35c08157 10838
1c8f6a4d 10839 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10840 {
1c8f6a4d
KLC		 10841 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10842 h = elf_sym_hashes (abfd)[indx];
35c08157 10843 }
35c08157 10844
1c8f6a4d
KLC		 10845 if ((access_addr < CONSERVATIVE_20BIT)
10846 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10847 {
1c8f6a4d
KLC		 10848 eliminate_sethi = 1;
10849 break;
35c08157 10850 }
1c8f6a4d
KLC		 10851
10852 /* This is avoid to relax symbol address which is fixed
10853 relocations. Ex: _stack. */
10854 if (h && bfd_is_abs_section (h->root.u.def.section))
10855 return FALSE;
10856 }
10857
10858 if (!load_store_relax)
10859 return FALSE;
10860
10861 /* Case for set gp register. */
10862 if (N32_RT5 (insn) == REG_GP)
10863 break;
10864
10865 if (range_type == NDS32_LOADSTORE_FLOAT_S
10866 || range_type == NDS32_LOADSTORE_FLOAT_S)
10867 {
10868 range_l = sdata_range[0][0];
10869 range_h = sdata_range[0][1];
10870 }
10871 else
10872 {
10873 range_l = sdata_range[1][0];
10874 range_h = sdata_range[1][1];
10875 }
10876 break;
10877
10878 case R_NDS32_GOT_HI20:
10879 access_addr =
10880 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10881
10882 /* If this symbol is not in .got, the return value will be -1.
10883 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10884 a negative offset is allowed. */
10885 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10886 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10887 eliminate_sethi = 1;
10888 break;
10889
10890 case R_NDS32_PLT_GOTREL_HI20:
10891 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10892 hi_irelfn, symtab_hdr);
10893
10894 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10895 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10896 eliminate_sethi = 1;
10897 break;
10898
10899 case R_NDS32_GOTOFF_HI20:
10900 access_addr =
10901 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10902
10903 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10904 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10905 eliminate_sethi = 1;
10906 break;
10907
10908 case R_NDS32_GOTPC_HI20:
10909 /* The access_addr must consider r_addend of hi_irel. */
10910 access_addr = sec->output_section->vma + sec->output_offset
10911 + irel->r_offset + hi_irelfn->r_addend;
10912
10913 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10914 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10915 eliminate_sethi = 1;
10916 break;
10917
10918 case R_NDS32_TLS_LE_HI20:
10919 access_addr =
10920 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10921 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10922 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10923 if ((range_type == NDS32_LOADSTORE_IMM)
10924 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10925 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10926 eliminate_sethi = 1;
10927 break;
10928
10929 default:
10930 return FALSE;
10931 }
10932
10933 /* Delete sethi instruction. */
10934 if (eliminate_sethi == 1
10935 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10936 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10937 {
10938 hi_irelfn->r_info =
10939 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10940 irel->r_info =
10941 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10942 *insn_len = 0;
10943 }
10944 return TRUE;
10945}
10946
10947/* Relax LO12 relocation for nds32_elf_relax_section. */
10948
10949static void
10950nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10951 asection *sec, Elf_Internal_Rela *irel,
10952 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10953 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10954{
10955 uint32_t insn;
10956 bfd_vma local_sda, laddr;
10957 unsigned long reloc;
10958 bfd_vma access_addr;
10959 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10960 Elf_Internal_Rela *irelfn = NULL, *irelend;
10961 struct elf_link_hash_entry *h = NULL;
10962 int indx;
10963
10964 /* For SDA base relative relaxation. */
10965 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10966 &local_sda, FALSE);
10967
10968 irelend = internal_relocs + sec->reloc_count;
10969 laddr = irel->r_offset;
10970 insn = bfd_getb32 (contents + laddr);
10971
10972 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10973 return;
10974
10975 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10976
10977 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10978 {
10979 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10980 h = elf_sym_hashes (abfd)[indx];
10981 }
10982
10983 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10984 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10985 {
10986 reloc = R_NDS32_20_RELA;
10987 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10988 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10989 bfd_putb32 (insn, contents + laddr);
10990 }
10991 /* This is avoid to relax symbol address which is fixed
10992 relocations. Ex: _stack. */
10993 else if (N32_OP6 (insn) == N32_OP6_ORI
10994 && h && bfd_is_abs_section (h->root.u.def.section))
10995 return;
10996 else
10997 {
10998 range_l = sdata_range[1][0];
10999 range_h = sdata_range[1][1];
11000 switch (ELF32_R_TYPE (irel->r_info))
11001 {
11002 case R_NDS32_LO12S0_RELA:
11003 reloc = R_NDS32_SDA19S0_RELA;
11004 break;
11005 case R_NDS32_LO12S1_RELA:
11006 reloc = R_NDS32_SDA18S1_RELA;
11007 break;
11008 case R_NDS32_LO12S2_RELA:
11009 reloc = R_NDS32_SDA17S2_RELA;
11010 break;
11011 case R_NDS32_LO12S2_DP_RELA:
11012 range_l = sdata_range[0][0];
11013 range_h = sdata_range[0][1];
11014 reloc = R_NDS32_SDA12S2_DP_RELA;
11015 break;
11016 case R_NDS32_LO12S2_SP_RELA:
11017 range_l = sdata_range[0][0];
11018 range_h = sdata_range[0][1];
11019 reloc = R_NDS32_SDA12S2_SP_RELA;
11020 break;
11021 default:
11022 return;
11023 }
11024
11025 /* There are range_h and range_l because linker has to promise
11026 all sections move cross one page together. */
11027 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11028 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11029 {
11030 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11031 {
1c8f6a4d
KLC		 11032 /* Maybe we should add R_NDS32_INSN16 reloc type here
11033 or manually do some optimization. sethi can't be
11034 eliminated when updating $gp so the relative ori
11035 needs to be preserved. */
11036 return;
35c08157 11037 }
1c8f6a4d
KLC		 11038 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11039 &insn))
11040 return;
11041 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11042 bfd_putb32 (insn, contents + laddr);
11043
11044 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11045 R_NDS32_INSN16);
11046 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11047 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11048 irelfn->r_info =
11049 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11050
35c08157 11051 }
1c8f6a4d
KLC		 11052 }
11053 return;
11054}
35c08157 11055
1c8f6a4d
KLC		 11056/* Relax low part of PIC instruction pattern. */
11057
11058static void
11059nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11060 asection *sec, Elf_Internal_Rela *irel,
11061 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11062 Elf_Internal_Shdr *symtab_hdr)
11063{
11064 uint32_t insn;
11065 bfd_vma local_sda, laddr;
11066 bfd_signed_vma foff;
11067 unsigned long reloc;
11068
11069 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11070 &local_sda, FALSE);
11071 laddr = irel->r_offset;
11072 insn = bfd_getb32 (contents + laddr);
11073
11074 if (N32_OP6 (insn) != N32_OP6_ORI)
11075 return;
11076
11077 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11078 {
11079 foff = calculate_got_memory_address (abfd, link_info, irel,
11080 symtab_hdr) - local_sda;
11081 reloc = R_NDS32_GOT20;
11082 }
11083 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11084 {
11085 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11086 symtab_hdr) - local_sda;
11087 reloc = R_NDS32_PLT_GOTREL_LO20;
11088 }
11089 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11090 {
11091 foff = calculate_memory_address (abfd, irel, isymbuf,
11092 symtab_hdr) - local_sda;
11093 reloc = R_NDS32_GOTOFF;
11094 }
11095 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11096 {
11097 foff = local_sda - sec->output_section->vma + sec->output_offset
11098 + irel->r_offset + irel->r_addend;
11099 reloc = R_NDS32_GOTPC20;
11100 }
11101 else
11102 return;
11103
11104 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11105 {
11106 /* Turn into MOVI. */
11107 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11108 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11109 bfd_putb32 (insn, contents + laddr);
11110 }
11111}
11112
11113/* Relax low part of LE TLS instruction pattern. */
11114
11115static void
11116nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11117 Elf_Internal_Rela *irel,
11118 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11119 Elf_Internal_Shdr *symtab_hdr)
11120{
11121 uint32_t insn;
11122 bfd_vma laddr;
11123 bfd_signed_vma foff;
11124 unsigned long reloc;
11125
11126 laddr = irel->r_offset;
11127 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11128 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11129 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11130 insn = bfd_getb32 (contents + laddr);
11131
11132 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11133 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11134 {
11135 /* Pattern sethi-ori transform to movi. */
11136 reloc = R_NDS32_TLS_LE_20;
11137 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11138 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11139 bfd_putb32 (insn, contents + laddr);
11140 }
11141}
11142
11143/* Relax LE TLS calculate address instruction pattern. */
11144
11145static void
11146nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11147 asection *sec, Elf_Internal_Rela *irel,
11148 Elf_Internal_Rela *internal_relocs,
11149 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11150 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11151{
11152 /* Local TLS non-pic
11153 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11154 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11155 add ra, ta, tp ; TLS_LE_ADD */
11156
11157 uint32_t insn;
11158 bfd_vma laddr;
11159 bfd_signed_vma foff;
11160 Elf_Internal_Rela *i1_irelfn, *irelend;
11161
11162 irelend = internal_relocs + sec->reloc_count;
11163 laddr = irel->r_offset;
11164 insn = bfd_getb32 (contents + laddr);
11165 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11166 R_NDS32_PTR_RESOLVED);
11167 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11168 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11169 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11170
11171 /* The range is +/-16k. */
11172 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11173 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11174 {
11175 /* Transform add to addi. */
11176 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11177 irel->r_info =
11178 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11179
11180 bfd_putb32 (insn, contents + laddr);
11181 if (i1_irelfn != irelend)
11182 {
11183 i1_irelfn->r_addend |= 1;
11184 *again = TRUE;
11185 }
11186 }
11187}
11188
11189/* Relax LE TLS load store instruction pattern. */
11190
11191static void
11192nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11193 asection *sec, Elf_Internal_Rela *irel,
11194 Elf_Internal_Rela *internal_relocs,
11195 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11196 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11197{
11198
11199 uint32_t insn;
11200 bfd_vma laddr;
11201 bfd_signed_vma foff;
11202 Elf_Internal_Rela *i1_irelfn, *irelend;
11203 int success = 0;
11204
11205 irelend = internal_relocs + sec->reloc_count;
11206 laddr = irel->r_offset;
11207 insn = bfd_getb32 (contents + laddr);
11208 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11209 R_NDS32_PTR_RESOLVED);
11210 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11211 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11212 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11213
11214 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11215 {
11216 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11217 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11218 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11219 /* The range is +/-16k. */
11220 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11221 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11222 {
11223 insn =
11224 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11225 irel->r_info =
11226 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11227 success = 1;
11228 break;
11229 }
11230 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11231 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11232 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11233 /* The range is +/-32k. */
11234 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11235 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11236 {
1c8f6a4d
KLC		 11237 insn =
11238 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11239 irel->r_info =
11240 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11241 success = 1;
11242 break;
11243 }
11244 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11245 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11246 /* The range is +/-64k. */
11247 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11248 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11249 {
11250 insn =
11251 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11252 irel->r_info =
11253 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11254 success = 1;
11255 break;
11256 }
11257 default:
11258 break;
11259 }
35c08157 11260
1c8f6a4d
KLC		 11261 if (success)
11262 {
11263 bfd_putb32 (insn, contents + laddr);
11264 if (i1_irelfn != irelend)
11265 {
11266 i1_irelfn->r_addend |= 1;
11267 *again = TRUE;
11268 }
11269 }
11270}
35c08157 11271
1c8f6a4d 11272/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11273
1c8f6a4d
KLC		 11274static bfd_boolean
11275nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11276 Elf_Internal_Rela *internal_relocs, int *insn_len,
11277 int *seq_len, bfd_byte *contents)
11278{
11279 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11280
1c8f6a4d 11281 irelend = internal_relocs + sec->reloc_count;
35c08157 11282
1c8f6a4d
KLC		 11283 re_irel =
11284 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11285 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11286
1c8f6a4d
KLC		 11287 if (re_irel == irelend)
11288 {
11289 (*_bfd_error_handler)
11290 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11291 abfd, (long) irel->r_offset);
11292 return FALSE;
11293 }
35c08157 11294
1c8f6a4d
KLC		 11295 if (re_irel->r_addend != 1)
11296 return FALSE;
35c08157 11297
1c8f6a4d
KLC		 11298 /* Pointed target is relaxed and no longer needs this void *,
11299 change the type to NONE. */
11300 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11301
1c8f6a4d
KLC		 11302 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11303 not exist, it means only count 1 and remove it directly. */
11304 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11305 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11306 R_NDS32_PTR_COUNT);
11307 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11308 R_NDS32_PTR);
11309 if (count_irel != irelend)
11310 {
11311 if (--count_irel->r_addend > 0)
11312 return FALSE;
11313 }
11314
11315 if (ptr_irel != irelend)
11316 return FALSE;
11317
11318 /* If the PTR_COUNT is already 0, remove current instruction. */
11319 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11320 *insn_len = 0;
11321 return TRUE;
11322}
11323
11324/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11325
11326static void
11327nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11328 asection *sec, Elf_Internal_Rela *irel,
11329 Elf_Internal_Rela *internal_relocs,
11330 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11331 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11332{
11333 uint32_t insn;
11334 bfd_signed_vma foff;
11335 Elf_Internal_Rela *i1_irelfn, *irelend;
11336 bfd_vma local_sda, laddr;
11337
11338 irelend = internal_relocs + sec->reloc_count;
11339 laddr = irel->r_offset;
11340 insn = bfd_getb32 (contents + laddr);
11341
11342 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11343 we need additional space. It might be help if we could
11344 borrow some space from instructions to be eliminated
11345 such as sethi, ori, add. */
11346 if (insn & 0x80000000)
11347 return;
11348
11349 if (nds32_elf_check_dup_relocs
11350 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11351 return;
11352
11353 i1_irelfn =
11354 find_relocs_at_address (irel, internal_relocs, irelend,
11355 R_NDS32_PTR_RESOLVED);
11356
11357 /* FIXIT 090606
11358 The boundary should be reduced since the .plt section hasn't
11359 been created and the address of specific entry is still unknown
11360 Maybe the range between the function call and the begin of the
11361 .text section can be used to decide if the .plt is in the range
11362 of function call. */
11363
11364 if (N32_OP6 (insn) == N32_OP6_ALU1
11365 && N32_SUB5 (insn) == N32_ALU1_ADD)
11366 {
11367 /* Get the value of the symbol referred to by the reloc. */
11368 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11369 &local_sda, FALSE);
11370 foff = (bfd_signed_vma) (calculate_plt_memory_address
11371 (abfd, link_info, isymbuf, irel,
11372 symtab_hdr) - local_sda);
11373 /* This condition only happened when symbol is undefined. */
11374 if (foff == 0)
11375 return;
11376
11377 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11378 return;
11379 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11380 R_NDS32_PLT_GOTREL_LO19);
11381 /* addi.gp */
11382 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11383 }
11384 else if (N32_OP6 (insn) == N32_OP6_JREG
11385 && N32_SUB5 (insn) == N32_JREG_JRAL)
11386 {
11387 /* Get the value of the symbol referred to by the reloc. */
11388 foff =
11389 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11390 /* This condition only happened when symbol is undefined. */
11391 if (foff == 0)
11392 return;
11393 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11394 return;
11395 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11396 insn = INSN_JAL;
11397 }
11398 else
11399 return;
11400
11401 bfd_putb32 (insn, contents + laddr);
11402 if (i1_irelfn != irelend)
11403 {
11404 i1_irelfn->r_addend |= 1;
11405 *again = TRUE;
11406 }
11407}
11408
11409/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11410
11411static void
11412nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11413 asection *sec, Elf_Internal_Rela *irel,
11414 Elf_Internal_Rela *internal_relocs,
11415 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11416 bfd_boolean *again)
11417{
11418 uint32_t insn;
11419 bfd_signed_vma foff;
11420 Elf_Internal_Rela *i1_irelfn, *irelend;
11421 bfd_vma local_sda, laddr;
11422
11423 irelend = internal_relocs + sec->reloc_count;
11424 laddr = irel->r_offset;
11425 insn = bfd_getb32 (contents + laddr);
11426 if (insn & 0x80000000)
11427 return;
11428
11429 if (nds32_elf_check_dup_relocs
11430 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11431 return;
11432
11433 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11434 R_NDS32_PTR_RESOLVED);
11435
11436 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11437 &local_sda, FALSE);
11438 foff = calculate_got_memory_address (abfd, link_info, irel,
11439 symtab_hdr) - local_sda;
11440
11441 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11442 {
11443 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11444 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11445 irel->r_info =
11446 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11447 bfd_putb32 (insn, contents + laddr);
11448 if (i1_irelfn != irelend)
11449 {
11450 i1_irelfn->r_addend |= 1;
11451 *again = TRUE;
11452 }
11453 }
11454}
11455
11456/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11457
11458static void
11459nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11460 asection *sec, Elf_Internal_Rela *irel,
11461 Elf_Internal_Rela *internal_relocs,
11462 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11463 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11464{
11465 int opc_insn_gotoff;
11466 uint32_t insn;
11467 bfd_signed_vma foff;
11468 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11469 bfd_vma local_sda, laddr;
11470
11471 irelend = internal_relocs + sec->reloc_count;
11472 laddr = irel->r_offset;
11473 insn = bfd_getb32 (contents + laddr);
11474
11475 if (insn & 0x80000000)
11476 return;
11477
11478 if (nds32_elf_check_dup_relocs
11479 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11480 return;
11481
11482 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11483 R_NDS32_PTR_RESOLVED);
11484 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11485 &local_sda, FALSE);
11486 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11487 foff = foff - local_sda;
11488
11489 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11490 return;
11491
11492 /* Concatenate opcode and sub-opcode for switch case.
11493 It may be MEM or ALU1. */
11494 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11495 switch (opc_insn_gotoff)
11496 {
11497 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11498 /* 4-byte aligned. */
11499 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11500 irel->r_info =
11501 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11502 break;
11503 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11504 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11505 irel->r_info =
11506 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11507 break;
11508 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11509 /* 2-byte aligned. */
11510 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11511 irel->r_info =
11512 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11513 break;
11514 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11515 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11516 irel->r_info =
11517 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11518 break;
11519 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11520 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11521 irel->r_info =
11522 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11523 break;
11524 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11525 /* 1-byte aligned. */
11526 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11527 irel->r_info =
11528 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11529 break;
11530 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11531 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11532 irel->r_info =
11533 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11534 break;
11535 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11536 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11537 irel->r_info =
11538 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11539 break;
11540 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11541 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11542 irel->r_info =
11543 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11544 break;
11545 default:
11546 return;
11547 }
11548
11549 bfd_putb32 (insn, contents + laddr);
11550 if (i1_irelfn != irelend)
11551 {
11552 i1_irelfn->r_addend |= 1;
11553 *again = TRUE;
11554 }
11555 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11556 R_NDS32_INSN16)) != irelend)
11557 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11558
11559}
11560
11561static bfd_boolean
11562nds32_relax_adjust_label (bfd *abfd, asection *sec,
11563 Elf_Internal_Rela *internal_relocs,
11564 bfd_byte *contents,
11565 nds32_elf_blank_t **relax_blank_list,
11566 int optimize, int opt_size)
11567{
11568 /* This code block is used to adjust 4-byte alignment by relax a pair
11569 of instruction a time.
11570
11571 It recognizes three types of relocations.
11572 1. R_NDS32_LABEL - a aligment.
11573 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11574 3. is_16bit_NOP () - remove a 16-bit instruction. */
11575
11576 /* TODO: It seems currently implementation only support 4-byte aligment.
11577 We should handle any-aligment. */
11578
11579 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11580 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11581 Elf_Internal_Rela rel_temp;
11582 Elf_Internal_Rela *irelend;
11583 bfd_vma address;
11584 uint16_t insn16;
11585
11586 /* Checking for branch relaxation relies on the relocations to
11587 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11588 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11589 sizeof (Elf_Internal_Rela), compar_reloc);
11590
11591 irelend = internal_relocs + sec->reloc_count;
11592
11593 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11594 /* FIXME: Can we generate the right order in assembler?
11595 So we don't have to swapping them here. */
11596
11597 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11598 label_rel < irelend; label_rel++)
11599 {
11600 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11601 continue;
11602
11603 /* Find the first reloc has the same offset with label_rel. */
11604 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11605 insn_rel++;
11606
11607 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11608 insn_rel++)
11609 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11610 address. */
11611 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11612 break;
11613
11614 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11615 && insn_rel < label_rel)
11616 {
11617 /* Swap the two reloc if the R_NDS32_INSN16 is
11618 before R_NDS32_LABEL. */
11619 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11620 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11621 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11622 }
11623 }
11624
11625 label_rel = NULL;
11626 insn_rel = NULL;
11627 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11628 or higher, remove other R_NDS32_LABEL with lower alignment.
11629 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11630 then the R_NDS32_LABEL sequence is broke. */
11631 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11632 {
11633 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11634 {
11635 if (label_rel == NULL)
11636 {
11637 if (tmp_rel->r_addend < 2)
11638 label_rel = tmp_rel;
11639 continue;
11640 }
11641 else if (tmp_rel->r_addend > 1)
11642 {
11643 /* Remove all LABEL relocation from label_rel to tmp_rel
11644 including relocations with same offset as tmp_rel. */
11645 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11646 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11647 {
11648 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11649 && tmp2_rel->r_addend < 2)
11650 tmp2_rel->r_info =
11651 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11652 R_NDS32_NONE);
11653 }
11654 label_rel = NULL;
11655 }
11656 }
11657 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11658 {
11659 /* A new INSN16 which can be converted, so clear label_rel. */
11660 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11661 irelend, &insn16)
11662 || is_16bit_NOP (abfd, sec, tmp_rel))
11663 label_rel = NULL;
11664 }
11665 }
11666
11667 label_rel = NULL;
11668 insn_rel = NULL;
11669 /* Optimized for speed and nothing has not been relaxed.
11670 It's time to align labels.
11671 We may convert a 16-bit instruction right before a label to
11672 32-bit, in order to align the label if necessary
11673 all reloc entries has been sorted by r_offset. */
11674 for (irel = internal_relocs; irel < irelend; irel++)
11675 {
11676 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11677 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11678 continue;
11679
11680 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11681 {
11682 /* A new INSN16 found, resize the old one. */
11683 if (is_convert_32_to_16
11684 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11685 || is_16bit_NOP (abfd, sec, irel))
11686 {
11687 if (insn_rel)
11688 {
11689 /* Previous INSN16 reloc exists, reduce its
11690 size to 16-bit. */
11691 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11692 irelend, &insn16))
35c08157 11693 {
1c8f6a4d
KLC		 11694 nds32_elf_write_16 (abfd, contents, insn_rel,
11695 internal_relocs, irelend, insn16);
11696
11697 if (!insert_nds32_elf_blank_recalc_total
11698 (relax_blank_list, insn_rel->r_offset + 2, 2))
11699 return FALSE;
11700 }
11701 else if (is_16bit_NOP (abfd, sec, insn_rel))
11702 {
11703 if (!insert_nds32_elf_blank_recalc_total
11704 (relax_blank_list, insn_rel->r_offset, 2))
11705 return FALSE;
11706 }
11707 insn_rel->r_info =
11708 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11709 }
11710 /* Save the new one for later use. */
11711 insn_rel = irel;
11712 }
11713 else
11714 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11715 R_NDS32_NONE);
11716 }
11717 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11718 {
11719 /* Search for label. */
11720 int force_relax = 0;
11721
11722 /* Label on 16-bit instruction or optimization
11723 needless, just reset this reloc. */
11724 insn16 = bfd_getb16 (contents + irel->r_offset);
11725 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11726 {
11727 irel->r_info =
11728 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11729 continue;
11730 }
11731
11732 address =
11733 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11734 irel->r_offset, 1);
11735
11736 if (!insn_rel)
11737 {
11738 /* Check if there is case which can not be aligned. */
11739 if (irel->r_addend == 2 && address & 0x2)
11740 return FALSE;
11741 continue;
11742 }
11743
11744 /* Try to align this label. */
11745
11746 if ((irel->r_addend & 0x1f) < 2)
11747 {
11748 /* Check if there is a INSN16 at the same address.
11749 Label_rel always seats before insn_rel after
11750 our sort. */
11751
11752 /* Search for INSN16 at LABEL location. If INSN16 is at
11753 same location and this LABEL alignment is lower than 2,
11754 the INSN16 can be converted to 2-byte. */
11755 for (tmp_rel = irel;
11756 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11757 tmp_rel++)
11758 {
11759 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11760 && (is_convert_32_to_16
11761 (abfd, sec, tmp_rel, internal_relocs,
11762 irelend, &insn16)
11763 || is_16bit_NOP (abfd, sec, tmp_rel)))
11764 {
11765 force_relax = 1;
11766 break;
11767 }
11768 }
11769 }
11770
11771 if (force_relax || irel->r_addend == 1 || address & 0x2)
11772 {
11773 /* Label not aligned. */
11774 /* Previous reloc exists, reduce its size to 16-bit. */
11775 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11776 internal_relocs, irelend, &insn16))
11777 {
11778 nds32_elf_write_16 (abfd, contents, insn_rel,
11779 internal_relocs, irelend, insn16);
11780
11781 if (!insert_nds32_elf_blank_recalc_total
11782 (relax_blank_list, insn_rel->r_offset + 2, 2))
11783 return FALSE;
11784 }
11785 else if (is_16bit_NOP (abfd, sec, insn_rel))
11786 {
11787 if (!insert_nds32_elf_blank_recalc_total
11788 (relax_blank_list, insn_rel->r_offset, 2))
11789 return FALSE;
11790 }
11791
11792 }
11793 /* INSN16 reloc is used. */
11794 insn_rel = NULL;
11795 }
11796 }
11797
11798 address =
11799 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11800 if (insn_rel && (address & 0x2 || opt_size))
11801 {
11802 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11803 irelend, &insn16))
11804 {
11805 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11806 irelend, insn16);
11807 if (!insert_nds32_elf_blank_recalc_total
11808 (relax_blank_list, insn_rel->r_offset + 2, 2))
11809 return FALSE;
11810 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11811 R_NDS32_NONE);
11812 }
11813 else if (is_16bit_NOP (abfd, sec, insn_rel))
11814 {
11815 if (!insert_nds32_elf_blank_recalc_total
11816 (relax_blank_list, insn_rel->r_offset, 2))
11817 return FALSE;
11818 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11819 R_NDS32_NONE);
11820 }
11821 }
11822 insn_rel = NULL;
11823 return TRUE;
11824}
11825
11826/* Pick relaxation round. */
11827
11828static int
11829nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11830 struct elf_nds32_link_hash_table *table,
11831 struct bfd_link_info *link_info)
11832{
18393a2e
KLC		 11833 static asection *final_sec, *first_sec = NULL;
11834 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11835 static bfd_boolean set = FALSE;
11836 static bfd_boolean first = TRUE;
11837 int round_table[] = {
11838 NDS32_RELAX_NORMAL_ROUND,
11839 NDS32_RELAX_JUMP_IFC_ROUND,
11840 NDS32_RELAX_EX9_BUILD_ROUND,
11841 NDS32_RELAX_EX9_REPLACE_ROUND,
11842 };
11843 static int pass = 0;
11844 static int relax_round;
11845
18393a2e
KLC		 11846 /* The new round. */
11847 if (init && first_sec == sec)
11848 {
11849 set = TRUE;
11850 normal_again = FALSE;
11851 }
11852
1c8f6a4d
KLC		 11853 if (first)
11854 {
11855 /* Run an empty run to get the final section. */
11856 relax_round = NDS32_RELAX_EMPTY_ROUND;
11857
11858 /* It has to enter relax again because we can
11859 not make sure what the final turn is. */
11860 *again = TRUE;
18393a2e 11861
1c8f6a4d 11862 first = FALSE;
18393a2e 11863 first_sec = sec;
1c8f6a4d
KLC		 11864 }
11865
18393a2e 11866 if (!set)
1c8f6a4d 11867 {
18393a2e 11868 /* Not reenter yet. */
1c8f6a4d
KLC		 11869 final_sec = sec;
11870 return relax_round;
11871 }
11872
1c8f6a4d
KLC		 11873 relax_round = round_table[pass];
11874
18393a2e
KLC		 11875 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11876 normal_again = TRUE;
11877
1c8f6a4d
KLC		 11878 if (!init && final_sec == sec)
11879 {
11880 switch (relax_round)
11881 {
11882 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11883 if (!normal_again)
1c8f6a4d
KLC		 11884 {
11885 /* Normal relaxation done. */
11886 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11887 {
11888 pass++;
11889 *again = TRUE;
11890 }
11891 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11892 {
11893 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11894 *again = TRUE;
11895 }
11896 else if (table->ex9_import_file)
11897 {
11898 /* Import ex9 table. */
11899 if (table->update_ex9_table)
11900 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11901 else
11902 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11903 nds32_elf_ex9_import_table (link_info);
11904 *again = TRUE;
11905 }
11906 }
11907 break;
11908 case NDS32_RELAX_JUMP_IFC_ROUND:
11909 if (!nds32_elf_ifc_finish (link_info))
11910 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11911 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11912 {
11913 pass++;
11914 *again = TRUE;
11915 }
11916 break;
11917 case NDS32_RELAX_EX9_BUILD_ROUND:
11918 nds32_elf_ex9_finish (link_info);
11919 pass++;
11920 *again = TRUE;
11921 break;
11922 case NDS32_RELAX_EX9_REPLACE_ROUND:
11923 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11924 {
11925 /* Do jump IFC optimization again. */
11926 if (!nds32_elf_ifc_finish (link_info))
11927 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11928 }
11929 break;
11930 default:
11931 break;
11932 }
11933 }
11934
11935 return relax_round;
11936}
11937
11938static bfd_boolean
11939nds32_elf_relax_section (bfd *abfd, asection *sec,
11940 struct bfd_link_info *link_info, bfd_boolean *again)
11941{
11942 nds32_elf_blank_t *relax_blank_list = NULL;
11943 Elf_Internal_Shdr *symtab_hdr;
11944 Elf_Internal_Rela *internal_relocs;
11945 Elf_Internal_Rela *irel;
11946 Elf_Internal_Rela *irelend;
11947 Elf_Internal_Sym *isymbuf = NULL;
11948 bfd_byte *contents = NULL;
11949 bfd_boolean result = TRUE;
11950 int optimize = 0;
11951 int opt_size = 0;
11952 uint32_t insn;
11953 uint16_t insn16;
11954
11955 /* Target dependnet option. */
11956 struct elf_nds32_link_hash_table *table;
11957 int load_store_relax;
11958 int relax_round;
11959
11960 relax_blank_list = NULL;
11961
11962 *again = FALSE;
11963
11964 /* Nothing to do for
11965 * relocatable link or
11966 * non-relocatable section or
11967 * non-code section or
11968 * empty content or
11969 * no reloc entry. */
11970 if (link_info->relocatable
11971 || (sec->flags & SEC_RELOC) == 0
11972 || (sec->flags & SEC_EXCLUDE) == 1
11973 || (sec->flags & SEC_CODE) == 0
11974 || sec->size == 0)
11975 return TRUE;
11976
11977 /* 09.12.11 Workaround. */
11978 /* We have to adjust align for R_NDS32_LABEL if needed.
11979 The adjust approach only can fix 2-byte align once. */
11980 if (sec->alignment_power > 2)
11981 return TRUE;
11982
11983 /* The optimization type to do. */
11984
11985 table = nds32_elf_hash_table (link_info);
11986 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11987 switch (relax_round)
11988 {
11989 case NDS32_RELAX_JUMP_IFC_ROUND:
11990 /* Here is the entrance of ifc jump relaxation. */
11991 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11992 return FALSE;
11993 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11994 return TRUE;
11995
11996 case NDS32_RELAX_EX9_BUILD_ROUND:
11997 /* Here is the entrance of ex9 relaxation. There are two pass of
11998 ex9 relaxation. The one is to traverse all instructions and build
11999 the hash table. The other one is to compare instructions and replace
12000 it by ex9.it. */
12001 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12002 return FALSE;
12003 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12004 return TRUE;
12005
12006 case NDS32_RELAX_EX9_REPLACE_ROUND:
12007 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12008 return FALSE;
12009 return TRUE;
12010
12011 case NDS32_RELAX_EMPTY_ROUND:
12012 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12013 return TRUE;
12014
12015 case NDS32_RELAX_NORMAL_ROUND:
12016 default:
12017 if (sec->reloc_count == 0)
12018 return TRUE;
12019 break;
12020 }
12021
12022 /* The begining of general relaxation. */
12023
12024 if (is_SDA_BASE_set == 0)
12025 {
12026 bfd_vma gp;
12027 is_SDA_BASE_set = 1;
12028 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12029 &gp, FALSE);
12030 relax_range_measurement (abfd);
12031 }
12032
12033 if (is_ITB_BASE_set == 0)
12034 {
12035 /* Set the _ITB_BASE_. */
12036 if (!nds32_elf_ex9_itb_base (link_info))
12037 {
12038 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12039 bfd_set_error (bfd_error_bad_value);
12040 }
12041 }
12042
12043 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12044 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12045 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12046 TRUE /* keep_memory */);
12047 if (internal_relocs == NULL)
12048 goto error_return;
12049
12050 irelend = internal_relocs + sec->reloc_count;
12051 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12052 irelend, R_NDS32_RELAX_ENTRY);
12053
12054 if (irel == irelend)
12055 return TRUE;
12056
12057 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12058 {
12059 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 12060 {
12061 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12062 return TRUE;
12063 }
1c8f6a4d
KLC		 12064
12065 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12066 optimize = 1;
12067
12068 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12069 opt_size = 1;
12070 }
12071
12072 load_store_relax = table->load_store_relax;
12073
12074 /* Get symbol table and section content. */
0c4bd9d9 12075 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 12076 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12077 goto error_return;
12078
12079 /* Do relax loop only when finalize is not done.
12080 Take care of relaxable relocs except INSN16. */
12081 for (irel = internal_relocs; irel < irelend; irel++)
12082 {
12083 int seq_len; /* Original length of instruction sequence. */
12084 int insn_len = 0; /* Final length of instruction sequence. */
12085 bfd_boolean removed;
12086
12087 insn = 0;
12088 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12089 && (irel->r_addend & 0x1f) >= 2)
12090 optimize = 1;
12091
12092 /* Relocation Types
12093 R_NDS32_LONGCALL1 53
12094 R_NDS32_LONGCALL2 54
12095 R_NDS32_LONGCALL3 55
12096 R_NDS32_LONGJUMP1 56
12097 R_NDS32_LONGJUMP2 57
12098 R_NDS32_LONGJUMP3 58
12099 R_NDS32_LOADSTORE 59 */
12100 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12101 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12102 seq_len = GET_SEQ_LEN (irel->r_addend);
12103
12104 /* Relocation Types
12105 R_NDS32_LONGCALL4 107
12106 R_NDS32_LONGCALL5 108
12107 R_NDS32_LONGCALL6 109
12108 R_NDS32_LONGJUMP4 110
12109 R_NDS32_LONGJUMP5 111
12110 R_NDS32_LONGJUMP6 112
12111 R_NDS32_LONGJUMP7 113 */
12112 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12113 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12114 seq_len = 4;
12115
12116 /* Relocation Types
12117 R_NDS32_LO12S0_RELA 30
12118 R_NDS32_LO12S1_RELA 29
12119 R_NDS32_LO12S2_RELA 28
12120 R_NDS32_LO12S2_SP_RELA 71
12121 R_NDS32_LO12S2_DP_RELA 70
12122 R_NDS32_GOT_LO12 46
12123 R_NDS32_GOTOFF_LO12 50
12124 R_NDS32_PLTREL_LO12 65
12125 R_NDS32_PLT_GOTREL_LO12 67
12126 R_NDS32_17IFC_PCREL_RELA 96
12127 R_NDS32_GOT_SUFF 193
12128 R_NDS32_GOTOFF_SUFF 194
12129 R_NDS32_PLT_GOT_SUFF 195
12130 R_NDS32_MULCALL_SUFF 196
12131 R_NDS32_PTR 197 */
12132 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12133 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12134 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12135 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12136 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12137 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12138 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12141 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12142 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12147 seq_len = 0;
12148 else
12149 continue;
12150
12151 insn_len = seq_len;
12152 removed = FALSE;
12153
12154 switch (ELF32_R_TYPE (irel->r_info))
12155 {
12156 case R_NDS32_LONGCALL1:
12157 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12158 &insn_len, contents, isymbuf,
12159 symtab_hdr);
12160 break;
12161 case R_NDS32_LONGCALL2:
12162 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12163 &insn_len, contents, isymbuf,
12164 symtab_hdr);
12165 break;
12166 case R_NDS32_LONGCALL3:
12167 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12168 &insn_len, contents, isymbuf,
12169 symtab_hdr);
12170 break;
12171 case R_NDS32_LONGJUMP1:
12172 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12173 &insn_len, contents, isymbuf,
12174 symtab_hdr);
12175 break;
12176 case R_NDS32_LONGJUMP2:
12177 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12178 &insn_len, contents, isymbuf,
12179 symtab_hdr);
12180 break;
12181 case R_NDS32_LONGJUMP3:
12182 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12183 &insn_len, contents, isymbuf,
12184 symtab_hdr);
12185 break;
12186 case R_NDS32_LONGCALL4:
12187 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12188 &insn_len, contents, isymbuf,
12189 symtab_hdr);
12190 break;
12191 case R_NDS32_LONGCALL5:
12192 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12193 &insn_len, contents, isymbuf,
12194 symtab_hdr);
12195 break;
12196 case R_NDS32_LONGCALL6:
12197 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12198 &insn_len, contents, isymbuf,
12199 symtab_hdr);
12200 break;
12201 case R_NDS32_LONGJUMP4:
12202 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12203 &insn_len, contents, isymbuf,
12204 symtab_hdr);
12205 break;
12206 case R_NDS32_LONGJUMP5:
12207 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12208 &insn_len, &seq_len, contents,
12209 isymbuf, symtab_hdr);
12210 break;
12211 case R_NDS32_LONGJUMP6:
12212 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12213 &insn_len, &seq_len, contents,
12214 isymbuf, symtab_hdr);
12215 break;
12216 case R_NDS32_LONGJUMP7:
12217 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12218 &insn_len, &seq_len, contents,
12219 isymbuf, symtab_hdr);
12220 break;
12221 case R_NDS32_LOADSTORE:
12222 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12223 internal_relocs, &insn_len,
12224 contents, isymbuf, symtab_hdr,
12225 load_store_relax);
12226 break;
12227 case R_NDS32_LO12S0_RELA:
12228 case R_NDS32_LO12S1_RELA:
12229 case R_NDS32_LO12S2_DP_RELA:
12230 case R_NDS32_LO12S2_SP_RELA:
12231 case R_NDS32_LO12S2_RELA:
12232 /* Relax for low part. */
12233 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12234 contents, isymbuf, symtab_hdr);
12235
12236 /* It is impossible to delete blank, so just continue. */
12237 continue;
12238 case R_NDS32_GOT_LO12:
12239 case R_NDS32_GOTOFF_LO12:
12240 case R_NDS32_PLTREL_LO12:
12241 case R_NDS32_PLT_GOTREL_LO12:
12242 case R_NDS32_GOTPC_LO12:
12243 /* Relax for PIC gp-relative low part. */
12244 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12245 isymbuf, symtab_hdr);
35c08157 12246
1c8f6a4d
KLC		 12247 /* It is impossible to delete blank, so just continue. */
12248 continue;
12249 case R_NDS32_TLS_LE_LO12:
12250 /* Relax for LE TLS low part. */
12251 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12252 isymbuf, symtab_hdr);
35c08157 12253
1c8f6a4d
KLC		 12254 /* It is impossible to delete blank, so just continue. */
12255 continue;
12256 case R_NDS32_TLS_LE_ADD:
12257 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12258 contents, isymbuf, symtab_hdr, again);
12259 /* It is impossible to delete blank, so just continue. */
12260 continue;
12261 case R_NDS32_TLS_LE_LS:
12262 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12263 contents, isymbuf, symtab_hdr, again);
12264 continue;
12265 case R_NDS32_PTR:
12266 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12267 &insn_len, &seq_len, contents);
12268 break;
12269 case R_NDS32_PLT_GOT_SUFF:
12270 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12271 internal_relocs, contents,
12272 isymbuf, symtab_hdr, again);
12273 /* It is impossible to delete blank, so just continue. */
12274 continue;
12275 case R_NDS32_GOT_SUFF:
12276 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12277 internal_relocs, contents,
12278 symtab_hdr, again);
12279 /* It is impossible to delete blank, so just continue. */
12280 continue;
12281 case R_NDS32_GOTOFF_SUFF:
12282 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12283 internal_relocs, contents,
12284 isymbuf, symtab_hdr, again);
12285 /* It is impossible to delete blank, so just continue. */
12286 continue;
12287 default:
12288 continue;
12289
12290 }
12291 if (removed && seq_len - insn_len > 0)
12292 {
12293 if (!insert_nds32_elf_blank
12294 (&relax_blank_list, irel->r_offset + insn_len,
12295 seq_len - insn_len))
12296 goto error_return;
12297 *again = TRUE;
35c08157 12298 }
1c8f6a4d
KLC		 12299 }
12300
12301 calc_nds32_blank_total (relax_blank_list);
12302
12303 if (table->relax_fp_as_gp)
12304 {
12305 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12306 irelend, isymbuf))
12307 goto error_return;
35c08157 12308
1c8f6a4d 12309 if (*again == FALSE)
35c08157 12310 {
1c8f6a4d
KLC		 12311 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12312 irelend))
12313 goto error_return;
35c08157
KLC		 12314 }
12315 }
1c8f6a4d
KLC		 12316
12317 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12318
12319 if (*again == FALSE)
12320 {
12321 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12322 &relax_blank_list, optimize, opt_size))
12323 goto error_return;
12324 }
12325
12326 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12327 If object file is assembled with flag '-Os',
12328 the we don't adjust jump-destination on 4-byte boundary. */
12329
12330 if (relax_blank_list)
12331 {
12332 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12333 relax_blank_list = NULL;
12334 }
12335
12336 if (*again == FALSE)
12337 {
12338 /* Closing the section, so we don't relax it anymore. */
12339 bfd_vma sec_size_align;
12340 Elf_Internal_Rela *tmp_rel;
12341
12342 /* Pad to alignment boundary. Only handle current section alignment. */
12343 sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
12344 & ((-1) << sec->alignment_power);
12345 if ((sec_size_align - sec->size) & 0x2)
12346 {
12347 insn16 = NDS32_NOP16;
12348 bfd_putb16 (insn16, contents + sec->size);
12349 sec->size += 2;
12350 }
12351
12352 while (sec_size_align != sec->size)
12353 {
12354 insn = NDS32_NOP32;
12355 bfd_putb32 (insn, contents + sec->size);
12356 sec->size += 4;
12357 }
12358
1c8f6a4d
KLC		 12359 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12360 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12361 if (tmp_rel != irelend)
12362 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12363
12364 clean_nds32_elf_blank ();
12365 }
12366
12367finish:
12368 if (internal_relocs != NULL
12369 && elf_section_data (sec)->relocs != internal_relocs)
12370 free (internal_relocs);
12371
12372 if (contents != NULL
12373 && elf_section_data (sec)->this_hdr.contents != contents)
12374 free (contents);
12375
12376 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12377 free (isymbuf);
12378
12379 return result;
12380
12381error_return:
12382 result = FALSE;
12383 goto finish;
12384}
12385
12386static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12387{
12388 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12389 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12390 {NULL, 0, 0, 0, 0}
12391};
12392
12393static bfd_boolean
12394nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12395 struct bfd_link_info *info,
12396 void *finfo ATTRIBUTE_UNUSED,
12397 bfd_boolean (*func) (void *, const char *,
12398 Elf_Internal_Sym *,
12399 asection *,
12400 struct elf_link_hash_entry *)
12401 ATTRIBUTE_UNUSED)
12402{
12403 FILE *sym_ld_script = NULL;
12404 struct elf_nds32_link_hash_table *table;
12405
12406 table = nds32_elf_hash_table (info);
12407 sym_ld_script = table->sym_ld_script;
12408
12409 if (check_start_export_sym)
12410 fprintf (sym_ld_script, "}\n");
12411
12412 return TRUE;
12413}
12414
12415static enum elf_reloc_type_class
12416nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12417 const asection *rel_sec ATTRIBUTE_UNUSED,
12418 const Elf_Internal_Rela *rela)
12419{
12420 switch ((int) ELF32_R_TYPE (rela->r_info))
12421 {
12422 case R_NDS32_RELATIVE:
12423 return reloc_class_relative;
12424 case R_NDS32_JMP_SLOT:
12425 return reloc_class_plt;
12426 case R_NDS32_COPY:
12427 return reloc_class_copy;
12428 default:
12429 return reloc_class_normal;
12430 }
12431}
12432
12433/* Put target dependent option into info hash table. */
12434void
12435bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12436 int relax_fp_as_gp,
12437 int eliminate_gc_relocs,
12438 FILE * sym_ld_script, int load_store_relax,
12439 int target_optimize, int relax_status,
12440 int relax_round, FILE * ex9_export_file,
12441 FILE * ex9_import_file,
12442 int update_ex9_table, int ex9_limit,
12443 bfd_boolean ex9_loop_aware,
12444 bfd_boolean ifc_loop_aware)
12445{
12446 struct elf_nds32_link_hash_table *table;
12447
12448 table = nds32_elf_hash_table (link_info);
12449 if (table == NULL)
12450 return;
12451
12452 table->relax_fp_as_gp = relax_fp_as_gp;
12453 table->eliminate_gc_relocs = eliminate_gc_relocs;
12454 table->sym_ld_script = sym_ld_script;
12455 table ->load_store_relax = load_store_relax;
12456 table->target_optimize = target_optimize;
12457 table->relax_status = relax_status;
12458 table->relax_round = relax_round;
12459 table->ex9_export_file = ex9_export_file;
12460 table->ex9_import_file = ex9_import_file;
12461 table->update_ex9_table = update_ex9_table;
12462 table->ex9_limit = ex9_limit;
12463 table->ex9_loop_aware = ex9_loop_aware;
12464 table->ifc_loop_aware = ifc_loop_aware;
12465}
12466\f
12467/* These functions and data-structures are used for fp-as-gp
12468 optimization. */
12469
12470#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12471/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12472 the read-only section and read-write section. */
12473#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12474
12475/* An nds32_fag represent a gp-relative access.
12476 We find best fp-base by using a sliding window
12477 to find a base address which can cover most gp-access. */
12478struct nds32_fag
12479{
12480 struct nds32_fag *next; /* NULL-teminated linked list. */
12481 bfd_vma addr; /* The address of this fag. */
12482 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12483 It is used for applying FP7U2_FLAG. */
12484 int count; /* How many times this address is referred.
12485 There should be exactly `count' relocations
12486 in relas. */
12487 int relas_capcity; /* The buffer size of relas.
12488 We use an array instead of linked-list,
12489 and realloc is used to adjust buffer size. */
12490};
12491
12492static void
12493nds32_fag_init (struct nds32_fag *head)
12494{
12495 memset (head, 0, sizeof (struct nds32_fag));
12496}
12497
12498static void
12499nds32_fag_verify (struct nds32_fag *head)
12500{
12501 struct nds32_fag *iter;
12502 struct nds32_fag *prev;
12503
12504 prev = NULL;
12505 iter = head->next;
12506 while (iter)
12507 {
12508 if (prev && prev->addr >= iter->addr)
12509 puts ("Bug in fp-as-gp insertion.");
12510 prev = iter;
12511 iter = iter->next;
12512 }
12513}
12514
12515/* Insert a fag in ascending order.
12516 If a fag of the same address already exists,
12517 they are chained by relas array. */
12518
12519static void
12520nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12521 Elf_Internal_Rela * rel)
12522{
12523 struct nds32_fag *iter;
12524 struct nds32_fag *new_fag;
12525 const int INIT_RELAS_CAP = 4;
12526
12527 for (iter = head;
12528 iter->next && iter->next->addr <= addr;
12529 iter = iter->next)
12530 /* Find somewhere to insert. */ ;
12531
12532 /* `iter' will be equal to `head' if the list is empty. */
12533 if (iter != head && iter->addr == addr)
12534 {
12535 /* The address exists in the list.
12536 Insert `rel' into relocation list, relas. */
12537
12538 /* Check whether relas is big enough. */
12539 if (iter->count >= iter->relas_capcity)
12540 {
12541 iter->relas_capcity *= 2;
12542 iter->relas = bfd_realloc
12543 (iter->relas, iter->relas_capcity * sizeof (void *));
12544 }
12545 iter->relas[iter->count++] = rel;
12546 return;
12547 }
12548
12549 /* This is a new address. Create a fag node for it. */
12550 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12551 memset (new_fag, 0, sizeof (*new_fag));
12552 new_fag->addr = addr;
12553 new_fag->count = 1;
12554 new_fag->next = iter->next;
12555 new_fag->relas_capcity = INIT_RELAS_CAP;
12556 new_fag->relas = (Elf_Internal_Rela **)
12557 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12558 new_fag->relas[0] = rel;
12559 iter->next = new_fag;
12560
12561 nds32_fag_verify (head);
12562}
12563
12564static void
12565nds32_fag_free_list (struct nds32_fag *head)
12566{
12567 struct nds32_fag *iter;
12568
12569 iter = head->next;
12570 while (iter)
12571 {
12572 struct nds32_fag *tmp = iter;
12573 iter = iter->next;
12574 free (tmp->relas);
12575 tmp->relas = NULL;
12576 free (tmp);
12577 }
12578}
12579
35c08157
KLC		 12580/* Find the best fp-base address.
12581 The relocation associated with that address is returned,
12582 so we can track the symbol instead of a fixed address.
12583
12584 When relaxation, the address of an datum may change,
12585 because a text section is shrinked, so the data section
1c8f6a4d 12586 moves forward. If the aligments of text and data section
35c08157
KLC		 12587 are different, their distance may change too.
12588 Therefore, tracking a fixed address is not appriate. */
12589
12590static int
12591nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12592{
12593 struct nds32_fag *base; /* First fag in the window. */
12594 struct nds32_fag *last; /* First fag outside the window. */
12595 int accu = 0; /* Usage accumulation. */
12596 struct nds32_fag *best; /* Best fag. */
12597 int baccu = 0; /* Best accumulation. */
12598
12599 /* Use first fag for initial, and find the last fag in the window.
12600
12601 In each iteration, we could simply subtract previous fag
12602 and accumulate following fags which are inside the window,
12603 untill we each the end. */
12604
1c8f6a4d
KLC		 12605 if (head->next == NULL)
12606 {
12607 *bestpp = NULL;
12608 return 0;
12609 }
35c08157
KLC		 12610
12611 /* Initialize base. */
12612 base = head->next;
12613 best = base;
12614 for (last = base;
12615 last && last->addr < base->addr + FAG_WINDOW;
12616 last = last->next)
12617 accu += last->count;
12618
12619 baccu = accu;
12620
12621 /* Record the best base in each iteration. */
12622 while (base->next)
1c8f6a4d
KLC		 12623 {
12624 accu -= base->count;
12625 base = base->next;
12626 /* Account fags in window. */
12627 for (/* Nothing. */;
12628 last && last->addr < base->addr + FAG_WINDOW;
12629 last = last->next)
12630 accu += last->count;
12631
12632 /* A better fp-base? */
12633 if (accu > baccu)
12634 {
12635 best = base;
12636 baccu = accu;
12637 }
12638 }
35c08157
KLC		 12639
12640 if (bestpp)
12641 *bestpp = best;
12642 return baccu;
12643}
12644
12645/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12646 so we can convert it fo fp-relative access later.
12647 `best_fag' is the best fp-base. Only those inside the window
12648 of best_fag is applied the flag. */
12649
12650static bfd_boolean
12651nds32_fag_mark_relax (struct bfd_link_info *link_info,
12652 bfd *abfd, struct nds32_fag *best_fag,
12653 Elf_Internal_Rela *internal_relocs,
12654 Elf_Internal_Rela *irelend)
12655{
12656 struct nds32_fag *ifag;
12657 bfd_vma best_fpbase, gp;
12658 bfd *output_bfd;
12659
12660 output_bfd = abfd->sections->output_section->owner;
12661 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12662 best_fpbase = best_fag->addr;
12663
1c8f6a4d
KLC		 12664 if (best_fpbase > gp + sdata_range[1][1]
12665 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12666 return FALSE;
12667
12668 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12669 so we know they can be converted to lwi37.fp. */
12670 for (ifag = best_fag;
12671 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12672 {
12673 int i;
12674
12675 for (i = 0; i < ifag->count; i++)
12676 {
12677 Elf_Internal_Rela *insn16_rel;
12678 Elf_Internal_Rela *fag_rel;
12679
12680 fag_rel = ifag->relas[i];
12681
12682 /* Only if this is within the WINDOWS, FP7U2_FLAG
12683 is applied. */
12684
12685 insn16_rel = find_relocs_at_address
12686 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12687
12688 if (insn16_rel != irelend)
12689 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12690 }
12691 }
12692 return TRUE;
12693}
12694
1c8f6a4d
KLC		 12695/* Reset INSN16 to clean fp as gp. */
12696
12697static void
12698nds32_fag_unmark_relax (struct nds32_fag *fag,
12699 Elf_Internal_Rela *internal_relocs,
12700 Elf_Internal_Rela *irelend)
12701{
12702 struct nds32_fag *ifag;
12703 int i;
12704 Elf_Internal_Rela *insn16_rel;
12705 Elf_Internal_Rela *fag_rel;
12706
12707 for (ifag = fag; ifag; ifag = ifag->next)
12708 {
12709 for (i = 0; i < ifag->count; i++)
12710 {
12711 fag_rel = ifag->relas[i];
12712
12713 /* Restore the INSN16 relocation. */
12714 insn16_rel = find_relocs_at_address
12715 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12716
12717 if (insn16_rel != irelend)
12718 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12719 }
12720 }
12721}
12722
35c08157
KLC		 12723/* This is the main function of fp-as-gp optimization.
12724 It should be called by relax_section. */
12725
12726static bfd_boolean
12727nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12728 bfd *abfd, asection *sec,
12729 Elf_Internal_Rela *internal_relocs,
12730 Elf_Internal_Rela *irelend,
12731 Elf_Internal_Sym *isymbuf)
12732{
12733 Elf_Internal_Rela *begin_rel = NULL;
12734 Elf_Internal_Rela *irel;
12735 struct nds32_fag fag_head;
12736 Elf_Internal_Shdr *symtab_hdr;
12737 bfd_byte *contents;
1c8f6a4d 12738 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12739
12740 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12741
12742 /* Per-function fp-base selection.
12743 1. Create a list for all the gp-relative access.
12744 2. Base on those gp-relative address,
12745 find a fp-base which can cover most access.
12746 3. Use the fp-base for fp-as-gp relaxation.
12747
12748 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12749 we should
12750 1. delete the `la $fp, _FP_BASE_' instruction and
12751 2. not convert lwi.gp to lwi37.fp.
12752
12753 To delete the _FP_BASE_ instruction, we simply apply
12754 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12755
12756 To suppress the conversion, we simply NOT to apply
12757 R_NDS32_INSN16_FP7U2_FLAG flag. */
12758
12759 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12760
0c4bd9d9 12761 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12762 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12763 return FALSE;
12764
12765 /* Check whether it is worth for fp-as-gp optimization,
12766 i.e., at least 3 gp-load.
12767
12768 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12769 apply this optimization. */
12770
12771 for (irel = internal_relocs; irel < irelend; irel++)
12772 {
12773 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12774 One we enter the begin of the region, we track all the LW/ST
12775 instructions, so when we leave the region, we try to find
12776 the best fp-base address for those LW/ST instructions. */
12777
12778 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12779 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12780 {
12781 /* Begin of the region. */
12782 if (begin_rel)
12783 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12784
12785 begin_rel = irel;
12786 nds32_fag_init (&fag_head);
1c8f6a4d 12787 ifc_inside = FALSE;
35c08157
KLC		 12788 }
12789 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12790 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12791 {
12792 int accu;
1c8f6a4d 12793 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12794 int dist;
12795
12796 /* End of the region.
12797 Check whether it is worth to do fp-as-gp. */
12798
12799 if (begin_rel == NULL)
12800 {
12801 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12802 continue;
12803 }
12804
12805 accu = nds32_fag_find_base (&fag_head, &best_fag);
12806
1c8f6a4d
KLC		 12807 /* Clean FP7U2_FLAG because they may set ever. */
12808 tmp_fag = fag_head.next;
12809 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12810
35c08157
KLC		 12811 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12812 if (accu < FAG_THRESHOLD
12813 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12814 internal_relocs, irelend))
12815 {
12816 /* Not worth to do fp-as-gp. */
12817 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12818 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12819 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12820 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12821 nds32_fag_free_list (&fag_head);
12822 begin_rel = NULL;
12823 continue;
12824 }
12825
12826 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12827 so we use it to record the distance to the reloction of best
12828 fp-base. */
12829 dist = best_fag->relas[0] - begin_rel;
12830 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12831 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12832 relocation. And get the base value when relocating. */
1c8f6a4d 12833 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12834 begin_rel->r_addend |= dist << 16;
12835
12836 nds32_fag_free_list (&fag_head);
12837 begin_rel = NULL;
12838 }
12839
1c8f6a4d 12840 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12841 /* Skip if we are not in the region of fp-as-gp. */
12842 continue;
12843
12844 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12845 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12846 {
12847 bfd_vma addr;
12848 uint32_t insn;
12849
12850 /* A gp-relative access is found. Insert it to the fag-list. */
12851
12852 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12853 insn = bfd_getb32 (contents + irel->r_offset);
12854 if (!N32_IS_RT3 (insn))
12855 continue;
12856
12857 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12858 nds32_fag_insert (&fag_head, addr, irel);
12859 }
12860 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12861 {
12862 begin_rel = NULL;
12863 }
1c8f6a4d
KLC		 12864 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12865 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12866 {
12867 /* Suppress fp as gp when encounter ifc. */
12868 ifc_inside = TRUE;
12869 }
35c08157
KLC		 12870 }
12871
12872 return TRUE;
12873}
12874
12875/* Remove unused `la $fp, _FD_BASE_' instruction. */
12876
12877static bfd_boolean
12878nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12879 Elf_Internal_Rela *internal_relocs,
12880 Elf_Internal_Rela *irelend)
12881{
12882 Elf_Internal_Rela *irel;
12883 Elf_Internal_Shdr *symtab_hdr;
12884 bfd_byte *contents = NULL;
12885 nds32_elf_blank_t *relax_blank_list = NULL;
12886 bfd_boolean result = TRUE;
12887 bfd_boolean unused_region = FALSE;
12888
12889 /*
12890 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12891 * R_NDS32_17IFC_PCREL_RELA
12892 * R_NDS32_10IFCU_PCREL_RELA
12893
12894 CASE??????????????
12895 */
12896
12897 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12898 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12899
12900 for (irel = internal_relocs; irel < irelend; irel++)
12901 {
12902 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12903 we marked to in previous pass.
12904 DO NOT scan relocations again, since we've alreadly decided it
12905 and set the flag. */
12906 const char *syname;
12907 int syndx;
12908 uint32_t insn;
12909
12910 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12911 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12912 unused_region = TRUE;
12913 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12914 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12915 unused_region = FALSE;
12916
12917 /* We're not in the region. */
12918 if (!unused_region)
12919 continue;
12920
12921 /* _FP_BASE_ must be a GLOBAL symbol. */
12922 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12923 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12924 continue;
12925
12926 /* The symbol name must be _FP_BASE_. */
12927 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12928 if (strcmp (syname, FP_BASE_NAME) != 0)
12929 continue;
12930
12931 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12932 {
12933 /* addi.gp $fp, -256 */
12934 insn = bfd_getb32 (contents + irel->r_offset);
12935 if (insn != INSN_ADDIGP_TO_FP)
12936 continue;
12937 }
12938 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12939 {
12940 /* addi $fp, $gp, -256 */
12941 insn = bfd_getb32 (contents + irel->r_offset);
12942 if (insn != INSN_ADDI_GP_TO_FP)
12943 continue;
12944 }
12945 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12946 {
12947 /* movi $fp, FP_BASE */
12948 insn = bfd_getb32 (contents + irel->r_offset);
12949 if (insn != INSN_MOVI_TO_FP)
12950 continue;
12951 }
12952 else
12953 continue;
12954
12955 /* We got here because a FP_BASE instruction is found. */
12956 if (!insert_nds32_elf_blank_recalc_total
12957 (&relax_blank_list, irel->r_offset, 4))
12958 goto error_return;
12959 }
12960
12961finish:
12962 if (relax_blank_list)
12963 {
12964 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12965 relax_blank_list = NULL;
12966 }
12967 return result;
12968
12969error_return:
12970 result = FALSE;
12971 goto finish;
12972}
1c8f6a4d
KLC		 12973
12974/* This is a version of bfd_generic_get_relocated_section_contents.
12975 We need this variety because relaxation will modify the dwarf
12976 infomation. When there is undefined symbol reference error mesage,
12977 linker need to dump line number where the symbol be used. However
12978 the address is be relaxed, it can not get the original dwarf contents.
12979 The variety only modify function call for reading in the section. */
12980
12981static bfd_byte *
12982nds32_elf_get_relocated_section_contents (bfd *abfd,
12983 struct bfd_link_info *link_info,
12984 struct bfd_link_order *link_order,
12985 bfd_byte *data,
12986 bfd_boolean relocatable,
12987 asymbol **symbols)
12988{
12989 bfd *input_bfd = link_order->u.indirect.section->owner;
12990 asection *input_section = link_order->u.indirect.section;
12991 long reloc_size;
12992 arelent **reloc_vector;
12993 long reloc_count;
12994
12995 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12996 if (reloc_size < 0)
12997 return NULL;
12998
12999 /* Read in the section. */
0c4bd9d9 13000 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 13001 return NULL;
13002
13003 if (reloc_size == 0)
13004 return data;
13005
13006 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13007 if (reloc_vector == NULL)
13008 return NULL;
13009
13010 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13011 reloc_vector, symbols);
13012 if (reloc_count < 0)
13013 goto error_return;
13014
13015 if (reloc_count > 0)
13016 {
13017 arelent **parent;
13018 for (parent = reloc_vector; *parent != NULL; parent++)
13019 {
13020 char *error_message = NULL;
13021 asymbol *symbol;
13022 bfd_reloc_status_type r;
13023
13024 symbol = *(*parent)->sym_ptr_ptr;
13025 if (symbol->section && discarded_section (symbol->section))
13026 {
13027 bfd_byte *p;
13028 static reloc_howto_type none_howto
13029 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13030 "unused", FALSE, 0, 0, FALSE);
13031
13032 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13033 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13034 p);
13035 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13036 (*parent)->addend = 0;
13037 (*parent)->howto = &none_howto;
13038 r = bfd_reloc_ok;
13039 }
13040 else
13041 r = bfd_perform_relocation (input_bfd, *parent, data,
13042 input_section,
13043 relocatable ? abfd : NULL,
13044 &error_message);
13045
13046 if (relocatable)
13047 {
13048 asection *os = input_section->output_section;
13049
13050 /* A partial link, so keep the relocs. */
13051 os->orelocation[os->reloc_count] = *parent;
13052 os->reloc_count++;
13053 }
13054
13055 if (r != bfd_reloc_ok)
13056 {
13057 switch (r)
13058 {
13059 case bfd_reloc_undefined:
13060 if (!((*link_info->callbacks->undefined_symbol)
13061 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13062 input_bfd, input_section, (*parent)->address, TRUE)))
13063 goto error_return;
13064 break;
13065 case bfd_reloc_dangerous:
13066 BFD_ASSERT (error_message != NULL);
13067 if (!((*link_info->callbacks->reloc_dangerous)
13068 (link_info, error_message, input_bfd, input_section,
13069 (*parent)->address)))
13070 goto error_return;
13071 break;
13072 case bfd_reloc_overflow:
13073 if (!((*link_info->callbacks->reloc_overflow)
13074 (link_info, NULL,
13075 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13076 (*parent)->howto->name, (*parent)->addend,
13077 input_bfd, input_section, (*parent)->address)))
13078 goto error_return;
13079 break;
13080 case bfd_reloc_outofrange:
13081 /* PR ld/13730:
13082 This error can result when processing some partially
13083 complete binaries. Do not abort, but issue an error
13084 message instead. */
13085 link_info->callbacks->einfo
13086 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13087 abfd, input_section, * parent);
13088 goto error_return;
13089
13090 default:
13091 abort ();
13092 break;
13093 }
13094 }
13095 }
13096 }
13097
13098 free (reloc_vector);
13099 return data;
13100
13101error_return:
13102 free (reloc_vector);
13103 return NULL;
13104}
35c08157
KLC		 13105\f
13106/* Link-time IFC relaxation.
13107 In this optimization, we chains jump instructions
13108 of the same destination with ifcall. */
13109
13110
13111/* List to save jal and j relocation. */
13112struct elf_nds32_ifc_symbol_entry
13113{
13114 asection *sec;
13115 struct elf_link_hash_entry *h;
13116 struct elf_nds32_ifc_irel_list *irel_head;
13117 unsigned long insn;
13118 int times;
13119 int enable; /* Apply ifc. */
13120 int ex9_enable; /* Apply ifc after ex9. */
13121 struct elf_nds32_ifc_symbol_entry *next;
13122};
13123
13124struct elf_nds32_ifc_irel_list
13125{
13126 Elf_Internal_Rela *irel;
13127 asection *sec;
13128 bfd_vma addr;
13129 /* If this is set, then it is the last instruction for
13130 ifc-chain, so it must be keep for the actual branching. */
13131 int keep;
13132 struct elf_nds32_ifc_irel_list *next;
13133};
13134
13135static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13136
13137/* Insert symbol of jal and j for ifc. */
13138
13139static void
13140nds32_elf_ifc_insert_symbol (asection *sec,
13141 struct elf_link_hash_entry *h,
13142 Elf_Internal_Rela *irel,
13143 unsigned long insn)
13144{
13145 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13146
13147 /* Check there is target of existing entry the same as the new one. */
13148 while (ptr != NULL)
13149 {
13150 if (((h == NULL && ptr->sec == sec
13151 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13152 && ptr->irel_head->irel->r_addend == irel->r_addend)
13153 || h != NULL)
13154 && ptr->h == h
13155 && ptr->insn == insn)
13156 {
13157 /* The same target exist, so insert into list. */
13158 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13159
13160 while (irel_list->next != NULL)
13161 irel_list = irel_list->next;
13162 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13163 irel_list = irel_list->next;
13164 irel_list->irel = irel;
13165 irel_list->keep = 1;
13166
13167 if (h == NULL)
13168 irel_list->sec = NULL;
13169 else
13170 irel_list->sec = sec;
13171 irel_list->next = NULL;
13172 return;
13173 }
13174 if (ptr->next == NULL)
13175 break;
13176 ptr = ptr->next;
13177 }
13178
13179 /* There is no same target entry, so build a new one. */
13180 if (ifc_symbol_head == NULL)
13181 {
13182 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13183 ptr = ifc_symbol_head;
13184 }
13185 else
13186 {
13187 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13188 ptr = ptr->next;
13189 }
13190
13191 ptr->h = h;
13192 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13193 ptr->irel_head->irel = irel;
13194 ptr->insn = insn;
13195 ptr->irel_head->keep = 1;
13196
13197 if (h == NULL)
13198 {
13199 /* Local symbols. */
13200 ptr->sec = sec;
13201 ptr->irel_head->sec = NULL;
13202 }
13203 else
13204 {
13205 /* Global symbol. */
13206 ptr->sec = NULL;
13207 ptr->irel_head->sec = sec;
13208 }
13209
13210 ptr->irel_head->next = NULL;
13211 ptr->times = 0;
13212 ptr->enable = 0;
13213 ptr->ex9_enable = 0;
13214 ptr->next = NULL;
13215}
13216
13217/* Gather all jal and j instructions. */
13218
13219static bfd_boolean
13220nds32_elf_ifc_calc (struct bfd_link_info *info,
13221 bfd *abfd, asection *sec)
13222{
13223 Elf_Internal_Rela *internal_relocs;
13224 Elf_Internal_Rela *irelend;
13225 Elf_Internal_Rela *irel;
13226 Elf_Internal_Shdr *symtab_hdr;
13227 bfd_byte *contents = NULL;
1c8f6a4d 13228 uint32_t insn, insn_with_reg;
35c08157
KLC		 13229 unsigned long r_symndx;
13230 struct elf_link_hash_entry *h;
13231 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13232 struct elf_nds32_link_hash_table *table;
13233 bfd_boolean ifc_loop_aware;
13234
13235 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13236 TRUE /* keep_memory */);
13237 irelend = internal_relocs + sec->reloc_count;
13238 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13239
13240 /* Check if the object enable ifc. */
13241 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13242 R_NDS32_RELAX_ENTRY);
13243
13244 if (irel == NULL
13245 || irel >= irelend
13246 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13247 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13248 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13249 return TRUE;
13250
0c4bd9d9 13251 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 13252 return FALSE;
13253
13254 table = nds32_elf_hash_table (info);
13255 ifc_loop_aware = table->ifc_loop_aware;
13256 while (irel != NULL && irel < irelend)
13257 {
13258 /* Traverse all relocation and gather all of them to build the list. */
13259
13260 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13261 {
13262 if (ifc_loop_aware == 1
13263 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13264 {
13265 /* Check the region if loop or not. If it is true and
13266 ifc-loop-aware is true, ignore the region till region end. */
13267 while (irel != NULL
13268 && irel < irelend
13269 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13270 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13271 irel++;
13272 }
13273 }
13274
13275 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13276 {
13277 insn = bfd_getb32 (contents + irel->r_offset);
13278 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13279 r_symndx = ELF32_R_SYM (irel->r_info);
13280 if (r_symndx < symtab_hdr->sh_info)
13281 {
13282 /* Local symbol. */
13283 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13284 }
13285 else
13286 {
13287 /* External symbol. */
13288 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13289 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13290 }
13291 }
13292 irel++;
13293 }
13294 return TRUE;
13295}
13296
13297/* Determine whether j and jal should be substituted. */
13298
13299static void
13300nds32_elf_ifc_filter (struct bfd_link_info *info)
13301{
13302 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13303 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13304 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13305 struct elf_nds32_link_hash_table *table;
13306 int target_optimize;
13307 bfd_vma address;
13308
13309 table = nds32_elf_hash_table (info);
13310 target_optimize = table->target_optimize;
13311 while (ptr)
13312 {
13313 irel_ptr = ptr->irel_head;
13314 if (ptr->h == NULL)
13315 {
13316 /* Local symbol. */
13317 irel_keeper = irel_ptr;
13318 while (irel_ptr && irel_ptr->next)
13319 {
13320 /* Check there is jump target can be used. */
13321 if ((irel_ptr->next->irel->r_offset
13322 - irel_keeper->irel->r_offset) > 1022)
13323 irel_keeper = irel_ptr->next;
13324 else
13325 {
13326 ptr->enable = 1;
13327 irel_ptr->keep = 0;
13328 }
13329 irel_ptr = irel_ptr->next;
13330 }
13331 }
13332 else
13333 {
1c8f6a4d
KLC		 13334 /* Global symbol. */
13335 /* We have to get the absolute address and decide
13336 whether to keep it or not. */
35c08157
KLC		 13337 while (irel_ptr)
13338 {
13339 address = (irel_ptr->irel->r_offset
13340 + irel_ptr->sec->output_section->vma
13341 + irel_ptr->sec->output_offset);
13342 irel_ptr->addr = address;
13343 irel_ptr = irel_ptr->next;
13344 }
13345
13346 irel_ptr = ptr->irel_head;
13347 while (irel_ptr)
13348 {
1c8f6a4d 13349 /* Sort by address. */
35c08157
KLC		 13350 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13351 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13352 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13353 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13354
1c8f6a4d 13355 /* Get the smallest one. */
35c08157
KLC		 13356 while (irel_temp->next)
13357 {
13358 if (irel_temp->next->addr < irel_dest->addr)
13359 {
13360 irel_dest_prev = irel_temp;
13361 irel_dest = irel_temp->next;
13362 }
13363 irel_temp = irel_temp->next;
13364 }
1c8f6a4d 13365
35c08157
KLC		 13366 if (irel_dest != irel_ptr)
13367 {
13368 if (irel_ptr_prev)
13369 irel_ptr_prev->next = irel_dest;
13370 if (irel_dest_prev)
13371 irel_dest_prev->next = irel_ptr;
13372 irel_temp = irel_ptr->next;
13373 irel_ptr->next = irel_dest->next;
13374 irel_dest->next = irel_temp;
13375 }
13376 irel_ptr_prev = irel_ptr;
13377 irel_ptr = irel_ptr->next;
13378 }
13379
13380 irel_ptr = ptr->irel_head;
13381 irel_keeper = irel_ptr;
13382 while (irel_ptr && irel_ptr->next)
13383 {
13384 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13385 irel_keeper = irel_ptr->next;
13386 else
13387 {
13388 ptr->enable = 1;
13389 irel_ptr->keep = 0;
13390 }
13391 irel_ptr = irel_ptr->next;
13392 }
13393 }
13394
1c8f6a4d 13395 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13396 if ((target_optimize & NDS32_RELAX_EX9_ON)
13397 && ptr->irel_head != irel_keeper)
13398 ptr->enable = 0;
13399 ptr = ptr->next;
13400 }
13401}
13402
13403/* Determine whether j and jal should be substituted after ex9 done. */
13404
13405static void
13406nds32_elf_ifc_filter_after_ex9 (void)
13407{
13408 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13409 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13410
13411 while (ptr)
13412 {
13413 if (ptr->enable == 0)
13414 {
13415 /* Check whether ifc is applied or not. */
13416 irel_ptr = ptr->irel_head;
13417 ptr->ex9_enable = 1;
13418 while (irel_ptr)
13419 {
13420 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13421 {
13422 /* Ex9 already. */
13423 ptr->ex9_enable = 0;
13424 break;
13425 }
13426 irel_ptr = irel_ptr->next;
13427 }
13428 }
13429 ptr = ptr->next;
13430 }
13431}
13432
13433/* Wrapper to do ifc relaxation. */
13434
13435bfd_boolean
13436nds32_elf_ifc_finish (struct bfd_link_info *info)
13437{
13438 int relax_status;
13439 struct elf_nds32_link_hash_table *table;
13440
13441 table = nds32_elf_hash_table (info);
13442 relax_status = table->relax_status;
13443
13444 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13445 nds32_elf_ifc_filter (info);
13446 else
13447 nds32_elf_ifc_filter_after_ex9 ();
13448
13449 if (!nds32_elf_ifc_replace (info))
13450 return FALSE;
13451
13452 if (table)
13453 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13454 return TRUE;
13455}
13456
13457/* Traverse the result of ifc filter and replace it with ifcall9. */
13458
13459static bfd_boolean
13460nds32_elf_ifc_replace (struct bfd_link_info *info)
13461{
13462 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13463 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13464 nds32_elf_blank_t *relax_blank_list = NULL;
13465 bfd_byte *contents = NULL;
13466 Elf_Internal_Rela *internal_relocs;
13467 Elf_Internal_Rela *irel;
13468 Elf_Internal_Rela *irelend;
13469 unsigned short insn16 = INSN_IFCALL9;
13470 struct elf_nds32_link_hash_table *table;
13471 int relax_status;
13472
13473 table = nds32_elf_hash_table (info);
13474 relax_status = table->relax_status;
13475
13476 while (ptr)
13477 {
13478 /* Traverse the ifc gather list, and replace the
13479 filter entries by ifcall9. */
13480 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13481 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13482 && ptr->ex9_enable == 1))
35c08157
KLC		 13483 {
13484 irel_ptr = ptr->irel_head;
13485 if (ptr->h == NULL)
13486 {
13487 /* Local symbol. */
13488 internal_relocs = _bfd_elf_link_read_relocs
13489 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13490 irelend = internal_relocs + ptr->sec->reloc_count;
13491
1c8f6a4d 13492 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13493 &contents, TRUE))
35c08157
KLC		 13494 return FALSE;
13495
13496 while (irel_ptr)
13497 {
13498 if (irel_ptr->keep == 0 && irel_ptr->next)
13499 {
1c8f6a4d 13500 /* The one can be replaced. We have to check whether
35c08157
KLC		 13501 there is any alignment point in the region. */
13502 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13503 while (((irel_ptr->next->keep == 0
13504 && irel < irel_ptr->next->irel)
35c08157
KLC		 13505 || (irel_ptr->next->keep == 1 && irel < irelend))
13506 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13507 && (irel->r_addend & 0x1f) == 2))
13508 irel++;
13509 if (irel >= irelend
13510 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13511 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13512 && ((irel->r_offset - get_nds32_elf_blank_total
13513 (&relax_blank_list, irel->r_offset, 1))
13514 & 0x02) == 0))
35c08157
KLC		 13515 {
13516 /* Replace by ifcall9. */
13517 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13518 if (!insert_nds32_elf_blank_recalc_total
13519 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13520 return FALSE;
13521 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13522 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13523 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13524 }
13525 }
13526 irel_ptr = irel_ptr->next;
13527 }
13528
13529 /* Delete the redundant code. */
13530 if (relax_blank_list)
13531 {
13532 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13533 relax_blank_list);
13534 relax_blank_list = NULL;
13535 }
13536 }
13537 else
13538 {
13539 /* Global symbol. */
13540 while (irel_ptr)
13541 {
13542 if (irel_ptr->keep == 0 && irel_ptr->next)
13543 {
13544 /* The one can be replaced, and we have to check
13545 whether there is any alignment point in the region. */
13546 internal_relocs = _bfd_elf_link_read_relocs
13547 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13548 TRUE /* keep_memory */);
13549 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13550 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13551 irel_ptr->sec, &contents,
13552 TRUE))
35c08157
KLC		 13553 return FALSE;
13554
13555 irel = irel_ptr->irel;
13556 while (((irel_ptr->sec == irel_ptr->next->sec
13557 && irel_ptr->next->keep == 0
13558 && irel < irel_ptr->next->irel)
13559 || ((irel_ptr->sec != irel_ptr->next->sec
13560 || irel_ptr->next->keep == 1)
13561 && irel < irelend))
13562 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13563 && (irel->r_addend & 0x1f) == 2))
13564 irel++;
13565 if (irel >= irelend
13566 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13567 && (irel->r_addend & 0x1f) == 2
13568 && ((irel->r_offset
13569 - get_nds32_elf_blank_total (&relax_blank_list,
13570 irel->r_offset, 1)) & 0x02) == 0))
13571 {
13572 /* Replace by ifcall9. */
13573 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13574 if (!insert_nds32_elf_blank_recalc_total
13575 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13576 return FALSE;
13577
13578 /* Delete the redundant code, and clear the relocation. */
13579 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13580 irel_ptr->sec,
13581 relax_blank_list);
13582 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13583 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13584 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13585 relax_blank_list = NULL;
13586 }
13587 }
13588
13589 irel_ptr = irel_ptr->next;
13590 }
13591 }
13592 }
13593 ptr = ptr->next;
13594 }
13595
13596 return TRUE;
13597}
13598
13599/* Relocate ifcall. */
13600
1c8f6a4d 13601static bfd_boolean
35c08157
KLC		 13602nds32_elf_ifc_reloc (void)
13603{
13604 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13605 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13606 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13607 bfd_vma relocation, address;
13608 unsigned short insn16;
35c08157 13609 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13610 static bfd_boolean done = FALSE;
13611
13612 if (done)
13613 return TRUE;
13614
13615 done = TRUE;
35c08157
KLC		 13616
13617 while (ptr)
13618 {
1c8f6a4d 13619 /* Check the entry is enable ifcall. */
35c08157
KLC		 13620 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13621 {
1c8f6a4d 13622 /* Get the reserve jump. */
35c08157
KLC		 13623 irel_ptr = ptr->irel_head;
13624 while (irel_ptr)
13625 {
13626 if (irel_ptr->keep == 1)
13627 {
13628 irel_keeper = irel_ptr;
13629 break;
13630 }
13631 irel_ptr = irel_ptr->next;
13632 }
13633
13634 irel_ptr = ptr->irel_head;
13635 if (ptr->h == NULL)
13636 {
13637 /* Local symbol. */
0c4bd9d9
KLC		 13638 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13639 &contents, TRUE))
35c08157
KLC		 13640 return FALSE;
13641
13642 while (irel_ptr)
13643 {
13644 if (irel_ptr->keep == 0
1c8f6a4d 13645 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13646 {
13647 relocation = irel_keeper->irel->r_offset;
13648 relocation = relocation - irel_ptr->irel->r_offset;
13649 while (irel_keeper && relocation > 1022)
13650 {
13651 irel_keeper = irel_keeper->next;
13652 if (irel_keeper && irel_keeper->keep == 1)
13653 {
13654 relocation = irel_keeper->irel->r_offset;
13655 relocation = relocation - irel_ptr->irel->r_offset;
13656 }
13657 }
13658 if (relocation > 1022)
13659 {
13660 /* Double check. */
13661 irel_keeper = ptr->irel_head;
13662 while (irel_keeper)
13663 {
13664 if (irel_keeper->keep == 1)
13665 {
13666 relocation = irel_keeper->irel->r_offset;
13667 relocation = relocation - irel_ptr->irel->r_offset;
13668 }
13669 if (relocation <= 1022)
13670 break;
13671 irel_keeper = irel_keeper->next;
13672 }
13673 if (!irel_keeper)
13674 return FALSE;
13675 }
1c8f6a4d
KLC		 13676 irel_ptr->irel->r_info =
13677 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13678 R_NDS32_NONE);
35c08157
KLC		 13679 insn16 = INSN_IFCALL9 | (relocation >> 1);
13680 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13681 }
13682 irel_ptr = irel_ptr->next;
13683 }
13684 }
13685 else
13686 {
13687 /* Global symbol. */
13688 while (irel_ptr)
13689 {
13690 if (irel_ptr->keep == 0
1c8f6a4d 13691 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13692 {
1c8f6a4d 13693 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13694 relocation = (irel_keeper->irel->r_offset
13695 + irel_keeper->sec->output_section->vma
13696 + irel_keeper->sec->output_offset);
13697 address = (irel_ptr->irel->r_offset
13698 + irel_ptr->sec->output_section->vma
13699 + irel_ptr->sec->output_offset);
13700 relocation = relocation - address;
1c8f6a4d
KLC		 13701
13702 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13703 while (irel_keeper && relocation > 1022)
13704 {
13705 irel_keeper = irel_keeper->next;
13706 if (irel_keeper && irel_keeper->keep ==1)
13707 {
13708 relocation = (irel_keeper->irel->r_offset
13709 + irel_keeper->sec->output_section->vma
13710 + irel_keeper->sec->output_offset);
13711 relocation = relocation - address;
13712 }
13713 }
13714
13715 if (relocation > 1022)
13716 {
13717 /* Double check. */
13718 irel_keeper = ptr->irel_head;
13719 while (irel_keeper)
13720 {
13721 if (irel_keeper->keep == 1)
13722 {
13723
13724 relocation = (irel_keeper->irel->r_offset
13725 + irel_keeper->sec->output_section->vma
13726 + irel_keeper->sec->output_offset);
13727 relocation = relocation - address;
13728 }
13729 if (relocation <= 1022)
13730 break;
13731 irel_keeper = irel_keeper->next;
13732 }
13733 if (!irel_keeper)
13734 return FALSE;
13735 }
13736 if (!nds32_get_section_contents
0c4bd9d9 13737 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13738 return FALSE;
13739 insn16 = INSN_IFCALL9 | (relocation >> 1);
13740 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13741 irel_ptr->irel->r_info =
13742 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13743 R_NDS32_NONE);
35c08157
KLC		 13744 }
13745 irel_ptr =irel_ptr->next;
13746 }
13747 }
13748 }
13749 ptr = ptr->next;
13750 }
13751
13752 return TRUE;
13753}
13754
13755/* End of IFC relaxation. */
13756\f
13757/* EX9 Instruction Table Relaxation. */
13758
13759/* Global hash list. */
13760struct elf_link_hash_entry_list
13761{
13762 struct elf_link_hash_entry *h;
13763 struct elf_link_hash_entry_list *next;
13764};
13765
13766/* Save different destination but same insn. */
13767struct elf_link_hash_entry_mul_list
13768{
13769 /* Global symbol times. */
13770 int times;
13771 /* Save relocation for each global symbol but useful?? */
13772 Elf_Internal_Rela *irel;
13773 /* For sethi, two sethi may have the same high-part but different low-parts. */
13774 Elf_Internal_Rela rel_backup;
13775 struct elf_link_hash_entry_list *h_list;
13776 struct elf_link_hash_entry_mul_list *next;
13777};
13778
13779/* Instruction hash table. */
13780struct elf_nds32_code_hash_entry
13781{
13782 struct bfd_hash_entry root;
13783 int times;
13784 /* For insn that can use relocation or constant ex: sethi. */
13785 int const_insn;
13786 asection *sec;
13787 struct elf_link_hash_entry_mul_list *m_list;
13788 /* Using r_addend. */
13789 Elf_Internal_Rela *irel;
13790 /* Using r_info. */
13791 Elf_Internal_Rela rel_backup;
13792};
13793
13794/* Instruction count list. */
13795struct elf_nds32_insn_times_entry
13796{
13797 const char *string;
13798 int times;
13799 int order;
13800 asection *sec;
13801 struct elf_link_hash_entry_mul_list *m_list;
13802 Elf_Internal_Rela *irel;
13803 Elf_Internal_Rela rel_backup;
13804 struct elf_nds32_insn_times_entry *next;
13805};
13806
13807/* J and JAL symbol list. */
13808struct elf_nds32_symbol_entry
13809{
13810 char *string;
13811 unsigned long insn;
13812 struct elf_nds32_symbol_entry *next;
13813};
13814
13815/* Relocation list. */
13816struct elf_nds32_irel_entry
13817{
13818 Elf_Internal_Rela *irel;
13819 struct elf_nds32_irel_entry *next;
13820};
13821
13822/* ex9.it insn need to be fixed. */
13823struct elf_nds32_ex9_refix
13824{
13825 Elf_Internal_Rela *irel;
13826 asection *sec;
13827 struct elf_link_hash_entry *h;
13828 int order;
13829 struct elf_nds32_ex9_refix *next;
13830};
13831
13832static struct bfd_hash_table ex9_code_table;
13833static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13834static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13835
13836/* EX9 hash function. */
13837
13838static struct bfd_hash_entry *
13839nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13840 struct bfd_hash_table *table,
13841 const char *string)
13842{
13843 struct elf_nds32_code_hash_entry *ret;
13844
13845 /* Allocate the structure if it has not already been allocated by a
13846 subclass. */
13847 if (entry == NULL)
13848 {
13849 entry = (struct bfd_hash_entry *)
13850 bfd_hash_allocate (table, sizeof (*ret));
13851 if (entry == NULL)
13852 return entry;
13853 }
13854
13855 /* Call the allocation method of the superclass. */
13856 entry = bfd_hash_newfunc (entry, table, string);
13857 if (entry == NULL)
13858 return entry;
13859
13860 ret = (struct elf_nds32_code_hash_entry*) entry;
13861 ret->times = 0;
13862 ret->const_insn = 0;
13863 ret->m_list = NULL;
13864 ret->sec = NULL;
13865 ret->irel = NULL;
13866 return &ret->root;
13867}
13868
13869/* Insert ex9 entry
13870 this insert must be stable sorted by times. */
13871
13872static void
13873nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13874{
13875 struct elf_nds32_insn_times_entry *temp;
13876 struct elf_nds32_insn_times_entry *temp2;
13877
13878 if (ex9_insn_head == NULL)
13879 {
13880 ex9_insn_head = ptr;
13881 ptr->next = NULL;
13882 }
13883 else
13884 {
13885 temp = ex9_insn_head;
13886 temp2 = ex9_insn_head;
13887 while (temp->next &&
13888 (temp->next->times >= ptr->times
13889 || temp->times == -1))
13890 {
13891 if (temp->times == -1)
13892 temp2 = temp;
13893 temp = temp->next;
13894 }
13895 if (ptr->times > temp->times && temp->times != -1)
13896 {
13897 ptr->next = temp;
13898 if (temp2->times == -1)
13899 temp2->next = ptr;
13900 else
13901 ex9_insn_head = ptr;
13902 }
13903 else if (temp->next == NULL)
13904 {
13905 temp->next = ptr;
13906 ptr->next = NULL;
13907 }
13908 else
13909 {
13910 ptr->next = temp->next;
13911 temp->next = ptr;
13912 }
13913 }
13914}
13915
13916/* Examine each insn times in hash table.
13917 Handle multi-link hash entry.
13918
13919 TODO: This function doesn't assign so much info since it is fake. */
13920
13921static int
13922nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13923{
13924 struct elf_nds32_insn_times_entry *ptr;
13925 int times;
13926
13927 if (h->m_list == NULL)
13928 {
13929 /* Local symbol insn or insn without relocation. */
13930 if (h->times < 3)
13931 return TRUE;
13932
13933 ptr = (struct elf_nds32_insn_times_entry *)
13934 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13935 ptr->times = h->times;
13936 ptr->string = h->root.string;
13937 ptr->m_list = NULL;
13938 ptr->sec = h->sec;
13939 ptr->irel = h->irel;
13940 ptr->rel_backup = h->rel_backup;
13941 nds32_elf_ex9_insert_entry (ptr);
13942 }
13943 else
13944 {
13945 /* Global symbol insn. */
13946 /* Only sethi insn has multiple m_list. */
13947 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13948
13949 times = 0;
13950 while (m_list)
13951 {
13952 times += m_list->times;
13953 m_list = m_list->next;
13954 }
13955 if (times >= 3)
13956 {
13957 m_list = h->m_list;
13958 ptr = (struct elf_nds32_insn_times_entry *)
13959 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13960 ptr->times = times; /* Use the total times. */
13961 ptr->string = h->root.string;
13962 ptr->m_list = m_list;
13963 ptr->sec = h->sec;
13964 ptr->irel = m_list->irel;
13965 ptr->rel_backup = m_list->rel_backup;
13966 nds32_elf_ex9_insert_entry (ptr);
13967 }
13968 if (h->const_insn == 1)
13969 {
13970 /* sethi with constant value. */
13971 if (h->times < 3)
13972 return TRUE;
13973
13974 ptr = (struct elf_nds32_insn_times_entry *)
13975 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13976 ptr->times = h->times;
13977 ptr->string = h->root.string;
13978 ptr->m_list = NULL;
13979 ptr->sec = NULL;
13980 ptr->irel = NULL;
13981 ptr->rel_backup = h->rel_backup;
13982 nds32_elf_ex9_insert_entry (ptr);
13983 }
13984 }
13985 return TRUE;
13986}
13987
13988/* Count each insn times in hash table.
13989 Handle multi-link hash entry. */
13990
13991static int
13992nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13993{
13994 int reservation, times;
13995 unsigned long relocation, min_relocation;
13996 struct elf_nds32_insn_times_entry *ptr;
13997
13998 if (h->m_list == NULL)
13999 {
14000 /* Local symbol insn or insn without relocation. */
14001 if (h->times < 3)
14002 return TRUE;
14003 ptr = (struct elf_nds32_insn_times_entry *)
14004 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14005 ptr->times = h->times;
14006 ptr->string = h->root.string;
14007 ptr->m_list = NULL;
14008 ptr->sec = h->sec;
14009 ptr->irel = h->irel;
14010 ptr->rel_backup = h->rel_backup;
14011 nds32_elf_ex9_insert_entry (ptr);
14012 }
14013 else
14014 {
14015 /* Global symbol insn. */
14016 /* Only sethi insn has multiple m_list. */
14017 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14018
14019 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14020 && m_list->next != NULL)
14021 {
14022 /* Sethi insn has different symbol or addend but has same hi20. */
14023 times = 0;
14024 reservation = 1;
14025 relocation = 0;
14026 min_relocation = 0xffffffff;
14027 while (m_list)
14028 {
14029 /* Get the minimum sethi address
14030 and calculate how many entry the sethi-list have to use. */
14031 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14032 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14033 && (m_list->h_list->h->root.u.def.section != NULL
14034 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14035 {
14036 relocation = (m_list->h_list->h->root.u.def.value +
14037 m_list->h_list->h->root.u.def.section->output_section->vma +
14038 m_list->h_list->h->root.u.def.section->output_offset);
14039 relocation += m_list->irel->r_addend;
14040 }
14041 else
14042 relocation = 0;
14043 if (relocation < min_relocation)
14044 min_relocation = relocation;
14045 times += m_list->times;
14046 m_list = m_list->next;
14047 }
14048 if (min_relocation < ex9_relax_size)
14049 reservation = (min_relocation >> 12) + 1;
14050 else
14051 reservation = (min_relocation >> 12)
14052 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14053 if (reservation < (times / 3))
14054 {
14055 /* Efficient enough to use ex9. */
14056 int i;
14057
14058 for (i = reservation ; i > 0; i--)
14059 {
14060 /* Allocate number of reservation ex9 entry. */
14061 ptr = (struct elf_nds32_insn_times_entry *)
14062 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14063 ptr->times = h->m_list->times / reservation;
14064 ptr->string = h->root.string;
14065 ptr->m_list = h->m_list;
14066 ptr->sec = h->sec;
14067 ptr->irel = h->m_list->irel;
14068 ptr->rel_backup = h->m_list->rel_backup;
14069 nds32_elf_ex9_insert_entry (ptr);
14070 }
14071 }
14072 }
14073 else
14074 {
14075 /* Normal global symbol that means no different address symbol
14076 using same ex9 entry. */
14077 if (m_list->times >= 3)
14078 {
14079 ptr = (struct elf_nds32_insn_times_entry *)
14080 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14081 ptr->times = m_list->times;
14082 ptr->string = h->root.string;
14083 ptr->m_list = h->m_list;
14084 ptr->sec = h->sec;
14085 ptr->irel = h->m_list->irel;
14086 ptr->rel_backup = h->m_list->rel_backup;
14087 nds32_elf_ex9_insert_entry (ptr);
14088 }
14089 }
14090
14091 if (h->const_insn == 1)
14092 {
14093 /* sethi with constant value. */
14094 if (h->times < 3)
14095 return TRUE;
14096
14097 ptr = (struct elf_nds32_insn_times_entry *)
14098 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14099 ptr->times = h->times;
14100 ptr->string = h->root.string;
14101 ptr->m_list = NULL;
14102 ptr->sec = NULL;
14103 ptr->irel = NULL;
14104 ptr->rel_backup = h->rel_backup;
14105 nds32_elf_ex9_insert_entry (ptr);
14106 }
14107 }
14108
14109 return TRUE;
14110}
14111
14112/* Hash table traverse function. */
14113
14114static void
14115nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14116{
14117 unsigned int i;
14118
14119 ex9_code_table.frozen = 1;
14120 for (i = 0; i < ex9_code_table.size; i++)
14121 {
14122 struct bfd_hash_entry *p;
14123
14124 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14125 if (!func ((struct elf_nds32_code_hash_entry *) p))
14126 goto out;
14127 }
14128out:
14129 ex9_code_table.frozen = 0;
14130}
14131
14132
14133/* Give order number to insn list. */
14134
14135static void
14136nds32_elf_order_insn_times (struct bfd_link_info *info)
14137{
14138 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14139 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14140 struct elf_nds32_link_hash_table *table;
35c08157 14141 int ex9_limit;
1c8f6a4d
KLC		 14142 int number = 0;
14143
14144 if (ex9_insn_head == NULL)
14145 return;
35c08157
KLC		 14146
14147/* The max number of entries is 512. */
14148 ex9_insn = ex9_insn_head;
14149 table = nds32_elf_hash_table (info);
14150 ex9_limit = table->ex9_limit;
14151
35c08157
KLC		 14152 ex9_insn = ex9_insn_head;
14153
1c8f6a4d 14154 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14155 {
1c8f6a4d 14156 ex9_insn->order = number;
35c08157 14157 number++;
1c8f6a4d 14158 temp = ex9_insn;
35c08157
KLC		 14159 ex9_insn = ex9_insn->next;
14160 }
14161
1c8f6a4d
KLC		 14162 if (ex9_insn && temp)
14163 temp->next = NULL;
35c08157
KLC		 14164
14165 while (ex9_insn != NULL)
14166 {
14167 /* Free useless entry. */
14168 temp = ex9_insn;
14169 ex9_insn = ex9_insn->next;
14170 free (temp);
14171 }
14172}
14173
14174/* Build .ex9.itable section. */
14175
14176static void
14177nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14178{
14179 asection *table_sec;
14180 struct elf_nds32_insn_times_entry *ptr;
14181 bfd *it_abfd;
14182 int number = 0;
14183 bfd_byte *contents = NULL;
14184
14185 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14186 it_abfd = it_abfd->link.next)
35c08157
KLC		 14187 {
14188 /* Find the section .ex9.itable, and put all entries into it. */
14189 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14190 if (table_sec != NULL)
14191 {
0c4bd9d9 14192 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 14193 return;
14194
14195 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14196 number++;
14197
14198 table_sec->size = number * 4;
14199
14200 if (number == 0)
1c8f6a4d 14201 return;
35c08157
KLC		 14202
14203 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14204 number = 0;
14205 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14206 {
14207 long val;
14208
14209 val = strtol (ptr->string, NULL, 16);
14210 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14211 number++;
14212 }
14213 break;
14214 }
14215 }
14216}
14217
14218/* Get insn with regs according to relocation type. */
14219
14220static void
14221nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14222 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 14223{
14224 reloc_howto_type *howto = NULL;
14225
14226 if (irel == NULL
14227 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14228 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14229 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14230 {
14231 *insn_with_reg = insn;
14232 return;
14233 }
14234
14235 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14236 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14237}
14238
14239/* Mask number of address bits according to relocation. */
14240
14241static unsigned long
14242nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14243{
14244 reloc_howto_type *howto = NULL;
14245
14246 if (irel == NULL
14247 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14248 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14249 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14250 return 0;
14251
14252 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14253 return howto->dst_mask;
14254}
14255
14256static void
14257nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14258 struct elf_nds32_irel_entry *irel_ptr)
14259{
14260 if (*irel_list == NULL)
14261 {
14262 *irel_list = irel_ptr;
14263 irel_ptr->next = NULL;
14264 }
14265 else
14266 {
14267 irel_ptr->next = *irel_list;
14268 *irel_list = irel_ptr;
14269 }
14270}
14271
14272static void
14273nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14274 struct elf_link_hash_entry *h, int order)
14275{
14276 struct elf_nds32_ex9_refix *ptr;
14277
14278 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14279 ptr->sec = sec;
14280 ptr->irel = irel;
14281 ptr->h = h;
14282 ptr->order = order;
14283 ptr->next = NULL;
14284
14285 if (ex9_refix_head == NULL)
14286 ex9_refix_head = ptr;
14287 else
14288 {
14289 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14290
14291 while (temp->next != NULL)
14292 temp = temp->next;
14293 temp->next = ptr;
14294 }
14295}
14296
14297enum
14298{
14299 DATA_EXIST = 1,
14300 CLEAN_PRE = 1 << 1,
14301 PUSH_PRE = 1 << 2
14302};
14303
14304/* Check relocation type if supporting for ex9. */
14305
14306static int
14307nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14308 Elf_Internal_Rela **irel,
14309 Elf_Internal_Rela *irelend,
14310 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14311 asection *sec,bfd_vma *off,
35c08157
KLC		 14312 bfd_byte *contents)
14313{
14314 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14315 bfd_boolean nested_ex9, nested_loop;
14316 bfd_boolean ex9_loop_aware;
14317 /* We use the highest 1 byte of result to record
14318 how many bytes location counter has to move. */
14319 int result = 0;
14320 Elf_Internal_Rela *irel_save = NULL;
14321 struct elf_nds32_link_hash_table *table;
14322
14323 table = nds32_elf_hash_table (info);
14324 ex9_loop_aware = table->ex9_loop_aware;
14325
14326 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14327 {
14328 switch (ELF32_R_TYPE ((*irel)->r_info))
14329 {
14330 case R_NDS32_RELAX_REGION_BEGIN:
14331 /* Ignore code block. */
14332 nested_ex9 = FALSE;
14333 nested_loop = FALSE;
14334 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14335 || (ex9_loop_aware
14336 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14337 {
14338 /* Check the region if loop or not. If it is true and
14339 ex9-loop-aware is true, ignore the region till region end. */
14340 /* To save the status for in .no_relax ex9 region and
14341 loop region to conform the block can do ex9 relaxation. */
14342 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14343 nested_loop = (ex9_loop_aware
14344 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14345 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14346 {
14347 (*irel)++;
14348 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14349 {
14350 /* There may be nested region. */
14351 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14352 nested_ex9 = TRUE;
14353 else if (ex9_loop_aware
14354 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14355 nested_loop = TRUE;
14356 }
14357 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14358 {
14359 /* The end of region. */
14360 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14361 nested_ex9 = FALSE;
14362 else if (ex9_loop_aware
14363 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14364 nested_loop = FALSE;
14365 }
1c8f6a4d 14366 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14367 && ((*irel)->r_addend & 0x1f) == 2)
14368 {
14369 /* Alignment exist in the region. */
14370 result |= CLEAN_PRE;
14371 if (((*irel)->r_offset -
14372 get_nds32_elf_blank_total (&relax_blank_list,
14373 (*irel)->r_offset, 0)) & 0x02)
14374 result |= PUSH_PRE;
14375 }
14376 }
14377 if ((*irel) >= irelend)
14378 *off = sec->size;
14379 else
14380 *off = (*irel)->r_offset;
14381
14382 /* The final instruction in the region, regard this one as data to ignore it. */
14383 result |= DATA_EXIST;
14384 return result;
14385 }
14386 break;
14387
14388 case R_NDS32_LABEL:
1c8f6a4d 14389 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14390 {
14391 /* Check this point is align and decide to do ex9 or not. */
14392 result |= CLEAN_PRE;
14393 if (((*irel)->r_offset -
14394 get_nds32_elf_blank_total (&relax_blank_list,
14395 (*irel)->r_offset, 0)) & 0x02)
14396 result |= PUSH_PRE;
14397 }
14398 break;
14399 case R_NDS32_32_RELA:
14400 /* Data. */
14401 result |= (4 << 24);
14402 result |= DATA_EXIST;
14403 break;
14404 case R_NDS32_16_RELA:
14405 /* Data. */
14406 result |= (2 << 24);
14407 result |= DATA_EXIST;
14408 break;
14409 case R_NDS32_DATA:
14410 /* Data. */
14411 /* The least code alignment is 2. If the data is only one byte,
14412 we have to shift one more byte. */
14413 if ((*irel)->r_addend == 1)
14414 result |= ((*irel)->r_addend << 25) ;
14415 else
14416 result |= ((*irel)->r_addend << 24) ;
14417
14418 result |= DATA_EXIST;
14419 break;
14420
14421 case R_NDS32_25_PCREL_RELA:
14422 case R_NDS32_SDA16S3_RELA:
14423 case R_NDS32_SDA15S3_RELA:
14424 case R_NDS32_SDA15S3:
14425 case R_NDS32_SDA17S2_RELA:
14426 case R_NDS32_SDA15S2_RELA:
14427 case R_NDS32_SDA12S2_SP_RELA:
14428 case R_NDS32_SDA12S2_DP_RELA:
14429 case R_NDS32_SDA15S2:
14430 case R_NDS32_SDA18S1_RELA:
14431 case R_NDS32_SDA15S1_RELA:
14432 case R_NDS32_SDA15S1:
14433 case R_NDS32_SDA19S0_RELA:
14434 case R_NDS32_SDA15S0_RELA:
14435 case R_NDS32_SDA15S0:
14436 case R_NDS32_HI20_RELA:
14437 case R_NDS32_LO12S0_ORI_RELA:
14438 case R_NDS32_LO12S0_RELA:
14439 case R_NDS32_LO12S1_RELA:
14440 case R_NDS32_LO12S2_RELA:
14441 /* These relocation is supported ex9 relaxation currently. */
14442 /* We have to save the relocation for using later, since we have
14443 to check there is any alignment in the same address. */
14444 irel_save = *irel;
14445 break;
14446 default:
14447 /* Not support relocations. */
14448 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14449 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14450 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14451 {
14452 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14453 But we have to consider if there is any side-effect. */
14454 if (!(result & DATA_EXIST))
14455 {
14456 /* We have to confirm there is no data relocation in the
14457 same address. In general case, this won't happen. */
14458 /* We have to do ex9 conservative, for those relocation not
14459 considerd we ignore instruction. */
14460 result |= DATA_EXIST;
14461 if (*(contents + *off) & 0x80)
14462 result |= (2 << 24);
14463 else
14464 result |= (4 << 24);
14465 break;
14466 }
14467 }
14468 }
14469 if ((*irel) < irelend
14470 && ((*irel) + 1) < irelend
14471 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14472 /* There are relocations pointing to the same address, we have to
14473 check all of them. */
14474 (*irel)++;
14475 else
14476 {
14477 if (irel_save)
14478 *irel = irel_save;
14479 return result;
14480 }
14481 }
14482 return result;
14483}
14484
1c8f6a4d
KLC		 14485/* Replace with ex9 instruction. */
14486
14487static bfd_boolean
14488nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14489 nds32_elf_blank_t **relax_blank_list,
14490 struct elf_nds32_irel_entry *pre_irel_ptr,
14491 struct elf_nds32_irel_entry **irel_list)
14492{
14493 if (insn16 != 0)
14494 {
14495 /* Implement the ex9 relaxation. */
14496 bfd_putb16 (insn16, contents + pre_off);
14497 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14498 pre_off + 2, 2))
14499 return FALSE;
14500 if (pre_irel_ptr != NULL)
14501 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14502 }
14503 return TRUE;
14504}
14505
35c08157
KLC		 14506/* Replace input file instruction which is in ex9 itable. */
14507
14508static bfd_boolean
14509nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14510{
14511 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14512 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14513 bfd_vma off;
14514 uint16_t insn16, insn_ex9;
35c08157 14515 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14516 bfd_vma pre_off = -1;
14517 uint16_t pre_insn16 = 0;
35c08157
KLC		 14518 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14519 Elf_Internal_Rela *internal_relocs;
14520 Elf_Internal_Rela *irel;
14521 Elf_Internal_Rela *irelend;
14522 Elf_Internal_Shdr *symtab_hdr;
14523 Elf_Internal_Sym *isym = NULL;
14524 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14525 uint32_t insn = 0;
14526 uint32_t insn_with_reg = 0;
14527 uint32_t it_insn;
14528 uint32_t it_insn_with_reg;
35c08157
KLC		 14529 unsigned long r_symndx;
14530 asection *isec;
14531 struct elf_nds32_irel_entry *irel_list = NULL;
14532 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14533 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14534 struct elf_link_hash_entry_list *h_list;
14535
35c08157
KLC		 14536
14537 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14538 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14539 || !nds32_get_local_syms (abfd, sec, &isym))
14540 return FALSE;
1c8f6a4d
KLC		 14541 internal_relocs =
14542 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14543 irelend = internal_relocs + sec->reloc_count;
14544 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14545
14546 off = 0;
14547
14548 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14549 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14550 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14551
14552 /* Check this section trigger ex9 relaxation. */
14553 if (irel == NULL
14554 || irel >= irelend
14555 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14556 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14557 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14558 return TRUE;
14559
14560 irel = internal_relocs;
14561
14562 /* Check alignment and fetch proper relocation. */
14563 while (off < sec->size)
14564 {
14565 struct elf_link_hash_entry *h = NULL;
14566 struct elf_nds32_irel_entry *irel_ptr = NULL;
14567
14568 /* Syn the instruction and the relocation. */
14569 while (irel != NULL && irel < irelend && irel->r_offset < off)
14570 irel++;
14571
14572 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14573 relax_blank_list, sec,
14574 &off, contents);
14575 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14576 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14577 &relax_blank_list, pre_irel_ptr,
14578 &irel_list))
14579 return FALSE;
35c08157
KLC		 14580
14581 if (data_flag & CLEAN_PRE)
14582 {
14583 pre_off = 0;
14584 pre_insn16 = 0;
14585 pre_irel_ptr = NULL;
14586 }
14587 if (data_flag & DATA_EXIST)
14588 {
14589 /* We save the move offset in the highest byte. */
14590 off += (data_flag >> 24);
14591 continue;
14592 }
14593
14594 if (*(contents + off) & 0x80)
14595 {
14596 /* 2-byte instruction. */
14597 off += 2;
14598 continue;
14599 }
14600
14601 /* Load the instruction and its opcode with register for comparing. */
14602 ex9_insn = ex9_insn_head;
14603 insn = bfd_getb32 (contents + off);
14604 insn_with_reg = 0;
14605 while (ex9_insn)
14606 {
14607 it_insn = strtol (ex9_insn->string, NULL, 16);
14608 it_insn_with_reg = 0;
14609 do_replace = 0;
14610 save_irel = 0;
14611
14612 if (irel != NULL && irel < irelend && irel->r_offset == off)
14613 {
14614 /* Insn with relocation. */
14615 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14616
14617 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14618 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14619 &it_insn_with_reg);
35c08157
KLC		 14620
14621 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14622 && (ELF32_R_TYPE (irel->r_info) ==
14623 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14624 && (insn_with_reg == it_insn_with_reg))
14625 {
14626 /* Insn relocation and format is the same as table entry. */
14627
14628 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14629 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14630 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14631 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14632 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14633 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14634 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14635 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14636 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14637 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14638 && ELF32_R_TYPE (irel->r_info) <=
14639 R_NDS32_SDA12S2_SP_RELA)
14640 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14641 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14642 {
14643 r_symndx = ELF32_R_SYM (irel->r_info);
14644 if (r_symndx < symtab_hdr->sh_info)
14645 {
14646 /* Local symbol. */
14647 int shndx = isym[r_symndx].st_shndx;
14648
14649 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14650 if (ex9_insn->sec == isec
14651 && ex9_insn->irel->r_addend == irel->r_addend
14652 && ex9_insn->irel->r_info == irel->r_info)
14653 {
14654 do_replace = 1;
14655 save_irel = 1;
14656 }
14657 }
14658 else
14659 {
14660 /* External symbol. */
14661 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14662 if (ex9_insn->m_list)
14663 {
35c08157
KLC		 14664 h_list = ex9_insn->m_list->h_list;
14665 while (h_list)
14666 {
14667 if (h == h_list->h
1c8f6a4d
KLC		 14668 && (ex9_insn->m_list->irel->r_addend ==
14669 irel->r_addend))
35c08157
KLC		 14670 {
14671 do_replace = 1;
14672 save_irel = 1;
14673 break;
14674 }
14675 h_list = h_list->next;
14676 }
14677 }
14678 }
14679 }
14680 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14681 {
14682 r_symndx = ELF32_R_SYM (irel->r_info);
14683 if (r_symndx < symtab_hdr->sh_info)
14684 {
14685 /* Local symbols. Compare its base symbol and offset. */
14686 int shndx = isym[r_symndx].st_shndx;
14687
14688 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14689 if (ex9_insn->sec == isec
14690 && ex9_insn->irel->r_addend == irel->r_addend
14691 && ex9_insn->irel->r_info == irel->r_info)
14692 {
14693 do_replace = 1;
14694 save_irel = 1;
14695 }
14696 }
14697 else
14698 {
14699 /* External symbol. */
14700 struct elf_link_hash_entry_mul_list *m_list;
14701
14702 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14703 m_list = ex9_insn->m_list;
14704
14705 while (m_list)
14706 {
1c8f6a4d 14707 h_list = m_list->h_list;
35c08157
KLC		 14708
14709 while (h_list)
14710 {
14711 if (h == h_list->h
1c8f6a4d
KLC		 14712 && (m_list->irel->r_addend
14713 == irel->r_addend))
35c08157
KLC		 14714 {
14715 do_replace = 1;
14716 save_irel = 1;
14717 if (ex9_insn->next
14718 && ex9_insn->m_list
14719 && ex9_insn->m_list == ex9_insn->next->m_list)
14720 {
14721 /* sethi multiple entry must be fixed */
14722 nds32_elf_ex9_insert_fix (sec, irel,
14723 h, ex9_insn->order);
14724 }
14725 break;
14726 }
14727 h_list = h_list->next;
14728 }
14729 m_list = m_list->next;
14730 }
14731 }
14732 }
14733 }
14734
14735 /* Import table: Check the symbol hash table and the
14736 jump target. Only R_NDS32_25_PCREL_RELA now. */
14737 else if (ex9_insn->times == -1
14738 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14739 {
14740 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14741 if (insn_with_reg == it_insn_with_reg)
14742 {
14743 char code[10];
14744 bfd_vma relocation;
14745
14746 r_symndx = ELF32_R_SYM (irel->r_info);
14747 if (r_symndx >= symtab_hdr->sh_info)
14748 {
14749 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14750 if ((h->root.type == bfd_link_hash_defined
14751 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14752 && h->root.u.def.section != NULL
14753 && h->root.u.def.section->output_section != NULL
35c08157 14754 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14755 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14756 && h->root.u.def.value > sec->size)
14757 {
1c8f6a4d
KLC		 14758 relocation = h->root.u.def.value +
14759 h->root.u.def.section->output_section->vma +
14760 h->root.u.def.section->output_offset;
35c08157 14761 relocation += irel->r_addend;
1c8f6a4d
KLC		 14762 insn = insn_with_reg
14763 | ((relocation >> 1) & 0xffffff);
14764 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14765 if (strcmp (code, ex9_insn->string) == 0)
14766 {
14767 do_replace = 1;
14768 save_irel = 1;
14769 }
14770 }
14771 }
14772 }
14773 }
14774 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14775 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14776 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14777 {
14778 /* These relocations do not have to relocate contens, so it can
14779 be regard as instruction without relocation. */
14780 if (insn == it_insn && ex9_insn->irel == NULL)
14781 do_replace = 1;
14782 }
14783 }
14784 else
14785 {
14786 /* Instruction without relocation, we only
14787 have to compare their byte code. */
14788 if (insn == it_insn && ex9_insn->irel == NULL)
14789 do_replace = 1;
14790 }
14791
14792 /* Insntruction match so replacing the code here. */
14793 if (do_replace == 1)
14794 {
14795 /* There are two formats of ex9 instruction. */
14796 if (ex9_insn->order < 32)
14797 insn_ex9 = INSN_EX9_IT_2;
14798 else
14799 insn_ex9 = INSN_EX9_IT_1;
14800 insn16 = insn_ex9 | ex9_insn->order;
14801
1c8f6a4d
KLC		 14802 /* Insert ex9 instruction. */
14803 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14804 &relax_blank_list, pre_irel_ptr,
14805 &irel_list);
35c08157
KLC		 14806 pre_off = off;
14807 pre_insn16 = insn16;
14808
14809 if (save_irel)
14810 {
14811 /* For instuction with relocation do relax. */
14812 irel_ptr = (struct elf_nds32_irel_entry *)
14813 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14814 irel_ptr->irel = irel;
14815 irel_ptr->next = NULL;
14816 pre_irel_ptr = irel_ptr;
14817 }
14818 else
14819 pre_irel_ptr = NULL;
14820 break;
14821 }
14822 ex9_insn = ex9_insn->next;
14823 }
14824 off += 4;
14825 }
14826
1c8f6a4d
KLC		 14827 /* Insert ex9 instruction. */
14828 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14829 &relax_blank_list, pre_irel_ptr,
14830 &irel_list);
35c08157
KLC		 14831
14832 /* Delete the redundant code. */
14833 if (relax_blank_list)
14834 {
14835 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14836 relax_blank_list = NULL;
14837 }
14838
14839 /* Clear the relocation that is replaced by ex9. */
14840 while (irel_list)
14841 {
14842 struct elf_nds32_irel_entry *irel_ptr;
14843
14844 irel_ptr = irel_list;
14845 irel_list = irel_ptr->next;
14846 irel_ptr->irel->r_info =
14847 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14848 free (irel_ptr);
14849 }
14850 return TRUE;
14851}
14852
14853/* Initialize ex9 hash table. */
14854
14855int
14856nds32_elf_ex9_init (void)
14857{
14858 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14859 sizeof (struct elf_nds32_code_hash_entry),
14860 1023))
14861 {
14862 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14863 return FALSE;
14864 }
14865 return TRUE;
14866}
14867
14868/* Predict how many bytes will be relaxed with ex9 and ifc. */
14869
14870static void
14871nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14872{
14873 struct elf_nds32_insn_times_entry *ex9_insn;
14874 struct elf_nds32_insn_times_entry *temp;
14875 int target_optimize;
14876 struct elf_nds32_link_hash_table *table;
14877
14878 if (ex9_insn_head == NULL)
14879 return;
14880
14881 table = nds32_elf_hash_table (info);
14882 target_optimize = table->target_optimize;
14883 ex9_insn = ex9_insn_head;
14884 while (ex9_insn)
14885 {
14886 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14887 temp = ex9_insn;
14888 ex9_insn = ex9_insn->next;
14889 free (temp);
14890 }
14891 ex9_insn_head = NULL;
14892
14893 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14894 {
14895 /* Examine ifc reduce size. */
14896 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14897 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14898 int size = 0;
14899
14900 while (ifc_ent)
14901 {
14902 if (ifc_ent->enable == 0)
14903 {
14904 /* Not ifc yet. */
14905 irel_ptr = ifc_ent->irel_head;
14906 while (irel_ptr)
14907 {
14908 size += 2;
14909 irel_ptr = irel_ptr->next;
14910 }
14911 }
14912 size -= 2;
14913 ifc_ent = ifc_ent->next;
14914 }
14915 ex9_relax_size += size;
14916 }
14917}
14918
14919/* Finish ex9 table. */
14920
14921void
14922nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14923{
35c08157
KLC		 14924 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14925 nds32_elf_order_insn_times (link_info);
14926 nds32_elf_ex9_total_relax (link_info);
14927 /* Traverse the hash table and count its times. */
14928 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14929 nds32_elf_order_insn_times (link_info);
14930 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14931}
14932
14933/* Relocate the entries in ex9 table. */
14934
14935static bfd_vma
14936nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14937 struct bfd_link_info *link_info)
14938{
14939 Elf_Internal_Sym *isym = NULL;
14940 bfd_vma relocation = -1;
1c8f6a4d 14941 struct elf_link_hash_entry *h;
35c08157
KLC		 14942
14943 if (ptr->m_list != NULL)
14944 {
14945 /* Global symbol. */
1c8f6a4d
KLC		 14946 h = ptr->m_list->h_list->h;
14947 if ((h->root.type == bfd_link_hash_defined
14948 || h->root.type == bfd_link_hash_defweak)
14949 && h->root.u.def.section != NULL
14950 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14951 {
14952
1c8f6a4d
KLC		 14953 relocation = h->root.u.def.value +
14954 h->root.u.def.section->output_section->vma +
14955 h->root.u.def.section->output_offset;
35c08157
KLC		 14956 relocation += ptr->m_list->irel->r_addend;
14957 }
14958 else
14959 relocation = 0;
14960 }
14961 else if (ptr->sec !=NULL)
14962 {
14963 /* Local symbol. */
14964 Elf_Internal_Sym sym;
14965 asection *sec = NULL;
14966 asection isec;
14967 asection *isec_ptr = &isec;
14968 Elf_Internal_Rela irel_backup = *(ptr->irel);
14969 asection *sec_backup = ptr->sec;
14970 bfd *abfd = ptr->sec->owner;
14971
14972 if (!nds32_get_local_syms (abfd, sec, &isym))
14973 return FALSE;
14974 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14975
14976 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14977 if (sec != NULL)
14978 *isec_ptr = *sec;
14979 sym = *isym;
14980
14981 /* The purpose is same as elf_link_input_bfd. */
14982 if (isec_ptr != NULL
14983 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14984 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14985 {
14986 sym.st_value =
14987 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14988 elf_section_data (isec_ptr)->sec_info,
14989 isym->st_value);
14990 }
14991 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14992 &ptr->sec, ptr->irel);
14993 if (ptr->irel != NULL)
14994 relocation += ptr->irel->r_addend;
14995
14996 /* Restore origin value since there may be some insntructions that
14997 could not be replaced with ex9.it. */
14998 *(ptr->irel) = irel_backup;
14999 ptr->sec = sec_backup;
15000 }
15001
15002 return relocation;
15003}
15004
15005/* Import ex9 table and build list. */
15006
15007void
15008nds32_elf_ex9_import_table (struct bfd_link_info *info)
15009{
1c8f6a4d 15010 int num = 0;
35c08157
KLC		 15011 bfd_byte *contents;
15012 unsigned long insn;
15013 FILE *ex9_import_file;
15014 int update_ex9_table;
15015 struct elf_nds32_link_hash_table *table;
15016
15017 table = nds32_elf_hash_table (info);
15018 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15019 rewind (table->ex9_import_file);
35c08157
KLC		 15020
15021 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15022
35c08157 15023 /* Read instructions from the input file and build the list. */
1c8f6a4d 15024 while (!feof (ex9_import_file))
35c08157
KLC		 15025 {
15026 char *code;
15027 struct elf_nds32_insn_times_entry *ptr;
15028 size_t nread;
15029
15030 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 15031 /* Ignore the final byte 0x0a. */
15032 if (nread < 1)
15033 break;
35c08157
KLC		 15034 insn = bfd_getb32 (contents);
15035 code = bfd_malloc (sizeof (char) * 9);
15036 snprintf (code, 9, "%08lx", insn);
15037 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15038 ptr->string = code;
15039 ptr->order = num;
15040 ptr->times = -1;
15041 ptr->sec = NULL;
15042 ptr->m_list = NULL;
15043 ptr->rel_backup.r_offset = 0;
15044 ptr->rel_backup.r_info = 0;
15045 ptr->rel_backup.r_addend = 0;
15046 ptr->irel = NULL;
15047 ptr->next = NULL;
15048 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 15049 num++;
15050 }
15051
15052 update_ex9_table = table->update_ex9_table;
15053 if (update_ex9_table == 1)
15054 {
15055 /* It has to consider of sethi need to use multiple page
15056 but it not be done yet. */
15057 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15058 nds32_elf_order_insn_times (info);
15059 }
15060}
15061
15062/* Export ex9 table. */
15063
15064static void
15065nds32_elf_ex9_export (struct bfd_link_info *info,
15066 bfd_byte *contents, int size)
15067{
15068 FILE *ex9_export_file;
15069 struct elf_nds32_link_hash_table *table;
15070
15071 table = nds32_elf_hash_table (info);
15072 ex9_export_file = table->ex9_export_file;
15073 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15074 fclose (ex9_export_file);
15075}
15076
15077/* Adjust relocations of J and JAL in ex9.itable.
15078 Export ex9 table. */
15079
1c8f6a4d 15080static void
35c08157
KLC		 15081nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15082{
15083 asection *table_sec = NULL;
15084 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15085 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15086 bfd *it_abfd;
1c8f6a4d 15087 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 15088 bfd_byte *contents = NULL, *source_contents = NULL;
15089 int size = 0;
15090 bfd_vma gp;
15091 int shift, update_ex9_table, offset = 0;
15092 reloc_howto_type *howto = NULL;
15093 Elf_Internal_Rela rel_backup;
15094 unsigned short insn_ex9;
15095 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 15096 FILE *ex9_export_file;
15097 static bfd_boolean done = FALSE;
15098
15099 if (done)
15100 return;
15101
15102 done = TRUE;
35c08157
KLC		 15103
15104 table = nds32_elf_hash_table (link_info);
15105 if (table)
15106 table->relax_status |= NDS32_RELAX_EX9_DONE;
15107
15108
15109 update_ex9_table = table->update_ex9_table;
15110 /* Generated ex9.itable exactly. */
15111 if (update_ex9_table == 0)
15112 {
15113 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15114 it_abfd = it_abfd->link.next)
35c08157
KLC		 15115 {
15116 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15117 if (table_sec != NULL)
15118 break;
15119 }
15120
15121 if (table_sec != NULL)
15122 {
15123 bfd *output_bfd;
35c08157
KLC		 15124
15125 output_bfd = table_sec->output_section->owner;
15126 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15127 if (table_sec->size == 0)
15128 return;
15129
0c4bd9d9 15130 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 15131 return;
35c08157
KLC		 15132 }
15133 }
15134 else
15135 {
15136 /* Set gp. */
15137 bfd *output_bfd;
15138
15139 output_bfd = link_info->input_bfds->sections->output_section->owner;
15140 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15141 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15142 }
15143
15144 /* Relocate instruction. */
15145 while (ex9_insn)
15146 {
15147 bfd_vma relocation, min_relocation = 0xffffffff;
15148
15149 insn = strtol (ex9_insn->string, NULL, 16);
15150 insn_with_reg = 0;
15151 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15152 {
15153 if (ex9_insn->m_list)
15154 rel_backup = ex9_insn->m_list->rel_backup;
15155 else
15156 rel_backup = ex9_insn->rel_backup;
15157
15158 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15159 howto =
15160 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15161 (rel_backup.r_info));
15162 shift = howto->rightshift;
15163 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15164 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15165 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15166 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15167 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15168 {
15169 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15170 insn =
15171 insn_with_reg | ((relocation >> shift) &
15172 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15173 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15174 }
15175 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15176 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15177 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15178 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15179 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15180 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15181 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15182 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15183 {
15184 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15185 insn =
15186 insn_with_reg | (((relocation - gp) >> shift) &
15187 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15188 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15189 }
15190 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15191 {
15192 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 15193 if (ex9_insn->next && ex9_insn->m_list
15194 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15195 {
15196 struct elf_link_hash_entry_mul_list *m_list;
15197 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15198 struct elf_link_hash_entry *h;
35c08157
KLC		 15199
15200 temp_ptr = ex9_insn;
15201 temp_ptr2 = ex9_insn;
15202 m_list = ex9_insn->m_list;
15203 while (m_list)
15204 {
1c8f6a4d
KLC		 15205 h = m_list->h_list->h;
15206 relocation = h->root.u.def.value +
15207 h->root.u.def.section->output_section->vma +
15208 h->root.u.def.section->output_offset;
35c08157
KLC		 15209 relocation += m_list->irel->r_addend;
15210
15211 if (relocation < min_relocation)
15212 min_relocation = relocation;
15213 m_list = m_list->next;
15214 }
15215 relocation = min_relocation;
15216
15217 /* Put insntruction into ex9 table. */
15218 insn = insn_with_reg
15219 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15220 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15221 relocation = relocation + 0x1000; /* hi20 */
15222
1c8f6a4d
KLC		 15223 while (ex9_insn->next && ex9_insn->m_list
15224 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 15225 {
15226 /* Multiple sethi. */
15227 ex9_insn = ex9_insn->next;
15228 size += 4;
35c08157
KLC		 15229 insn =
15230 insn_with_reg | ((relocation >> shift) &
15231 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15232 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15233 relocation = relocation + 0x1000; /* hi20 */
15234 }
15235
15236 fix_ptr = ex9_refix_head;
15237 while (fix_ptr)
15238 {
15239 /* Fix ex9 insn. */
15240 /* temp_ptr2 points to the head of multiple sethi. */
15241 temp_ptr = temp_ptr2;
15242 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15243 {
15244 fix_ptr = fix_ptr->next;
15245 }
15246 if (fix_ptr->order != temp_ptr->order)
15247 break;
15248
15249 /* Set source insn. */
1c8f6a4d
KLC		 15250 relocation =
15251 fix_ptr->h->root.u.def.value +
15252 fix_ptr->h->root.u.def.section->output_section->vma +
15253 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15254 relocation += fix_ptr->irel->r_addend;
15255 /* sethi imm is imm20s. */
15256 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15257
15258 while (temp_ptr)
15259 {
35c08157
KLC		 15260 /* Match entry and source code. */
15261 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15262 if (insn == source_insn)
15263 {
15264 /* Fix the ex9 insn. */
15265 if (temp_ptr->order != fix_ptr->order)
15266 {
15267 if (!nds32_get_section_contents
15268 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15269 &source_contents, TRUE))
35c08157
KLC		 15270 (*_bfd_error_handler)
15271 (_("Linker: error cannot fixed ex9 relocation \n"));
15272 if (temp_ptr->order < 32)
15273 insn_ex9 = INSN_EX9_IT_2;
15274 else
15275 insn_ex9 = INSN_EX9_IT_1;
15276 insn_ex9 = insn_ex9 | temp_ptr->order;
15277 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15278 }
15279 break;
15280 }
15281 else
15282 {
15283 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15284 (*_bfd_error_handler)
15285 (_("Linker: error cannot fixed ex9 relocation \n"));
15286 else
15287 temp_ptr = temp_ptr->next;
15288 }
15289 }
15290 fix_ptr = fix_ptr->next;
15291 }
15292 }
15293 else
15294 {
15295 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15296 insn = insn_with_reg
15297 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15298 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15299 }
15300 }
15301 }
15302 else
15303 {
15304 /* Insn without relocation does not have to be fixed
15305 if need to update export table. */
15306 if (update_ex9_table == 1)
15307 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15308 }
15309 ex9_insn = ex9_insn->next;
15310 size += 4;
15311 }
15312
15313 ex9_export_file = table->ex9_export_file;
15314 if (ex9_export_file != NULL)
1c8f6a4d 15315 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15316 else if (update_ex9_table == 1)
15317 {
1c8f6a4d
KLC		 15318 table->ex9_export_file = table->ex9_import_file;
15319 rewind (table->ex9_export_file);
15320 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15321 }
15322}
15323
15324/* Generate ex9 hash table. */
15325
15326static bfd_boolean
f4cb41f4 15327nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15328 struct bfd_link_info *link_info)
15329{
15330 Elf_Internal_Rela *internal_relocs;
15331 Elf_Internal_Rela *irelend;
15332 Elf_Internal_Rela *irel;
15333 Elf_Internal_Rela *jrel;
15334 Elf_Internal_Rela rel_backup;
15335 Elf_Internal_Shdr *symtab_hdr;
15336 Elf_Internal_Sym *isym = NULL;
15337 asection *isec;
15338 struct elf_link_hash_entry **sym_hashes;
15339 bfd_byte *contents = NULL;
f4cb41f4 15340 bfd_vma off = 0;
35c08157 15341 unsigned long r_symndx;
1c8f6a4d 15342 uint32_t insn, insn_with_reg;
35c08157
KLC		 15343 struct elf_link_hash_entry *h;
15344 int data_flag, shift, align;
15345 bfd_vma relocation;
15346 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15347 reloc_howto_type *howto = NULL;
15348
15349 sym_hashes = elf_sym_hashes (abfd);
15350 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15351 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15352 return FALSE;
15353
15354 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15355 TRUE /* keep_memory */);
15356 irelend = internal_relocs + sec->reloc_count;
15357 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15358 if (!nds32_get_local_syms (abfd, sec, &isym))
15359 return FALSE;
15360
15361 /* Check the object if enable ex9. */
15362 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15363 R_NDS32_RELAX_ENTRY);
15364
15365 /* Check this section trigger ex9 relaxation. */
15366 if (irel == NULL
15367 || irel >= irelend
15368 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15369 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15370 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15371 return TRUE;
15372
15373 irel = internal_relocs;
15374
15375 /* Push each insn into hash table. */
15376 while (off < sec->size)
15377 {
15378 char code[10];
15379 struct elf_nds32_code_hash_entry *entry;
15380
15381 while (irel != NULL && irel < irelend && irel->r_offset < off)
15382 irel++;
15383
1c8f6a4d
KLC		 15384 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15385 NULL, sec, &off, contents);
35c08157
KLC		 15386 if (data_flag & DATA_EXIST)
15387 {
15388 /* We save the move offset in the highest byte. */
15389 off += (data_flag >> 24);
15390 continue;
15391 }
15392
15393 if (*(contents + off) & 0x80)
15394 {
15395 off += 2;
15396 }
15397 else
15398 {
15399 h = NULL;
15400 isec = NULL;
15401 jrel = NULL;
15402 rel_backup.r_info = 0;
15403 rel_backup.r_offset = 0;
15404 rel_backup.r_addend = 0;
15405 /* Load the instruction and its opcode with register for comparing. */
15406 insn = bfd_getb32 (contents + off);
15407 insn_with_reg = 0;
15408 if (irel != NULL && irel < irelend && irel->r_offset == off)
15409 {
15410 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15411 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15412 shift = howto->rightshift;
15413 align = (1 << shift) - 1;
15414 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15415 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15416 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15417 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15418 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15419 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15420 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15421 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15422 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15423 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15424 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15425 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15426 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15427 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15428 {
15429 r_symndx = ELF32_R_SYM (irel->r_info);
15430 jrel = irel;
15431 rel_backup = *irel;
15432 if (r_symndx < symtab_hdr->sh_info)
15433 {
15434 /* Local symbol. */
15435 int shndx = isym[r_symndx].st_shndx;
15436
15437 bfd_vma st_value = (isym + r_symndx)->st_value;
15438 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15439 relocation = (isec->output_section->vma + isec->output_offset
15440 + st_value + irel->r_addend);
15441 }
15442 else
15443 {
15444 /* External symbol. */
15445 bfd_boolean warned ATTRIBUTE_UNUSED;
15446 bfd_boolean ignored ATTRIBUTE_UNUSED;
15447 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15448 asection *sym_sec;
15449
15450 /* Maybe there is a better way to get h and relocation */
15451 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15452 r_symndx, symtab_hdr, sym_hashes,
15453 h, sym_sec, relocation,
15454 unresolved_reloc, warned, ignored);
15455 relocation += irel->r_addend;
1c8f6a4d
KLC		 15456 if ((h->root.type != bfd_link_hash_defined
15457 && h->root.type != bfd_link_hash_defweak)
15458 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15459 {
15460 off += 4;
15461 continue;
15462 }
15463 }
15464
15465 /* Check for gp relative instruction alignment. */
15466 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15467 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15468 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15469 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15470 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15471 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15472 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15473 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15474 {
15475 bfd_vma gp;
15476 bfd *output_bfd = sec->output_section->owner;
15477 bfd_reloc_status_type r;
15478
15479 /* If the symbol is in the abs section, the out_bfd will be null.
15480 This happens when the relocation has a symbol@GOTOFF. */
15481 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15482 if (r != bfd_reloc_ok)
15483 {
15484 off += 4;
15485 continue;
15486 }
15487
15488 relocation -= gp;
15489
15490 /* Make sure alignment is correct. */
15491 if (relocation & align)
15492 {
15493 /* Incorrect alignment. */
15494 (*_bfd_error_handler)
15495 (_("%s: warning: unaligned small data access. "
15496 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15497 bfd_get_filename (abfd), irel->r_offset,
15498 irel->r_info, irel->r_addend, relocation, align);
15499 off += 4;
15500 continue;
15501 }
15502 }
15503
15504 insn = insn_with_reg
15505 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15506 }
15507 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15508 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15509 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15510 {
15511 /* These relocations do not have to relocate contens, so it can
15512 be regard as instruction without relocation. */
15513 }
15514 else
15515 {
15516 off += 4;
15517 continue;
15518 }
15519 }
15520
1c8f6a4d 15521 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15522 /* Copy "code". */
15523 entry = (struct elf_nds32_code_hash_entry*)
15524 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15525 if (entry == NULL)
15526 {
15527 (*_bfd_error_handler)
15528 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15529 return FALSE;
15530 }
15531 if (h)
15532 {
15533 if (h->root.type == bfd_link_hash_undefined)
15534 return TRUE;
15535 /* Global symbol. */
15536 /* In order to do sethi with different symbol but same value. */
15537 if (entry->m_list == NULL)
15538 {
15539 struct elf_link_hash_entry_mul_list *m_list_new;
15540 struct elf_link_hash_entry_list *h_list_new;
15541
15542 m_list_new = (struct elf_link_hash_entry_mul_list *)
15543 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15544 h_list_new = (struct elf_link_hash_entry_list *)
15545 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15546 entry->m_list = m_list_new;
15547 m_list_new->h_list = h_list_new;
15548 m_list_new->rel_backup = rel_backup;
15549 m_list_new->times = 1;
15550 m_list_new->irel = jrel;
15551 m_list_new->next = NULL;
15552 h_list_new->h = h;
15553 h_list_new->next = NULL;
15554 }
15555 else
15556 {
15557 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15558 struct elf_link_hash_entry_list *h_list;
15559
15560 while (m_list)
15561 {
15562 /* Build the different symbols that point to the same address. */
15563 h_list = m_list->h_list;
15564 if (h_list->h->root.u.def.value == h->root.u.def.value
15565 && h_list->h->root.u.def.section->output_section->vma
15566 == h->root.u.def.section->output_section->vma
15567 && h_list->h->root.u.def.section->output_offset
15568 == h->root.u.def.section->output_offset
15569 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15570 {
15571 m_list->times++;
15572 m_list->irel = jrel;
15573 while (h_list->h != h && h_list->next)
15574 h_list = h_list->next;
15575 if (h_list->h != h)
15576 {
15577 struct elf_link_hash_entry_list *h_list_new;
15578
15579 h_list_new = (struct elf_link_hash_entry_list *)
15580 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15581 h_list->next = h_list_new;
15582 h_list_new->h = h;
15583 h_list_new->next = NULL;
15584 }
15585 break;
15586 }
15587 /* The sethi case may have different address but the
15588 hi20 is the same. */
15589 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15590 && m_list->next == NULL)
15591 {
15592 struct elf_link_hash_entry_mul_list *m_list_new;
15593 struct elf_link_hash_entry_list *h_list_new;
15594
15595 m_list_new = (struct elf_link_hash_entry_mul_list *)
15596 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15597 h_list_new = (struct elf_link_hash_entry_list *)
15598 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15599 m_list->next = m_list_new;
15600 m_list_new->h_list = h_list_new;
15601 m_list_new->rel_backup = rel_backup;
15602 m_list_new->times = 1;
15603 m_list_new->irel = jrel;
15604 m_list_new->next = NULL;
15605 h_list_new->h = h;
15606 h_list_new->next = NULL;
15607 break;
15608 }
15609 m_list = m_list->next;
15610 }
15611 if (!m_list)
15612 {
15613 off += 4;
15614 continue;
15615 }
15616 }
15617 }
15618 else
15619 {
15620 /* Local symbol and insn without relocation*/
15621 entry->times++;
15622 entry->rel_backup = rel_backup;
15623 }
15624
15625 /* Use in sethi insn with constant and global symbol in same format. */
15626 if (!jrel)
15627 entry->const_insn = 1;
15628 else
15629 entry->irel = jrel;
15630 entry->sec = isec;
15631 off += 4;
15632 }
15633 }
15634 return TRUE;
15635}
15636
15637/* Set the _ITB_BASE, and point it to ex9 table. */
15638
15639bfd_boolean
15640nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15641{
15642 bfd *abfd;
15643 asection *sec;
15644 bfd *output_bfd = NULL;
15645 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15646
15647 if (is_ITB_BASE_set == 1)
15648 return TRUE;
15649
15650 is_ITB_BASE_set = 1;
15651
1c8f6a4d
KLC		 15652 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15653
15654 if (bh && (bh->type == bfd_link_hash_defined
15655 || bh->type == bfd_link_hash_defweak))
15656 return TRUE;
35c08157
KLC		 15657
15658 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15659 abfd = abfd->link.next)
35c08157
KLC		 15660 {
15661 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15662 if (sec != NULL)
15663 {
15664 output_bfd = sec->output_section->owner;
15665 break;
15666 }
15667 }
15668 if (output_bfd == NULL)
15669 {
15670 output_bfd = link_info->output_bfd;
15671 if (output_bfd->sections == NULL)
15672 return TRUE;
15673 else
15674 sec = bfd_abs_section_ptr;
15675 }
15676 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15677 FALSE, FALSE, TRUE);
15678 return (_bfd_generic_link_add_one_symbol
15679 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15680 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15681 (const char *) NULL, FALSE, get_elf_backend_data
15682 (output_bfd)->collect, &bh));
15683} /* End EX9.IT */
15684\f
15685
15686#define ELF_ARCH bfd_arch_nds32
15687#define ELF_MACHINE_CODE EM_NDS32
15688#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15689#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15690
6d00b590 15691#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15692#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15693#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15694#define TARGET_LITTLE_NAME "elf32-nds32le"
15695
15696#define elf_info_to_howto nds32_info_to_howto
15697#define elf_info_to_howto_rel nds32_info_to_howto_rel
15698
15699#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15700#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15701#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15702#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15703#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15704
1c8f6a4d 15705#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15706#define elf_backend_action_discarded nds32_elf_action_discarded
15707#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15708#define elf_backend_check_relocs nds32_elf_check_relocs
15709#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15710#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15711#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15712#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15713#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15714#define elf_backend_relocate_section nds32_elf_relocate_section
15715#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15716#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15717#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15718#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15719#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15720#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15721#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15722#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15723#define elf_backend_object_p nds32_elf_object_p
15724#define elf_backend_final_write_processing nds32_elf_final_write_processing
15725#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC		 15726#define bfd_elf32_bfd_get_relocated_section_contents \
15727 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15728
15729#define elf_backend_can_gc_sections 1
15730#define elf_backend_can_refcount 1
15731#define elf_backend_want_got_plt 1
15732#define elf_backend_plt_readonly 1
15733#define elf_backend_want_plt_sym 0
15734#define elf_backend_got_header_size 12
15735#define elf_backend_may_use_rel_p 1
15736#define elf_backend_default_use_rela_p 1
15737#define elf_backend_may_use_rela_p 1
15738
15739#include "elf32-target.h"
15740
15741#undef ELF_MAXPAGESIZE
15742#define ELF_MAXPAGESIZE 0x2000
15743
15744#undef TARGET_BIG_SYM
6d00b590 15745#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15746#undef TARGET_BIG_NAME
15747#define TARGET_BIG_NAME "elf32-nds32be-linux"
15748#undef TARGET_LITTLE_SYM
6d00b590 15749#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15750#undef TARGET_LITTLE_NAME
15751#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15752#undef elf32_bed
15753#define elf32_bed elf32_nds32_lin_bed
15754
15755#include "elf32-target.h"
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