[binutils.git] / gdb / ultra3-nat.c

/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
   Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
   Contributed by David Wood ([email protected]) at New York University.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */

#define DEBUG
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "value.h"

#include <sys/types.h>
#include <sys/param.h>
#include <signal.h>
#include <sys/ioctl.h>
#include <fcntl.h>  

#include "gdbcore.h"

#include <sys/file.h>
#include <sys/stat.h>

/* Get all available registers from the inferior.  Registers that are
 * defined in REGISTER_NAMES, but not available to the user/gdb are
 * supplied as -1.  This may include gr64-gr95 and the protected special
 * purpose registers.
 */

void
fetch_inferior_registers (regno)
  int regno;
{
  register int i,j,ret_val=0;
  char buf[128];

  if (regno != -1) {
    fetch_register (regno);
    return;
  }

/* Global Registers */
#ifdef ULTRA3
  errno = 0;
  ptrace (PT_READ_STRUCT, inferior_pid,
	  (PTRACE_ARG3_TYPE) register_addr(GR96_REGNUM,0), 
	  (int)&pt_struct.pt_gr[0], 32*4);
  if (errno != 0) {
      perror_with_name ("reading global registers");
      ret_val = -1;
  } else for (regno=GR96_REGNUM, j=0 ; j<32 ; regno++, j++)  {
      supply_register (regno, &pt_struct.pt_gr[j]);
  }
#else
  for (regno=GR96_REGNUM ; !ret_val && regno < GR96_REGNUM+32 ; regno++)
    fetch_register(regno);
#endif

/* Local Registers */
#ifdef ULTRA3
  errno = 0;
  ptrace (PT_READ_STRUCT, inferior_pid,
	  (PTRACE_ARG3_TYPE) register_addr(LR0_REGNUM,0), 
	  (int)&pt_struct.pt_lr[0], 128*4);
  if (errno != 0) {
      perror_with_name ("reading local registers");
      ret_val = -1;
  } else for (regno=LR0_REGNUM, j=0 ; j<128 ; regno++, j++)  {
      supply_register (regno, &pt_struct.pt_lr[j]);
  }
#else
  for (regno=LR0_REGNUM ; !ret_val && regno < LR0_REGNUM+128 ; regno++)
    fetch_register(regno);
#endif

/* Special Registers */
  fetch_register(GR1_REGNUM);
  fetch_register(CPS_REGNUM);
  fetch_register(PC_REGNUM);
  fetch_register(NPC_REGNUM);
  fetch_register(PC2_REGNUM);
  fetch_register(IPC_REGNUM);
  fetch_register(IPA_REGNUM);
  fetch_register(IPB_REGNUM);
  fetch_register(Q_REGNUM);
  fetch_register(BP_REGNUM);
  fetch_register(FC_REGNUM);

/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */ 
  registers_fetched();
}

/* Store our register values back into the inferior.
 * If REGNO is -1, do this for all registers.
 * Otherwise, REGNO specifies which register (so we can save time).  
 * NOTE: Assumes AMD's binary compatibility standard. 
 */

void
store_inferior_registers (regno)
     int regno;
{
  register unsigned int regaddr;
  char buf[80];

  if (regno >= 0)
    {
      if (CANNOT_STORE_REGISTER(regno)) 
	return;
      regaddr = register_addr (regno, 0);
      errno = 0;
      ptrace (PT_WRITE_U, inferior_pid,
	      (PTRACE_ARG3_TYPE) regaddr, read_register(regno));
      if (errno != 0)
	{
	  sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
	  perror_with_name (buf);
	}
    }
  else
    {
#ifdef ULTRA3
      pt_struct.pt_gr1 = read_register(GR1_REGNUM);
      for (regno = GR96_REGNUM; regno < GR96_REGNUM+32; regno++)
	pt_struct.pt_gr[regno] = read_register(regno);
      for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
	pt_struct.pt_gr[regno] = read_register(regno);
      errno = 0;
      ptrace (PT_WRITE_STRUCT, inferior_pid,
	      (PTRACE_ARG3_TYPE) register_addr(GR1_REGNUM,0), 
	      (int)&pt_struct.pt_gr1,(1*32*128)*4);
      if (errno != 0)
	{
	   sprintf (buf, "writing all local/global registers");
	   perror_with_name (buf);
	}
      pt_struct.pt_psr = read_register(CPS_REGNUM);
      pt_struct.pt_pc0 = read_register(NPC_REGNUM);
      pt_struct.pt_pc1 = read_register(PC_REGNUM);
      pt_struct.pt_pc2 = read_register(PC2_REGNUM);
      pt_struct.pt_ipc = read_register(IPC_REGNUM);
      pt_struct.pt_ipa = read_register(IPA_REGNUM);
      pt_struct.pt_ipb = read_register(IPB_REGNUM);
      pt_struct.pt_q   = read_register(Q_REGNUM);
      pt_struct.pt_bp  = read_register(BP_REGNUM);
      pt_struct.pt_fc  = read_register(FC_REGNUM);
      errno = 0;
      ptrace (PT_WRITE_STRUCT, inferior_pid,
	      (PTRACE_ARG3_TYPE) register_addr(CPS_REGNUM,0), 
	      (int)&pt_struct.pt_psr,(10)*4);
      if (errno != 0)
	{
	   sprintf (buf, "writing all special registers");
	   perror_with_name (buf);
	   return;
	}
#else
      store_inferior_registers(GR1_REGNUM);
      for (regno=GR96_REGNUM ; regno<GR96_REGNUM+32 ; regno++)
	store_inferior_registers(regno);
      for (regno=LR0_REGNUM ; regno<LR0_REGNUM+128 ; regno++)
	store_inferior_registers(regno);
      store_inferior_registers(CPS_REGNUM);
      store_inferior_registers(PC_REGNUM);
      store_inferior_registers(NPC_REGNUM);
      store_inferior_registers(PC2_REGNUM);
      store_inferior_registers(IPC_REGNUM);
      store_inferior_registers(IPA_REGNUM);
      store_inferior_registers(IPB_REGNUM);
      store_inferior_registers(Q_REGNUM);
      store_inferior_registers(BP_REGNUM);
      store_inferior_registers(FC_REGNUM);
#endif	/* ULTRA3 */
    }
}

/* 
 * Fetch an individual register (and supply it).
 * return 0 on success, -1 on failure.
 * NOTE: Assumes AMD's Binary Compatibility Standard for ptrace().
 */
static void
fetch_register (regno)
     int regno;
{
  char buf[128];
  int	val;

  if (CANNOT_FETCH_REGISTER(regno)) {
    val = -1;
    supply_register (regno, &val);
  } else {
    errno = 0;
    val = ptrace (PT_READ_U, inferior_pid,
		  (PTRACE_ARG3_TYPE) register_addr(regno,0), 0);
    if (errno != 0) {
      sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
      perror_with_name (buf);
    } else {
      supply_register (regno, &val);
    }
  }
}


/* 
 * Read AMD's Binary Compatibilty Standard conforming core file.
 * struct ptrace_user is the first thing in the core file
 */

void
fetch_core_registers ()
{
  register int regno;
  int	val;
  char	buf[4];

  for (regno = 0 ; regno < NUM_REGS; regno++) {
    if (!CANNOT_FETCH_REGISTER(regno)) {
      val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
      if (val < 0 || (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
        char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
        strcpy (buffer, "Reading core register ");
        strcat (buffer, reg_names[regno]);
        perror_with_name (buffer);
      }
      supply_register (regno, buf);
    }
  }

  /* Fake any registers that are in REGISTER_NAMES, but not available to gdb */ 
  registers_fetched();
}
Commit	Line	Data
6bf98ac0 RP	1	/* Host-dependent code for GDB, for NYU Ultra3 running Sym1 OS.
	2	Copyright (C) 1988, 1989, 1991, 1992 Free Software Foundation, Inc.
	3	Contributed by David Wood ([email protected]) at New York University.
	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
	20
	21	#define DEBUG
	22	#include "defs.h"
	23	#include "frame.h"
	24	#include "inferior.h"
	25	#include "symtab.h"
	26	#include "value.h"
	27
	28	#include <sys/types.h>
	29	#include <sys/param.h>
	30	#include <signal.h>
	31	#include <sys/ioctl.h>
	32	#include <fcntl.h>
	33
	34	#include "gdbcore.h"
	35
	36	#include <sys/file.h>
	37	#include <sys/stat.h>
	38
	39	/* Get all available registers from the inferior. Registers that are
	40	* defined in REGISTER_NAMES, but not available to the user/gdb are
	41	* supplied as -1. This may include gr64-gr95 and the protected special
	42	* purpose registers.
	43	*/
	44
	45	void
	46	fetch_inferior_registers (regno)
	47	int regno;
	48	{
	49	register int i,j,ret_val=0;
	50	char buf[128];
	51
	52	if (regno != -1) {
	53	fetch_register (regno);
	54	return;
	55	}
	56
	57	/* Global Registers */
	58	#ifdef ULTRA3
	59	errno = 0;
	60	ptrace (PT_READ_STRUCT, inferior_pid,
	61	(PTRACE_ARG3_TYPE) register_addr(GR96_REGNUM,0),
	62	(int)&pt_struct.pt_gr[0], 32*4);
	63	if (errno != 0) {
	64	perror_with_name ("reading global registers");
65	ret_val = -1;
66	} else for (regno=GR96_REGNUM, j=0 ; j<32 ; regno++, j++) {
67	supply_register (regno, &pt_struct.pt_gr[j]);
68	}
69	#else
70	for (regno=GR96_REGNUM ; !ret_val && regno < GR96_REGNUM+32 ; regno++)
71	fetch_register(regno);
72	#endif
73
74	/* Local Registers */
75	#ifdef ULTRA3
76	errno = 0;
77	ptrace (PT_READ_STRUCT, inferior_pid,
78	(PTRACE_ARG3_TYPE) register_addr(LR0_REGNUM,0),
79	(int)&pt_struct.pt_lr[0], 128*4);
80	if (errno != 0) {
81	perror_with_name ("reading local registers");
82	ret_val = -1;
83	} else for (regno=LR0_REGNUM, j=0 ; j<128 ; regno++, j++) {
84	supply_register (regno, &pt_struct.pt_lr[j]);
85	}
86	#else
87	for (regno=LR0_REGNUM ; !ret_val && regno < LR0_REGNUM+128 ; regno++)
88	fetch_register(regno);
89	#endif
90
91	/* Special Registers */
92	fetch_register(GR1_REGNUM);
93	fetch_register(CPS_REGNUM);
94	fetch_register(PC_REGNUM);
95	fetch_register(NPC_REGNUM);
96	fetch_register(PC2_REGNUM);
97	fetch_register(IPC_REGNUM);
98	fetch_register(IPA_REGNUM);
99	fetch_register(IPB_REGNUM);
100	fetch_register(Q_REGNUM);
101	fetch_register(BP_REGNUM);
102	fetch_register(FC_REGNUM);
103
104	/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
105	registers_fetched();
106	}
107
108	/* Store our register values back into the inferior.
109	* If REGNO is -1, do this for all registers.
110	* Otherwise, REGNO specifies which register (so we can save time).
111	* NOTE: Assumes AMD's binary compatibility standard.
112	*/
113
114	void
115	store_inferior_registers (regno)
116	int regno;
117	{
118	register unsigned int regaddr;
119	char buf[80];
120
121	if (regno >= 0)
122	{
123	if (CANNOT_STORE_REGISTER(regno))
124	return;
125	regaddr = register_addr (regno, 0);
126	errno = 0;
127	ptrace (PT_WRITE_U, inferior_pid,
128	(PTRACE_ARG3_TYPE) regaddr, read_register(regno));
129	if (errno != 0)
130	{
131	sprintf (buf, "writing register %s (#%d)", reg_names[regno],regno);
132	perror_with_name (buf);
133	}
134	}
135	else
136	{
137	#ifdef ULTRA3
138	pt_struct.pt_gr1 = read_register(GR1_REGNUM);
139	for (regno = GR96_REGNUM; regno < GR96_REGNUM+32; regno++)
140	pt_struct.pt_gr[regno] = read_register(regno);
141	for (regno = LR0_REGNUM; regno < LR0_REGNUM+128; regno++)
142	pt_struct.pt_gr[regno] = read_register(regno);
143	errno = 0;
144	ptrace (PT_WRITE_STRUCT, inferior_pid,
145	(PTRACE_ARG3_TYPE) register_addr(GR1_REGNUM,0),
146	(int)&pt_struct.pt_gr1,(132128)*4);
147	if (errno != 0)
148	{
149	sprintf (buf, "writing all local/global registers");
150	perror_with_name (buf);
151	}
152	pt_struct.pt_psr = read_register(CPS_REGNUM);
153	pt_struct.pt_pc0 = read_register(NPC_REGNUM);
154	pt_struct.pt_pc1 = read_register(PC_REGNUM);
155	pt_struct.pt_pc2 = read_register(PC2_REGNUM);
156	pt_struct.pt_ipc = read_register(IPC_REGNUM);
157	pt_struct.pt_ipa = read_register(IPA_REGNUM);
158	pt_struct.pt_ipb = read_register(IPB_REGNUM);
159	pt_struct.pt_q = read_register(Q_REGNUM);
160	pt_struct.pt_bp = read_register(BP_REGNUM);
161	pt_struct.pt_fc = read_register(FC_REGNUM);
162	errno = 0;
163	ptrace (PT_WRITE_STRUCT, inferior_pid,
164	(PTRACE_ARG3_TYPE) register_addr(CPS_REGNUM,0),
165	(int)&pt_struct.pt_psr,(10)*4);
166	if (errno != 0)
167	{
168	sprintf (buf, "writing all special registers");
169	perror_with_name (buf);
170	return;
171	}
172	#else
173	store_inferior_registers(GR1_REGNUM);
174	for (regno=GR96_REGNUM ; regno<GR96_REGNUM+32 ; regno++)
175	store_inferior_registers(regno);
176	for (regno=LR0_REGNUM ; regno<LR0_REGNUM+128 ; regno++)
177	store_inferior_registers(regno);
178	store_inferior_registers(CPS_REGNUM);
179	store_inferior_registers(PC_REGNUM);
180	store_inferior_registers(NPC_REGNUM);
181	store_inferior_registers(PC2_REGNUM);
182	store_inferior_registers(IPC_REGNUM);
183	store_inferior_registers(IPA_REGNUM);
184	store_inferior_registers(IPB_REGNUM);
185	store_inferior_registers(Q_REGNUM);
186	store_inferior_registers(BP_REGNUM);
187	store_inferior_registers(FC_REGNUM);
188	#endif /* ULTRA3 */
189	}
190	}
191
192	/*
193	* Fetch an individual register (and supply it).
194	* return 0 on success, -1 on failure.
195	* NOTE: Assumes AMD's Binary Compatibility Standard for ptrace().
196	*/
197	static void
198	fetch_register (regno)
199	int regno;
200	{
201	char buf[128];
202	int val;
203
204	if (CANNOT_FETCH_REGISTER(regno)) {
205	val = -1;
206	supply_register (regno, &val);
207	} else {
208	errno = 0;
209	val = ptrace (PT_READ_U, inferior_pid,
210	(PTRACE_ARG3_TYPE) register_addr(regno,0), 0);
211	if (errno != 0) {
212	sprintf(buf,"reading register %s (#%d)",reg_names[regno],regno);
213	perror_with_name (buf);
214	} else {
215	supply_register (regno, &val);
216	}
217	}
218	}
219
220
221	/*
222	* Read AMD's Binary Compatibilty Standard conforming core file.
223	* struct ptrace_user is the first thing in the core file
224	*/
225
226	void
227	fetch_core_registers ()
228	{
229	register int regno;
230	int val;
231	char buf[4];
232
233	for (regno = 0 ; regno < NUM_REGS; regno++) {
234	if (!CANNOT_FETCH_REGISTER(regno)) {
235	val = bfd_seek (core_bfd, register_addr (regno, 0), 0);
236	if (val < 0 \|\| (val = bfd_read (buf, sizeof buf, 1, core_bfd)) < 0) {
237	char * buffer = (char *) alloca (strlen (reg_names[regno]) + 35);
238	strcpy (buffer, "Reading core register ");
239	strcat (buffer, reg_names[regno]);
240	perror_with_name (buffer);
241	}
242	supply_register (regno, buf);
243	}
244	}
245
246	/* Fake any registers that are in REGISTER_NAMES, but not available to gdb */
247	registers_fetched();
248	}
249
250