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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
3fadccb3 AC |
2 | |
3 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, | |
4 | 2001, 2002 Free Software Foundation, Inc. | |
32178cab MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
32178cab MS |
24 | #include "inferior.h" |
25 | #include "target.h" | |
26 | #include "gdbarch.h" | |
705152c5 | 27 | #include "gdbcmd.h" |
4e052eda | 28 | #include "regcache.h" |
61a0eb5b | 29 | #include "gdb_assert.h" |
32178cab MS |
30 | |
31 | /* | |
32 | * DATA STRUCTURE | |
33 | * | |
34 | * Here is the actual register cache. | |
35 | */ | |
36 | ||
3fadccb3 AC |
37 | /* Per-architecture object describing the layout of a register cache. |
38 | Computed once when the architecture is created */ | |
39 | ||
40 | struct gdbarch_data *regcache_descr_handle; | |
41 | ||
42 | struct regcache_descr | |
43 | { | |
44 | /* The architecture this descriptor belongs to. */ | |
45 | struct gdbarch *gdbarch; | |
46 | ||
47 | /* Is this a ``legacy'' register cache? Such caches reserve space | |
48 | for raw and pseudo registers and allow access to both. */ | |
49 | int legacy_p; | |
50 | ||
51 | /* The raw register cache. This should contain just [0 | |
52 | .. NUM_RAW_REGISTERS). However, for older targets, it contains | |
53 | space for the full [0 .. NUM_RAW_REGISTERS + | |
54 | NUM_PSEUDO_REGISTERS). */ | |
55 | int nr_raw_registers; | |
56 | long sizeof_raw_registers; | |
57 | long sizeof_raw_register_valid_p; | |
58 | ||
59 | /* Offset, in bytes, of reach register in the raw register cache. | |
60 | Pseudo registers have an offset even though they don't | |
61 | (shouldn't) have a correspoinding space in the register cache. | |
62 | It is to keep existing code, that relies on | |
63 | write/write_register_bytes working. */ | |
64 | long *register_offset; | |
65 | ||
66 | /* The cooked / frame / virtual register space. The registers in | |
67 | the range [0..NR_RAW_REGISTERS) should be mapped directly onto | |
68 | the corresponding raw register. The next [NR_RAW_REGISTERS | |
69 | .. NR_REGISTERS) should have been mapped, via | |
70 | gdbarch_register_read/write onto either raw registers or memory. */ | |
71 | int nr_registers; | |
72 | long *sizeof_register; | |
73 | long max_register_size; | |
74 | ||
75 | }; | |
76 | ||
77 | static void * | |
78 | init_legacy_regcache_descr (struct gdbarch *gdbarch) | |
79 | { | |
80 | int i; | |
81 | struct regcache_descr *descr; | |
82 | /* FIXME: cagney/2002-05-11: gdbarch_data() should take that | |
83 | ``gdbarch'' as a parameter. */ | |
84 | gdb_assert (gdbarch != NULL); | |
85 | ||
86 | descr = XMALLOC (struct regcache_descr); | |
87 | descr->gdbarch = gdbarch; | |
88 | descr->legacy_p = 1; | |
89 | ||
90 | /* FIXME: cagney/2002-05-11: Shouldn't be including pseudo-registers | |
91 | in the register buffer. Unfortunatly some architectures do. */ | |
92 | descr->nr_registers = NUM_REGS + NUM_PSEUDO_REGS; | |
93 | descr->nr_raw_registers = descr->nr_registers; | |
94 | descr->sizeof_raw_register_valid_p = descr->nr_registers; | |
95 | ||
96 | /* FIXME: cagney/2002-05-11: Instead of using REGISTER_BYTE() this | |
97 | code should compute the offets et.al. at runtime. This currently | |
98 | isn't possible because some targets overlap register locations - | |
99 | see the mess in read_register_bytes() and write_register_bytes() | |
100 | registers. */ | |
101 | descr->sizeof_register = XCALLOC (descr->nr_registers, long); | |
102 | descr->register_offset = XCALLOC (descr->nr_registers, long); | |
103 | descr->max_register_size = 0; | |
104 | for (i = 0; i < descr->nr_registers; i++) | |
105 | { | |
106 | descr->register_offset[i] = REGISTER_BYTE (i); | |
107 | descr->sizeof_register[i] = REGISTER_RAW_SIZE (i); | |
108 | if (descr->max_register_size < REGISTER_RAW_SIZE (i)) | |
109 | descr->max_register_size = REGISTER_RAW_SIZE (i); | |
110 | } | |
111 | ||
112 | /* Come up with the real size of the registers buffer. */ | |
113 | descr->sizeof_raw_registers = REGISTER_BYTES; /* OK use. */ | |
114 | for (i = 0; i < descr->nr_registers; i++) | |
115 | { | |
116 | long regend; | |
117 | /* Keep extending the buffer so that there is always enough | |
118 | space for all registers. The comparison is necessary since | |
119 | legacy code is free to put registers in random places in the | |
120 | buffer separated by holes. Once REGISTER_BYTE() is killed | |
121 | this can be greatly simplified. */ | |
122 | /* FIXME: cagney/2001-12-04: This code shouldn't need to use | |
123 | REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the | |
124 | buffer out so that certain registers just happen to overlap. | |
125 | Ulgh! New targets use gdbarch's register read/write and | |
126 | entirely avoid this uglyness. */ | |
127 | regend = descr->register_offset[i] + descr->sizeof_register[i]; | |
128 | if (descr->sizeof_raw_registers < regend) | |
129 | descr->sizeof_raw_registers = regend; | |
130 | } | |
131 | return descr; | |
132 | } | |
133 | ||
134 | static void * | |
135 | init_regcache_descr (struct gdbarch *gdbarch) | |
136 | { | |
137 | int i; | |
138 | struct regcache_descr *descr; | |
139 | gdb_assert (gdbarch != NULL); | |
140 | ||
141 | /* If an old style architecture, construct the register cache | |
142 | description using all the register macros. */ | |
143 | if (!gdbarch_register_read_p (gdbarch) | |
144 | && !gdbarch_register_write_p (gdbarch)) | |
145 | return init_legacy_regcache_descr (gdbarch); | |
146 | ||
147 | descr = XMALLOC (struct regcache_descr); | |
148 | descr->gdbarch = gdbarch; | |
149 | descr->legacy_p = 0; | |
150 | ||
151 | /* Total size of the register space. The raw registers should | |
152 | directly map onto the raw register cache while the pseudo's are | |
153 | either mapped onto raw-registers or memory. */ | |
154 | descr->nr_registers = NUM_REGS + NUM_PSEUDO_REGS; | |
155 | ||
156 | /* Construct a strictly RAW register cache. Don't allow pseudo's | |
157 | into the register cache. */ | |
158 | descr->nr_raw_registers = NUM_REGS; | |
159 | descr->sizeof_raw_register_valid_p = NUM_REGS; | |
160 | ||
161 | /* Lay out the register cache. The pseud-registers are included in | |
162 | the layout even though their value isn't stored in the register | |
163 | cache. Some code, via read_register_bytes() access a register | |
164 | using an offset/length rather than a register number. | |
165 | ||
166 | NOTE: cagney/2002-05-22: Only REGISTER_VIRTUAL_TYPE() needs to be | |
167 | used when constructing the register cache. It is assumed that | |
168 | register raw size, virtual size and type length of the type are | |
169 | all the same. */ | |
170 | ||
171 | { | |
172 | long offset = 0; | |
173 | descr->sizeof_register = XCALLOC (descr->nr_registers, long); | |
174 | descr->register_offset = XCALLOC (descr->nr_registers, long); | |
175 | descr->max_register_size = 0; | |
176 | for (i = 0; i < descr->nr_registers; i++) | |
177 | { | |
178 | descr->sizeof_register[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i)); | |
179 | descr->register_offset[i] = offset; | |
180 | offset += descr->sizeof_register[i]; | |
181 | if (descr->max_register_size < descr->sizeof_register[i]) | |
182 | descr->max_register_size = descr->sizeof_register[i]; | |
183 | } | |
184 | /* Set the real size of the register cache buffer. */ | |
185 | /* FIXME: cagney/2002-05-22: Should only need to allocate space | |
186 | for the raw registers. Unfortunatly some code still accesses | |
187 | the register array directly using the global registers[]. | |
188 | Until that code has been purged, play safe and over allocating | |
189 | the register buffer. Ulgh! */ | |
190 | descr->sizeof_raw_registers = offset; | |
191 | /* = descr->register_offset[descr->nr_raw_registers]; */ | |
192 | } | |
193 | ||
194 | #if 0 | |
195 | /* Sanity check. Confirm that the assumptions about gdbarch are | |
196 | true. The REGCACHE_DESCR_HANDLE is set before doing the checks | |
197 | so that targets using the generic methods supplied by regcache | |
198 | don't go into infinite recursion trying to, again, create the | |
199 | regcache. */ | |
200 | set_gdbarch_data (gdbarch, regcache_descr_handle, descr); | |
201 | for (i = 0; i < descr->nr_registers; i++) | |
202 | { | |
203 | gdb_assert (descr->sizeof_register[i] == REGISTER_RAW_SIZE (i)); | |
204 | gdb_assert (descr->sizeof_register[i] == REGISTER_VIRTUAL_SIZE (i)); | |
205 | gdb_assert (descr->register_offset[i] == REGISTER_BYTE (i)); | |
206 | } | |
207 | /* gdb_assert (descr->sizeof_raw_registers == REGISTER_BYTES (i)); */ | |
208 | #endif | |
209 | ||
210 | return descr; | |
211 | } | |
212 | ||
213 | static struct regcache_descr * | |
214 | regcache_descr (struct gdbarch *gdbarch) | |
215 | { | |
216 | return gdbarch_data (gdbarch, regcache_descr_handle); | |
217 | } | |
218 | ||
219 | static void | |
220 | xfree_regcache_descr (struct gdbarch *gdbarch, void *ptr) | |
221 | { | |
222 | struct regcache_descr *descr = ptr; | |
223 | if (descr == NULL) | |
224 | return; | |
225 | xfree (descr->register_offset); | |
226 | xfree (descr->sizeof_register); | |
227 | descr->register_offset = NULL; | |
228 | descr->sizeof_register = NULL; | |
229 | xfree (descr); | |
230 | } | |
231 | ||
232 | /* The register cache for storing raw register values. */ | |
233 | ||
234 | struct regcache | |
235 | { | |
236 | struct regcache_descr *descr; | |
237 | char *raw_registers; | |
238 | char *raw_register_valid_p; | |
239 | /* If a value isn't in the cache should the corresponding target be | |
240 | queried for a value. */ | |
241 | int passthrough_p; | |
242 | }; | |
243 | ||
244 | struct regcache * | |
245 | regcache_xmalloc (struct gdbarch *gdbarch) | |
246 | { | |
247 | struct regcache_descr *descr; | |
248 | struct regcache *regcache; | |
249 | gdb_assert (gdbarch != NULL); | |
250 | descr = regcache_descr (gdbarch); | |
251 | regcache = XMALLOC (struct regcache); | |
252 | regcache->descr = descr; | |
253 | regcache->raw_registers | |
254 | = XCALLOC (descr->sizeof_raw_registers, char); | |
255 | regcache->raw_register_valid_p | |
256 | = XCALLOC (descr->sizeof_raw_register_valid_p, char); | |
257 | regcache->passthrough_p = 0; | |
258 | return regcache; | |
259 | } | |
260 | ||
261 | void | |
262 | regcache_xfree (struct regcache *regcache) | |
263 | { | |
264 | if (regcache == NULL) | |
265 | return; | |
266 | xfree (regcache->raw_registers); | |
267 | xfree (regcache->raw_register_valid_p); | |
268 | xfree (regcache); | |
269 | } | |
270 | ||
36160dc4 AC |
271 | void |
272 | do_regcache_xfree (void *data) | |
273 | { | |
274 | regcache_xfree (data); | |
275 | } | |
276 | ||
277 | struct cleanup * | |
278 | make_cleanup_regcache_xfree (struct regcache *regcache) | |
279 | { | |
280 | return make_cleanup (do_regcache_xfree, regcache); | |
281 | } | |
282 | ||
3fadccb3 AC |
283 | void |
284 | regcache_cpy (struct regcache *dst, struct regcache *src) | |
285 | { | |
286 | int i; | |
287 | char *buf; | |
288 | gdb_assert (src != NULL && dst != NULL); | |
289 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
290 | gdb_assert (src != dst); | |
291 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
292 | It keeps the existing code working where things rely on going | |
293 | through to the register cache. */ | |
294 | if (src == current_regcache && src->descr->legacy_p) | |
295 | { | |
296 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
297 | untangle fetch. */ | |
298 | read_register_bytes (0, dst->raw_registers, REGISTER_BYTES); | |
299 | return; | |
300 | } | |
301 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
302 | It keeps the existing code working where things rely on going | |
303 | through to the register cache. */ | |
304 | if (dst == current_regcache && dst->descr->legacy_p) | |
305 | { | |
306 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
307 | untangle fetch. */ | |
308 | write_register_bytes (0, src->raw_registers, REGISTER_BYTES); | |
309 | return; | |
310 | } | |
311 | buf = alloca (src->descr->max_register_size); | |
312 | for (i = 0; i < src->descr->nr_raw_registers; i++) | |
313 | { | |
314 | /* Should we worry about the valid bit here? */ | |
315 | regcache_read (src, i, buf); | |
316 | regcache_write (dst, i, buf); | |
317 | } | |
318 | } | |
319 | ||
320 | void | |
321 | regcache_cpy_no_passthrough (struct regcache *dst, struct regcache *src) | |
322 | { | |
323 | int i; | |
324 | gdb_assert (src != NULL && dst != NULL); | |
325 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
326 | /* NOTE: cagney/2002-05-17: Don't let the caller do a no-passthrough | |
327 | move of data into the current_regcache(). Doing this would be | |
328 | silly - it would mean that valid_p would be completly invalid. */ | |
329 | gdb_assert (dst != current_regcache); | |
330 | memcpy (dst->raw_registers, src->raw_registers, | |
331 | dst->descr->sizeof_raw_registers); | |
332 | memcpy (dst->raw_register_valid_p, src->raw_register_valid_p, | |
333 | dst->descr->sizeof_raw_register_valid_p); | |
334 | } | |
335 | ||
336 | struct regcache * | |
337 | regcache_dup (struct regcache *src) | |
338 | { | |
339 | struct regcache *newbuf; | |
340 | gdb_assert (current_regcache != NULL); | |
341 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
342 | regcache_cpy (newbuf, src); | |
343 | return newbuf; | |
344 | } | |
345 | ||
346 | struct regcache * | |
347 | regcache_dup_no_passthrough (struct regcache *src) | |
348 | { | |
349 | struct regcache *newbuf; | |
350 | gdb_assert (current_regcache != NULL); | |
351 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
352 | regcache_cpy_no_passthrough (newbuf, src); | |
353 | return newbuf; | |
354 | } | |
355 | ||
356 | int | |
357 | regcache_valid_p (struct regcache *regcache, int regnum) | |
358 | { | |
359 | gdb_assert (regcache != NULL); | |
360 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
361 | return regcache->raw_register_valid_p[regnum]; | |
362 | } | |
363 | ||
364 | CORE_ADDR | |
365 | regcache_read_as_address (struct regcache *regcache, int regnum) | |
366 | { | |
367 | char *buf; | |
368 | gdb_assert (regcache != NULL); | |
369 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
370 | buf = alloca (regcache->descr->sizeof_register[regnum]); | |
371 | regcache_read (regcache, regnum, buf); | |
372 | return extract_address (buf, regcache->descr->sizeof_register[regnum]); | |
373 | } | |
374 | ||
375 | char * | |
376 | deprecated_grub_regcache_for_registers (struct regcache *regcache) | |
377 | { | |
378 | return regcache->raw_registers; | |
379 | } | |
380 | ||
381 | char * | |
382 | deprecated_grub_regcache_for_register_valid (struct regcache *regcache) | |
383 | { | |
384 | return regcache->raw_register_valid_p; | |
385 | } | |
386 | ||
387 | /* Global structure containing the current regcache. */ | |
388 | /* FIXME: cagney/2002-05-11: The two global arrays registers[] and | |
389 | register_valid[] currently point into this structure. */ | |
390 | struct regcache *current_regcache; | |
391 | ||
5ebd2499 | 392 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
393 | recording if the register values have been changed (eg. by the |
394 | user). Therefore all registers must be written back to the | |
395 | target when appropriate. */ | |
396 | ||
397 | /* REGISTERS contains the cached register values (in target byte order). */ | |
398 | ||
399 | char *registers; | |
400 | ||
401 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
402 | 1 if it has been fetched, and | |
403 | -1 if the register value was not available. | |
c97dcfc7 AC |
404 | |
405 | "Not available" indicates that the target is not not able to supply | |
406 | the register at this state. The register may become available at a | |
407 | later time (after the next resume). This often occures when GDB is | |
408 | manipulating a target that contains only a snapshot of the entire | |
409 | system being debugged - some of the registers in such a system may | |
410 | not have been saved. */ | |
32178cab MS |
411 | |
412 | signed char *register_valid; | |
413 | ||
39f77062 | 414 | /* The thread/process associated with the current set of registers. */ |
32178cab | 415 | |
39f77062 | 416 | static ptid_t registers_ptid; |
32178cab MS |
417 | |
418 | /* | |
419 | * FUNCTIONS: | |
420 | */ | |
421 | ||
422 | /* REGISTER_CACHED() | |
423 | ||
424 | Returns 0 if the value is not in the cache (needs fetch). | |
425 | >0 if the value is in the cache. | |
426 | <0 if the value is permanently unavailable (don't ask again). */ | |
427 | ||
428 | int | |
429 | register_cached (int regnum) | |
430 | { | |
431 | return register_valid[regnum]; | |
432 | } | |
433 | ||
7302a204 ND |
434 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
435 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
436 | ||
437 | void | |
438 | set_register_cached (int regnum, int state) | |
439 | { | |
440 | register_valid[regnum] = state; | |
441 | } | |
442 | ||
2dc4e391 DT |
443 | /* REGISTER_CHANGED |
444 | ||
445 | invalidate a single register REGNUM in the cache */ | |
446 | void | |
447 | register_changed (int regnum) | |
448 | { | |
7302a204 ND |
449 | set_register_cached (regnum, 0); |
450 | } | |
451 | ||
452 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
453 | else return a pointer to the start of the cache buffer. */ | |
454 | ||
193cb69f | 455 | static char * |
3fadccb3 | 456 | register_buffer (struct regcache *regcache, int regnum) |
7302a204 | 457 | { |
3fadccb3 | 458 | return regcache->raw_registers + regcache->descr->register_offset[regnum]; |
7302a204 ND |
459 | } |
460 | ||
461 | /* Return whether register REGNUM is a real register. */ | |
462 | ||
463 | static int | |
464 | real_register (int regnum) | |
465 | { | |
466 | return regnum >= 0 && regnum < NUM_REGS; | |
467 | } | |
468 | ||
469 | /* Return whether register REGNUM is a pseudo register. */ | |
470 | ||
471 | static int | |
472 | pseudo_register (int regnum) | |
473 | { | |
474 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
475 | } | |
476 | ||
477 | /* Fetch register REGNUM into the cache. */ | |
478 | ||
479 | static void | |
480 | fetch_register (int regnum) | |
481 | { | |
31e9866e AC |
482 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
483 | pseudo-register as a way of handling registers that needed to be | |
484 | constructed from one or more raw registers. New targets instead | |
485 | use gdbarch register read/write. */ | |
486 | if (FETCH_PSEUDO_REGISTER_P () | |
487 | && pseudo_register (regnum)) | |
7302a204 | 488 | FETCH_PSEUDO_REGISTER (regnum); |
6af4589c MS |
489 | else |
490 | target_fetch_registers (regnum); | |
7302a204 ND |
491 | } |
492 | ||
493 | /* Write register REGNUM cached value to the target. */ | |
494 | ||
495 | static void | |
496 | store_register (int regnum) | |
497 | { | |
31e9866e AC |
498 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
499 | pseudo-register as a way of handling registers that needed to be | |
500 | constructed from one or more raw registers. New targets instead | |
501 | use gdbarch register read/write. */ | |
502 | if (STORE_PSEUDO_REGISTER_P () | |
503 | && pseudo_register (regnum)) | |
7302a204 | 504 | STORE_PSEUDO_REGISTER (regnum); |
6af4589c MS |
505 | else |
506 | target_store_registers (regnum); | |
2dc4e391 DT |
507 | } |
508 | ||
32178cab MS |
509 | /* Low level examining and depositing of registers. |
510 | ||
511 | The caller is responsible for making sure that the inferior is | |
512 | stopped before calling the fetching routines, or it will get | |
513 | garbage. (a change from GDB version 3, in which the caller got the | |
514 | value from the last stop). */ | |
515 | ||
516 | /* REGISTERS_CHANGED () | |
517 | ||
518 | Indicate that registers may have changed, so invalidate the cache. */ | |
519 | ||
520 | void | |
521 | registers_changed (void) | |
522 | { | |
523 | int i; | |
32178cab | 524 | |
39f77062 | 525 | registers_ptid = pid_to_ptid (-1); |
32178cab MS |
526 | |
527 | /* Force cleanup of any alloca areas if using C alloca instead of | |
528 | a builtin alloca. This particular call is used to clean up | |
529 | areas allocated by low level target code which may build up | |
530 | during lengthy interactions between gdb and the target before | |
531 | gdb gives control to the user (ie watchpoints). */ | |
532 | alloca (0); | |
533 | ||
31e9866e | 534 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++) |
7302a204 | 535 | set_register_cached (i, 0); |
32178cab MS |
536 | |
537 | if (registers_changed_hook) | |
538 | registers_changed_hook (); | |
539 | } | |
540 | ||
541 | /* REGISTERS_FETCHED () | |
542 | ||
543 | Indicate that all registers have been fetched, so mark them all valid. */ | |
544 | ||
31e9866e AC |
545 | /* NOTE: cagney/2001-12-04: This function does not set valid on the |
546 | pseudo-register range since pseudo registers are always supplied | |
547 | using supply_register(). */ | |
548 | /* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target | |
549 | code was blatting the registers[] array and then calling this. | |
550 | Since targets should only be using supply_register() the need for | |
551 | this function/hack is eliminated. */ | |
32178cab MS |
552 | |
553 | void | |
554 | registers_fetched (void) | |
555 | { | |
556 | int i; | |
32178cab | 557 | |
a728f042 | 558 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 559 | set_register_cached (i, 1); |
fcdc5976 | 560 | /* Do not assume that the pseudo-regs have also been fetched. |
31e9866e | 561 | Fetching all real regs NEVER accounts for pseudo-regs. */ |
32178cab MS |
562 | } |
563 | ||
564 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
565 | idea. They are inefficient because they need to check for partial | |
566 | updates, which can only be done by scanning through all of the | |
567 | registers and seeing if the bytes that are being read/written fall | |
568 | inside of an invalid register. [The main reason this is necessary | |
569 | is that register sizes can vary, so a simple index won't suffice.] | |
570 | It is far better to call read_register_gen and write_register_gen | |
571 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 572 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
573 | update. |
574 | ||
575 | Prior to the recent fixes to check for partial updates, both read | |
576 | and write_register_bytes always checked to see if any registers | |
577 | were stale, and then called target_fetch_registers (-1) to update | |
578 | the whole set. This caused really slowed things down for remote | |
579 | targets. */ | |
580 | ||
581 | /* Copy INLEN bytes of consecutive data from registers | |
582 | starting with the INREGBYTE'th byte of register data | |
583 | into memory at MYADDR. */ | |
584 | ||
585 | void | |
61a0eb5b | 586 | read_register_bytes (int in_start, char *in_buf, int in_len) |
32178cab | 587 | { |
61a0eb5b | 588 | int in_end = in_start + in_len; |
5ebd2499 | 589 | int regnum; |
61a0eb5b | 590 | char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
591 | |
592 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
593 | update just those registers. */ | |
594 | ||
5ebd2499 | 595 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab | 596 | { |
61a0eb5b AC |
597 | int reg_start; |
598 | int reg_end; | |
599 | int reg_len; | |
600 | int start; | |
601 | int end; | |
602 | int byte; | |
32178cab | 603 | |
61a0eb5b AC |
604 | reg_start = REGISTER_BYTE (regnum); |
605 | reg_len = REGISTER_RAW_SIZE (regnum); | |
606 | reg_end = reg_start + reg_len; | |
32178cab | 607 | |
61a0eb5b | 608 | if (reg_end <= in_start || in_end <= reg_start) |
5ebd2499 | 609 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
610 | continue; |
611 | ||
275f450c AC |
612 | if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0') |
613 | /* Force the cache to fetch the entire register. */ | |
614 | read_register_gen (regnum, reg_buf); | |
615 | else | |
616 | /* Legacy note: even though this register is ``invalid'' we | |
617 | still need to return something. It would appear that some | |
618 | code relies on apparent gaps in the register array also | |
619 | being returned. */ | |
620 | /* FIXME: cagney/2001-08-18: This is just silly. It defeats | |
621 | the entire register read/write flow of control. Must | |
622 | resist temptation to return 0xdeadbeef. */ | |
623 | memcpy (reg_buf, registers + reg_start, reg_len); | |
32178cab | 624 | |
61a0eb5b AC |
625 | /* Legacy note: This function, for some reason, allows a NULL |
626 | input buffer. If the buffer is NULL, the registers are still | |
627 | fetched, just the final transfer is skipped. */ | |
628 | if (in_buf == NULL) | |
629 | continue; | |
630 | ||
631 | /* start = max (reg_start, in_start) */ | |
632 | if (reg_start > in_start) | |
633 | start = reg_start; | |
634 | else | |
635 | start = in_start; | |
636 | ||
637 | /* end = min (reg_end, in_end) */ | |
638 | if (reg_end < in_end) | |
639 | end = reg_end; | |
640 | else | |
641 | end = in_end; | |
642 | ||
643 | /* Transfer just the bytes common to both IN_BUF and REG_BUF */ | |
644 | for (byte = start; byte < end; byte++) | |
165cd47f | 645 | { |
61a0eb5b | 646 | in_buf[byte - in_start] = reg_buf[byte - reg_start]; |
165cd47f | 647 | } |
32178cab | 648 | } |
32178cab MS |
649 | } |
650 | ||
5ebd2499 ND |
651 | /* Read register REGNUM into memory at MYADDR, which must be large |
652 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
653 | register is known to be the size of a CORE_ADDR or smaller, |
654 | read_register can be used instead. */ | |
655 | ||
61a0eb5b AC |
656 | static void |
657 | legacy_read_register_gen (int regnum, char *myaddr) | |
32178cab | 658 | { |
61a0eb5b | 659 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
39f77062 | 660 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
661 | { |
662 | registers_changed (); | |
39f77062 | 663 | registers_ptid = inferior_ptid; |
32178cab MS |
664 | } |
665 | ||
7302a204 ND |
666 | if (!register_cached (regnum)) |
667 | fetch_register (regnum); | |
668 | ||
3fadccb3 | 669 | memcpy (myaddr, register_buffer (current_regcache, regnum), |
5ebd2499 | 670 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
671 | } |
672 | ||
61a0eb5b | 673 | void |
3fadccb3 | 674 | regcache_read (struct regcache *regcache, int regnum, char *buf) |
61a0eb5b | 675 | { |
3fadccb3 AC |
676 | gdb_assert (regcache != NULL && buf != NULL); |
677 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
678 | if (regcache->descr->legacy_p | |
679 | && regcache->passthrough_p) | |
680 | { | |
681 | gdb_assert (regcache == current_regcache); | |
682 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
683 | silently and very indirectly updates the regcache's regcache | |
684 | via the global register_valid[]. */ | |
685 | legacy_read_register_gen (regnum, buf); | |
686 | return; | |
687 | } | |
688 | /* Make certain that the register cache is up-to-date with respect | |
689 | to the current thread. This switching shouldn't be necessary | |
690 | only there is still only one target side register cache. Sigh! | |
691 | On the bright side, at least there is a regcache object. */ | |
692 | if (regcache->passthrough_p) | |
693 | { | |
694 | gdb_assert (regcache == current_regcache); | |
695 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
696 | { | |
697 | registers_changed (); | |
698 | registers_ptid = inferior_ptid; | |
699 | } | |
700 | if (!register_cached (regnum)) | |
701 | fetch_register (regnum); | |
702 | } | |
703 | /* Copy the value directly into the register cache. */ | |
704 | memcpy (buf, (regcache->raw_registers | |
705 | + regcache->descr->register_offset[regnum]), | |
706 | regcache->descr->sizeof_register[regnum]); | |
61a0eb5b AC |
707 | } |
708 | ||
709 | void | |
710 | read_register_gen (int regnum, char *buf) | |
711 | { | |
3fadccb3 AC |
712 | gdb_assert (current_regcache != NULL); |
713 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
714 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
715 | { |
716 | legacy_read_register_gen (regnum, buf); | |
717 | return; | |
718 | } | |
719 | gdbarch_register_read (current_gdbarch, regnum, buf); | |
720 | } | |
721 | ||
722 | ||
5ebd2499 ND |
723 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
724 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab | 725 | |
61a0eb5b AC |
726 | static void |
727 | legacy_write_register_gen (int regnum, char *myaddr) | |
32178cab MS |
728 | { |
729 | int size; | |
61a0eb5b | 730 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
32178cab MS |
731 | |
732 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
733 | change the registers array if something writes to this register. */ | |
5ebd2499 | 734 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
735 | return; |
736 | ||
39f77062 | 737 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
738 | { |
739 | registers_changed (); | |
39f77062 | 740 | registers_ptid = inferior_ptid; |
32178cab MS |
741 | } |
742 | ||
5ebd2499 | 743 | size = REGISTER_RAW_SIZE (regnum); |
32178cab | 744 | |
7302a204 | 745 | if (real_register (regnum)) |
1297a2f0 MS |
746 | { |
747 | /* If we have a valid copy of the register, and new value == old | |
748 | value, then don't bother doing the actual store. */ | |
749 | if (register_cached (regnum) | |
3fadccb3 AC |
750 | && (memcmp (register_buffer (current_regcache, regnum), myaddr, size) |
751 | == 0)) | |
1297a2f0 MS |
752 | return; |
753 | else | |
754 | target_prepare_to_store (); | |
755 | } | |
32178cab | 756 | |
3fadccb3 | 757 | memcpy (register_buffer (current_regcache, regnum), myaddr, size); |
32178cab | 758 | |
7302a204 ND |
759 | set_register_cached (regnum, 1); |
760 | store_register (regnum); | |
32178cab MS |
761 | } |
762 | ||
61a0eb5b | 763 | void |
3fadccb3 | 764 | regcache_write (struct regcache *regcache, int regnum, char *buf) |
61a0eb5b | 765 | { |
3fadccb3 AC |
766 | gdb_assert (regcache != NULL && buf != NULL); |
767 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
768 | ||
769 | if (regcache->passthrough_p | |
770 | && regcache->descr->legacy_p) | |
771 | { | |
772 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
773 | silently and very indirectly updates the regcache's buffers | |
774 | via the globals register_valid[] and registers[]. */ | |
775 | gdb_assert (regcache == current_regcache); | |
776 | legacy_write_register_gen (regnum, buf); | |
777 | return; | |
778 | } | |
779 | ||
780 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
781 | change the registers array if something writes to this register. */ | |
782 | if (CANNOT_STORE_REGISTER (regnum)) | |
783 | return; | |
784 | ||
785 | /* Handle the simple case first -> not write through so just store | |
786 | value in cache. */ | |
787 | if (!regcache->passthrough_p) | |
788 | { | |
789 | memcpy ((regcache->raw_registers | |
790 | + regcache->descr->register_offset[regnum]), buf, | |
791 | regcache->descr->sizeof_register[regnum]); | |
792 | regcache->raw_register_valid_p[regnum] = 1; | |
793 | return; | |
794 | } | |
795 | ||
796 | /* Make certain that the correct cache is selected. */ | |
797 | gdb_assert (regcache == current_regcache); | |
798 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
799 | { | |
800 | registers_changed (); | |
801 | registers_ptid = inferior_ptid; | |
802 | } | |
803 | ||
804 | /* If we have a valid copy of the register, and new value == old | |
805 | value, then don't bother doing the actual store. */ | |
806 | if (regcache_valid_p (regcache, regnum) | |
807 | && (memcmp (register_buffer (regcache, regnum), buf, | |
808 | regcache->descr->sizeof_register[regnum]) == 0)) | |
809 | return; | |
810 | ||
811 | target_prepare_to_store (); | |
812 | memcpy (register_buffer (regcache, regnum), buf, | |
813 | regcache->descr->sizeof_register[regnum]); | |
814 | regcache->raw_register_valid_p[regnum] = 1; | |
815 | store_register (regnum); | |
61a0eb5b AC |
816 | } |
817 | ||
818 | void | |
819 | write_register_gen (int regnum, char *buf) | |
820 | { | |
3fadccb3 AC |
821 | gdb_assert (current_regcache != NULL); |
822 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
823 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
824 | { |
825 | legacy_write_register_gen (regnum, buf); | |
826 | return; | |
827 | } | |
828 | gdbarch_register_write (current_gdbarch, regnum, buf); | |
829 | } | |
830 | ||
32178cab MS |
831 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
832 | into registers starting with the MYREGSTART'th byte of register data. */ | |
833 | ||
834 | void | |
835 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
836 | { | |
837 | int myregend = myregstart + inlen; | |
5ebd2499 | 838 | int regnum; |
32178cab MS |
839 | |
840 | target_prepare_to_store (); | |
841 | ||
842 | /* Scan through the registers updating any that are covered by the | |
843 | range myregstart<=>myregend using write_register_gen, which does | |
844 | nice things like handling threads, and avoiding updates when the | |
845 | new and old contents are the same. */ | |
846 | ||
5ebd2499 | 847 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
848 | { |
849 | int regstart, regend; | |
850 | ||
5ebd2499 ND |
851 | regstart = REGISTER_BYTE (regnum); |
852 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
853 | |
854 | /* Is this register completely outside the range the user is writing? */ | |
855 | if (myregend <= regstart || regend <= myregstart) | |
856 | /* do nothing */ ; | |
857 | ||
858 | /* Is this register completely within the range the user is writing? */ | |
859 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 860 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
861 | |
862 | /* The register partially overlaps the range being written. */ | |
863 | else | |
864 | { | |
e6cbd02a | 865 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
866 | /* What's the overlap between this register's bytes and |
867 | those the caller wants to write? */ | |
868 | int overlapstart = max (regstart, myregstart); | |
869 | int overlapend = min (regend, myregend); | |
870 | ||
871 | /* We may be doing a partial update of an invalid register. | |
872 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 873 | read_register_gen (regnum, regbuf); |
32178cab MS |
874 | |
875 | memcpy (registers + overlapstart, | |
876 | myaddr + (overlapstart - myregstart), | |
877 | overlapend - overlapstart); | |
878 | ||
7302a204 | 879 | store_register (regnum); |
32178cab MS |
880 | } |
881 | } | |
882 | } | |
883 | ||
884 | ||
5ebd2499 | 885 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 886 | |
173155e8 | 887 | ULONGEST |
5ebd2499 | 888 | read_register (int regnum) |
32178cab | 889 | { |
61a0eb5b AC |
890 | char *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
891 | read_register_gen (regnum, buf); | |
892 | return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
32178cab MS |
893 | } |
894 | ||
173155e8 | 895 | ULONGEST |
39f77062 | 896 | read_register_pid (int regnum, ptid_t ptid) |
32178cab | 897 | { |
39f77062 | 898 | ptid_t save_ptid; |
32178cab MS |
899 | int save_pid; |
900 | CORE_ADDR retval; | |
901 | ||
39f77062 | 902 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 903 | return read_register (regnum); |
32178cab | 904 | |
39f77062 | 905 | save_ptid = inferior_ptid; |
32178cab | 906 | |
39f77062 | 907 | inferior_ptid = ptid; |
32178cab | 908 | |
5ebd2499 | 909 | retval = read_register (regnum); |
32178cab | 910 | |
39f77062 | 911 | inferior_ptid = save_ptid; |
32178cab MS |
912 | |
913 | return retval; | |
914 | } | |
915 | ||
5ebd2499 | 916 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
917 | |
918 | LONGEST | |
5ebd2499 | 919 | read_signed_register (int regnum) |
173155e8 | 920 | { |
61a0eb5b AC |
921 | void *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
922 | read_register_gen (regnum, buf); | |
923 | return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
173155e8 AC |
924 | } |
925 | ||
926 | LONGEST | |
39f77062 | 927 | read_signed_register_pid (int regnum, ptid_t ptid) |
173155e8 | 928 | { |
39f77062 | 929 | ptid_t save_ptid; |
173155e8 AC |
930 | LONGEST retval; |
931 | ||
39f77062 | 932 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 933 | return read_signed_register (regnum); |
173155e8 | 934 | |
39f77062 | 935 | save_ptid = inferior_ptid; |
173155e8 | 936 | |
39f77062 | 937 | inferior_ptid = ptid; |
173155e8 | 938 | |
5ebd2499 | 939 | retval = read_signed_register (regnum); |
173155e8 | 940 | |
39f77062 | 941 | inferior_ptid = save_ptid; |
173155e8 AC |
942 | |
943 | return retval; | |
944 | } | |
945 | ||
5ebd2499 | 946 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
947 | |
948 | void | |
5ebd2499 | 949 | write_register (int regnum, LONGEST val) |
32178cab | 950 | { |
61a0eb5b | 951 | void *buf; |
32178cab | 952 | int size; |
5ebd2499 | 953 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
954 | buf = alloca (size); |
955 | store_signed_integer (buf, size, (LONGEST) val); | |
61a0eb5b | 956 | write_register_gen (regnum, buf); |
32178cab MS |
957 | } |
958 | ||
959 | void | |
39f77062 | 960 | write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid) |
32178cab | 961 | { |
39f77062 | 962 | ptid_t save_ptid; |
32178cab | 963 | |
39f77062 | 964 | if (ptid_equal (ptid, inferior_ptid)) |
32178cab | 965 | { |
5ebd2499 | 966 | write_register (regnum, val); |
32178cab MS |
967 | return; |
968 | } | |
969 | ||
39f77062 | 970 | save_ptid = inferior_ptid; |
32178cab | 971 | |
39f77062 | 972 | inferior_ptid = ptid; |
32178cab | 973 | |
5ebd2499 | 974 | write_register (regnum, val); |
32178cab | 975 | |
39f77062 | 976 | inferior_ptid = save_ptid; |
32178cab MS |
977 | } |
978 | ||
979 | /* SUPPLY_REGISTER() | |
980 | ||
5ebd2499 | 981 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
982 | value is obtained from the inferior or core dump, so there is no |
983 | need to store the value there. | |
984 | ||
985 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 986 | We just set its value to all zeros. We might want to record this |
32178cab MS |
987 | fact, and report it to the users of read_register and friends. */ |
988 | ||
989 | void | |
5ebd2499 | 990 | supply_register (int regnum, char *val) |
32178cab MS |
991 | { |
992 | #if 1 | |
39f77062 | 993 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
994 | { |
995 | registers_changed (); | |
39f77062 | 996 | registers_ptid = inferior_ptid; |
32178cab MS |
997 | } |
998 | #endif | |
999 | ||
7302a204 | 1000 | set_register_cached (regnum, 1); |
32178cab | 1001 | if (val) |
3fadccb3 | 1002 | memcpy (register_buffer (current_regcache, regnum), val, |
5ebd2499 | 1003 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 1004 | else |
3fadccb3 | 1005 | memset (register_buffer (current_regcache, regnum), '\000', |
5ebd2499 | 1006 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
1007 | |
1008 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
1009 | some registers, that the rest of the code would like to ignore. */ | |
1010 | ||
61a0eb5b AC |
1011 | /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is |
1012 | going to be deprecated. Instead architectures will leave the raw | |
1013 | register value as is and instead clean things up as they pass | |
1014 | through the method gdbarch_register_read() clean up the | |
1015 | values. */ | |
1016 | ||
4ee3352d | 1017 | #ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE |
0b434a00 AC |
1018 | DEPRECATED_CLEAN_UP_REGISTER_VALUE \ |
1019 | (regnum, register_buffer (current_regcache, regnum)); | |
32178cab MS |
1020 | #endif |
1021 | } | |
1022 | ||
193cb69f AC |
1023 | void |
1024 | regcache_collect (int regnum, void *buf) | |
1025 | { | |
3fadccb3 AC |
1026 | memcpy (buf, register_buffer (current_regcache, regnum), |
1027 | REGISTER_RAW_SIZE (regnum)); | |
193cb69f AC |
1028 | } |
1029 | ||
1030 | ||
8227c0ff AC |
1031 | /* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special |
1032 | handling for registers PC, SP, and FP. */ | |
32178cab | 1033 | |
4e052eda AC |
1034 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
1035 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
1036 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
8227c0ff AC |
1037 | generic_target_write_sp(), write_sp(), generic_target_read_fp() and |
1038 | read_fp(), will eventually be moved out of the reg-cache into | |
1039 | either frame.[hc] or to the multi-arch framework. The are not part | |
1040 | of the raw register cache. */ | |
4e052eda | 1041 | |
32178cab MS |
1042 | /* This routine is getting awfully cluttered with #if's. It's probably |
1043 | time to turn this into READ_PC and define it in the tm.h file. | |
1044 | Ditto for write_pc. | |
1045 | ||
1046 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 1047 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
1048 | version of that macro is made available where needed. |
1049 | ||
1050 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
1051 | by the multi-arch framework, it will eventually be possible to | |
1052 | eliminate the intermediate read_pc_pid(). The client would call | |
1053 | TARGET_READ_PC directly. (cagney). */ | |
1054 | ||
32178cab | 1055 | CORE_ADDR |
39f77062 | 1056 | generic_target_read_pc (ptid_t ptid) |
32178cab MS |
1057 | { |
1058 | #ifdef PC_REGNUM | |
1059 | if (PC_REGNUM >= 0) | |
1060 | { | |
39f77062 | 1061 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid)); |
32178cab MS |
1062 | return pc_val; |
1063 | } | |
1064 | #endif | |
8e65ff28 AC |
1065 | internal_error (__FILE__, __LINE__, |
1066 | "generic_target_read_pc"); | |
32178cab MS |
1067 | return 0; |
1068 | } | |
1069 | ||
1070 | CORE_ADDR | |
39f77062 | 1071 | read_pc_pid (ptid_t ptid) |
32178cab | 1072 | { |
39f77062 | 1073 | ptid_t saved_inferior_ptid; |
32178cab MS |
1074 | CORE_ADDR pc_val; |
1075 | ||
39f77062 KB |
1076 | /* In case ptid != inferior_ptid. */ |
1077 | saved_inferior_ptid = inferior_ptid; | |
1078 | inferior_ptid = ptid; | |
32178cab | 1079 | |
39f77062 | 1080 | pc_val = TARGET_READ_PC (ptid); |
32178cab | 1081 | |
39f77062 | 1082 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1083 | return pc_val; |
1084 | } | |
1085 | ||
1086 | CORE_ADDR | |
1087 | read_pc (void) | |
1088 | { | |
39f77062 | 1089 | return read_pc_pid (inferior_ptid); |
32178cab MS |
1090 | } |
1091 | ||
32178cab | 1092 | void |
39f77062 | 1093 | generic_target_write_pc (CORE_ADDR pc, ptid_t ptid) |
32178cab MS |
1094 | { |
1095 | #ifdef PC_REGNUM | |
1096 | if (PC_REGNUM >= 0) | |
39f77062 | 1097 | write_register_pid (PC_REGNUM, pc, ptid); |
32178cab | 1098 | if (NPC_REGNUM >= 0) |
39f77062 | 1099 | write_register_pid (NPC_REGNUM, pc + 4, ptid); |
32178cab | 1100 | #else |
8e65ff28 AC |
1101 | internal_error (__FILE__, __LINE__, |
1102 | "generic_target_write_pc"); | |
32178cab MS |
1103 | #endif |
1104 | } | |
1105 | ||
1106 | void | |
39f77062 | 1107 | write_pc_pid (CORE_ADDR pc, ptid_t ptid) |
32178cab | 1108 | { |
39f77062 | 1109 | ptid_t saved_inferior_ptid; |
32178cab | 1110 | |
39f77062 KB |
1111 | /* In case ptid != inferior_ptid. */ |
1112 | saved_inferior_ptid = inferior_ptid; | |
1113 | inferior_ptid = ptid; | |
32178cab | 1114 | |
39f77062 | 1115 | TARGET_WRITE_PC (pc, ptid); |
32178cab | 1116 | |
39f77062 | 1117 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1118 | } |
1119 | ||
1120 | void | |
1121 | write_pc (CORE_ADDR pc) | |
1122 | { | |
39f77062 | 1123 | write_pc_pid (pc, inferior_ptid); |
32178cab MS |
1124 | } |
1125 | ||
1126 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
1127 | ||
32178cab MS |
1128 | CORE_ADDR |
1129 | generic_target_read_sp (void) | |
1130 | { | |
1131 | #ifdef SP_REGNUM | |
1132 | if (SP_REGNUM >= 0) | |
1133 | return read_register (SP_REGNUM); | |
1134 | #endif | |
8e65ff28 AC |
1135 | internal_error (__FILE__, __LINE__, |
1136 | "generic_target_read_sp"); | |
32178cab MS |
1137 | } |
1138 | ||
1139 | CORE_ADDR | |
1140 | read_sp (void) | |
1141 | { | |
1142 | return TARGET_READ_SP (); | |
1143 | } | |
1144 | ||
32178cab MS |
1145 | void |
1146 | generic_target_write_sp (CORE_ADDR val) | |
1147 | { | |
1148 | #ifdef SP_REGNUM | |
1149 | if (SP_REGNUM >= 0) | |
1150 | { | |
1151 | write_register (SP_REGNUM, val); | |
1152 | return; | |
1153 | } | |
1154 | #endif | |
8e65ff28 AC |
1155 | internal_error (__FILE__, __LINE__, |
1156 | "generic_target_write_sp"); | |
32178cab MS |
1157 | } |
1158 | ||
1159 | void | |
1160 | write_sp (CORE_ADDR val) | |
1161 | { | |
1162 | TARGET_WRITE_SP (val); | |
1163 | } | |
1164 | ||
32178cab MS |
1165 | CORE_ADDR |
1166 | generic_target_read_fp (void) | |
1167 | { | |
1168 | #ifdef FP_REGNUM | |
1169 | if (FP_REGNUM >= 0) | |
1170 | return read_register (FP_REGNUM); | |
1171 | #endif | |
8e65ff28 AC |
1172 | internal_error (__FILE__, __LINE__, |
1173 | "generic_target_read_fp"); | |
32178cab MS |
1174 | } |
1175 | ||
1176 | CORE_ADDR | |
1177 | read_fp (void) | |
1178 | { | |
1179 | return TARGET_READ_FP (); | |
1180 | } | |
1181 | ||
705152c5 MS |
1182 | /* ARGSUSED */ |
1183 | static void | |
1184 | reg_flush_command (char *command, int from_tty) | |
1185 | { | |
1186 | /* Force-flush the register cache. */ | |
1187 | registers_changed (); | |
1188 | if (from_tty) | |
1189 | printf_filtered ("Register cache flushed.\n"); | |
1190 | } | |
1191 | ||
32178cab MS |
1192 | static void |
1193 | build_regcache (void) | |
3fadccb3 AC |
1194 | { |
1195 | current_regcache = regcache_xmalloc (current_gdbarch); | |
1196 | current_regcache->passthrough_p = 1; | |
1197 | registers = deprecated_grub_regcache_for_registers (current_regcache); | |
1198 | register_valid = deprecated_grub_regcache_for_register_valid (current_regcache); | |
1199 | } | |
1200 | ||
32178cab MS |
1201 | void |
1202 | _initialize_regcache (void) | |
1203 | { | |
3fadccb3 AC |
1204 | regcache_descr_handle = register_gdbarch_data (init_regcache_descr, |
1205 | xfree_regcache_descr); | |
1206 | REGISTER_GDBARCH_SWAP (current_regcache); | |
32178cab MS |
1207 | register_gdbarch_swap (®isters, sizeof (registers), NULL); |
1208 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
1209 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
1210 | |
1211 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
1212 | "Force gdb to flush its register cache (maintainer command)"); | |
39f77062 KB |
1213 | |
1214 | /* Initialize the thread/process associated with the current set of | |
1215 | registers. For now, -1 is special, and means `no current process'. */ | |
1216 | registers_ptid = pid_to_ptid (-1); | |
32178cab | 1217 | } |