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da8ca43d JT |
1 | /* Target-dependent code for NetBSD/Alpha. |
2 | Copyright 2002 Free Software Foundation, Inc. | |
3 | Contributed by Wasabi Systems, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
8513dd2d | 24 | #include "regcache.h" |
da8ca43d | 25 | #include "value.h" |
da8ca43d | 26 | |
9964235a JT |
27 | #include "solib-svr4.h" |
28 | ||
da8ca43d | 29 | #include "alpha-tdep.h" |
8513dd2d | 30 | #include "alphabsd-tdep.h" |
ea5bc2a6 | 31 | #include "nbsd-tdep.h" |
8513dd2d JT |
32 | |
33 | static void | |
34 | fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which, | |
35 | CORE_ADDR ignore) | |
36 | { | |
37 | char *regs, *fpregs; | |
38 | int regno; | |
39 | ||
40 | /* Table to map a gdb register number to a trapframe register index. */ | |
41 | static const int regmap[] = | |
42 | { | |
43 | 0, 1, 2, 3, | |
44 | 4, 5, 6, 7, | |
45 | 8, 9, 10, 11, | |
46 | 12, 13, 14, 15, | |
47 | 30, 31, 32, 16, | |
48 | 17, 18, 19, 20, | |
49 | 21, 22, 23, 24, | |
50 | 25, 29, 26 | |
51 | }; | |
52 | #define SIZEOF_TRAPFRAME (33 * 8) | |
53 | ||
54 | /* We get everything from one section. */ | |
55 | if (which != 0) | |
56 | return; | |
57 | ||
58 | regs = core_reg_sect; | |
59 | fpregs = core_reg_sect + SIZEOF_TRAPFRAME; | |
60 | ||
61 | if (core_reg_size < (SIZEOF_TRAPFRAME + SIZEOF_STRUCT_FPREG)) | |
62 | { | |
63 | warning ("Wrong size register set in core file."); | |
64 | return; | |
65 | } | |
66 | ||
67 | /* Integer registers. */ | |
68 | for (regno = 0; regno < ALPHA_ZERO_REGNUM; regno++) | |
69 | supply_register (regno, regs + (regmap[regno] * 8)); | |
70 | supply_register (ALPHA_ZERO_REGNUM, NULL); | |
71 | supply_register (FP_REGNUM, NULL); | |
72 | supply_register (PC_REGNUM, regs + (28 * 8)); | |
73 | ||
74 | /* Floating point registers. */ | |
75 | alphabsd_supply_fpreg (fpregs, -1); | |
76 | } | |
77 | ||
78 | static void | |
79 | fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which, | |
80 | CORE_ADDR ignore) | |
81 | { | |
82 | switch (which) | |
83 | { | |
84 | case 0: /* Integer registers. */ | |
85 | if (core_reg_size != SIZEOF_STRUCT_REG) | |
86 | warning ("Wrong size register set in core file."); | |
87 | else | |
88 | alphabsd_supply_reg (core_reg_sect, -1); | |
89 | break; | |
90 | ||
91 | case 2: /* Floating point registers. */ | |
92 | if (core_reg_size != SIZEOF_STRUCT_FPREG) | |
93 | warning ("Wrong size FP register set in core file."); | |
94 | else | |
95 | alphabsd_supply_fpreg (core_reg_sect, -1); | |
96 | break; | |
97 | ||
98 | default: | |
99 | /* Don't know what kind of register request this is; just ignore it. */ | |
100 | break; | |
101 | } | |
102 | } | |
103 | ||
104 | static struct core_fns alphanbsd_core_fns = | |
105 | { | |
106 | bfd_target_unknown_flavour, /* core_flavour */ | |
107 | default_check_format, /* check_format */ | |
108 | default_core_sniffer, /* core_sniffer */ | |
109 | fetch_core_registers, /* core_read_registers */ | |
110 | NULL /* next */ | |
111 | }; | |
112 | ||
113 | static struct core_fns alphanbsd_elfcore_fns = | |
114 | { | |
115 | bfd_target_elf_flavour, /* core_flavour */ | |
116 | default_check_format, /* check_format */ | |
117 | default_core_sniffer, /* core_sniffer */ | |
118 | fetch_elfcore_registers, /* core_read_registers */ | |
119 | NULL /* next */ | |
120 | }; | |
da8ca43d | 121 | |
da8ca43d JT |
122 | /* Under NetBSD/alpha, signal handler invocations can be identified by the |
123 | designated code sequence that is used to return from a signal handler. | |
124 | In particular, the return address of a signal handler points to the | |
125 | following code sequence: | |
126 | ||
127 | ldq a0, 0(sp) | |
128 | lda sp, 16(sp) | |
129 | lda v0, 295(zero) # __sigreturn14 | |
130 | call_pal callsys | |
131 | ||
132 | Each instruction has a unique encoding, so we simply attempt to match | |
133 | the instruction the PC is pointing to with any of the above instructions. | |
134 | If there is a hit, we know the offset to the start of the designated | |
135 | sequence and can then check whether we really are executing in the | |
136 | signal trampoline. If not, -1 is returned, otherwise the offset from the | |
137 | start of the return sequence is returned. */ | |
cfef91e4 | 138 | static const unsigned char sigtramp_retcode[] = |
da8ca43d | 139 | { |
cfef91e4 JT |
140 | 0x00, 0x00, 0x1e, 0xa6, /* ldq a0, 0(sp) */ |
141 | 0x10, 0x00, 0xde, 0x23, /* lda sp, 16(sp) */ | |
142 | 0x27, 0x01, 0x1f, 0x20, /* lda v0, 295(zero) */ | |
143 | 0x83, 0x00, 0x00, 0x00, /* call_pal callsys */ | |
da8ca43d | 144 | }; |
cfef91e4 JT |
145 | #define RETCODE_NWORDS 4 |
146 | #define RETCODE_SIZE (RETCODE_NWORDS * 4) | |
da8ca43d JT |
147 | |
148 | LONGEST | |
149 | alphanbsd_sigtramp_offset (CORE_ADDR pc) | |
150 | { | |
cfef91e4 | 151 | unsigned char ret[RETCODE_SIZE], w[4]; |
da8ca43d JT |
152 | LONGEST off; |
153 | int i; | |
154 | ||
cfef91e4 | 155 | if (read_memory_nobpt (pc, (char *) w, 4) != 0) |
da8ca43d JT |
156 | return -1; |
157 | ||
158 | for (i = 0; i < RETCODE_NWORDS; i++) | |
159 | { | |
cfef91e4 | 160 | if (memcmp (w, sigtramp_retcode + (i * 4), 4) == 0) |
da8ca43d JT |
161 | break; |
162 | } | |
163 | if (i == RETCODE_NWORDS) | |
164 | return (-1); | |
165 | ||
166 | off = i * 4; | |
167 | pc -= off; | |
168 | ||
169 | if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0) | |
170 | return -1; | |
171 | ||
cfef91e4 | 172 | if (memcmp (ret, sigtramp_retcode, RETCODE_SIZE) == 0) |
da8ca43d JT |
173 | return off; |
174 | ||
175 | return -1; | |
176 | } | |
177 | ||
6c72f9f9 JT |
178 | static int |
179 | alphanbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name) | |
180 | { | |
181 | return (alphanbsd_sigtramp_offset (pc) >= 0); | |
182 | } | |
183 | ||
da8ca43d JT |
184 | static void |
185 | alphanbsd_init_abi (struct gdbarch_info info, | |
186 | struct gdbarch *gdbarch) | |
187 | { | |
188 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
189 | ||
6c72f9f9 JT |
190 | set_gdbarch_pc_in_sigtramp (gdbarch, alphanbsd_pc_in_sigtramp); |
191 | ||
da8ca43d JT |
192 | /* NetBSD/alpha does not provide single step support via ptrace(2); we |
193 | must use software single-stepping. */ | |
194 | set_gdbarch_software_single_step (gdbarch, alpha_software_single_step); | |
195 | ||
196 | set_solib_svr4_fetch_link_map_offsets (gdbarch, | |
ea5bc2a6 | 197 | nbsd_lp64_solib_svr4_fetch_link_map_offsets); |
da8ca43d JT |
198 | |
199 | tdep->dynamic_sigtramp_offset = alphanbsd_sigtramp_offset; | |
accc6d1f JT |
200 | |
201 | tdep->jb_pc = 2; | |
202 | tdep->jb_elt_size = 8; | |
da8ca43d JT |
203 | } |
204 | ||
205 | void | |
206 | _initialize_alphanbsd_tdep (void) | |
207 | { | |
70f80edf JT |
208 | gdbarch_register_osabi (bfd_arch_alpha, GDB_OSABI_NETBSD_ELF, |
209 | alphanbsd_init_abi); | |
8513dd2d JT |
210 | |
211 | add_core_fns (&alphanbsd_core_fns); | |
212 | add_core_fns (&alphanbsd_elfcore_fns); | |
da8ca43d | 213 | } |