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c906108c | 1 | /* Parameters for NYU Ultracomputer 29000 target, for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1990, 1991, 1993 Free Software Foundation, Inc. |
c906108c | 3 | Contributed by David Wood @ New York University ([email protected]). |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | /* This file includes tm-a29k.h, but predefines REGISTER_NAMES and | |
23 | related macros. The file supports a a29k running our flavor of | |
24 | Unix on our Ultra3 PE Boards. */ | |
25 | ||
26 | /* Byte order is configurable, but this machine runs big-endian. */ | |
27 | #define TARGET_BYTE_ORDER BIG_ENDIAN | |
28 | ||
29 | /* Initializer for an array of names of registers. | |
30 | There should be NUM_REGS strings in this initializer. | |
31 | */ | |
c5aa993b | 32 | #define NUM_REGS (EXO_REGNUM + 1) |
c906108c SS |
33 | |
34 | #define REGISTER_NAMES { \ | |
35 | "gr1", \ | |
36 | "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", "gr72", \ | |
37 | "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", "gr80", "gr81", \ | |
38 | "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", "gr88", "gr89", "gr90", \ | |
39 | "gr91", "gr92", "gr93", "gr94", "gr95", \ | |
40 | "gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \ | |
41 | "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \ | |
42 | "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \ | |
43 | "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \ | |
44 | "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \ | |
45 | "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \ | |
46 | "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \ | |
47 | "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \ | |
48 | "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \ | |
49 | "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \ | |
50 | "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \ | |
51 | "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \ | |
52 | "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \ | |
53 | "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \ | |
54 | "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \ | |
55 | "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \ | |
56 | "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \ | |
57 | "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \ | |
58 | "lr124", "lr125", "lr126", "lr127", \ | |
59 | "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \ | |
60 | "pc0", "pc1", "pc2", "mmu", "lru", \ | |
61 | "ipc", "ipa", "ipb", "q", "alu", "bp", "fc", "cr", \ | |
62 | "fpe", "int", "fps", "exo" } | |
63 | ||
64 | ||
65 | #ifdef KERNEL_DEBUGGING | |
c5aa993b JM |
66 | #define PADDR_U_REGNUM 22 /* gr86 */ |
67 | #define RETURN_REGNUM GR64_REGNUM | |
c906108c | 68 | #else |
c5aa993b JM |
69 | #define RETURN_REGNUM GR96_REGNUM |
70 | #endif /* KERNEL_DEBUGGING */ | |
c906108c SS |
71 | |
72 | ||
c5aa993b | 73 | /* Should rename all GR96_REGNUM to RETURN_REGNUM */ |
c906108c SS |
74 | #define GR1_REGNUM (0) |
75 | #define GR64_REGNUM 1 | |
76 | #define GR96_REGNUM (GR64_REGNUM + 32) | |
77 | /* This needs to be the memory stack pointer, not the register stack pointer, | |
78 | to make call_function work right. */ | |
79 | #define SP_REGNUM MSP_REGNUM | |
80 | ||
81 | #define FP_REGNUM (LR0_REGNUM + 1) /* lr1 */ | |
82 | /* Large Return Pointer */ | |
83 | #define LRP_REGNUM (123 - 96 + RETURN_REGNUM) | |
84 | /* Static link pointer */ | |
85 | #define SLP_REGNUM (124 - 96 + RETURN_REGNUM) | |
86 | /* Memory Stack Pointer. */ | |
87 | #define MSP_REGNUM (125 - 96 + RETURN_REGNUM) | |
88 | /* Register allocate bound. */ | |
89 | #define RAB_REGNUM (126 - 96 + RETURN_REGNUM) | |
90 | /* Register Free Bound. */ | |
91 | #define RFB_REGNUM (127 - 96 + RETURN_REGNUM) | |
92 | /* Register Stack Pointer. */ | |
93 | #define RSP_REGNUM GR1_REGNUM | |
c5aa993b | 94 | #define LR0_REGNUM ( 32 + GR96_REGNUM) |
c906108c SS |
95 | |
96 | /* Protected Special registers */ | |
97 | #define VAB_REGNUM (LR0_REGNUM + 128) | |
c5aa993b JM |
98 | #define OPS_REGNUM (VAB_REGNUM + 1) |
99 | #define CPS_REGNUM (VAB_REGNUM + 2) | |
100 | #define CFG_REGNUM (VAB_REGNUM + 3) | |
101 | #define CHA_REGNUM (VAB_REGNUM + 4) | |
102 | #define CHD_REGNUM (VAB_REGNUM + 5) | |
103 | #define CHC_REGNUM (VAB_REGNUM + 6) | |
104 | #define RBP_REGNUM (VAB_REGNUM + 7) | |
105 | #define TMC_REGNUM (VAB_REGNUM + 8) | |
106 | #define TMR_REGNUM (VAB_REGNUM + 9) | |
c906108c | 107 | #define NPC_REGNUM (VAB_REGNUM + 10) /* pc0 */ |
c5aa993b JM |
108 | #define PC_REGNUM (VAB_REGNUM + 11) /* pc1 */ |
109 | #define PC2_REGNUM (VAB_REGNUM + 12) /* pc2 */ | |
c906108c SS |
110 | #define MMU_REGNUM (VAB_REGNUM + 13) |
111 | #define LRU_REGNUM (VAB_REGNUM + 14) | |
112 | /* Register sequence gap */ | |
113 | /* Unprotected Special registers */ | |
c5aa993b JM |
114 | #define IPC_REGNUM (LRU_REGNUM + 1) |
115 | #define IPA_REGNUM (IPC_REGNUM + 1) | |
116 | #define IPB_REGNUM (IPC_REGNUM + 2) | |
117 | #define Q_REGNUM (IPC_REGNUM + 3) | |
118 | #define ALU_REGNUM (IPC_REGNUM + 4) | |
c906108c | 119 | #define PS_REGNUM ALU_REGNUM |
c5aa993b JM |
120 | #define BP_REGNUM (IPC_REGNUM + 5) |
121 | #define FC_REGNUM (IPC_REGNUM + 6) | |
122 | #define CR_REGNUM (IPC_REGNUM + 7) | |
c906108c | 123 | /* Register sequence gap */ |
c5aa993b JM |
124 | #define FPE_REGNUM (CR_REGNUM + 1) |
125 | #define INT_REGNUM (FPE_REGNUM + 1) | |
126 | #define FPS_REGNUM (FPE_REGNUM + 2) | |
c906108c | 127 | /* Register sequence gap */ |
c5aa993b | 128 | #define EXO_REGNUM (FPS_REGNUM + 1) |
c906108c SS |
129 | |
130 | /* Special register #x. */ | |
131 | #define SR_REGNUM(x) \ | |
132 | ((x) < 15 ? VAB_REGNUM + (x) \ | |
133 | : (x) >= 128 && (x) < 136 ? IPC_REGNUM + (x-128) \ | |
134 | : (x) >= 160 && (x) < 163 ? FPE_REGNUM + (x-160) \ | |
135 | : (x) == 164 ? EXO_REGNUM \ | |
136 | : (error ("Internal error in SR_REGNUM"), 0)) | |
137 | ||
138 | #ifndef KERNEL_DEBUGGING | |
139 | /* | |
140 | * This macro defines the register numbers (from REGISTER_NAMES) that | |
141 | * are effectively unavailable to the user through ptrace(). It allows | |
142 | * us to include the whole register set in REGISTER_NAMES (inorder to | |
143 | * better support remote debugging). If it is used in | |
144 | * fetch/store_inferior_registers() gdb will not complain about I/O errors | |
145 | * on fetching these registers. If all registers in REGISTER_NAMES | |
146 | * are available, then return false (0). | |
147 | */ | |
148 | #define CANNOT_STORE_REGISTER(regno) \ | |
149 | (((regno)>=GR64_REGNUM && (regno)<GR64_REGNUM+32) || \ | |
150 | ((regno)==VAB_REGNUM) || \ | |
151 | ((regno)==OPS_REGNUM) || \ | |
152 | ((regno)>=CFG_REGNUM && (regno)<=TMR_REGNUM) || \ | |
153 | ((regno)==MMU_REGNUM) || \ | |
154 | ((regno)==LRU_REGNUM) || \ | |
155 | ((regno)>=ALU_REGNUM) || \ | |
156 | ((regno)==CR_REGNUM) || \ | |
157 | ((regno)==EXO_REGNUM)) | |
158 | #define CANNOT_FETCH_REGISTER(regno) CANNOT_STORE_REGISTER(regno) | |
159 | #endif /* KERNEL_DEBUGGING */ | |
160 | ||
161 | /* | |
162 | * Converts an sdb register number to an internal gdb register number. | |
163 | * Currently under gcc, gr96->0...gr128->31...lr0->32...lr127->159, or... | |
c5aa993b | 164 | * gr64->0...gr95->31, lr0->32...lr127->159. |
c906108c SS |
165 | */ |
166 | #define SDB_REG_TO_REGNUM(value) (((value)<32) ? ((value)+RETURN_REGNUM) : \ | |
167 | ((value)-32+LR0_REGNUM)) | |
168 | ||
169 | #ifdef KERNEL_DEBUGGING | |
170 | /* ublock virtual address as defined in our sys/param.h */ | |
171 | /* FIXME: Should get this from sys/param.h */ | |
c5aa993b | 172 | #define UVADDR ((32*0x100000)-8192) |
c906108c SS |
173 | #endif |
174 | ||
175 | /* | |
176 | * Are we in sigtramp(), needed in infrun.c. Specific to ultra3, because | |
177 | * we take off the leading '_'. | |
178 | */ | |
179 | #if !defined(KERNEL_DEBUGGING) | |
180 | #ifdef SYM1 | |
c5aa993b | 181 | #define IN_SIGTRAMP(pc, name) (name && STREQ ("sigtramp", name)) |
c906108c | 182 | #else |
c5aa993b JM |
183 | Need to define |
184 | IN_SIGTRAMP () for sym2. | |
c906108c | 185 | #endif |
c5aa993b | 186 | #endif /* !KERNEL_DEBUGGING */ |
c906108c SS |
187 | |
188 | #include "a29k/tm-a29k.h" | |
189 | ||
190 | /**** The following are definitions that override those in tm-a29k.h ****/ | |
191 | ||
192 | /* This sequence of words is the instructions | |
193 | mtsrim cr, 15 | |
194 | loadm 0, 0, lr2, msp ; load first 16 words of arguments into registers | |
195 | add msp, msp, 16 * 4 ; point to the remaining arguments | |
c5aa993b | 196 | CONST_INSN: |
c906108c SS |
197 | const gr96,inf |
198 | consth gr96,inf | |
199 | calli lr0, gr96 | |
200 | aseq 0x40,gr1,gr1 ; nop | |
201 | asneq 0x50,gr1,gr1 ; breakpoint | |
202 | When KERNEL_DEBUGGIN is defined, msp -> gr93, gr96 -> gr64, | |
c5aa993b JM |
203 | 7d -> 5d, 60 -> 40 |
204 | */ | |
c906108c SS |
205 | |
206 | /* Position of the "const" instruction within CALL_DUMMY in bytes. */ | |
207 | #undef CALL_DUMMY | |
208 | #if TARGET_BYTE_ORDER == HOST_BYTE_ORDER | |
c5aa993b JM |
209 | #ifdef KERNEL_DEBUGGING /* gr96 -> gr64 */ |
210 | #define CALL_DUMMY {0x0400870f, 0x3600825d, 0x155d5d40, 0x03ff40ff, \ | |
c906108c SS |
211 | 0x02ff40ff, 0xc8008040, 0x70400101, 0x72500101} |
212 | #else | |
c5aa993b | 213 | #define CALL_DUMMY {0x0400870f, 0x3600827d, 0x157d7d40, 0x03ff60ff, \ |
c906108c | 214 | 0x02ff60ff, 0xc8008060, 0x70400101, 0x72500101} |
c5aa993b JM |
215 | #endif /* KERNEL_DEBUGGING */ |
216 | #else /* Byte order differs. */ | |
217 | you lose | |
218 | #endif /* Byte order differs. */ | |
c906108c SS |
219 | |
220 | #if !defined(KERNEL_DEBUGGING) | |
c5aa993b JM |
221 | #ifdef SYM1 |
222 | #undef DECR_PC_AFTER_BREAK | |
223 | #define DECR_PC_AFTER_BREAK 0 /* Sym1 kernel does the decrement */ | |
224 | #else | |
225 | ->"ULTRA3 running other than sym1 OS" !; | |
226 | #endif | |
c906108c | 227 | #endif /* !KERNEL_DEBUGGING */ |