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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
863f7a5f
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
c7927a3c
NC		 20
21#include "sysdep.h"
22#include "bfd.h"
d68cd58c 23#include "bfd_stdint.h"
c7927a3c
NC		 24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/rx.h"
27#include "libiberty.h"
7a2f2d82 28#include "elf32-rx.h"
c7927a3c
NC		 29
30#define RX_OPCODE_BIG_ENDIAN 0
31
4c422395
DD		 32/* This is a meta-target that's used only with objcopy, to avoid the
33 endian-swap we would otherwise get. We check for this in
34 rx_elf_object_p(). */
6d00b590
AM		 35const bfd_target rx_elf32_be_ns_vec;
36const bfd_target rx_elf32_be_vec;
4c422395 37
c7927a3c
NC		 38#ifdef DEBUG
39char * rx_get_reloc (long);
9ccb8af9 40void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 41#endif
42
43#define RXREL(n,sz,bit,shift,complain,pcrel) \
44 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
45 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
46
47/* Note that the relocations around 0x7f are internal to this file;
48 feel free to move them as needed to avoid conflicts with published
49 relocation numbers. */
50
51static reloc_howto_type rx_elf_howto_table [] =
52{
07d6d2b8
AM		 53 RXREL (NONE, 3, 0, 0, dont, FALSE),
54 RXREL (DIR32, 2, 32, 0, signed, FALSE),
c7927a3c 55 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
07d6d2b8 56 RXREL (DIR16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 57 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
58 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 59 RXREL (DIR8, 0, 8, 0, dont, FALSE),
60 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
61 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 62 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
63 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
64 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
65 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
66 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
67 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
68 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
07d6d2b8
AM		 69 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
71 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
c7927a3c
NC		 72
73 EMPTY_HOWTO (0x13),
74 EMPTY_HOWTO (0x14),
75 EMPTY_HOWTO (0x15),
76 EMPTY_HOWTO (0x16),
77 EMPTY_HOWTO (0x17),
78 EMPTY_HOWTO (0x18),
79 EMPTY_HOWTO (0x19),
80 EMPTY_HOWTO (0x1a),
81 EMPTY_HOWTO (0x1b),
82 EMPTY_HOWTO (0x1c),
83 EMPTY_HOWTO (0x1d),
84 EMPTY_HOWTO (0x1e),
85 EMPTY_HOWTO (0x1f),
86
07d6d2b8
AM		 87 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
88 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
89 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
90 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
c7927a3c 91 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
07d6d2b8
AM		 92 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
93 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
94 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
95 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
96 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
c7927a3c
NC		 97 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
07d6d2b8 100 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 101
102 EMPTY_HOWTO (0x2e),
103 EMPTY_HOWTO (0x2f),
104 EMPTY_HOWTO (0x30),
105 EMPTY_HOWTO (0x31),
106 EMPTY_HOWTO (0x32),
107 EMPTY_HOWTO (0x33),
108 EMPTY_HOWTO (0x34),
109 EMPTY_HOWTO (0x35),
110 EMPTY_HOWTO (0x36),
111 EMPTY_HOWTO (0x37),
112 EMPTY_HOWTO (0x38),
113 EMPTY_HOWTO (0x39),
114 EMPTY_HOWTO (0x3a),
115 EMPTY_HOWTO (0x3b),
116 EMPTY_HOWTO (0x3c),
117 EMPTY_HOWTO (0x3d),
118 EMPTY_HOWTO (0x3e),
119 EMPTY_HOWTO (0x3f),
120 EMPTY_HOWTO (0x40),
121
07d6d2b8 122 RXREL (ABS32, 2, 32, 0, dont, FALSE),
c7927a3c 123 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
07d6d2b8 124 RXREL (ABS16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 125 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
126 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 127 RXREL (ABS8, 0, 8, 0, dont, FALSE),
128 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 130 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
131 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
132 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
133 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
135 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
07d6d2b8
AM		 137 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
138 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 139
140#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
141
142 EMPTY_HOWTO (0x52),
143 EMPTY_HOWTO (0x53),
144 EMPTY_HOWTO (0x54),
145 EMPTY_HOWTO (0x55),
146 EMPTY_HOWTO (0x56),
147 EMPTY_HOWTO (0x57),
148 EMPTY_HOWTO (0x58),
149 EMPTY_HOWTO (0x59),
150 EMPTY_HOWTO (0x5a),
151 EMPTY_HOWTO (0x5b),
152 EMPTY_HOWTO (0x5c),
153 EMPTY_HOWTO (0x5d),
154 EMPTY_HOWTO (0x5e),
155 EMPTY_HOWTO (0x5f),
156 EMPTY_HOWTO (0x60),
157 EMPTY_HOWTO (0x61),
158 EMPTY_HOWTO (0x62),
159 EMPTY_HOWTO (0x63),
160 EMPTY_HOWTO (0x64),
161 EMPTY_HOWTO (0x65),
162 EMPTY_HOWTO (0x66),
163 EMPTY_HOWTO (0x67),
164 EMPTY_HOWTO (0x68),
165 EMPTY_HOWTO (0x69),
166 EMPTY_HOWTO (0x6a),
167 EMPTY_HOWTO (0x6b),
168 EMPTY_HOWTO (0x6c),
169 EMPTY_HOWTO (0x6d),
170 EMPTY_HOWTO (0x6e),
171 EMPTY_HOWTO (0x6f),
172 EMPTY_HOWTO (0x70),
173 EMPTY_HOWTO (0x71),
174 EMPTY_HOWTO (0x72),
175 EMPTY_HOWTO (0x73),
176 EMPTY_HOWTO (0x74),
177 EMPTY_HOWTO (0x75),
178 EMPTY_HOWTO (0x76),
179 EMPTY_HOWTO (0x77),
180
181 /* These are internal. */
182 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
183 /* ---- ---- 4--- 3210. */
184#define R_RX_RH_ABS5p8B 0x78
07d6d2b8 185 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
c7927a3c 186#define R_RX_RH_ABS5p8W 0x79
07d6d2b8 187 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
c7927a3c 188#define R_RX_RH_ABS5p8L 0x7a
07d6d2b8 189 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 190 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
191 /* ---- -432 1--- 0---. */
192#define R_RX_RH_ABS5p5B 0x7b
07d6d2b8 193 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
c7927a3c 194#define R_RX_RH_ABS5p5W 0x7c
07d6d2b8 195 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
c7927a3c 196#define R_RX_RH_ABS5p5L 0x7d
07d6d2b8 197 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 198 /* A 4-bit unsigned immediate at bit position 8. */
199#define R_RX_RH_UIMM4p8 0x7e
07d6d2b8 200 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 201 /* A 4-bit negative unsigned immediate at bit position 8. */
202#define R_RX_RH_UNEG4p8 0x7f
07d6d2b8 203 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 204 /* End of internal relocs. */
205
07d6d2b8
AM		 206 RXREL (SYM, 2, 32, 0, dont, FALSE),
207 RXREL (OPneg, 2, 32, 0, dont, FALSE),
208 RXREL (OPadd, 2, 32, 0, dont, FALSE),
209 RXREL (OPsub, 2, 32, 0, dont, FALSE),
210 RXREL (OPmul, 2, 32, 0, dont, FALSE),
211 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 212 RXREL (OPshla, 2, 32, 0, dont, FALSE),
213 RXREL (OPshra, 2, 32, 0, dont, FALSE),
214 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
215 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
07d6d2b8
AM		 216 RXREL (OPand, 2, 32, 0, dont, FALSE),
217 RXREL (OPor, 2, 32, 0, dont, FALSE),
218 RXREL (OPxor, 2, 32, 0, dont, FALSE),
219 RXREL (OPnot, 2, 32, 0, dont, FALSE),
220 RXREL (OPmod, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 221 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
222 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
223};
224\f
225/* Map BFD reloc types to RX ELF reloc types. */
226
227struct rx_reloc_map
228{
229 bfd_reloc_code_real_type bfd_reloc_val;
07d6d2b8 230 unsigned int rx_reloc_val;
c7927a3c
NC		 231};
232
233static const struct rx_reloc_map rx_reloc_map [] =
234{
235 { BFD_RELOC_NONE, R_RX_NONE },
236 { BFD_RELOC_8, R_RX_DIR8S },
237 { BFD_RELOC_16, R_RX_DIR16S },
238 { BFD_RELOC_24, R_RX_DIR24S },
239 { BFD_RELOC_32, R_RX_DIR32 },
240 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
241 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
242 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
243 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
244 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
245 { BFD_RELOC_RX_8U, R_RX_DIR8U },
246 { BFD_RELOC_RX_16U, R_RX_DIR16U },
247 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
248 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
249 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
250 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
251 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
252 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
253 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
254 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
255 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
256 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
257 { BFD_RELOC_RX_SYM, R_RX_SYM },
258 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 259 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 260 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
261 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 262 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 263 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 264 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 265 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
266 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
267 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
268};
269
270#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
271
272static reloc_howto_type *
07d6d2b8 273rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
c7927a3c
NC		 274 bfd_reloc_code_real_type code)
275{
276 unsigned int i;
277
278 if (code == BFD_RELOC_RX_32_OP)
279 return rx_elf_howto_table + R_RX_DIR32;
280
0ba38529 281 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 282 if (rx_reloc_map [i].bfd_reloc_val == code)
283 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
284
285 return NULL;
286}
287
288static reloc_howto_type *
289rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
290{
291 unsigned int i;
292
293 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
294 if (rx_elf_howto_table[i].name != NULL
295 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
296 return rx_elf_howto_table + i;
297
298 return NULL;
299}
300
301/* Set the howto pointer for an RX ELF reloc. */
302
303static void
0aa13fee
AM		 304rx_info_to_howto_rela (bfd *abfd,
305 arelent *cache_ptr,
306 Elf_Internal_Rela *dst)
c7927a3c
NC		 307{
308 unsigned int r_type;
309
310 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 311 if (r_type >= (unsigned int) R_RX_max)
312 {
695344c0 313 /* xgettext:c-format */
0aa13fee
AM		 314 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
315 abfd, r_type);
5860e3f8
NC		 316 r_type = 0;
317 }
c7927a3c
NC		 318 cache_ptr->howto = rx_elf_howto_table + r_type;
319}
320\f
321static bfd_vma
07d6d2b8 322get_symbol_value (const char * name,
c7927a3c 323 struct bfd_link_info * info,
07d6d2b8
AM		 324 bfd * input_bfd,
325 asection * input_section,
c7927a3c
NC		 326 int offset)
327{
328 bfd_vma value = 0;
329 struct bfd_link_hash_entry * h;
330
331 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
332
333 if (h == NULL
334 || (h->type != bfd_link_hash_defined
335 && h->type != bfd_link_hash_defweak))
1a72702b 336 (*info->callbacks->undefined_symbol)
c7927a3c
NC		 337 (info, name, input_bfd, input_section, offset, TRUE);
338 else
339 value = (h->u.def.value
340 + h->u.def.section->output_section->vma
341 + h->u.def.section->output_offset);
342
343 return value;
344}
1a72702b 345
7a2f2d82 346static bfd_vma
07d6d2b8 347get_symbol_value_maybe (const char * name,
7a2f2d82
DD		 348 struct bfd_link_info * info)
349{
350 bfd_vma value = 0;
351 struct bfd_link_hash_entry * h;
352
353 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
354
355 if (h == NULL
356 || (h->type != bfd_link_hash_defined
357 && h->type != bfd_link_hash_defweak))
358 return 0;
359 else
360 value = (h->u.def.value
361 + h->u.def.section->output_section->vma
362 + h->u.def.section->output_offset);
363
364 return value;
365}
c7927a3c
NC		 366
367static bfd_vma
07d6d2b8
AM		 368get_gp (struct bfd_link_info * info,
369 bfd * abfd,
370 asection * sec,
c7927a3c
NC		 371 int offset)
372{
373 static bfd_boolean cached = FALSE;
374 static bfd_vma cached_value = 0;
375
376 if (!cached)
377 {
1a72702b 378 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
c7927a3c
NC		 379 cached = TRUE;
380 }
381 return cached_value;
382}
383
384static bfd_vma
1a72702b 385get_romstart (struct bfd_link_info * info,
07d6d2b8
AM		 386 bfd * abfd,
387 asection * sec,
c7927a3c
NC		 388 int offset)
389{
390 static bfd_boolean cached = FALSE;
391 static bfd_vma cached_value = 0;
392
393 if (!cached)
394 {
1a72702b 395 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
c7927a3c
NC		 396 cached = TRUE;
397 }
398 return cached_value;
399}
400
401static bfd_vma
1a72702b 402get_ramstart (struct bfd_link_info * info,
07d6d2b8
AM		 403 bfd * abfd,
404 asection * sec,
c7927a3c
NC		 405 int offset)
406{
407 static bfd_boolean cached = FALSE;
408 static bfd_vma cached_value = 0;
409
410 if (!cached)
411 {
1a72702b 412 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
c7927a3c
NC		 413 cached = TRUE;
414 }
415 return cached_value;
416}
417
418#define NUM_STACK_ENTRIES 16
419static int32_t rx_stack [ NUM_STACK_ENTRIES ];
420static unsigned int rx_stack_top;
421
422#define RX_STACK_PUSH(val) \
423 do \
424 { \
425 if (rx_stack_top < NUM_STACK_ENTRIES) \
07d6d2b8 426 rx_stack [rx_stack_top ++] = (val); \
c7927a3c 427 else \
07d6d2b8 428 r = bfd_reloc_dangerous; \
c7927a3c
NC		 429 } \
430 while (0)
431
432#define RX_STACK_POP(dest) \
433 do \
434 { \
435 if (rx_stack_top > 0) \
07d6d2b8 436 (dest) = rx_stack [-- rx_stack_top]; \
c7927a3c 437 else \
07d6d2b8 438 (dest) = 0, r = bfd_reloc_dangerous; \
c7927a3c
NC		 439 } \
440 while (0)
441
442/* Relocate an RX ELF section.
443 There is some attempt to make this function usable for many architectures,
444 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
445 if only to serve as a learning tool.
446
447 The RELOCATE_SECTION function is called by the new ELF backend linker
448 to handle the relocations for a section.
449
450 The relocs are always passed as Rela structures; if the section
451 actually uses Rel structures, the r_addend field will always be
452 zero.
453
454 This function is responsible for adjusting the section contents as
455 necessary, and (if using Rela relocs and generating a relocatable
456 output file) adjusting the reloc addend as necessary.
457
458 This function does not have to worry about setting the reloc
459 address or the reloc symbol index.
460
461 LOCAL_SYMS is a pointer to the swapped in local symbols.
462
463 LOCAL_SECTIONS is an array giving the section in the input file
464 corresponding to the st_shndx field of each local symbol.
465
466 The global hash table entry for the global symbols can be found
467 via elf_sym_hashes (input_bfd).
468
469 When generating relocatable output, this function must handle
470 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
471 going to be the section symbol corresponding to the output
472 section, which means that the addend must be adjusted
473 accordingly. */
474
475static bfd_boolean
476rx_elf_relocate_section
07d6d2b8 477 (bfd * output_bfd,
c7927a3c 478 struct bfd_link_info * info,
07d6d2b8
AM		 479 bfd * input_bfd,
480 asection * input_section,
481 bfd_byte * contents,
c7927a3c 482 Elf_Internal_Rela * relocs,
07d6d2b8
AM		 483 Elf_Internal_Sym * local_syms,
484 asection ** local_sections)
c7927a3c 485{
07d6d2b8 486 Elf_Internal_Shdr * symtab_hdr;
c7927a3c 487 struct elf_link_hash_entry ** sym_hashes;
07d6d2b8
AM		 488 Elf_Internal_Rela * rel;
489 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 490 bfd_boolean pid_mode;
491 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 492 const char * table_default_cache = NULL;
493 bfd_vma table_start_cache = 0;
494 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 495
496 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
497 pid_mode = TRUE;
498 else
499 pid_mode = FALSE;
c7927a3c
NC		 500
501 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
502 sym_hashes = elf_sym_hashes (input_bfd);
503 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 504 for (rel = relocs; rel < relend; rel ++)
505 {
07d6d2b8
AM		 506 reloc_howto_type * howto;
507 unsigned long r_symndx;
508 Elf_Internal_Sym * sym;
509 asection * sec;
c7927a3c 510 struct elf_link_hash_entry * h;
07d6d2b8
AM		 511 bfd_vma relocation;
512 bfd_reloc_status_type r;
513 const char * name = NULL;
514 bfd_boolean unresolved_reloc = TRUE;
515 int r_type;
c7927a3c
NC		 516
517 r_type = ELF32_R_TYPE (rel->r_info);
518 r_symndx = ELF32_R_SYM (rel->r_info);
519
520 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
07d6d2b8 521 h = NULL;
c7927a3c
NC		 522 sym = NULL;
523 sec = NULL;
524 relocation = 0;
525
d4cb0ea0
NC		 526 if (rx_stack_top == 0)
527 saw_subtract = FALSE;
528
c7927a3c
NC		 529 if (r_symndx < symtab_hdr->sh_info)
530 {
531 sym = local_syms + r_symndx;
532 sec = local_sections [r_symndx];
533 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
534
535 name = bfd_elf_string_from_elf_section
536 (input_bfd, symtab_hdr->sh_link, sym->st_name);
537 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
538 }
539 else
540 {
62d887d4 541 bfd_boolean warned, ignored;
c7927a3c
NC		 542
543 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
544 r_symndx, symtab_hdr, sym_hashes, h,
545 sec, relocation, unresolved_reloc,
62d887d4 546 warned, ignored);
c7927a3c
NC		 547
548 name = h->root.root.string;
549 }
550
7a2f2d82
DD		 551 if (strncmp (name, "$tableentry$default$", 20) == 0)
552 {
553 bfd_vma entry_vma;
554 int idx;
555 char *buf;
7a2f2d82
DD		 556
557 if (table_default_cache != name)
558 {
559
560 /* All relocs for a given table should be to the same
561 (weak) default symbol) so we can use it to detect a
562 cache miss. We use the offset into the table to find
563 the "real" symbol. Calculate and store the table's
564 offset here. */
565
566 table_default_cache = name;
567
568 /* We have already done error checking in rx_table_find(). */
569
570 buf = (char *) malloc (13 + strlen (name + 20));
571
572 sprintf (buf, "$tablestart$%s", name + 20);
7a2f2d82 573 table_start_cache = get_symbol_value (buf,
7a2f2d82
DD		 574 info,
575 input_bfd,
576 input_section,
577 rel->r_offset);
578
579 sprintf (buf, "$tableend$%s", name + 20);
7a2f2d82 580 table_end_cache = get_symbol_value (buf,
7a2f2d82
DD		 581 info,
582 input_bfd,
583 input_section,
584 rel->r_offset);
585
586 free (buf);
587 }
588
589 entry_vma = (input_section->output_section->vma
590 + input_section->output_offset
591 + rel->r_offset);
592
593 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
594 {
695344c0 595 /* xgettext:c-format */
871b3ab2 596 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"),
7a2f2d82
DD		 597 input_bfd, input_section,
598 name);
599 }
600 else if ((int) (entry_vma - table_start_cache) % 4)
601 {
695344c0 602 /* xgettext:c-format */
871b3ab2 603 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"),
7a2f2d82
DD		 604 input_bfd, input_section,
605 name);
606 }
607 else
608 {
609 idx = (int) (entry_vma - table_start_cache) / 4;
610
611 /* This will look like $tableentry$<N>$<name> */
612 buf = (char *) malloc (12 + 20 + strlen (name + 20));
613 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
614
615 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
616
617 if (h)
618 {
619 relocation = (h->root.u.def.value
620 + h->root.u.def.section->output_section->vma
621 + h->root.u.def.section->output_offset);;
622 }
623
624 free (buf);
625 }
626 }
627
dbaa2011 628 if (sec != NULL && discarded_section (sec))
e4067dbb 629 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 630 rel, 1, relend, howto, 0, contents);
c7927a3c 631
0e1862bb 632 if (bfd_link_relocatable (info))
c7927a3c
NC		 633 {
634 /* This is a relocatable link. We don't have to change
07d6d2b8
AM		 635 anything, unless the reloc is against a section symbol,
636 in which case we have to adjust according to where the
637 section symbol winds up in the output section. */
c7927a3c
NC		 638 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
639 rel->r_addend += sec->output_offset;
640 continue;
641 }
642
643 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
644 /* If the symbol is undefined and weak
645 then the relocation resolves to zero. */
646 relocation = 0;
647 else
648 {
649 if (howto->pc_relative)
650 {
651 relocation -= (input_section->output_section->vma
652 + input_section->output_offset
653 + rel->r_offset);
654 if (r_type != R_RX_RH_3_PCREL
655 && r_type != R_RX_DIR3U_PCREL)
656 relocation ++;
657 }
658
659 relocation += rel->r_addend;
660 }
661
662 r = bfd_reloc_ok;
663
38f14ab8
AM		 664#define RANGE(a,b) \
665 if (a > (long) relocation || (long) relocation > b) \
666 r = bfd_reloc_overflow
667#define ALIGN(m) \
668 if (relocation & m) \
669 r = bfd_reloc_other
670#define OP(i) \
671 (contents[rel->r_offset + (i)])
c7927a3c 672#define WARN_REDHAT(type) \
38f14ab8
AM		 673 /* xgettext:c-format */ \
674 _bfd_error_handler \
675 (_("%pB:%pA: warning: deprecated Red Hat reloc " \
676 "%s detected against: %s"), \
677 input_bfd, input_section, #type, name)
c7927a3c 678
d4cb0ea0
NC		 679 /* Check for unsafe relocs in PID mode. These are any relocs where
680 an absolute address is being computed. There are special cases
681 for relocs against symbols that are known to be referenced in
682 crt0.o before the PID base address register has been initialised. */
683#define UNSAFE_FOR_PID \
684 do \
685 { \
686 if (pid_mode \
07d6d2b8 687 && sec != NULL \
d4cb0ea0
NC		 688 && sec->flags & SEC_READONLY \
689 && !(input_section->flags & SEC_DEBUGGING) \
690 && strcmp (name, "__pid_base") != 0 \
691 && strcmp (name, "__gp") != 0 \
692 && strcmp (name, "__romdatastart") != 0 \
693 && !saw_subtract) \
695344c0 694 /* xgettext:c-format */ \
2dcf00ce
AM		 695 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \
696 "at %#" PRIx64 " (against %s in %s)"), \
d4cb0ea0 697 input_bfd, input_section, howto->name, \
2dcf00ce
AM		 698 (uint64_t) (input_section->output_section->vma \
699 + input_section->output_offset \
700 + rel->r_offset), \
d4cb0ea0
NC		 701 name, sec->name); \
702 } \
703 while (0)
704
c7927a3c
NC		 705 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
706 switch (r_type)
707 {
708 case R_RX_NONE:
709 break;
710
711 case R_RX_RH_RELAX:
712 break;
713
714 case R_RX_RH_3_PCREL:
715 WARN_REDHAT ("RX_RH_3_PCREL");
716 RANGE (3, 10);
717 OP (0) &= 0xf8;
718 OP (0) |= relocation & 0x07;
719 break;
720
721 case R_RX_RH_8_NEG:
722 WARN_REDHAT ("RX_RH_8_NEG");
723 relocation = - relocation;
1a0670f3 724 /* Fall through. */
c7927a3c 725 case R_RX_DIR8S_PCREL:
d4cb0ea0 726 UNSAFE_FOR_PID;
c7927a3c
NC		 727 RANGE (-128, 127);
728 OP (0) = relocation;
729 break;
730
731 case R_RX_DIR8S:
d4cb0ea0 732 UNSAFE_FOR_PID;
c7927a3c
NC		 733 RANGE (-128, 255);
734 OP (0) = relocation;
735 break;
736
737 case R_RX_DIR8U:
d4cb0ea0 738 UNSAFE_FOR_PID;
c7927a3c
NC		 739 RANGE (0, 255);
740 OP (0) = relocation;
741 break;
742
743 case R_RX_RH_16_NEG:
744 WARN_REDHAT ("RX_RH_16_NEG");
745 relocation = - relocation;
1a0670f3 746 /* Fall through. */
c7927a3c 747 case R_RX_DIR16S_PCREL:
d4cb0ea0 748 UNSAFE_FOR_PID;
c7927a3c
NC		 749 RANGE (-32768, 32767);
750#if RX_OPCODE_BIG_ENDIAN
751#else
752 OP (0) = relocation;
753 OP (1) = relocation >> 8;
754#endif
755 break;
756
757 case R_RX_RH_16_OP:
758 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 759 UNSAFE_FOR_PID;
c7927a3c
NC		 760 RANGE (-32768, 32767);
761#if RX_OPCODE_BIG_ENDIAN
762 OP (1) = relocation;
763 OP (0) = relocation >> 8;
764#else
765 OP (0) = relocation;
766 OP (1) = relocation >> 8;
767#endif
768 break;
769
770 case R_RX_DIR16S:
d4cb0ea0 771 UNSAFE_FOR_PID;
c7927a3c
NC		 772 RANGE (-32768, 65535);
773 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
774 {
775 OP (1) = relocation;
776 OP (0) = relocation >> 8;
777 }
778 else
779 {
780 OP (0) = relocation;
781 OP (1) = relocation >> 8;
782 }
783 break;
784
785 case R_RX_DIR16U:
d4cb0ea0 786 UNSAFE_FOR_PID;
c7927a3c
NC		 787 RANGE (0, 65536);
788#if RX_OPCODE_BIG_ENDIAN
789 OP (1) = relocation;
790 OP (0) = relocation >> 8;
791#else
792 OP (0) = relocation;
793 OP (1) = relocation >> 8;
794#endif
795 break;
796
797 case R_RX_DIR16:
d4cb0ea0 798 UNSAFE_FOR_PID;
c7927a3c
NC		 799 RANGE (-32768, 65536);
800#if RX_OPCODE_BIG_ENDIAN
801 OP (1) = relocation;
802 OP (0) = relocation >> 8;
803#else
804 OP (0) = relocation;
805 OP (1) = relocation >> 8;
806#endif
807 break;
808
809 case R_RX_DIR16_REV:
d4cb0ea0 810 UNSAFE_FOR_PID;
c7927a3c
NC		 811 RANGE (-32768, 65536);
812#if RX_OPCODE_BIG_ENDIAN
813 OP (0) = relocation;
814 OP (1) = relocation >> 8;
815#else
816 OP (1) = relocation;
817 OP (0) = relocation >> 8;
818#endif
819 break;
820
821 case R_RX_DIR3U_PCREL:
822 RANGE (3, 10);
823 OP (0) &= 0xf8;
824 OP (0) |= relocation & 0x07;
825 break;
826
827 case R_RX_RH_24_NEG:
d4cb0ea0 828 UNSAFE_FOR_PID;
c7927a3c
NC		 829 WARN_REDHAT ("RX_RH_24_NEG");
830 relocation = - relocation;
1a0670f3 831 /* Fall through. */
c7927a3c
NC		 832 case R_RX_DIR24S_PCREL:
833 RANGE (-0x800000, 0x7fffff);
834#if RX_OPCODE_BIG_ENDIAN
835 OP (2) = relocation;
836 OP (1) = relocation >> 8;
837 OP (0) = relocation >> 16;
838#else
839 OP (0) = relocation;
840 OP (1) = relocation >> 8;
841 OP (2) = relocation >> 16;
842#endif
843 break;
844
845 case R_RX_RH_24_OP:
d4cb0ea0 846 UNSAFE_FOR_PID;
c7927a3c
NC		 847 WARN_REDHAT ("RX_RH_24_OP");
848 RANGE (-0x800000, 0x7fffff);
849#if RX_OPCODE_BIG_ENDIAN
850 OP (2) = relocation;
851 OP (1) = relocation >> 8;
852 OP (0) = relocation >> 16;
853#else
854 OP (0) = relocation;
855 OP (1) = relocation >> 8;
856 OP (2) = relocation >> 16;
857#endif
858 break;
859
860 case R_RX_DIR24S:
d4cb0ea0 861 UNSAFE_FOR_PID;
c7927a3c
NC		 862 RANGE (-0x800000, 0x7fffff);
863 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
864 {
865 OP (2) = relocation;
866 OP (1) = relocation >> 8;
867 OP (0) = relocation >> 16;
868 }
869 else
870 {
871 OP (0) = relocation;
872 OP (1) = relocation >> 8;
873 OP (2) = relocation >> 16;
874 }
875 break;
876
877 case R_RX_RH_24_UNS:
d4cb0ea0 878 UNSAFE_FOR_PID;
c7927a3c
NC		 879 WARN_REDHAT ("RX_RH_24_UNS");
880 RANGE (0, 0xffffff);
881#if RX_OPCODE_BIG_ENDIAN
882 OP (2) = relocation;
883 OP (1) = relocation >> 8;
884 OP (0) = relocation >> 16;
885#else
886 OP (0) = relocation;
887 OP (1) = relocation >> 8;
888 OP (2) = relocation >> 16;
889#endif
890 break;
891
892 case R_RX_RH_32_NEG:
d4cb0ea0 893 UNSAFE_FOR_PID;
c7927a3c
NC		 894 WARN_REDHAT ("RX_RH_32_NEG");
895 relocation = - relocation;
896#if RX_OPCODE_BIG_ENDIAN
897 OP (3) = relocation;
898 OP (2) = relocation >> 8;
899 OP (1) = relocation >> 16;
900 OP (0) = relocation >> 24;
901#else
902 OP (0) = relocation;
903 OP (1) = relocation >> 8;
904 OP (2) = relocation >> 16;
905 OP (3) = relocation >> 24;
906#endif
907 break;
908
909 case R_RX_RH_32_OP:
d4cb0ea0 910 UNSAFE_FOR_PID;
c7927a3c
NC		 911 WARN_REDHAT ("RX_RH_32_OP");
912#if RX_OPCODE_BIG_ENDIAN
913 OP (3) = relocation;
914 OP (2) = relocation >> 8;
915 OP (1) = relocation >> 16;
916 OP (0) = relocation >> 24;
917#else
918 OP (0) = relocation;
919 OP (1) = relocation >> 8;
920 OP (2) = relocation >> 16;
921 OP (3) = relocation >> 24;
922#endif
923 break;
924
925 case R_RX_DIR32:
926 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
927 {
928 OP (3) = relocation;
929 OP (2) = relocation >> 8;
930 OP (1) = relocation >> 16;
931 OP (0) = relocation >> 24;
932 }
933 else
934 {
935 OP (0) = relocation;
936 OP (1) = relocation >> 8;
937 OP (2) = relocation >> 16;
938 OP (3) = relocation >> 24;
939 }
940 break;
941
942 case R_RX_DIR32_REV:
943 if (BIGE (output_bfd))
944 {
945 OP (0) = relocation;
946 OP (1) = relocation >> 8;
947 OP (2) = relocation >> 16;
948 OP (3) = relocation >> 24;
949 }
950 else
951 {
952 OP (3) = relocation;
953 OP (2) = relocation >> 8;
954 OP (1) = relocation >> 16;
955 OP (0) = relocation >> 24;
956 }
957 break;
958
959 case R_RX_RH_DIFF:
960 {
961 bfd_vma val;
962 WARN_REDHAT ("RX_RH_DIFF");
963 val = bfd_get_32 (output_bfd, & OP (0));
964 val -= relocation;
965 bfd_put_32 (output_bfd, val, & OP (0));
966 }
967 break;
968
969 case R_RX_RH_GPRELB:
970 WARN_REDHAT ("RX_RH_GPRELB");
1a72702b 971 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 972 RANGE (0, 65535);
973#if RX_OPCODE_BIG_ENDIAN
974 OP (1) = relocation;
975 OP (0) = relocation >> 8;
976#else
977 OP (0) = relocation;
978 OP (1) = relocation >> 8;
979#endif
980 break;
981
982 case R_RX_RH_GPRELW:
983 WARN_REDHAT ("RX_RH_GPRELW");
1a72702b 984 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 985 ALIGN (1);
986 relocation >>= 1;
987 RANGE (0, 65535);
988#if RX_OPCODE_BIG_ENDIAN
989 OP (1) = relocation;
990 OP (0) = relocation >> 8;
991#else
992 OP (0) = relocation;
993 OP (1) = relocation >> 8;
994#endif
995 break;
996
997 case R_RX_RH_GPRELL:
998 WARN_REDHAT ("RX_RH_GPRELL");
1a72702b 999 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 1000 ALIGN (3);
1001 relocation >>= 2;
1002 RANGE (0, 65535);
1003#if RX_OPCODE_BIG_ENDIAN
1004 OP (1) = relocation;
1005 OP (0) = relocation >> 8;
1006#else
1007 OP (0) = relocation;
1008 OP (1) = relocation >> 8;
1009#endif
1010 break;
1011
1012 /* Internal relocations just for relaxation: */
1013 case R_RX_RH_ABS5p5B:
1014 RX_STACK_POP (relocation);
1015 RANGE (0, 31);
1016 OP (0) &= 0xf8;
1017 OP (0) |= relocation >> 2;
1018 OP (1) &= 0x77;
1019 OP (1) |= (relocation << 6) & 0x80;
1020 OP (1) |= (relocation << 3) & 0x08;
1021 break;
1022
1023 case R_RX_RH_ABS5p5W:
1024 RX_STACK_POP (relocation);
1025 RANGE (0, 62);
1026 ALIGN (1);
1027 relocation >>= 1;
1028 OP (0) &= 0xf8;
1029 OP (0) |= relocation >> 2;
1030 OP (1) &= 0x77;
1031 OP (1) |= (relocation << 6) & 0x80;
1032 OP (1) |= (relocation << 3) & 0x08;
1033 break;
1034
1035 case R_RX_RH_ABS5p5L:
1036 RX_STACK_POP (relocation);
1037 RANGE (0, 124);
1038 ALIGN (3);
1039 relocation >>= 2;
1040 OP (0) &= 0xf8;
1041 OP (0) |= relocation >> 2;
1042 OP (1) &= 0x77;
1043 OP (1) |= (relocation << 6) & 0x80;
1044 OP (1) |= (relocation << 3) & 0x08;
1045 break;
1046
1047 case R_RX_RH_ABS5p8B:
1048 RX_STACK_POP (relocation);
1049 RANGE (0, 31);
1050 OP (0) &= 0x70;
1051 OP (0) |= (relocation << 3) & 0x80;
1052 OP (0) |= relocation & 0x0f;
1053 break;
1054
1055 case R_RX_RH_ABS5p8W:
1056 RX_STACK_POP (relocation);
1057 RANGE (0, 62);
1058 ALIGN (1);
1059 relocation >>= 1;
1060 OP (0) &= 0x70;
1061 OP (0) |= (relocation << 3) & 0x80;
1062 OP (0) |= relocation & 0x0f;
1063 break;
1064
1065 case R_RX_RH_ABS5p8L:
1066 RX_STACK_POP (relocation);
1067 RANGE (0, 124);
1068 ALIGN (3);
1069 relocation >>= 2;
1070 OP (0) &= 0x70;
1071 OP (0) |= (relocation << 3) & 0x80;
1072 OP (0) |= relocation & 0x0f;
1073 break;
1074
1075 case R_RX_RH_UIMM4p8:
1076 RANGE (0, 15);
1077 OP (0) &= 0x0f;
1078 OP (0) |= relocation << 4;
1079 break;
1080
1081 case R_RX_RH_UNEG4p8:
1082 RANGE (-15, 0);
1083 OP (0) &= 0x0f;
1084 OP (0) |= (-relocation) << 4;
1085 break;
1086
1087 /* Complex reloc handling: */
1088
1089 case R_RX_ABS32:
d4cb0ea0 1090 UNSAFE_FOR_PID;
c7927a3c
NC		 1091 RX_STACK_POP (relocation);
1092#if RX_OPCODE_BIG_ENDIAN
1093 OP (3) = relocation;
1094 OP (2) = relocation >> 8;
1095 OP (1) = relocation >> 16;
1096 OP (0) = relocation >> 24;
1097#else
1098 OP (0) = relocation;
1099 OP (1) = relocation >> 8;
1100 OP (2) = relocation >> 16;
1101 OP (3) = relocation >> 24;
1102#endif
1103 break;
1104
1105 case R_RX_ABS32_REV:
d4cb0ea0 1106 UNSAFE_FOR_PID;
c7927a3c
NC		 1107 RX_STACK_POP (relocation);
1108#if RX_OPCODE_BIG_ENDIAN
1109 OP (0) = relocation;
1110 OP (1) = relocation >> 8;
1111 OP (2) = relocation >> 16;
1112 OP (3) = relocation >> 24;
1113#else
1114 OP (3) = relocation;
1115 OP (2) = relocation >> 8;
1116 OP (1) = relocation >> 16;
1117 OP (0) = relocation >> 24;
1118#endif
1119 break;
1120
1121 case R_RX_ABS24S_PCREL:
1122 case R_RX_ABS24S:
d4cb0ea0 1123 UNSAFE_FOR_PID;
c7927a3c
NC		 1124 RX_STACK_POP (relocation);
1125 RANGE (-0x800000, 0x7fffff);
1126 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1127 {
1128 OP (2) = relocation;
1129 OP (1) = relocation >> 8;
1130 OP (0) = relocation >> 16;
1131 }
1132 else
1133 {
1134 OP (0) = relocation;
1135 OP (1) = relocation >> 8;
1136 OP (2) = relocation >> 16;
1137 }
1138 break;
1139
1140 case R_RX_ABS16:
d4cb0ea0 1141 UNSAFE_FOR_PID;
c7927a3c
NC		 1142 RX_STACK_POP (relocation);
1143 RANGE (-32768, 65535);
1144#if RX_OPCODE_BIG_ENDIAN
1145 OP (1) = relocation;
1146 OP (0) = relocation >> 8;
1147#else
1148 OP (0) = relocation;
1149 OP (1) = relocation >> 8;
1150#endif
1151 break;
1152
1153 case R_RX_ABS16_REV:
d4cb0ea0 1154 UNSAFE_FOR_PID;
c7927a3c
NC		 1155 RX_STACK_POP (relocation);
1156 RANGE (-32768, 65535);
1157#if RX_OPCODE_BIG_ENDIAN
1158 OP (0) = relocation;
1159 OP (1) = relocation >> 8;
1160#else
1161 OP (1) = relocation;
1162 OP (0) = relocation >> 8;
1163#endif
1164 break;
1165
1166 case R_RX_ABS16S_PCREL:
1167 case R_RX_ABS16S:
1168 RX_STACK_POP (relocation);
1169 RANGE (-32768, 32767);
1170 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1171 {
1172 OP (1) = relocation;
1173 OP (0) = relocation >> 8;
1174 }
1175 else
1176 {
1177 OP (0) = relocation;
1178 OP (1) = relocation >> 8;
1179 }
1180 break;
1181
1182 case R_RX_ABS16U:
d4cb0ea0 1183 UNSAFE_FOR_PID;
c7927a3c
NC		 1184 RX_STACK_POP (relocation);
1185 RANGE (0, 65536);
1186#if RX_OPCODE_BIG_ENDIAN
1187 OP (1) = relocation;
1188 OP (0) = relocation >> 8;
1189#else
1190 OP (0) = relocation;
1191 OP (1) = relocation >> 8;
1192#endif
1193 break;
1194
1195 case R_RX_ABS16UL:
d4cb0ea0 1196 UNSAFE_FOR_PID;
c7927a3c
NC		 1197 RX_STACK_POP (relocation);
1198 relocation >>= 2;
1199 RANGE (0, 65536);
1200#if RX_OPCODE_BIG_ENDIAN
1201 OP (1) = relocation;
1202 OP (0) = relocation >> 8;
1203#else
1204 OP (0) = relocation;
1205 OP (1) = relocation >> 8;
1206#endif
1207 break;
1208
1209 case R_RX_ABS16UW:
d4cb0ea0 1210 UNSAFE_FOR_PID;
c7927a3c
NC		 1211 RX_STACK_POP (relocation);
1212 relocation >>= 1;
1213 RANGE (0, 65536);
1214#if RX_OPCODE_BIG_ENDIAN
1215 OP (1) = relocation;
1216 OP (0) = relocation >> 8;
1217#else
1218 OP (0) = relocation;
1219 OP (1) = relocation >> 8;
1220#endif
1221 break;
1222
1223 case R_RX_ABS8:
d4cb0ea0 1224 UNSAFE_FOR_PID;
c7927a3c
NC		 1225 RX_STACK_POP (relocation);
1226 RANGE (-128, 255);
1227 OP (0) = relocation;
1228 break;
1229
1230 case R_RX_ABS8U:
d4cb0ea0 1231 UNSAFE_FOR_PID;
c7927a3c
NC		 1232 RX_STACK_POP (relocation);
1233 RANGE (0, 255);
1234 OP (0) = relocation;
1235 break;
1236
1237 case R_RX_ABS8UL:
d4cb0ea0 1238 UNSAFE_FOR_PID;
c7927a3c
NC		 1239 RX_STACK_POP (relocation);
1240 relocation >>= 2;
1241 RANGE (0, 255);
1242 OP (0) = relocation;
1243 break;
1244
1245 case R_RX_ABS8UW:
d4cb0ea0 1246 UNSAFE_FOR_PID;
c7927a3c
NC		 1247 RX_STACK_POP (relocation);
1248 relocation >>= 1;
1249 RANGE (0, 255);
1250 OP (0) = relocation;
1251 break;
1252
c7927a3c 1253 case R_RX_ABS8S:
d4cb0ea0 1254 UNSAFE_FOR_PID;
1a0670f3 1255 /* Fall through. */
d4cb0ea0 1256 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1257 RX_STACK_POP (relocation);
1258 RANGE (-128, 127);
1259 OP (0) = relocation;
1260 break;
1261
1262 case R_RX_SYM:
1263 if (r_symndx < symtab_hdr->sh_info)
1264 RX_STACK_PUSH (sec->output_section->vma
1265 + sec->output_offset
d4cb0ea0
NC		 1266 + sym->st_value
1267 + rel->r_addend);
c7927a3c
NC		 1268 else
1269 {
1270 if (h != NULL
1271 && (h->root.type == bfd_link_hash_defined
1272 || h->root.type == bfd_link_hash_defweak))
1273 RX_STACK_PUSH (h->root.u.def.value
1274 + sec->output_section->vma
d4cb0ea0
NC		 1275 + sec->output_offset
1276 + rel->r_addend);
c7927a3c 1277 else
38f14ab8
AM		 1278 _bfd_error_handler
1279 (_("warning: RX_SYM reloc with an unknown symbol"));
c7927a3c
NC		 1280 }
1281 break;
1282
1283 case R_RX_OPneg:
1284 {
1285 int32_t tmp;
1286
ee181c72 1287 saw_subtract = TRUE;
c7927a3c
NC		 1288 RX_STACK_POP (tmp);
1289 tmp = - tmp;
1290 RX_STACK_PUSH (tmp);
1291 }
1292 break;
1293
1294 case R_RX_OPadd:
1295 {
1296 int32_t tmp1, tmp2;
1297
1298 RX_STACK_POP (tmp1);
1299 RX_STACK_POP (tmp2);
1300 tmp1 += tmp2;
1301 RX_STACK_PUSH (tmp1);
1302 }
1303 break;
1304
1305 case R_RX_OPsub:
1306 {
1307 int32_t tmp1, tmp2;
1308
d4cb0ea0 1309 saw_subtract = TRUE;
c7927a3c
NC		 1310 RX_STACK_POP (tmp1);
1311 RX_STACK_POP (tmp2);
1312 tmp2 -= tmp1;
1313 RX_STACK_PUSH (tmp2);
1314 }
1315 break;
1316
1317 case R_RX_OPmul:
1318 {
1319 int32_t tmp1, tmp2;
1320
1321 RX_STACK_POP (tmp1);
1322 RX_STACK_POP (tmp2);
1323 tmp1 *= tmp2;
1324 RX_STACK_PUSH (tmp1);
1325 }
1326 break;
1327
1328 case R_RX_OPdiv:
1329 {
1330 int32_t tmp1, tmp2;
1331
1332 RX_STACK_POP (tmp1);
1333 RX_STACK_POP (tmp2);
1334 tmp1 /= tmp2;
1335 RX_STACK_PUSH (tmp1);
1336 }
1337 break;
1338
1339 case R_RX_OPshla:
1340 {
1341 int32_t tmp1, tmp2;
1342
1343 RX_STACK_POP (tmp1);
1344 RX_STACK_POP (tmp2);
1345 tmp1 <<= tmp2;
1346 RX_STACK_PUSH (tmp1);
1347 }
1348 break;
1349
1350 case R_RX_OPshra:
1351 {
1352 int32_t tmp1, tmp2;
1353
1354 RX_STACK_POP (tmp1);
1355 RX_STACK_POP (tmp2);
1356 tmp1 >>= tmp2;
1357 RX_STACK_PUSH (tmp1);
1358 }
1359 break;
1360
1361 case R_RX_OPsctsize:
1362 RX_STACK_PUSH (input_section->size);
1363 break;
1364
1365 case R_RX_OPscttop:
1366 RX_STACK_PUSH (input_section->output_section->vma);
1367 break;
1368
1369 case R_RX_OPand:
1370 {
1371 int32_t tmp1, tmp2;
1372
1373 RX_STACK_POP (tmp1);
1374 RX_STACK_POP (tmp2);
1375 tmp1 &= tmp2;
1376 RX_STACK_PUSH (tmp1);
1377 }
1378 break;
1379
1380 case R_RX_OPor:
1381 {
1382 int32_t tmp1, tmp2;
1383
1384 RX_STACK_POP (tmp1);
1385 RX_STACK_POP (tmp2);
1386 tmp1 |= tmp2;
1387 RX_STACK_PUSH (tmp1);
1388 }
1389 break;
1390
1391 case R_RX_OPxor:
1392 {
1393 int32_t tmp1, tmp2;
1394
1395 RX_STACK_POP (tmp1);
1396 RX_STACK_POP (tmp2);
1397 tmp1 ^= tmp2;
1398 RX_STACK_PUSH (tmp1);
1399 }
1400 break;
1401
1402 case R_RX_OPnot:
1403 {
1404 int32_t tmp;
1405
1406 RX_STACK_POP (tmp);
1407 tmp = ~ tmp;
1408 RX_STACK_PUSH (tmp);
1409 }
1410 break;
1411
1412 case R_RX_OPmod:
1413 {
1414 int32_t tmp1, tmp2;
1415
1416 RX_STACK_POP (tmp1);
1417 RX_STACK_POP (tmp2);
1418 tmp1 %= tmp2;
1419 RX_STACK_PUSH (tmp1);
1420 }
1421 break;
1422
1423 case R_RX_OPromtop:
1a72702b 1424 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1425 break;
1426
1427 case R_RX_OPramtop:
1a72702b 1428 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1429 break;
1430
1431 default:
1432 r = bfd_reloc_notsupported;
1433 break;
1434 }
1435
1436 if (r != bfd_reloc_ok)
1437 {
1438 const char * msg = NULL;
1439
1440 switch (r)
1441 {
1442 case bfd_reloc_overflow:
1443 /* Catch the case of a missing function declaration
1444 and emit a more helpful error message. */
1445 if (r_type == R_RX_DIR24S_PCREL)
695344c0 1446 /* xgettext:c-format */
871b3ab2 1447 msg = _("%pB(%pA): error: call to undefined function '%s'");
c7927a3c 1448 else
1a72702b 1449 (*info->callbacks->reloc_overflow)
c7927a3c
NC		 1450 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1451 input_bfd, input_section, rel->r_offset);
1452 break;
1453
1454 case bfd_reloc_undefined:
1a72702b
AM		 1455 (*info->callbacks->undefined_symbol)
1456 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
c7927a3c
NC		 1457 break;
1458
1459 case bfd_reloc_other:
695344c0 1460 /* xgettext:c-format */
871b3ab2 1461 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
c7927a3c
NC		 1462 break;
1463
1464 case bfd_reloc_outofrange:
695344c0 1465 /* xgettext:c-format */
871b3ab2 1466 msg = _("%pB(%pA): internal error: out of range error");
c7927a3c
NC		 1467 break;
1468
1469 case bfd_reloc_notsupported:
695344c0 1470 /* xgettext:c-format */
871b3ab2 1471 msg = _("%pB(%pA): internal error: unsupported relocation error");
c7927a3c
NC		 1472 break;
1473
1474 case bfd_reloc_dangerous:
695344c0 1475 /* xgettext:c-format */
871b3ab2 1476 msg = _("%pB(%pA): internal error: dangerous relocation");
c7927a3c
NC		 1477 break;
1478
1479 default:
695344c0 1480 /* xgettext:c-format */
871b3ab2 1481 msg = _("%pB(%pA): internal error: unknown error");
c7927a3c
NC		 1482 break;
1483 }
1484
1485 if (msg)
1486 _bfd_error_handler (msg, input_bfd, input_section, name);
c7927a3c
NC		 1487 }
1488 }
1489
1490 return TRUE;
1491}
1492\f
1493/* Relaxation Support. */
1494
1495/* Progression of relocations from largest operand size to smallest
1496 operand size. */
1497
1498static int
1499next_smaller_reloc (int r)
1500{
1501 switch (r)
1502 {
1503 case R_RX_DIR32: return R_RX_DIR24S;
1504 case R_RX_DIR24S: return R_RX_DIR16S;
1505 case R_RX_DIR16S: return R_RX_DIR8S;
1506 case R_RX_DIR8S: return R_RX_NONE;
1507
1508 case R_RX_DIR16: return R_RX_DIR8;
1509 case R_RX_DIR8: return R_RX_NONE;
1510
1511 case R_RX_DIR16U: return R_RX_DIR8U;
1512 case R_RX_DIR8U: return R_RX_NONE;
1513
1514 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1515 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1516 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1517
1518 case R_RX_DIR16UL: return R_RX_DIR8UL;
1519 case R_RX_DIR8UL: return R_RX_NONE;
1520 case R_RX_DIR16UW: return R_RX_DIR8UW;
1521 case R_RX_DIR8UW: return R_RX_NONE;
1522
1523 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1524 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1525 case R_RX_RH_16_OP: return R_RX_DIR8;
1526
1527 case R_RX_ABS32: return R_RX_ABS24S;
1528 case R_RX_ABS24S: return R_RX_ABS16S;
1529 case R_RX_ABS16: return R_RX_ABS8;
1530 case R_RX_ABS16U: return R_RX_ABS8U;
1531 case R_RX_ABS16S: return R_RX_ABS8S;
1532 case R_RX_ABS8: return R_RX_NONE;
1533 case R_RX_ABS8U: return R_RX_NONE;
1534 case R_RX_ABS8S: return R_RX_NONE;
1535 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1536 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1537 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1538 case R_RX_ABS16UL: return R_RX_ABS8UL;
1539 case R_RX_ABS16UW: return R_RX_ABS8UW;
1540 case R_RX_ABS8UL: return R_RX_NONE;
1541 case R_RX_ABS8UW: return R_RX_NONE;
1542 }
1543 return r;
1544};
1545
1546/* Delete some bytes from a section while relaxing. */
1547
1548static bfd_boolean
1549elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
5ee4a06a
NC		 1550 Elf_Internal_Rela *alignment_rel, int force_snip,
1551 Elf_Internal_Rela *irelstart)
c7927a3c
NC		 1552{
1553 Elf_Internal_Shdr * symtab_hdr;
07d6d2b8
AM		 1554 unsigned int sec_shndx;
1555 bfd_byte * contents;
c7927a3c
NC		 1556 Elf_Internal_Rela * irel;
1557 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1558 Elf_Internal_Sym * isym;
1559 Elf_Internal_Sym * isymend;
07d6d2b8
AM		 1560 bfd_vma toaddr;
1561 unsigned int symcount;
c7927a3c
NC		 1562 struct elf_link_hash_entry ** sym_hashes;
1563 struct elf_link_hash_entry ** end_hashes;
1564
1565 if (!alignment_rel)
1566 force_snip = 1;
1567
1568 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1569
1570 contents = elf_section_data (sec)->this_hdr.contents;
1571
1572 /* The deletion must stop at the next alignment boundary, if
1573 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1574 toaddr = sec->size;
1575 if (alignment_rel)
1576 toaddr = alignment_rel->r_offset;
1577
07d6d2b8 1578 BFD_ASSERT (toaddr > addr);
9c761a55 1579
c7927a3c
NC		 1580 /* Actually delete the bytes. */
1581 memmove (contents + addr, contents + addr + count,
1582 (size_t) (toaddr - addr - count));
1583
1584 /* If we don't have an alignment marker to worry about, we can just
1585 shrink the section. Otherwise, we have to fill in the newly
1586 created gap with NOP insns (0x03). */
1587 if (force_snip)
1588 sec->size -= count;
1589 else
1590 memset (contents + toaddr - count, 0x03, count);
1591
5ee4a06a
NC		 1592 irel = irelstart;
1593 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1594 irelend = irel + sec->reloc_count;
1595
c7927a3c 1596 /* Adjust all the relocs. */
9c761a55 1597 for (; irel < irelend; irel++)
c7927a3c
NC		 1598 {
1599 /* Get the new reloc address. */
1600 if (irel->r_offset > addr
1601 && (irel->r_offset < toaddr
1602 || (force_snip && irel->r_offset == toaddr)))
1603 irel->r_offset -= count;
1604
1605 /* If we see an ALIGN marker at the end of the gap, we move it
1606 to the beginning of the gap, since marking these gaps is what
1607 they're for. */
1608 if (irel->r_offset == toaddr
1609 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1610 && irel->r_addend & RX_RELAXA_ALIGN)
1611 irel->r_offset -= count;
1612 }
1613
1614 /* Adjust the local symbols defined in this section. */
1615 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1616 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1617 isymend = isym + symtab_hdr->sh_info;
1618
1619 for (; isym < isymend; isym++)
1620 {
1621 /* If the symbol is in the range of memory we just moved, we
1622 have to adjust its value. */
1623 if (isym->st_shndx == sec_shndx
1624 && isym->st_value > addr
1625 && isym->st_value < toaddr)
1626 isym->st_value -= count;
1627
1628 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1629 *end* is in the moved bytes but it's *start* isn't), then we
1630 must adjust its size. */
1631 if (isym->st_shndx == sec_shndx
1632 && isym->st_value < addr
1633 && isym->st_value + isym->st_size > addr
1634 && isym->st_value + isym->st_size < toaddr)
1635 isym->st_size -= count;
1636 }
1637
1638 /* Now adjust the global symbols defined in this section. */
1639 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1640 - symtab_hdr->sh_info);
1641 sym_hashes = elf_sym_hashes (abfd);
1642 end_hashes = sym_hashes + symcount;
1643
1644 for (; sym_hashes < end_hashes; sym_hashes++)
1645 {
1646 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1647
1648 if ((sym_hash->root.type == bfd_link_hash_defined
1649 || sym_hash->root.type == bfd_link_hash_defweak)
1650 && sym_hash->root.u.def.section == sec)
1651 {
1652 /* As above, adjust the value if needed. */
1653 if (sym_hash->root.u.def.value > addr
1654 && sym_hash->root.u.def.value < toaddr)
1655 sym_hash->root.u.def.value -= count;
1656
1657 /* As above, adjust the size if needed. */
1658 if (sym_hash->root.u.def.value < addr
1659 && sym_hash->root.u.def.value + sym_hash->size > addr
1660 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1661 sym_hash->size -= count;
1662 }
1663 }
1664
1665 return TRUE;
1666}
1667
1668/* Used to sort relocs by address. If relocs have the same address,
1669 we maintain their relative order, except that R_RX_RH_RELAX
1670 alignment relocs must be the first reloc for any given address. */
1671
1672static void
1673reloc_bubblesort (Elf_Internal_Rela * r, int count)
1674{
1675 int i;
1676 bfd_boolean again;
1677 bfd_boolean swappit;
1678
1679 /* This is almost a classic bubblesort. It's the slowest sort, but
1680 we're taking advantage of the fact that the relocations are
1681 mostly in order already (the assembler emits them that way) and
1682 we need relocs with the same address to remain in the same
1683 relative order. */
1684 again = TRUE;
1685 while (again)
1686 {
1687 again = FALSE;
1688 for (i = 0; i < count - 1; i ++)
1689 {
1690 if (r[i].r_offset > r[i + 1].r_offset)
1691 swappit = TRUE;
1692 else if (r[i].r_offset < r[i + 1].r_offset)
1693 swappit = FALSE;
1694 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1695 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1696 swappit = TRUE;
1697 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1698 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1699 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1700 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1701 swappit = TRUE;
1702 else
1703 swappit = FALSE;
1704
1705 if (swappit)
1706 {
1707 Elf_Internal_Rela tmp;
1708
1709 tmp = r[i];
1710 r[i] = r[i + 1];
1711 r[i + 1] = tmp;
1712 /* If we do move a reloc back, re-scan to see if it
1713 needs to be moved even further back. This avoids
1714 most of the O(n^2) behavior for our cases. */
1715 if (i > 0)
1716 i -= 2;
1717 again = TRUE;
1718 }
1719 }
1720 }
1721}
1722
1723
1724#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1725 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1726 lrel, abfd, sec, link_info, scale)
1727
1728static bfd_vma
07d6d2b8 1729rx_offset_for_reloc (bfd * abfd,
c7927a3c
NC		 1730 Elf_Internal_Rela * rel,
1731 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1732 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
07d6d2b8 1733 Elf_Internal_Sym * intsyms,
c7927a3c 1734 Elf_Internal_Rela ** lrel,
07d6d2b8
AM		 1735 bfd * input_bfd,
1736 asection * input_section,
c7927a3c 1737 struct bfd_link_info * info,
07d6d2b8 1738 int * scale)
c7927a3c
NC		 1739{
1740 bfd_vma symval;
1741 bfd_reloc_status_type r;
1742
1743 *scale = 1;
1744
1745 /* REL is the first of 1..N relocations. We compute the symbol
1746 value for each relocation, then combine them if needed. LREL
1747 gets a pointer to the last relocation used. */
1748 while (1)
1749 {
1750 int32_t tmp1, tmp2;
1751
1752 /* Get the value of the symbol referred to by the reloc. */
1753 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1754 {
1755 /* A local symbol. */
1756 Elf_Internal_Sym *isym;
c7927a3c
NC		 1757 asection *ssec;
1758
1759 isym = intsyms + ELF32_R_SYM (rel->r_info);
1760
1761 if (isym->st_shndx == SHN_UNDEF)
1762 ssec = bfd_und_section_ptr;
1763 else if (isym->st_shndx == SHN_ABS)
1764 ssec = bfd_abs_section_ptr;
1765 else if (isym->st_shndx == SHN_COMMON)
1766 ssec = bfd_com_section_ptr;
1767 else
1768 ssec = bfd_section_from_elf_index (abfd,
1769 isym->st_shndx);
1770
c7927a3c
NC		 1771 /* Initial symbol value. */
1772 symval = isym->st_value;
1773
1774 /* GAS may have made this symbol relative to a section, in
1775 which case, we have to add the addend to find the
1776 symbol. */
1777 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1778 symval += rel->r_addend;
1779
1780 if (ssec)
1781 {
1782 if ((ssec->flags & SEC_MERGE)
dbaa2011 1783 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1784 symval = _bfd_merged_section_offset (abfd, & ssec,
1785 elf_section_data (ssec)->sec_info,
1786 symval);
1787 }
1788
1789 /* Now make the offset relative to where the linker is putting it. */
1790 if (ssec)
1791 symval +=
1792 ssec->output_section->vma + ssec->output_offset;
1793
1794 symval += rel->r_addend;
1795 }
1796 else
1797 {
1798 unsigned long indx;
1799 struct elf_link_hash_entry * h;
1800
1801 /* An external symbol. */
1802 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1803 h = elf_sym_hashes (abfd)[indx];
1804 BFD_ASSERT (h != NULL);
1805
1806 if (h->root.type != bfd_link_hash_defined
1807 && h->root.type != bfd_link_hash_defweak)
1808 {
1809 /* This appears to be a reference to an undefined
1810 symbol. Just ignore it--it will be caught by the
1811 regular reloc processing. */
1812 if (lrel)
1813 *lrel = rel;
1814 return 0;
1815 }
1816
1817 symval = (h->root.u.def.value
1818 + h->root.u.def.section->output_section->vma
1819 + h->root.u.def.section->output_offset);
1820
1821 symval += rel->r_addend;
1822 }
1823
1824 switch (ELF32_R_TYPE (rel->r_info))
1825 {
1826 case R_RX_SYM:
1827 RX_STACK_PUSH (symval);
1828 break;
1829
1830 case R_RX_OPneg:
1831 RX_STACK_POP (tmp1);
1832 tmp1 = - tmp1;
1833 RX_STACK_PUSH (tmp1);
1834 break;
1835
1836 case R_RX_OPadd:
1837 RX_STACK_POP (tmp1);
1838 RX_STACK_POP (tmp2);
1839 tmp1 += tmp2;
1840 RX_STACK_PUSH (tmp1);
1841 break;
1842
1843 case R_RX_OPsub:
1844 RX_STACK_POP (tmp1);
1845 RX_STACK_POP (tmp2);
1846 tmp2 -= tmp1;
1847 RX_STACK_PUSH (tmp2);
1848 break;
1849
1850 case R_RX_OPmul:
1851 RX_STACK_POP (tmp1);
1852 RX_STACK_POP (tmp2);
1853 tmp1 *= tmp2;
1854 RX_STACK_PUSH (tmp1);
1855 break;
1856
1857 case R_RX_OPdiv:
1858 RX_STACK_POP (tmp1);
1859 RX_STACK_POP (tmp2);
1860 tmp1 /= tmp2;
1861 RX_STACK_PUSH (tmp1);
1862 break;
1863
1864 case R_RX_OPshla:
1865 RX_STACK_POP (tmp1);
1866 RX_STACK_POP (tmp2);
1867 tmp1 <<= tmp2;
1868 RX_STACK_PUSH (tmp1);
1869 break;
1870
1871 case R_RX_OPshra:
1872 RX_STACK_POP (tmp1);
1873 RX_STACK_POP (tmp2);
1874 tmp1 >>= tmp2;
1875 RX_STACK_PUSH (tmp1);
1876 break;
1877
1878 case R_RX_OPsctsize:
1879 RX_STACK_PUSH (input_section->size);
1880 break;
1881
1882 case R_RX_OPscttop:
1883 RX_STACK_PUSH (input_section->output_section->vma);
1884 break;
1885
1886 case R_RX_OPand:
1887 RX_STACK_POP (tmp1);
1888 RX_STACK_POP (tmp2);
1889 tmp1 &= tmp2;
1890 RX_STACK_PUSH (tmp1);
1891 break;
1892
1893 case R_RX_OPor:
1894 RX_STACK_POP (tmp1);
1895 RX_STACK_POP (tmp2);
1896 tmp1 |= tmp2;
1897 RX_STACK_PUSH (tmp1);
1898 break;
1899
1900 case R_RX_OPxor:
1901 RX_STACK_POP (tmp1);
1902 RX_STACK_POP (tmp2);
1903 tmp1 ^= tmp2;
1904 RX_STACK_PUSH (tmp1);
1905 break;
1906
1907 case R_RX_OPnot:
1908 RX_STACK_POP (tmp1);
1909 tmp1 = ~ tmp1;
1910 RX_STACK_PUSH (tmp1);
1911 break;
1912
1913 case R_RX_OPmod:
1914 RX_STACK_POP (tmp1);
1915 RX_STACK_POP (tmp2);
1916 tmp1 %= tmp2;
1917 RX_STACK_PUSH (tmp1);
1918 break;
1919
1920 case R_RX_OPromtop:
1a72702b 1921 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1922 break;
1923
1924 case R_RX_OPramtop:
1a72702b 1925 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1926 break;
1927
1928 case R_RX_DIR16UL:
1929 case R_RX_DIR8UL:
1930 case R_RX_ABS16UL:
1931 case R_RX_ABS8UL:
1932 if (rx_stack_top)
1933 RX_STACK_POP (symval);
1934 if (lrel)
1935 *lrel = rel;
1936 *scale = 4;
1937 return symval;
1938
1939 case R_RX_DIR16UW:
1940 case R_RX_DIR8UW:
1941 case R_RX_ABS16UW:
1942 case R_RX_ABS8UW:
1943 if (rx_stack_top)
1944 RX_STACK_POP (symval);
1945 if (lrel)
1946 *lrel = rel;
1947 *scale = 2;
1948 return symval;
1949
1950 default:
1951 if (rx_stack_top)
1952 RX_STACK_POP (symval);
1953 if (lrel)
1954 *lrel = rel;
1955 return symval;
1956 }
1957
1958 rel ++;
1959 }
1a72702b
AM		 1960 /* FIXME. */
1961 (void) r;
c7927a3c
NC		 1962}
1963
1964static void
1965move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1966{
1967 bfd_vma old_offset = srel->r_offset;
1968
1969 irel ++;
1970 while (irel <= srel)
1971 {
1972 if (irel->r_offset == old_offset)
1973 irel->r_offset += delta;
1974 irel ++;
1975 }
1976}
1977
1978/* Relax one section. */
1979
1980static bfd_boolean
07d6d2b8
AM		 1981elf32_rx_relax_section (bfd * abfd,
1982 asection * sec,
c7927a3c 1983 struct bfd_link_info * link_info,
07d6d2b8
AM		 1984 bfd_boolean * again,
1985 bfd_boolean allow_pcrel3)
c7927a3c
NC		 1986{
1987 Elf_Internal_Shdr * symtab_hdr;
1988 Elf_Internal_Shdr * shndx_hdr;
1989 Elf_Internal_Rela * internal_relocs;
c7927a3c
NC		 1990 Elf_Internal_Rela * irel;
1991 Elf_Internal_Rela * srel;
1992 Elf_Internal_Rela * irelend;
1993 Elf_Internal_Rela * next_alignment;
1994 Elf_Internal_Rela * prev_alignment;
07d6d2b8
AM		 1995 bfd_byte * contents = NULL;
1996 bfd_byte * free_contents = NULL;
c7927a3c
NC		 1997 Elf_Internal_Sym * intsyms = NULL;
1998 Elf_Internal_Sym * free_intsyms = NULL;
1999 Elf_External_Sym_Shndx * shndx_buf = NULL;
2000 bfd_vma pc;
2001 bfd_vma sec_start;
c7927a3c
NC		 2002 bfd_vma symval = 0;
2003 int pcrel = 0;
2004 int code = 0;
2005 int section_alignment_glue;
2006 /* how much to scale the relocation by - 1, 2, or 4. */
2007 int scale;
2008
2009 /* Assume nothing changes. */
2010 *again = FALSE;
2011
2012 /* We don't have to do anything for a relocatable link, if
2013 this section does not have relocs, or if this is not a
2014 code section. */
0e1862bb 2015 if (bfd_link_relocatable (link_info)
c7927a3c
NC		 2016 || (sec->flags & SEC_RELOC) == 0
2017 || sec->reloc_count == 0
2018 || (sec->flags & SEC_CODE) == 0)
2019 return TRUE;
2020
6a40cf0c
NC		 2021 symtab_hdr = & elf_symtab_hdr (abfd);
2022 if (elf_symtab_shndx_list (abfd))
2023 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2024 else
2025 shndx_hdr = NULL;
c7927a3c
NC		 2026
2027 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2028
2029 /* Get the section contents. */
2030 if (elf_section_data (sec)->this_hdr.contents != NULL)
2031 contents = elf_section_data (sec)->this_hdr.contents;
2032 /* Go get them off disk. */
2033 else
2034 {
2035 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2036 goto error_return;
2037 elf_section_data (sec)->this_hdr.contents = contents;
2038 }
2039
2040 /* Read this BFD's symbols. */
2041 /* Get cached copy if it exists. */
2042 if (symtab_hdr->contents != NULL)
2043 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2044 else
2045 {
2046 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2047 symtab_hdr->contents = (bfd_byte *) intsyms;
2048 }
2049
6a40cf0c 2050 if (shndx_hdr && shndx_hdr->sh_size != 0)
c7927a3c
NC		 2051 {
2052 bfd_size_type amt;
2053
2054 amt = symtab_hdr->sh_info;
2055 amt *= sizeof (Elf_External_Sym_Shndx);
2056 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2057 if (shndx_buf == NULL)
2058 goto error_return;
2059 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2060 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2061 goto error_return;
2062 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2063 }
2064
2065 /* Get a copy of the native relocations. */
5ee4a06a
NC		 2066 /* Note - we ignore the setting of link_info->keep_memory when reading
2067 in these relocs. We have to maintain a permanent copy of the relocs
2068 because we are going to walk over them multiple times, adjusting them
2069 as bytes are deleted from the section, and with this relaxation
2070 function itself being called multiple times on the same section... */
2071 internal_relocs = _bfd_elf_link_read_relocs
2072 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE);
c7927a3c
NC		 2073 if (internal_relocs == NULL)
2074 goto error_return;
c7927a3c
NC		 2075
2076 /* The RL_ relocs must be just before the operand relocs they go
2077 with, so we must sort them to guarantee this. We use bubblesort
2078 instead of qsort so we can guarantee that relocs with the same
2079 address remain in the same relative order. */
2080 reloc_bubblesort (internal_relocs, sec->reloc_count);
2081
2082 /* Walk through them looking for relaxing opportunities. */
2083 irelend = internal_relocs + sec->reloc_count;
2084
2085 /* This will either be NULL or a pointer to the next alignment
2086 relocation. */
2087 next_alignment = internal_relocs;
2088 /* This will be the previous alignment, although at first it points
2089 to the first real relocation. */
2090 prev_alignment = internal_relocs;
2091
2092 /* We calculate worst case shrinkage caused by alignment directives.
2093 No fool-proof, but better than either ignoring the problem or
2094 doing heavy duty analysis of all the alignment markers in all
2095 input sections. */
2096 section_alignment_glue = 0;
2097 for (irel = internal_relocs; irel < irelend; irel++)
2098 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2099 && irel->r_addend & RX_RELAXA_ALIGN)
2100 {
2101 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2102
2103 if (section_alignment_glue < this_glue)
2104 section_alignment_glue = this_glue;
2105 }
2106 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2107 shrinkage. */
2108 section_alignment_glue *= 2;
2109
2110 for (irel = internal_relocs; irel < irelend; irel++)
2111 {
2112 unsigned char *insn;
2113 int nrelocs;
2114
2115 /* The insns we care about are all marked with one of these. */
2116 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2117 continue;
2118
2119 if (irel->r_addend & RX_RELAXA_ALIGN
2120 || next_alignment == internal_relocs)
2121 {
2122 /* When we delete bytes, we need to maintain all the alignments
2123 indicated. In addition, we need to be careful about relaxing
2124 jumps across alignment boundaries - these displacements
2125 *grow* when we delete bytes. For now, don't shrink
2126 displacements across an alignment boundary, just in case.
2127 Note that this only affects relocations to the same
2128 section. */
2129 prev_alignment = next_alignment;
2130 next_alignment += 2;
2131 while (next_alignment < irelend
2132 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2133 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2134 next_alignment ++;
2135 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2136 next_alignment = NULL;
2137 }
2138
2139 /* When we hit alignment markers, see if we've shrunk enough
2140 before them to reduce the gap without violating the alignment
2141 requirements. */
2142 if (irel->r_addend & RX_RELAXA_ALIGN)
2143 {
2144 /* At this point, the next relocation *should* be the ELIGN
2145 end marker. */
2146 Elf_Internal_Rela *erel = irel + 1;
2147 unsigned int alignment, nbytes;
2148
2149 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2150 continue;
2151 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2152 continue;
2153
2154 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2155
2156 if (erel->r_offset - irel->r_offset < alignment)
2157 continue;
2158
2159 nbytes = erel->r_offset - irel->r_offset;
2160 nbytes /= alignment;
2161 nbytes *= alignment;
2162
2163 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
5ee4a06a 2164 erel->r_offset == sec->size, internal_relocs);
c7927a3c
NC		 2165 *again = TRUE;
2166
2167 continue;
2168 }
2169
2170 if (irel->r_addend & RX_RELAXA_ELIGN)
2171 continue;
2172
2173 insn = contents + irel->r_offset;
2174
2175 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2176
2177 /* At this point, we have an insn that is a candidate for linker
2178 relaxation. There are NRELOCS relocs following that may be
2179 relaxed, although each reloc may be made of more than one
2180 reloc entry (such as gp-rel symbols). */
2181
2182 /* Get the value of the symbol referred to by the reloc. Just
07d6d2b8
AM		 2183 in case this is the last reloc in the list, use the RL's
2184 addend to choose between this reloc (no addend) or the next
2185 (yes addend, which means at least one following reloc). */
c7927a3c
NC		 2186
2187 /* srel points to the "current" reloction for this insn -
2188 actually the last reloc for a given operand, which is the one
2189 we need to update. We check the relaxations in the same
2190 order that the relocations happen, so we'll just push it
2191 along as we go. */
2192 srel = irel;
2193
2194 pc = sec->output_section->vma + sec->output_offset
2195 + srel->r_offset;
2196
2197#define GET_RELOC \
2198 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2199 pcrel = symval - pc + srel->r_addend; \
2200 nrelocs --;
2201
2202#define SNIPNR(offset, nbytes) \
5ee4a06a 2203 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
c7927a3c 2204#define SNIP(offset, nbytes, newtype) \
07d6d2b8 2205 SNIPNR (offset, nbytes); \
c7927a3c
NC		 2206 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2207
2208 /* The order of these bit tests must match the order that the
2209 relocs appear in. Since we sorted those by offset, we can
2210 predict them. */
2211
2212 /* Note that the numbers in, say, DSP6 are the bit offsets of
2213 the code fields that describe the operand. Bits number 0 for
2214 the MSB of insn[0]. */
2215
2216 /* DSP* codes:
2217 0 00 [reg]
2218 1 01 dsp:8[reg]
2219 2 10 dsp:16[reg]
2220 3 11 reg */
2221 if (irel->r_addend & RX_RELAXA_DSP6)
2222 {
2223 GET_RELOC;
2224
2225 code = insn[0] & 3;
2226 if (code == 2 && symval/scale <= 255)
2227 {
2228 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2229 insn[0] &= 0xfc;
2230 insn[0] |= 0x01;
2231 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2232 if (newrel != ELF32_R_TYPE (srel->r_info))
2233 {
2234 SNIP (3, 1, newrel);
2235 *again = TRUE;
2236 }
2237 }
2238
2239 else if (code == 1 && symval == 0)
2240 {
2241 insn[0] &= 0xfc;
2242 SNIP (2, 1, R_RX_NONE);
2243 *again = TRUE;
2244 }
2245
2246 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2247 else if (code == 1 && symval/scale <= 31
2248 /* Decodable bits. */
2249 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2250 /* Width. */
eb8c5f3f 2251 && (insn[0] & 0x30) != 0x30
91d6fa6a 2252 /* Register MSBs. */
c7927a3c
NC		 2253 && (insn[1] & 0x88) == 0x00)
2254 {
2255 int newrel = 0;
2256
2257 insn[0] = 0x88 | (insn[0] & 0x30);
2258 /* The register fields are in the right place already. */
2259
2260 /* We can't relax this new opcode. */
2261 irel->r_addend = 0;
2262
2263 switch ((insn[0] & 0x30) >> 4)
2264 {
2265 case 0:
2266 newrel = R_RX_RH_ABS5p5B;
2267 break;
2268 case 1:
2269 newrel = R_RX_RH_ABS5p5W;
2270 break;
2271 case 2:
2272 newrel = R_RX_RH_ABS5p5L;
2273 break;
2274 }
2275
2276 move_reloc (irel, srel, -2);
2277 SNIP (2, 1, newrel);
2278 }
2279
2280 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2281 else if (code == 1 && symval/scale <= 31
2282 /* Decodable bits. */
2283 && (insn[0] & 0xf8) == 0x58
2284 /* Register MSBs. */
2285 && (insn[1] & 0x88) == 0x00)
2286 {
2287 int newrel = 0;
2288
2289 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2290 /* The register fields are in the right place already. */
2291
2292 /* We can't relax this new opcode. */
2293 irel->r_addend = 0;
2294
2295 switch ((insn[0] & 0x08) >> 3)
2296 {
2297 case 0:
2298 newrel = R_RX_RH_ABS5p5B;
2299 break;
2300 case 1:
2301 newrel = R_RX_RH_ABS5p5W;
2302 break;
2303 }
2304
2305 move_reloc (irel, srel, -2);
2306 SNIP (2, 1, newrel);
2307 }
2308 }
2309
2310 /* A DSP4 operand always follows a DSP6 operand, even if there's
2311 no relocation for it. We have to read the code out of the
2312 opcode to calculate the offset of the operand. */
2313 if (irel->r_addend & RX_RELAXA_DSP4)
2314 {
2315 int code6, offset = 0;
2316
2317 GET_RELOC;
2318
2319 code6 = insn[0] & 0x03;
2320 switch (code6)
2321 {
2322 case 0: offset = 2; break;
2323 case 1: offset = 3; break;
2324 case 2: offset = 4; break;
2325 case 3: offset = 2; break;
2326 }
2327
2328 code = (insn[0] & 0x0c) >> 2;
2329
2330 if (code == 2 && symval / scale <= 255)
2331 {
2332 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2333
2334 insn[0] &= 0xf3;
2335 insn[0] |= 0x04;
2336 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2337 if (newrel != ELF32_R_TYPE (srel->r_info))
2338 {
2339 SNIP (offset+1, 1, newrel);
2340 *again = TRUE;
2341 }
2342 }
2343
2344 else if (code == 1 && symval == 0)
2345 {
2346 insn[0] &= 0xf3;
2347 SNIP (offset, 1, R_RX_NONE);
2348 *again = TRUE;
2349 }
2350 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2351 else if (code == 1 && symval/scale <= 31
2352 /* Decodable bits. */
2353 && (insn[0] & 0xc3) == 0xc3
2354 /* Width. */
eb8c5f3f 2355 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2356 /* Register MSBs. */
2357 && (insn[1] & 0x88) == 0x00)
2358 {
2359 int newrel = 0;
2360
2361 insn[0] = 0x80 | (insn[0] & 0x30);
2362 /* The register fields are in the right place already. */
2363
2364 /* We can't relax this new opcode. */
2365 irel->r_addend = 0;
2366
2367 switch ((insn[0] & 0x30) >> 4)
2368 {
2369 case 0:
2370 newrel = R_RX_RH_ABS5p5B;
2371 break;
2372 case 1:
2373 newrel = R_RX_RH_ABS5p5W;
2374 break;
2375 case 2:
2376 newrel = R_RX_RH_ABS5p5L;
2377 break;
2378 }
2379
2380 move_reloc (irel, srel, -2);
2381 SNIP (2, 1, newrel);
2382 }
2383 }
2384
2385 /* These always occur alone, but the offset depends on whether
2386 it's a MEMEX opcode (0x06) or not. */
2387 if (irel->r_addend & RX_RELAXA_DSP14)
2388 {
2389 int offset;
2390 GET_RELOC;
2391
2392 if (insn[0] == 0x06)
2393 offset = 3;
2394 else
2395 offset = 4;
2396
2397 code = insn[1] & 3;
2398
2399 if (code == 2 && symval / scale <= 255)
2400 {
2401 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2402
2403 insn[1] &= 0xfc;
2404 insn[1] |= 0x01;
2405 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2406 if (newrel != ELF32_R_TYPE (srel->r_info))
2407 {
2408 SNIP (offset, 1, newrel);
2409 *again = TRUE;
2410 }
2411 }
2412 else if (code == 1 && symval == 0)
2413 {
2414 insn[1] &= 0xfc;
2415 SNIP (offset, 1, R_RX_NONE);
2416 *again = TRUE;
2417 }
2418 }
2419
2420 /* IMM* codes:
2421 0 00 imm:32
2422 1 01 simm:8
2423 2 10 simm:16
2424 3 11 simm:24. */
2425
2426 /* These always occur alone. */
2427 if (irel->r_addend & RX_RELAXA_IMM6)
2428 {
2429 long ssymval;
2430
2431 GET_RELOC;
2432
2433 /* These relocations sign-extend, so we must do signed compares. */
2434 ssymval = (long) symval;
2435
2436 code = insn[0] & 0x03;
2437
2438 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2439 {
2440 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2441
2442 insn[0] &= 0xfc;
2443 insn[0] |= 0x03;
2444 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2445 if (newrel != ELF32_R_TYPE (srel->r_info))
2446 {
2447 SNIP (2, 1, newrel);
2448 *again = TRUE;
2449 }
2450 }
2451
2452 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2453 {
2454 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2455
2456 insn[0] &= 0xfc;
2457 insn[0] |= 0x02;
2458 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2459 if (newrel != ELF32_R_TYPE (srel->r_info))
2460 {
2461 SNIP (2, 1, newrel);
2462 *again = TRUE;
2463 }
2464 }
2465
2466 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2467 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2468 /* Decodable bits. */
2469 && (insn[0] & 0xfc) == 0x74
2470 /* Decodable bits. */
2471 && ((insn[1] & 0xf0) == 0x00))
2472 {
2473 int newrel;
2474
2475 insn[0] = 0x75;
2476 insn[1] = 0x50 | (insn[1] & 0x0f);
2477
2478 /* We can't relax this new opcode. */
2479 irel->r_addend = 0;
2480
2481 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2482 newrel = R_RX_ABS8U;
2483 else
2484 newrel = R_RX_DIR8U;
2485
2486 SNIP (2, 1, newrel);
2487 *again = TRUE;
2488 }
2489
2490 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2491 {
2492 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2493
2494 insn[0] &= 0xfc;
2495 insn[0] |= 0x01;
2496 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2497 if (newrel != ELF32_R_TYPE (srel->r_info))
2498 {
2499 SNIP (2, 1, newrel);
2500 *again = TRUE;
2501 }
2502 }
2503
2504 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2505 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2506 /* Decodable bits and immediate type. */
2507 && insn[0] == 0x75
2508 /* Decodable bits. */
2509 && (insn[1] & 0xc0) == 0x00)
2510 {
2511 static const int newop[4] = { 1, 3, 4, 5 };
2512
2513 insn[0] = 0x60 | newop[insn[1] >> 4];
2514 /* The register number doesn't move. */
2515
2516 /* We can't relax this new opcode. */
2517 irel->r_addend = 0;
2518
2519 move_reloc (irel, srel, -1);
2520
2521 SNIP (2, 1, R_RX_RH_UIMM4p8);
2522 *again = TRUE;
2523 }
2524
2525 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2526 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2527 /* Decodable bits and immediate type. */
2528 && insn[0] == 0x71
2529 /* Same register for source and destination. */
2530 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2531 {
2532 int newrel;
2533
2534 /* Note that we can't turn "add $0,Rs" into a NOP
2535 because the flags need to be set right. */
2536
2537 if (ssymval < 0)
2538 {
2539 insn[0] = 0x60; /* Subtract. */
2540 newrel = R_RX_RH_UNEG4p8;
2541 }
2542 else
2543 {
2544 insn[0] = 0x62; /* Add. */
2545 newrel = R_RX_RH_UIMM4p8;
2546 }
2547
2548 /* The register number is in the right place. */
2549
2550 /* We can't relax this new opcode. */
2551 irel->r_addend = 0;
2552
2553 move_reloc (irel, srel, -1);
2554
2555 SNIP (2, 1, newrel);
2556 *again = TRUE;
2557 }
2558 }
2559
2560 /* These are either matched with a DSP6 (2-byte base) or an id24
2561 (3-byte base). */
2562 if (irel->r_addend & RX_RELAXA_IMM12)
2563 {
2564 int dspcode, offset = 0;
2565 long ssymval;
2566
2567 GET_RELOC;
2568
2569 if ((insn[0] & 0xfc) == 0xfc)
2570 dspcode = 1; /* Just something with one byte operand. */
2571 else
2572 dspcode = insn[0] & 3;
2573 switch (dspcode)
2574 {
2575 case 0: offset = 2; break;
2576 case 1: offset = 3; break;
2577 case 2: offset = 4; break;
2578 case 3: offset = 2; break;
2579 }
2580
2581 /* These relocations sign-extend, so we must do signed compares. */
2582 ssymval = (long) symval;
2583
2584 code = (insn[1] >> 2) & 3;
2585 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2586 {
2587 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2588
2589 insn[1] &= 0xf3;
2590 insn[1] |= 0x0c;
2591 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2592 if (newrel != ELF32_R_TYPE (srel->r_info))
2593 {
2594 SNIP (offset, 1, newrel);
2595 *again = TRUE;
2596 }
2597 }
2598
2599 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2600 {
2601 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2602
2603 insn[1] &= 0xf3;
2604 insn[1] |= 0x08;
2605 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2606 if (newrel != ELF32_R_TYPE (srel->r_info))
2607 {
2608 SNIP (offset, 1, newrel);
2609 *again = TRUE;
2610 }
2611 }
2612
2613 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2614 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2615 /* Decodable bits. */
2616 && insn[0] == 0xfb
2617 /* Decodable bits. */
2618 && ((insn[1] & 0x03) == 0x02))
2619 {
2620 int newrel;
2621
2622 insn[0] = 0x75;
2623 insn[1] = 0x40 | (insn[1] >> 4);
2624
2625 /* We can't relax this new opcode. */
2626 irel->r_addend = 0;
2627
2628 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2629 newrel = R_RX_ABS8U;
2630 else
2631 newrel = R_RX_DIR8U;
2632
2633 SNIP (2, 1, newrel);
2634 *again = TRUE;
2635 }
2636
2637 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2638 {
2639 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2640
2641 insn[1] &= 0xf3;
2642 insn[1] |= 0x04;
2643 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2644 if (newrel != ELF32_R_TYPE(srel->r_info))
2645 {
2646 SNIP (offset, 1, newrel);
2647 *again = TRUE;
2648 }
2649 }
2650
2651 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2652 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2653 /* Decodable bits. */
2654 && insn[0] == 0xfb
2655 /* Decodable bits. */
2656 && ((insn[1] & 0x03) == 0x02))
2657 {
2658 insn[0] = 0x66;
2659 insn[1] = insn[1] >> 4;
2660
2661 /* We can't relax this new opcode. */
2662 irel->r_addend = 0;
2663
2664 move_reloc (irel, srel, -1);
2665
2666 SNIP (2, 1, R_RX_RH_UIMM4p8);
2667 *again = TRUE;
2668 }
2669 }
2670
2671 if (irel->r_addend & RX_RELAXA_BRA)
2672 {
2673 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2674 int max_pcrel3 = 4;
2675 int alignment_glue = 0;
2676
2677 GET_RELOC;
2678
2679 /* Branches over alignment chunks are problematic, as
2680 deleting bytes here makes the branch *further* away. We
2681 can be agressive with branches within this alignment
2682 block, but not branches outside it. */
2683 if ((prev_alignment == NULL
2684 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2685 && (next_alignment == NULL
2686 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2687 alignment_glue = section_alignment_glue;
2688
2689 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2690 && srel[1].r_addend & RX_RELAXA_BRA
2691 && srel[1].r_offset < irel->r_offset + pcrel)
2692 max_pcrel3 ++;
2693
2694 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2695
2696 /* The values we compare PCREL with are not what you'd
2697 expect; they're off by a little to compensate for (1)
2698 where the reloc is relative to the insn, and (2) how much
2699 the insn is going to change when we relax it. */
2700
2701 /* These we have to decode. */
2702 switch (insn[0])
2703 {
2704 case 0x04: /* BRA pcdsp:24 */
2705 if (-32768 + alignment_glue <= pcrel
2706 && pcrel <= 32765 - alignment_glue)
2707 {
2708 insn[0] = 0x38;
2709 SNIP (3, 1, newrel);
2710 *again = TRUE;
2711 }
2712 break;
2713
2714 case 0x38: /* BRA pcdsp:16 */
2715 if (-128 + alignment_glue <= pcrel
2716 && pcrel <= 127 - alignment_glue)
2717 {
2718 insn[0] = 0x2e;
2719 SNIP (2, 1, newrel);
2720 *again = TRUE;
2721 }
2722 break;
2723
2724 case 0x2e: /* BRA pcdsp:8 */
2725 /* Note that there's a risk here of shortening things so
2726 much that we no longer fit this reloc; it *should*
2727 only happen when you branch across a branch, and that
2728 branch also devolves into BRA.S. "Real" code should
2729 be OK. */
2730 if (max_pcrel3 + alignment_glue <= pcrel
2731 && pcrel <= 10 - alignment_glue
2732 && allow_pcrel3)
2733 {
2734 insn[0] = 0x08;
2735 SNIP (1, 1, newrel);
2736 move_reloc (irel, srel, -1);
2737 *again = TRUE;
2738 }
2739 break;
2740
2741 case 0x05: /* BSR pcdsp:24 */
2742 if (-32768 + alignment_glue <= pcrel
2743 && pcrel <= 32765 - alignment_glue)
2744 {
2745 insn[0] = 0x39;
2746 SNIP (1, 1, newrel);
2747 *again = TRUE;
2748 }
2749 break;
2750
2751 case 0x3a: /* BEQ.W pcdsp:16 */
2752 case 0x3b: /* BNE.W pcdsp:16 */
2753 if (-128 + alignment_glue <= pcrel
2754 && pcrel <= 127 - alignment_glue)
2755 {
2756 insn[0] = 0x20 | (insn[0] & 1);
2757 SNIP (1, 1, newrel);
2758 *again = TRUE;
2759 }
2760 break;
2761
2762 case 0x20: /* BEQ.B pcdsp:8 */
2763 case 0x21: /* BNE.B pcdsp:8 */
2764 if (max_pcrel3 + alignment_glue <= pcrel
2765 && pcrel - alignment_glue <= 10
2766 && allow_pcrel3)
2767 {
2768 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2769 SNIP (1, 1, newrel);
2770 move_reloc (irel, srel, -1);
2771 *again = TRUE;
2772 }
2773 break;
2774
2775 case 0x16: /* synthetic BNE dsp24 */
2776 case 0x1e: /* synthetic BEQ dsp24 */
2777 if (-32767 + alignment_glue <= pcrel
2778 && pcrel <= 32766 - alignment_glue
2779 && insn[1] == 0x04)
2780 {
2781 if (insn[0] == 0x16)
2782 insn[0] = 0x3b;
2783 else
2784 insn[0] = 0x3a;
2785 /* We snip out the bytes at the end else the reloc
2786 will get moved too, and too much. */
2787 SNIP (3, 2, newrel);
2788 move_reloc (irel, srel, -1);
2789 *again = TRUE;
2790 }
2791 break;
2792 }
2793
2794 /* Special case - synthetic conditional branches, pcrel24.
2795 Note that EQ and NE have been handled above. */
2796 if ((insn[0] & 0xf0) == 0x20
2797 && insn[1] == 0x06
2798 && insn[2] == 0x04
2799 && srel->r_offset != irel->r_offset + 1
2800 && -32767 + alignment_glue <= pcrel
2801 && pcrel <= 32766 - alignment_glue)
2802 {
2803 insn[1] = 0x05;
2804 insn[2] = 0x38;
2805 SNIP (5, 1, newrel);
2806 *again = TRUE;
2807 }
2808
2809 /* Special case - synthetic conditional branches, pcrel16 */
2810 if ((insn[0] & 0xf0) == 0x20
2811 && insn[1] == 0x05
2812 && insn[2] == 0x38
2813 && srel->r_offset != irel->r_offset + 1
2814 && -127 + alignment_glue <= pcrel
2815 && pcrel <= 126 - alignment_glue)
2816 {
2817 int cond = (insn[0] & 0x0f) ^ 0x01;
2818
2819 insn[0] = 0x20 | cond;
2820 /* By moving the reloc first, we avoid having
2821 delete_bytes move it also. */
2822 move_reloc (irel, srel, -2);
2823 SNIP (2, 3, newrel);
2824 *again = TRUE;
2825 }
2826 }
2827
2828 BFD_ASSERT (nrelocs == 0);
2829
2830 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2831 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2832 because it may have one or two relocations. */
2833 if ((insn[0] & 0xfc) == 0xf8
2834 && (insn[1] & 0x80) == 0x00
2835 && (insn[0] & 0x03) != 0x03)
2836 {
2837 int dcode, icode, reg, ioff, dscale, ilen;
2838 bfd_vma disp_val = 0;
2839 long imm_val = 0;
2840 Elf_Internal_Rela * disp_rel = 0;
2841 Elf_Internal_Rela * imm_rel = 0;
2842
2843 /* Reset this. */
2844 srel = irel;
2845
2846 dcode = insn[0] & 0x03;
2847 icode = (insn[1] >> 2) & 0x03;
2848 reg = (insn[1] >> 4) & 0x0f;
2849
2850 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2851
2852 /* Figure out what the dispacement is. */
2853 if (dcode == 1 || dcode == 2)
2854 {
2855 /* There's a displacement. See if there's a reloc for it. */
2856 if (srel[1].r_offset == irel->r_offset + 2)
2857 {
2858 GET_RELOC;
2859 disp_val = symval;
2860 disp_rel = srel;
2861 }
2862 else
2863 {
2864 if (dcode == 1)
2865 disp_val = insn[2];
2866 else
2867 {
2868#if RX_OPCODE_BIG_ENDIAN
2869 disp_val = insn[2] * 256 + insn[3];
2870#else
2871 disp_val = insn[2] + insn[3] * 256;
2872#endif
2873 }
2874 switch (insn[1] & 3)
2875 {
2876 case 1:
2877 disp_val *= 2;
2878 scale = 2;
2879 break;
2880 case 2:
2881 disp_val *= 4;
2882 scale = 4;
2883 break;
2884 }
2885 }
2886 }
2887
2888 dscale = scale;
2889
2890 /* Figure out what the immediate is. */
2891 if (srel[1].r_offset == irel->r_offset + ioff)
2892 {
2893 GET_RELOC;
2894 imm_val = (long) symval;
2895 imm_rel = srel;
2896 }
2897 else
2898 {
2899 unsigned char * ip = insn + ioff;
2900
2901 switch (icode)
2902 {
2903 case 1:
2904 /* For byte writes, we don't sign extend. Makes the math easier later. */
2905 if (scale == 1)
2906 imm_val = ip[0];
2907 else
2908 imm_val = (char) ip[0];
2909 break;
2910 case 2:
2911#if RX_OPCODE_BIG_ENDIAN
2912 imm_val = ((char) ip[0] << 8) | ip[1];
2913#else
2914 imm_val = ((char) ip[1] << 8) | ip[0];
2915#endif
2916 break;
2917 case 3:
2918#if RX_OPCODE_BIG_ENDIAN
2919 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2920#else
2921 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2922#endif
2923 break;
2924 case 0:
2925#if RX_OPCODE_BIG_ENDIAN
2926 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2927#else
2928 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2929#endif
2930 break;
2931 }
2932 }
2933
2934 ilen = 2;
2935
2936 switch (dcode)
2937 {
2938 case 1:
2939 ilen += 1;
2940 break;
2941 case 2:
2942 ilen += 2;
2943 break;
2944 }
2945
2946 switch (icode)
2947 {
2948 case 1:
2949 ilen += 1;
2950 break;
2951 case 2:
2952 ilen += 2;
2953 break;
2954 case 3:
2955 ilen += 3;
2956 break;
2957 case 4:
2958 ilen += 4;
2959 break;
2960 }
2961
2962 /* The shortcut happens when the immediate is 0..255,
2963 register r0 to r7, and displacement (scaled) 0..31. */
2964
2965 if (0 <= imm_val && imm_val <= 255
2966 && 0 <= reg && reg <= 7
2967 && disp_val / dscale <= 31)
2968 {
2969 insn[0] = 0x3c | (insn[1] & 0x03);
2970 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2971 insn[2] = imm_val;
2972
2973 if (disp_rel)
2974 {
2975 int newrel = R_RX_NONE;
2976
2977 switch (dscale)
2978 {
2979 case 1:
2980 newrel = R_RX_RH_ABS5p8B;
2981 break;
2982 case 2:
2983 newrel = R_RX_RH_ABS5p8W;
2984 break;
2985 case 4:
2986 newrel = R_RX_RH_ABS5p8L;
2987 break;
2988 }
2989 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2990 move_reloc (irel, disp_rel, -1);
2991 }
2992 if (imm_rel)
2993 {
2994 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2995 move_reloc (disp_rel ? disp_rel : irel,
2996 imm_rel,
2997 irel->r_offset - imm_rel->r_offset + 2);
2998 }
2999
3000 SNIPNR (3, ilen - 3);
3001 *again = TRUE;
3002
3003 /* We can't relax this new opcode. */
3004 irel->r_addend = 0;
3005 }
3006 }
3007 }
3008
3009 /* We can't reliably relax branches to DIR3U_PCREL unless we know
3010 whatever they're branching over won't shrink any more. If we're
3011 basically done here, do one more pass just for branches - but
3012 don't request a pass after that one! */
3013 if (!*again && !allow_pcrel3)
3014 {
3015 bfd_boolean ignored;
3016
3017 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3018 }
3019
3020 return TRUE;
3021
3022 error_return:
c7927a3c
NC		 3023 if (free_contents != NULL)
3024 free (free_contents);
3025
3026 if (shndx_buf != NULL)
3027 {
3028 shndx_hdr->contents = NULL;
3029 free (shndx_buf);
3030 }
3031
3032 if (free_intsyms != NULL)
3033 free (free_intsyms);
3034
3035 return FALSE;
3036}
3037
3038static bfd_boolean
07d6d2b8
AM		 3039elf32_rx_relax_section_wrapper (bfd * abfd,
3040 asection * sec,
c7927a3c 3041 struct bfd_link_info * link_info,
07d6d2b8 3042 bfd_boolean * again)
c7927a3c
NC		 3043{
3044 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3045}
3046\f
3047/* Function to set the ELF flag bits. */
3048
3049static bfd_boolean
3050rx_elf_set_private_flags (bfd * abfd, flagword flags)
3051{
3052 elf_elfheader (abfd)->e_flags = flags;
3053 elf_flags_init (abfd) = TRUE;
3054 return TRUE;
3055}
3056
3057static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3058static bfd_boolean ignore_lma = TRUE;
c7927a3c 3059
84bff83f 3060void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3061
3062void
84bff83f
NC		 3063bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3064 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3065{
3066 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3067 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3068}
3069
708e2187
NC		 3070/* Converts FLAGS into a descriptive string.
3071 Returns a static pointer. */
3072
3073static const char *
3074describe_flags (flagword flags)
3075{
3076 static char buf [128];
3077
3078 buf[0] = 0;
3079
3080 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3081 strcat (buf, "64-bit doubles");
3082 else
3083 strcat (buf, "32-bit doubles");
3084
3085 if (flags & E_FLAG_RX_DSP)
3086 strcat (buf, ", dsp");
3087 else
3088 strcat (buf, ", no dsp");
3089
3090 if (flags & E_FLAG_RX_PID)
3091 strcat (buf, ", pid");
3092 else
3093 strcat (buf, ", no pid");
3094
3095 if (flags & E_FLAG_RX_ABI)
3096 strcat (buf, ", RX ABI");
3097 else
3098 strcat (buf, ", GCC ABI");
3099
3525236c
NC		 3100 if (flags & E_FLAG_RX_SINSNS_SET)
3101 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3102
708e2187
NC		 3103 return buf;
3104}
3105
c7927a3c
NC		 3106/* Merge backend specific data from an object file to the output
3107 object file when linking. */
3108
3109static bfd_boolean
50e03d47 3110rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
c7927a3c 3111{
50e03d47 3112 bfd *obfd = info->output_bfd;
c7927a3c
NC		 3113 flagword old_flags;
3114 flagword new_flags;
3115 bfd_boolean error = FALSE;
3116
3117 new_flags = elf_elfheader (ibfd)->e_flags;
3118 old_flags = elf_elfheader (obfd)->e_flags;
3119
3120 if (!elf_flags_init (obfd))
3121 {
3122 /* First call, no flags set. */
3123 elf_flags_init (obfd) = TRUE;
3124 elf_elfheader (obfd)->e_flags = new_flags;
3125 }
3126 else if (old_flags != new_flags)
3127 {
708e2187
NC		 3128 flagword known_flags;
3129
3525236c
NC		 3130 if (old_flags & E_FLAG_RX_SINSNS_SET)
3131 {
3132 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3133 {
3134 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3135 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3136 }
3137 }
3138 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3139 {
3140 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3141 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3142 }
3143
708e2187 3144 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3145 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3146
3147 if ((old_flags ^ new_flags) & known_flags)
3148 {
3149 /* Only complain if flag bits we care about do not match.
3150 Other bits may be set, since older binaries did use some
3151 deprecated flags. */
3152 if (no_warn_mismatch)
3153 {
3154 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3155 }
3156 else
3157 {
38f14ab8 3158 _bfd_error_handler (_("there is a conflict merging the"
871b3ab2 3159 " ELF header flags from %pB"),
dae82561 3160 ibfd);
695344c0 3161 _bfd_error_handler (_(" the input file's flags: %s"),
708e2187 3162 describe_flags (new_flags));
695344c0 3163 _bfd_error_handler (_(" the output file's flags: %s"),
708e2187 3164 describe_flags (old_flags));
c7927a3c
NC		 3165 error = TRUE;
3166 }
3167 }
3168 else
3169 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3170 }
3171
3172 if (error)
3173 bfd_set_error (bfd_error_bad_value);
3174
3175 return !error;
3176}
3177\f
3178static bfd_boolean
3179rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3180{
3181 FILE * file = (FILE *) ptr;
3182 flagword flags;
3183
3184 BFD_ASSERT (abfd != NULL && ptr != NULL);
3185
3186 /* Print normal ELF private data. */
3187 _bfd_elf_print_private_bfd_data (abfd, ptr);
3188
3189 flags = elf_elfheader (abfd)->e_flags;
3190 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3191
6d8a3ede 3192 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3193 return TRUE;
3194}
3195
3196/* Return the MACH for an e_flags value. */
3197
3198static int
708e2187 3199elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3200{
708e2187
NC		 3201#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3202 Need to sort out how these flag bits are used.
07d6d2b8 3203 For now we assume that the flags are OK. */
c7927a3c 3204 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3205#endif
c7927a3c
NC		 3206 return bfd_mach_rx;
3207
3208 return 0;
3209}
3210
3211static bfd_boolean
3212rx_elf_object_p (bfd * abfd)
3213{
1ce74905
DD		 3214 int i;
3215 unsigned int u;
3216 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
63920300
AM		 3217 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3218 int nphdrs = ehdr->e_phnum;
1ce74905 3219 sec_ptr bsec;
fc87b9e8 3220 static int saw_be = FALSE;
63920300 3221 bfd_vma end_phdroff;
1ce74905 3222
4c422395
DD		 3223 /* We never want to automatically choose the non-swapping big-endian
3224 target. The user can only get that explicitly, such as with -I
3225 and objcopy. */
6d00b590 3226 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3227 && abfd->target_defaulted)
3228 return FALSE;
3229
fc87b9e8
DD		 3230 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3231 as a fallback, so we check for "scanning" to know when to stop
3232 using the non-swapping target. */
6d00b590 3233 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3234 && saw_be)
3235 return FALSE;
6d00b590 3236 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3237 saw_be = TRUE;
3238
c7927a3c
NC		 3239 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3240 elf32_rx_machine (abfd));
1ce74905
DD		 3241
3242 /* For each PHDR in the object, we must find some section that
3243 corresponds (based on matching file offsets) and use its VMA
3244 information to reconstruct the p_vaddr field we clobbered when we
3245 wrote it out. */
63920300
AM		 3246 /* If PT_LOAD headers include the ELF file header or program headers
3247 then the PT_LOAD header does not start with some section contents.
3248 Making adjustments based on the difference between sh_offset and
3249 p_offset is nonsense in such cases. Exclude them. Note that
3250 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3251 the linker won't normally create PT_LOAD segments covering the
3252 headers so this is mainly for passing the ld testsuite.
3253 FIXME. Why are we looking at non-PT_LOAD headers here? */
3254 end_phdroff = ehdr->e_ehsize;
3255 if (ehdr->e_phoff != 0)
3256 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
1ce74905
DD		 3257 for (i=0; i<nphdrs; i++)
3258 {
3259 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3260 {
3261 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3262
74b1e045 3263 if (phdr[i].p_filesz
63920300 3264 && phdr[i].p_offset >= end_phdroff
74b1e045 3265 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
7859afc4
DD		 3266 && sec->sh_size > 0
3267 && sec->sh_type != SHT_NOBITS
1ce74905
DD		 3268 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3269 {
3270 /* Found one! The difference between the two addresses,
3271 plus the difference between the two file offsets, is
3272 enough information to reconstruct the lma. */
3273
3274 /* Example where they aren't:
3275 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3276 SEC[6] = vma 00000050 offset 00002050 size 00000040
3277
3278 The correct LMA for the section is fffc0140 + (2050-2010).
3279 */
3280
92ff23a1 3281 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3282 break;
3283 }
3284 }
3285
3286 /* We must update the bfd sections as well, so we don't stop
3287 with one match. */
3288 bsec = abfd->sections;
3289 while (bsec)
3290 {
74b1e045
DD		 3291 if (phdr[i].p_filesz
3292 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3293 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3294 {
3295 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3296 }
3297 bsec = bsec->next;
3298 }
3299 }
3300
c7927a3c
NC		 3301 return TRUE;
3302}
3303 \f
3304
3305#ifdef DEBUG
3306void
9ccb8af9 3307rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3308{
3309 size_t locsymcount;
3310 Elf_Internal_Sym * isymbuf;
3311 Elf_Internal_Sym * isymend;
3312 Elf_Internal_Sym * isym;
3313 Elf_Internal_Shdr * symtab_hdr;
3314 bfd_boolean free_internal = FALSE, free_external = FALSE;
3315 char * st_info_str;
3316 char * st_info_stb_str;
3317 char * st_other_str;
3318 char * st_shndx_str;
3319
3320 if (! internal_syms)
3321 {
3322 internal_syms = bfd_malloc (1000);
3323 free_internal = 1;
3324 }
3325 if (! external_syms)
3326 {
3327 external_syms = bfd_malloc (1000);
3328 free_external = 1;
3329 }
3330
3331 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3332 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3333 if (free_internal)
3334 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3335 symtab_hdr->sh_info, 0,
3336 internal_syms, external_syms, NULL);
3337 else
3338 isymbuf = internal_syms;
3339 isymend = isymbuf + locsymcount;
3340
3341 for (isym = isymbuf ; isym < isymend ; isym++)
3342 {
3343 switch (ELF_ST_TYPE (isym->st_info))
3344 {
b707aa49
NC		 3345 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3346 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3347 case STT_FILE: st_info_str = "STT_FILE"; break;
3348 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3349 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3350 default: st_info_str = "";
3351 }
3352 switch (ELF_ST_BIND (isym->st_info))
3353 {
b707aa49
NC		 3354 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3355 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3356 default: st_info_stb_str = "";
3357 }
3358 switch (ELF_ST_VISIBILITY (isym->st_other))
3359 {
b707aa49
NC		 3360 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3361 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3362 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3363 default: st_other_str = "";
3364 }
3365 switch (isym->st_shndx)
3366 {
b707aa49
NC		 3367 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3368 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3369 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3370 default: st_shndx_str = "";
3371 }
3372
3373 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3374 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3375 isym,
3376 (unsigned long) isym->st_value,
3377 (unsigned long) isym->st_size,
3378 isym->st_name,
3379 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3380 isym->st_name),
3381 isym->st_info, st_info_str, st_info_stb_str,
3382 isym->st_other, st_other_str,
3383 isym->st_shndx, st_shndx_str);
3384 }
3385 if (free_internal)
3386 free (internal_syms);
3387 if (free_external)
3388 free (external_syms);
3389}
3390
3391char *
3392rx_get_reloc (long reloc)
3393{
3394 if (0 <= reloc && reloc < R_RX_max)
3395 return rx_elf_howto_table[reloc].name;
3396 return "";
3397}
3398#endif /* DEBUG */
3399
3400\f
3401/* We must take care to keep the on-disk copy of any code sections
3402 that are fully linked swapped if the target is big endian, to match
3403 the Renesas tools. */
3404
3405/* The rule is: big endian object that are final-link executables,
3406 have code sections stored with 32-bit words swapped relative to
3407 what you'd get by default. */
3408
3409static bfd_boolean
07d6d2b8 3410rx_get_section_contents (bfd * abfd,
c7927a3c 3411 sec_ptr section,
07d6d2b8 3412 void * location,
c7927a3c
NC		 3413 file_ptr offset,
3414 bfd_size_type count)
3415{
3416 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3417 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3418 bfd_boolean rv;
3419
3420#ifdef DJDEBUG
3421 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3422 (long) offset, (long) count, section->name,
3423 bfd_big_endian(abfd) ? "be" : "le",
3424 exec, s_code, (long unsigned) section->filepos,
3425 (long unsigned) offset);
3426#endif
3427
3428 if (exec && s_code && bfd_big_endian (abfd))
3429 {
3430 char * cloc = (char *) location;
3431 bfd_size_type cnt, end_cnt;
3432
3433 rv = TRUE;
3434
3435 /* Fetch and swap unaligned bytes at the beginning. */
3436 if (offset % 4)
07d6d2b8 3437 {
c7927a3c
NC		 3438 char buf[4];
3439
3440 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3441 (offset & -4), 4);
c7927a3c
NC		 3442 if (!rv)
3443 return FALSE;
3444
3445 bfd_putb32 (bfd_getl32 (buf), buf);
3446
3447 cnt = 4 - (offset % 4);
3448 if (cnt > count)
3449 cnt = count;
3450
3451 memcpy (location, buf + (offset % 4), cnt);
3452
3453 count -= cnt;
3454 offset += cnt;
3455 cloc += count;
3456 }
3457
3458 end_cnt = count % 4;
3459
3460 /* Fetch and swap the middle bytes. */
3461 if (count >= 4)
3462 {
3463 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3464 count - end_cnt);
3465 if (!rv)
3466 return FALSE;
3467
3468 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3469 bfd_putb32 (bfd_getl32 (cloc), cloc);
3470 }
3471
3472 /* Fetch and swap the end bytes. */
3473 if (end_cnt > 0)
3474 {
3475 char buf[4];
3476
3477 /* Fetch the end bytes. */
3478 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3479 offset + count - end_cnt, 4);
c7927a3c
NC		 3480 if (!rv)
3481 return FALSE;
3482
3483 bfd_putb32 (bfd_getl32 (buf), buf);
3484 memcpy (cloc, buf, end_cnt);
3485 }
3486 }
3487 else
3488 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3489
3490 return rv;
3491}
3492
3493#ifdef DJDEBUG
3494static bfd_boolean
07d6d2b8 3495rx2_set_section_contents (bfd * abfd,
c7927a3c
NC		 3496 sec_ptr section,
3497 const void * location,
3498 file_ptr offset,
3499 bfd_size_type count)
3500{
3501 bfd_size_type i;
3502
3503 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3504 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3505 for (i = 0; i < count; i++)
3506 {
3507 if (i % 16 == 0 && i > 0)
3508 fprintf (stderr, "\n");
3509
3510 if (i % 16 && i % 4 == 0)
3511 fprintf (stderr, " ");
3512
3513 if (i % 16 == 0)
3514 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3515
3516 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3517 }
3518 fprintf (stderr, "\n");
3519
3520 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3521}
3522#define _bfd_elf_set_section_contents rx2_set_section_contents
3523#endif
3524
3525static bfd_boolean
07d6d2b8 3526rx_set_section_contents (bfd * abfd,
c7927a3c
NC		 3527 sec_ptr section,
3528 const void * location,
3529 file_ptr offset,
3530 bfd_size_type count)
3531{
3532 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3533 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3534 bfd_boolean rv;
3535 char * swapped_data = NULL;
3536 bfd_size_type i;
3537 bfd_vma caddr = section->vma + offset;
3538 file_ptr faddr = 0;
3539 bfd_size_type scount;
3540
3541#ifdef DJDEBUG
3542 bfd_size_type i;
3543
3544 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3545 (long) offset, (long) count, section->name,
3546 bfd_big_endian (abfd) ? "be" : "le",
3547 exec, s_code);
3548
3549 for (i = 0; i < count; i++)
3550 {
3551 int a = section->vma + offset + i;
3552
3553 if (a % 16 == 0 && a > 0)
3554 fprintf (stderr, "\n");
3555
3556 if (a % 16 && a % 4 == 0)
3557 fprintf (stderr, " ");
3558
3559 if (a % 16 == 0 || i == 0)
3560 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3561
3562 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3563 }
3564
3565 fprintf (stderr, "\n");
3566#endif
3567
3568 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3569 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3570
3571 while (count > 0 && caddr > 0 && caddr % 4)
3572 {
3573 switch (caddr % 4)
3574 {
3575 case 0: faddr = offset + 3; break;
3576 case 1: faddr = offset + 1; break;
3577 case 2: faddr = offset - 1; break;
3578 case 3: faddr = offset - 3; break;
3579 }
3580
3581 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3582 if (! rv)
3583 return rv;
3584
28cc9170 3585 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3586 offset ++;
3587 count --;
3588 caddr ++;
3589 }
3590
3591 scount = (int)(count / 4) * 4;
3592 if (scount > 0)
3593 {
3594 char * cloc = (char *) location;
3595
3596 swapped_data = (char *) bfd_alloc (abfd, count);
3597
3598 for (i = 0; i < count; i += 4)
3599 {
3600 bfd_vma v = bfd_getl32 (cloc + i);
3601 bfd_putb32 (v, swapped_data + i);
3602 }
3603
3604 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3605
3606 if (!rv)
3607 return rv;
3608 }
3609
3610 count -= scount;
28cc9170 3611 location = (bfd_byte *) location + scount;
c7927a3c
NC		 3612 offset += scount;
3613
3614 if (count > 0)
3615 {
3616 caddr = section->vma + offset;
3617 while (count > 0)
3618 {
3619 switch (caddr % 4)
3620 {
3621 case 0: faddr = offset + 3; break;
3622 case 1: faddr = offset + 1; break;
3623 case 2: faddr = offset - 1; break;
3624 case 3: faddr = offset - 3; break;
3625 }
3626 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3627 if (! rv)
3628 return rv;
3629
28cc9170 3630 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3631 offset ++;
3632 count --;
3633 caddr ++;
3634 }
3635 }
3636
3637 return TRUE;
3638}
3639
3640static bfd_boolean
3641rx_final_link (bfd * abfd, struct bfd_link_info * info)
3642{
3643 asection * o;
3644
3645 for (o = abfd->sections; o != NULL; o = o->next)
3646 {
3647#ifdef DJDEBUG
3648 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3649 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3650#endif
3651 if (o->flags & SEC_CODE
3652 && bfd_big_endian (abfd)
e57278ef 3653 && o->size % 4)
c7927a3c
NC		 3654 {
3655#ifdef DJDEBUG
3656 fprintf (stderr, "adjusting...\n");
3657#endif
3658 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3659 }
3660 }
3661
3662 return bfd_elf_final_link (abfd, info);
3663}
3664
3665static bfd_boolean
3666elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3667 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3668{
3669 const struct elf_backend_data * bed;
3670 struct elf_obj_tdata * tdata;
3671 Elf_Internal_Phdr * phdr;
3672 unsigned int count;
3673 unsigned int i;
3674
3675 bed = get_elf_backend_data (abfd);
3676 tdata = elf_tdata (abfd);
3677 phdr = tdata->phdr;
12bd6957 3678 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3679
84bff83f
NC		 3680 if (ignore_lma)
3681 for (i = count; i-- != 0;)
3682 if (phdr[i].p_type == PT_LOAD)
3683 {
3684 /* The Renesas tools expect p_paddr to be zero. However,
3685 there is no other way to store the writable data in ROM for
3686 startup initialization. So, we let the linker *think*
3687 we're using paddr and vaddr the "usual" way, but at the
3688 last minute we move the paddr into the vaddr (which is what
3689 the simulator uses) and zero out paddr. Note that this
3690 does not affect the section headers, just the program
3691 headers. We hope. */
c7927a3c 3692 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3693#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3694 becomes wrong. */
84bff83f
NC		 3695 phdr[i].p_paddr = 0;
3696#endif
3697 }
c7927a3c
NC		 3698
3699 return TRUE;
3700}
708e2187
NC		 3701
3702/* The default literal sections should always be marked as "code" (i.e.,
3703 SHF_EXECINSTR). This is particularly important for big-endian mode
3704 when we do not want their contents byte reversed. */
3705static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3706{
07d6d2b8
AM		 3707 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3708 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
708e2187 3709 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
07d6d2b8 3710 { NULL, 0, 0, 0, 0 }
708e2187 3711};
7a2f2d82
DD		 3712\f
3713typedef struct {
3714 bfd *abfd;
3715 struct bfd_link_info *info;
3716 bfd_vma table_start;
3717 int table_size;
3718 bfd_vma *table_handlers;
3719 bfd_vma table_default_handler;
3720 struct bfd_link_hash_entry **table_entries;
3721 struct bfd_link_hash_entry *table_default_entry;
3722 FILE *mapfile;
3723} RX_Table_Info;
3724
3725static bfd_boolean
3726rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3727{
3728 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3729 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3730 const char *name; /* of the symbol we've found */
3731 asection *sec;
3732 struct bfd *abfd;
3733 int idx;
3734 const char *tname; /* name of the table */
3735 bfd_vma start_addr, end_addr;
3736 char *buf;
3737 struct bfd_link_hash_entry * h;
3738
3739 /* We're looking for globally defined symbols of the form
3740 $tablestart$<NAME>. */
3741 if (ent->type != bfd_link_hash_defined
3742 && ent->type != bfd_link_hash_defweak)
3743 return TRUE;
3744
3745 name = ent->root.string;
3746 sec = ent->u.def.section;
3747 abfd = sec->owner;
3748
3749 if (strncmp (name, "$tablestart$", 12))
3750 return TRUE;
3751
3752 sec->flags |= SEC_KEEP;
3753
3754 tname = name + 12;
3755
3756 start_addr = ent->u.def.value;
3757
3758 /* At this point, we can't build the table but we can (and must)
3759 find all the related symbols and mark their sections as SEC_KEEP
3760 so we don't garbage collect them. */
3761
3762 buf = (char *) malloc (12 + 10 + strlen (tname));
3763
3764 sprintf (buf, "$tableend$%s", tname);
3765 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3766 if (!h || (h->type != bfd_link_hash_defined
3767 && h->type != bfd_link_hash_defweak))
3768 {
695344c0 3769 /* xgettext:c-format */
871b3ab2 3770 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"),
7a2f2d82
DD		 3771 abfd, sec, name, buf);
3772 return TRUE;
3773 }
3774
3775 if (h->u.def.section != ent->u.def.section)
3776 {
695344c0 3777 /* xgettext:c-format */
871b3ab2 3778 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"),
7a2f2d82
DD		 3779 h->u.def.section->owner, h->u.def.section,
3780 name, buf);
3781 return TRUE;
3782 }
3783
3784 end_addr = h->u.def.value;
3785
3786 sprintf (buf, "$tableentry$default$%s", tname);
3787 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3788 if (h && (h->type == bfd_link_hash_defined
3789 || h->type == bfd_link_hash_defweak))
3790 {
3791 h->u.def.section->flags |= SEC_KEEP;
3792 }
3793
3794 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3795 {
3796 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3797 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3798 if (h && (h->type == bfd_link_hash_defined
3799 || h->type == bfd_link_hash_defweak))
3800 {
3801 h->u.def.section->flags |= SEC_KEEP;
3802 }
3803 }
3804
3805 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3806 return TRUE;
3807}
3808
3809/* We need to check for table entry symbols and build the tables, and
3810 we need to do it before the linker does garbage collection. This function is
3811 called once per input object file. */
3812static bfd_boolean
3813rx_check_directives
07d6d2b8 3814 (bfd * abfd ATTRIBUTE_UNUSED,
7a2f2d82
DD		 3815 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3816{
3817 RX_Table_Info stuff;
3818
3819 stuff.abfd = abfd;
3820 stuff.info = info;
3821 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3822
3823 return TRUE;
3824}
3825
3826\f
3827static bfd_boolean
3828rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3829{
3830 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3831 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3832 int idx;
3833 const char *name;
3834 bfd_vma addr;
3835
3836 /* See if the symbol ENT has an address listed in the table, and
3837 isn't a debug/special symbol. If so, put it in the table. */
3838
3839 if (ent->type != bfd_link_hash_defined
3840 && ent->type != bfd_link_hash_defweak)
3841 return TRUE;
3842
3843 name = ent->root.string;
3844
3845 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3846 return TRUE;
3847
3848 addr = (ent->u.def.value
3849 + ent->u.def.section->output_section->vma
3850 + ent->u.def.section->output_offset);
3851
3852 for (idx = 0; idx < info->table_size; idx ++)
3853 if (addr == info->table_handlers[idx])
3854 info->table_entries[idx] = ent;
3855
3856 if (addr == info->table_default_handler)
3857 info->table_default_entry = ent;
3858
3859 return TRUE;
3860}
3861
3862static bfd_boolean
3863rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3864{
3865 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3866 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3867 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3868 int idx;
3869 const char *tname; /* name of the table */
3870 bfd_vma start_addr, end_addr;
3871 char *buf;
3872 struct bfd_link_hash_entry * h;
3873 int need_elipses;
3874
3875 /* We're looking for globally defined symbols of the form
3876 $tablestart$<NAME>. */
3877 if (ent->type != bfd_link_hash_defined
3878 && ent->type != bfd_link_hash_defweak)
3879 return TRUE;
3880
3881 name = ent->root.string;
7a2f2d82
DD		 3882
3883 if (strncmp (name, "$tablestart$", 12))
3884 return TRUE;
3885
3886 tname = name + 12;
3887 start_addr = (ent->u.def.value
3888 + ent->u.def.section->output_section->vma
3889 + ent->u.def.section->output_offset);
3890
3891 buf = (char *) malloc (12 + 10 + strlen (tname));
3892
3893 sprintf (buf, "$tableend$%s", tname);
3894 end_addr = get_symbol_value_maybe (buf, info->info);
3895
3896 sprintf (buf, "$tableentry$default$%s", tname);
3897 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3898 if (h)
3899 {
3900 info->table_default_handler = (h->u.def.value
3901 + h->u.def.section->output_section->vma
3902 + h->u.def.section->output_offset);
3903 }
3904 else
3905 /* Zero is a valid handler address! */
3906 info->table_default_handler = (bfd_vma) (-1);
3907 info->table_default_entry = NULL;
3908
3909 info->table_start = start_addr;
3910 info->table_size = (int) (end_addr - start_addr) / 4;
3911 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3912 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3913
3914 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3915 {
3916 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3917 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3918 if (h && (h->type == bfd_link_hash_defined
3919 || h->type == bfd_link_hash_defweak))
3920 {
3921 info->table_handlers[idx] = (h->u.def.value
3922 + h->u.def.section->output_section->vma
3923 + h->u.def.section->output_offset);
3924 }
3925 else
3926 info->table_handlers[idx] = info->table_default_handler;
3927 info->table_entries[idx] = NULL;
3928 }
3929
3930 free (buf);
3931
3932 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3933
33ac0ca1 3934 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3935 tname, info->table_size, start_addr);
3936
3937 if (info->table_default_entry)
33ac0ca1 3938 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3939 info->table_default_entry->root.string,
3940 info->table_default_handler);
3941 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3942 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3943 info->table_default_handler);
3944 else
3945 fprintf (info->mapfile, " no default handler\n");
3946
3947 need_elipses = 1;
3948 for (idx = 0; idx < info->table_size; idx ++)
3949 {
3950 if (info->table_handlers[idx] == info->table_default_handler)
3951 {
3952 if (need_elipses)
3953 fprintf (info->mapfile, " . . .\n");
3954 need_elipses = 0;
3955 continue;
3956 }
3957 need_elipses = 1;
3958
33ac0ca1 3959 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3960
3961 if (info->table_handlers[idx] == (bfd_vma) (-1))
3962 fprintf (info->mapfile, "(no handler found)\n");
3963
3964 else if (info->table_handlers[idx] == info->table_default_handler)
3965 {
3966 if (info->table_default_entry)
3967 fprintf (info->mapfile, "(default)\n");
3968 else
3969 fprintf (info->mapfile, "(default)\n");
3970 }
3971
3972 else if (info->table_entries[idx])
3973 {
33ac0ca1 3974 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3975 }
3976
3977 else
3978 {
33ac0ca1 3979 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3980 }
3981 }
3982 if (need_elipses)
3983 fprintf (info->mapfile, " . . .\n");
3984
3985 return TRUE;
3986}
3987
3988void
3989rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3990{
3991 /* We scan the symbol table looking for $tableentry$'s, and for
3992 each, try to deduce which handlers go with which entries. */
3993
3994 RX_Table_Info stuff;
3995
3996 stuff.abfd = obfd;
3997 stuff.info = info;
3998 stuff.mapfile = mapfile;
3999 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
4000}
4001
c7927a3c
NC		 4002\f
4003#define ELF_ARCH bfd_arch_rx
4004#define ELF_MACHINE_CODE EM_RX
4005#define ELF_MAXPAGESIZE 0x1000
4006
6d00b590 4007#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 4008#define TARGET_BIG_NAME "elf32-rx-be"
4009
6d00b590 4010#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 4011#define TARGET_LITTLE_NAME "elf32-rx-le"
4012
4013#define elf_info_to_howto_rel NULL
4014#define elf_info_to_howto rx_info_to_howto_rela
4015#define elf_backend_object_p rx_elf_object_p
4016#define elf_backend_relocate_section rx_elf_relocate_section
07d6d2b8 4017#define elf_symbol_leading_char ('_')
c7927a3c
NC		 4018#define elf_backend_can_gc_sections 1
4019#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
4020
4021#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4022#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4023#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4024#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4025#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4026#define bfd_elf32_get_section_contents rx_get_section_contents
4027#define bfd_elf32_set_section_contents rx_set_section_contents
4028#define bfd_elf32_bfd_final_link rx_final_link
4029#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
07d6d2b8 4030#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4031#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4032
4033#include "elf32-target.h"
4c422395
DD		 4034
4035/* We define a second big-endian target that doesn't have the custom
4036 section get/set hooks, for times when we want to preserve the
4037 pre-swapped .text sections (like objcopy). */
4038
07d6d2b8 4039#undef TARGET_BIG_SYM
6d00b590 4040#define TARGET_BIG_SYM rx_elf32_be_ns_vec
07d6d2b8 4041#undef TARGET_BIG_NAME
4c422395 4042#define TARGET_BIG_NAME "elf32-rx-be-ns"
07d6d2b8 4043#undef TARGET_LITTLE_SYM
4c422395
DD		 4044
4045#undef bfd_elf32_get_section_contents
4046#undef bfd_elf32_set_section_contents
4047
4048#undef elf32_bed
4049#define elf32_bed elf32_rx_be_ns_bed
4050
4051#include "elf32-target.h"
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