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252b5132 | 1 | /* tc-mn10300.c -- Assembler code for the Matsushita 10300 |
913572ec | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 |
f7e42eb4 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include <stdio.h> | |
252b5132 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
87271fa6 | 25 | #include "subsegs.h" |
252b5132 | 26 | #include "opcode/mn10300.h" |
e8b1cae5 | 27 | #include "dwarf2dbg.h" |
252b5132 RH |
28 | \f |
29 | /* Structure to hold information about predefined registers. */ | |
30 | struct reg_name | |
31 | { | |
32 | const char *name; | |
33 | int value; | |
34 | }; | |
35 | ||
87271fa6 NC |
36 | /* Generic assembler global variables which must be defined by all |
37 | targets. */ | |
252b5132 | 38 | |
87271fa6 | 39 | /* Characters which always start a comment. */ |
252b5132 RH |
40 | const char comment_chars[] = "#"; |
41 | ||
42 | /* Characters which start a comment at the beginning of a line. */ | |
43 | const char line_comment_chars[] = ";#"; | |
44 | ||
87271fa6 | 45 | /* Characters which may be used to separate multiple commands on a |
252b5132 RH |
46 | single line. */ |
47 | const char line_separator_chars[] = ";"; | |
48 | ||
87271fa6 | 49 | /* Characters which are used to indicate an exponent in a floating |
252b5132 RH |
50 | point number. */ |
51 | const char EXP_CHARS[] = "eE"; | |
52 | ||
87271fa6 | 53 | /* Characters which mean that a number is a floating point constant, |
252b5132 RH |
54 | as in 0d1.0. */ |
55 | const char FLT_CHARS[] = "dD"; | |
56 | \f | |
252b5132 | 57 | const relax_typeS md_relax_table[] = { |
87271fa6 | 58 | /* bCC relaxing */ |
252b5132 RH |
59 | {0x7f, -0x80, 2, 1}, |
60 | {0x7fff, -0x8000, 5, 2}, | |
61 | {0x7fffffff, -0x80000000, 7, 0}, | |
62 | ||
87271fa6 | 63 | /* bCC relaxing (uncommon cases) */ |
252b5132 RH |
64 | {0x7f, -0x80, 3, 4}, |
65 | {0x7fff, -0x8000, 6, 5}, | |
66 | {0x7fffffff, -0x80000000, 8, 0}, | |
67 | ||
87271fa6 | 68 | /* call relaxing */ |
252b5132 RH |
69 | {0x7fff, -0x8000, 5, 7}, |
70 | {0x7fffffff, -0x80000000, 7, 0}, | |
71 | ||
87271fa6 | 72 | /* calls relaxing */ |
252b5132 RH |
73 | {0x7fff, -0x8000, 4, 9}, |
74 | {0x7fffffff, -0x80000000, 6, 0}, | |
75 | ||
87271fa6 | 76 | /* jmp relaxing */ |
252b5132 RH |
77 | {0x7f, -0x80, 2, 11}, |
78 | {0x7fff, -0x8000, 3, 12}, | |
79 | {0x7fffffff, -0x80000000, 5, 0}, | |
80 | ||
81 | }; | |
82 | ||
87271fa6 | 83 | /* Local functions. */ |
252b5132 RH |
84 | static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *, |
85 | const struct mn10300_operand *, | |
86 | offsetT, char *, unsigned, | |
87 | unsigned)); | |
88 | static unsigned long check_operand PARAMS ((unsigned long, | |
89 | const struct mn10300_operand *, | |
90 | offsetT)); | |
91 | static int reg_name_search PARAMS ((const struct reg_name *, int, const char *)); | |
b34976b6 AM |
92 | static bfd_boolean data_register_name PARAMS ((expressionS *expressionP)); |
93 | static bfd_boolean address_register_name PARAMS ((expressionS *expressionP)); | |
94 | static bfd_boolean other_register_name PARAMS ((expressionS *expressionP)); | |
0e1a166b | 95 | static void set_arch_mach PARAMS ((unsigned int)); |
252b5132 | 96 | |
1485d400 EC |
97 | /* Set linkrelax here to avoid fixups in most sections. */ |
98 | int linkrelax = 1; | |
99 | ||
252b5132 RH |
100 | static int current_machine; |
101 | ||
87271fa6 | 102 | /* Fixups. */ |
252b5132 RH |
103 | #define MAX_INSN_FIXUPS (5) |
104 | struct mn10300_fixup | |
105 | { | |
106 | expressionS exp; | |
107 | int opindex; | |
108 | bfd_reloc_code_real_type reloc; | |
109 | }; | |
110 | struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; | |
111 | static int fc; | |
112 | ||
113 | /* We must store the value of each register operand so that we can | |
114 | verify that certain registers do not match. */ | |
115 | int mn10300_reg_operands[MN10300_MAX_OPERANDS]; | |
116 | \f | |
117 | const char *md_shortopts = ""; | |
118 | struct option md_longopts[] = { | |
119 | {NULL, no_argument, NULL, 0} | |
120 | }; | |
87271fa6 | 121 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
122 | |
123 | /* The target specific pseudo-ops which we support. */ | |
124 | const pseudo_typeS md_pseudo_table[] = | |
125 | { | |
9f1838ed | 126 | { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 }, |
b4c1ea07 | 127 | { "loc", dwarf2_directive_loc, 0 }, |
0a727238 AO |
128 | { "am30", set_arch_mach, AM30 }, |
129 | { "am33", set_arch_mach, AM33 }, | |
130 | { "mn10300", set_arch_mach, MN103 }, | |
252b5132 RH |
131 | {NULL, 0, 0} |
132 | }; | |
133 | ||
0a727238 | 134 | #define HAVE_AM33 (current_machine == AM33) |
aa15f6f7 | 135 | #define HAVE_AM30 (current_machine == AM30) |
0a727238 | 136 | |
252b5132 RH |
137 | /* Opcode hash table. */ |
138 | static struct hash_control *mn10300_hash; | |
139 | ||
87271fa6 | 140 | /* This table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
141 | static const struct reg_name data_registers[] = |
142 | { | |
143 | { "d0", 0 }, | |
144 | { "d1", 1 }, | |
145 | { "d2", 2 }, | |
146 | { "d3", 3 }, | |
147 | }; | |
87271fa6 NC |
148 | #define DATA_REG_NAME_CNT \ |
149 | (sizeof (data_registers) / sizeof (struct reg_name)) | |
252b5132 RH |
150 | |
151 | static const struct reg_name address_registers[] = | |
152 | { | |
153 | { "a0", 0 }, | |
154 | { "a1", 1 }, | |
155 | { "a2", 2 }, | |
156 | { "a3", 3 }, | |
157 | }; | |
87271fa6 NC |
158 | |
159 | #define ADDRESS_REG_NAME_CNT \ | |
160 | (sizeof (address_registers) / sizeof (struct reg_name)) | |
252b5132 | 161 | |
85cb2cf9 JL |
162 | static const struct reg_name r_registers[] = |
163 | { | |
164 | { "a0", 8 }, | |
165 | { "a1", 9 }, | |
166 | { "a2", 10 }, | |
167 | { "a3", 11 }, | |
168 | { "d0", 12 }, | |
169 | { "d1", 13 }, | |
170 | { "d2", 14 }, | |
171 | { "d3", 15 }, | |
172 | { "e0", 0 }, | |
173 | { "e1", 1 }, | |
174 | { "e10", 10 }, | |
175 | { "e11", 11 }, | |
176 | { "e12", 12 }, | |
177 | { "e13", 13 }, | |
178 | { "e14", 14 }, | |
179 | { "e15", 15 }, | |
180 | { "e2", 2 }, | |
181 | { "e3", 3 }, | |
182 | { "e4", 4 }, | |
183 | { "e5", 5 }, | |
184 | { "e6", 6 }, | |
185 | { "e7", 7 }, | |
186 | { "e8", 8 }, | |
187 | { "e9", 9 }, | |
188 | { "r0", 0 }, | |
189 | { "r1", 1 }, | |
190 | { "r10", 10 }, | |
191 | { "r11", 11 }, | |
192 | { "r12", 12 }, | |
193 | { "r13", 13 }, | |
194 | { "r14", 14 }, | |
195 | { "r15", 15 }, | |
196 | { "r2", 2 }, | |
197 | { "r3", 3 }, | |
198 | { "r4", 4 }, | |
199 | { "r5", 5 }, | |
200 | { "r6", 6 }, | |
201 | { "r7", 7 }, | |
202 | { "r8", 8 }, | |
203 | { "r9", 9 }, | |
204 | }; | |
87271fa6 NC |
205 | |
206 | #define R_REG_NAME_CNT \ | |
207 | (sizeof (r_registers) / sizeof (struct reg_name)) | |
85cb2cf9 JL |
208 | |
209 | static const struct reg_name xr_registers[] = | |
210 | { | |
211 | { "mcrh", 2 }, | |
212 | { "mcrl", 3 }, | |
213 | { "mcvf", 4 }, | |
214 | { "mdrq", 1 }, | |
215 | { "sp", 0 }, | |
216 | { "xr0", 0 }, | |
217 | { "xr1", 1 }, | |
218 | { "xr10", 10 }, | |
219 | { "xr11", 11 }, | |
220 | { "xr12", 12 }, | |
221 | { "xr13", 13 }, | |
222 | { "xr14", 14 }, | |
223 | { "xr15", 15 }, | |
224 | { "xr2", 2 }, | |
225 | { "xr3", 3 }, | |
226 | { "xr4", 4 }, | |
227 | { "xr5", 5 }, | |
228 | { "xr6", 6 }, | |
229 | { "xr7", 7 }, | |
230 | { "xr8", 8 }, | |
231 | { "xr9", 9 }, | |
232 | }; | |
85cb2cf9 | 233 | |
87271fa6 NC |
234 | #define XR_REG_NAME_CNT \ |
235 | (sizeof (xr_registers) / sizeof (struct reg_name)) | |
252b5132 | 236 | |
913572ec AO |
237 | /* We abuse the `value' field, that would be otherwise unused, to |
238 | encode the architecture on which (access to) the register was | |
239 | introduced. FIXME: we should probably warn when we encounter a | |
240 | register name when assembling for an architecture that doesn't | |
241 | support it, before parsing it as a symbol name. */ | |
252b5132 RH |
242 | static const struct reg_name other_registers[] = |
243 | { | |
913572ec | 244 | { "epsw", AM33 }, |
252b5132 | 245 | { "mdr", 0 }, |
913572ec | 246 | { "pc", AM33 }, |
252b5132 RH |
247 | { "psw", 0 }, |
248 | { "sp", 0 }, | |
249 | }; | |
87271fa6 NC |
250 | |
251 | #define OTHER_REG_NAME_CNT \ | |
252 | (sizeof (other_registers) / sizeof (struct reg_name)) | |
252b5132 RH |
253 | |
254 | /* reg_name_search does a binary search of the given register table | |
255 | to see if "name" is a valid regiter name. Returns the register | |
87271fa6 | 256 | number from the array on success, or -1 on failure. */ |
252b5132 RH |
257 | |
258 | static int | |
259 | reg_name_search (regs, regcount, name) | |
260 | const struct reg_name *regs; | |
261 | int regcount; | |
262 | const char *name; | |
263 | { | |
264 | int middle, low, high; | |
265 | int cmp; | |
266 | ||
267 | low = 0; | |
268 | high = regcount - 1; | |
269 | ||
270 | do | |
271 | { | |
272 | middle = (low + high) / 2; | |
273 | cmp = strcasecmp (name, regs[middle].name); | |
274 | if (cmp < 0) | |
275 | high = middle - 1; | |
276 | else if (cmp > 0) | |
277 | low = middle + 1; | |
87271fa6 NC |
278 | else |
279 | return regs[middle].value; | |
252b5132 RH |
280 | } |
281 | while (low <= high); | |
282 | return -1; | |
283 | } | |
284 | ||
85cb2cf9 JL |
285 | /* Summary of register_name(). |
286 | * | |
287 | * in: Input_line_pointer points to 1st char of operand. | |
288 | * | |
b6ff326e | 289 | * out: An expressionS. |
85cb2cf9 JL |
290 | * The operand may have been a register: in this case, X_op == O_register, |
291 | * X_add_number is set to the register number, and truth is returned. | |
292 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
293 | * its original state. | |
294 | */ | |
87271fa6 | 295 | |
b34976b6 | 296 | static bfd_boolean |
85cb2cf9 JL |
297 | r_register_name (expressionP) |
298 | expressionS *expressionP; | |
299 | { | |
300 | int reg_number; | |
301 | char *name; | |
302 | char *start; | |
303 | char c; | |
304 | ||
87271fa6 | 305 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
306 | start = name = input_line_pointer; |
307 | ||
308 | c = get_symbol_end (); | |
309 | reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name); | |
310 | ||
468cced8 AM |
311 | /* Put back the delimiting char. */ |
312 | *input_line_pointer = c; | |
313 | ||
87271fa6 NC |
314 | /* Look to see if it's in the register table. */ |
315 | if (reg_number >= 0) | |
85cb2cf9 JL |
316 | { |
317 | expressionP->X_op = O_register; | |
318 | expressionP->X_add_number = reg_number; | |
319 | ||
87271fa6 | 320 | /* Make the rest nice. */ |
85cb2cf9 JL |
321 | expressionP->X_add_symbol = NULL; |
322 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 323 | |
b34976b6 | 324 | return TRUE; |
85cb2cf9 | 325 | } |
87271fa6 | 326 | |
468cced8 AM |
327 | /* Reset the line as if we had not done anything. */ |
328 | input_line_pointer = start; | |
b34976b6 | 329 | return FALSE; |
85cb2cf9 JL |
330 | } |
331 | ||
332 | /* Summary of register_name(). | |
333 | * | |
334 | * in: Input_line_pointer points to 1st char of operand. | |
335 | * | |
b6ff326e | 336 | * out: An expressionS. |
85cb2cf9 JL |
337 | * The operand may have been a register: in this case, X_op == O_register, |
338 | * X_add_number is set to the register number, and truth is returned. | |
339 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
340 | * its original state. | |
341 | */ | |
87271fa6 | 342 | |
b34976b6 | 343 | static bfd_boolean |
85cb2cf9 JL |
344 | xr_register_name (expressionP) |
345 | expressionS *expressionP; | |
346 | { | |
347 | int reg_number; | |
348 | char *name; | |
349 | char *start; | |
350 | char c; | |
351 | ||
87271fa6 | 352 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
353 | start = name = input_line_pointer; |
354 | ||
355 | c = get_symbol_end (); | |
356 | reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name); | |
357 | ||
468cced8 AM |
358 | /* Put back the delimiting char. */ |
359 | *input_line_pointer = c; | |
360 | ||
87271fa6 NC |
361 | /* Look to see if it's in the register table. */ |
362 | if (reg_number >= 0) | |
85cb2cf9 JL |
363 | { |
364 | expressionP->X_op = O_register; | |
365 | expressionP->X_add_number = reg_number; | |
366 | ||
87271fa6 | 367 | /* Make the rest nice. */ |
85cb2cf9 JL |
368 | expressionP->X_add_symbol = NULL; |
369 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 370 | |
b34976b6 | 371 | return TRUE; |
85cb2cf9 | 372 | } |
87271fa6 | 373 | |
468cced8 AM |
374 | /* Reset the line as if we had not done anything. */ |
375 | input_line_pointer = start; | |
b34976b6 | 376 | return FALSE; |
85cb2cf9 | 377 | } |
252b5132 RH |
378 | |
379 | /* Summary of register_name(). | |
380 | * | |
381 | * in: Input_line_pointer points to 1st char of operand. | |
382 | * | |
b6ff326e | 383 | * out: An expressionS. |
252b5132 RH |
384 | * The operand may have been a register: in this case, X_op == O_register, |
385 | * X_add_number is set to the register number, and truth is returned. | |
386 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
387 | * its original state. | |
388 | */ | |
87271fa6 | 389 | |
b34976b6 | 390 | static bfd_boolean |
252b5132 RH |
391 | data_register_name (expressionP) |
392 | expressionS *expressionP; | |
393 | { | |
394 | int reg_number; | |
395 | char *name; | |
396 | char *start; | |
397 | char c; | |
398 | ||
87271fa6 | 399 | /* Find the spelling of the operand. */ |
252b5132 RH |
400 | start = name = input_line_pointer; |
401 | ||
402 | c = get_symbol_end (); | |
403 | reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name); | |
404 | ||
468cced8 AM |
405 | /* Put back the delimiting char. */ |
406 | *input_line_pointer = c; | |
407 | ||
87271fa6 NC |
408 | /* Look to see if it's in the register table. */ |
409 | if (reg_number >= 0) | |
252b5132 RH |
410 | { |
411 | expressionP->X_op = O_register; | |
412 | expressionP->X_add_number = reg_number; | |
413 | ||
87271fa6 | 414 | /* Make the rest nice. */ |
252b5132 RH |
415 | expressionP->X_add_symbol = NULL; |
416 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 417 | |
b34976b6 | 418 | return TRUE; |
252b5132 | 419 | } |
87271fa6 | 420 | |
468cced8 AM |
421 | /* Reset the line as if we had not done anything. */ |
422 | input_line_pointer = start; | |
b34976b6 | 423 | return FALSE; |
252b5132 RH |
424 | } |
425 | ||
426 | /* Summary of register_name(). | |
427 | * | |
428 | * in: Input_line_pointer points to 1st char of operand. | |
429 | * | |
b6ff326e | 430 | * out: An expressionS. |
252b5132 RH |
431 | * The operand may have been a register: in this case, X_op == O_register, |
432 | * X_add_number is set to the register number, and truth is returned. | |
433 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
434 | * its original state. | |
435 | */ | |
87271fa6 | 436 | |
b34976b6 | 437 | static bfd_boolean |
252b5132 RH |
438 | address_register_name (expressionP) |
439 | expressionS *expressionP; | |
440 | { | |
441 | int reg_number; | |
442 | char *name; | |
443 | char *start; | |
444 | char c; | |
445 | ||
87271fa6 | 446 | /* Find the spelling of the operand. */ |
252b5132 RH |
447 | start = name = input_line_pointer; |
448 | ||
449 | c = get_symbol_end (); | |
450 | reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name); | |
451 | ||
468cced8 AM |
452 | /* Put back the delimiting char. */ |
453 | *input_line_pointer = c; | |
454 | ||
87271fa6 NC |
455 | /* Look to see if it's in the register table. */ |
456 | if (reg_number >= 0) | |
252b5132 RH |
457 | { |
458 | expressionP->X_op = O_register; | |
459 | expressionP->X_add_number = reg_number; | |
460 | ||
87271fa6 | 461 | /* Make the rest nice. */ |
252b5132 RH |
462 | expressionP->X_add_symbol = NULL; |
463 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 464 | |
b34976b6 | 465 | return TRUE; |
252b5132 | 466 | } |
87271fa6 | 467 | |
468cced8 AM |
468 | /* Reset the line as if we had not done anything. */ |
469 | input_line_pointer = start; | |
b34976b6 | 470 | return FALSE; |
252b5132 RH |
471 | } |
472 | ||
473 | /* Summary of register_name(). | |
474 | * | |
475 | * in: Input_line_pointer points to 1st char of operand. | |
476 | * | |
b6ff326e | 477 | * out: An expressionS. |
252b5132 RH |
478 | * The operand may have been a register: in this case, X_op == O_register, |
479 | * X_add_number is set to the register number, and truth is returned. | |
480 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
481 | * its original state. | |
482 | */ | |
87271fa6 | 483 | |
b34976b6 | 484 | static bfd_boolean |
252b5132 RH |
485 | other_register_name (expressionP) |
486 | expressionS *expressionP; | |
487 | { | |
488 | int reg_number; | |
489 | char *name; | |
490 | char *start; | |
491 | char c; | |
492 | ||
87271fa6 | 493 | /* Find the spelling of the operand. */ |
252b5132 RH |
494 | start = name = input_line_pointer; |
495 | ||
496 | c = get_symbol_end (); | |
497 | reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name); | |
498 | ||
468cced8 AM |
499 | /* Put back the delimiting char. */ |
500 | *input_line_pointer = c; | |
501 | ||
87271fa6 | 502 | /* Look to see if it's in the register table. */ |
913572ec AO |
503 | if (reg_number == 0 |
504 | || (reg_number == AM33 && HAVE_AM33)) | |
252b5132 RH |
505 | { |
506 | expressionP->X_op = O_register; | |
913572ec | 507 | expressionP->X_add_number = 0; |
252b5132 | 508 | |
87271fa6 | 509 | /* Make the rest nice. */ |
252b5132 RH |
510 | expressionP->X_add_symbol = NULL; |
511 | expressionP->X_op_symbol = NULL; | |
87271fa6 | 512 | |
b34976b6 | 513 | return TRUE; |
252b5132 | 514 | } |
87271fa6 | 515 | |
468cced8 AM |
516 | /* Reset the line as if we had not done anything. */ |
517 | input_line_pointer = start; | |
b34976b6 | 518 | return FALSE; |
252b5132 RH |
519 | } |
520 | ||
521 | void | |
522 | md_show_usage (stream) | |
87271fa6 | 523 | FILE *stream; |
252b5132 | 524 | { |
87271fa6 | 525 | fprintf (stream, _("MN10300 options:\n\ |
252b5132 | 526 | none yet\n")); |
87271fa6 | 527 | } |
252b5132 RH |
528 | |
529 | int | |
530 | md_parse_option (c, arg) | |
b4c1ea07 EC |
531 | int c ATTRIBUTE_UNUSED; |
532 | char *arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
533 | { |
534 | return 0; | |
535 | } | |
536 | ||
537 | symbolS * | |
538 | md_undefined_symbol (name) | |
b4c1ea07 | 539 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
540 | { |
541 | return 0; | |
542 | } | |
543 | ||
544 | char * | |
545 | md_atof (type, litp, sizep) | |
87271fa6 NC |
546 | int type; |
547 | char *litp; | |
548 | int *sizep; | |
252b5132 RH |
549 | { |
550 | int prec; | |
551 | LITTLENUM_TYPE words[4]; | |
552 | char *t; | |
553 | int i; | |
554 | ||
555 | switch (type) | |
556 | { | |
557 | case 'f': | |
558 | prec = 2; | |
559 | break; | |
560 | ||
561 | case 'd': | |
562 | prec = 4; | |
563 | break; | |
564 | ||
565 | default: | |
566 | *sizep = 0; | |
567 | return "bad call to md_atof"; | |
568 | } | |
87271fa6 | 569 | |
252b5132 RH |
570 | t = atof_ieee (input_line_pointer, type, words); |
571 | if (t) | |
572 | input_line_pointer = t; | |
573 | ||
574 | *sizep = prec * 2; | |
575 | ||
576 | for (i = prec - 1; i >= 0; i--) | |
577 | { | |
578 | md_number_to_chars (litp, (valueT) words[i], 2); | |
579 | litp += 2; | |
580 | } | |
581 | ||
582 | return NULL; | |
583 | } | |
584 | ||
252b5132 RH |
585 | void |
586 | md_convert_frag (abfd, sec, fragP) | |
b4c1ea07 | 587 | bfd *abfd ATTRIBUTE_UNUSED; |
87271fa6 NC |
588 | asection *sec; |
589 | fragS *fragP; | |
252b5132 RH |
590 | { |
591 | static unsigned long label_count = 0; | |
592 | char buf[40]; | |
593 | ||
594 | subseg_change (sec, 0); | |
595 | if (fragP->fr_subtype == 0) | |
596 | { | |
597 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
598 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
599 | fragP->fr_var = 0; | |
600 | fragP->fr_fix += 2; | |
601 | } | |
602 | else if (fragP->fr_subtype == 1) | |
603 | { | |
604 | /* Reverse the condition of the first branch. */ | |
605 | int offset = fragP->fr_fix; | |
606 | int opcode = fragP->fr_literal[offset] & 0xff; | |
607 | ||
608 | switch (opcode) | |
609 | { | |
610 | case 0xc8: | |
611 | opcode = 0xc9; | |
612 | break; | |
613 | case 0xc9: | |
614 | opcode = 0xc8; | |
615 | break; | |
616 | case 0xc0: | |
617 | opcode = 0xc2; | |
618 | break; | |
619 | case 0xc2: | |
620 | opcode = 0xc0; | |
621 | break; | |
622 | case 0xc3: | |
623 | opcode = 0xc1; | |
624 | break; | |
625 | case 0xc1: | |
626 | opcode = 0xc3; | |
627 | break; | |
628 | case 0xc4: | |
629 | opcode = 0xc6; | |
630 | break; | |
631 | case 0xc6: | |
632 | opcode = 0xc4; | |
633 | break; | |
634 | case 0xc7: | |
635 | opcode = 0xc5; | |
636 | break; | |
637 | case 0xc5: | |
638 | opcode = 0xc7; | |
639 | break; | |
640 | default: | |
641 | abort (); | |
642 | } | |
643 | fragP->fr_literal[offset] = opcode; | |
644 | ||
645 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 646 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
647 | fix_new (fragP, fragP->fr_fix + 1, 1, |
648 | symbol_new (buf, sec, 0, fragP->fr_next), | |
649 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
650 | ||
651 | /* Now create the unconditional branch + fixup to the | |
652 | final target. */ | |
653 | fragP->fr_literal[offset + 2] = 0xcc; | |
654 | fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, | |
655 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
656 | fragP->fr_var = 0; | |
657 | fragP->fr_fix += 5; | |
658 | } | |
659 | else if (fragP->fr_subtype == 2) | |
660 | { | |
661 | /* Reverse the condition of the first branch. */ | |
662 | int offset = fragP->fr_fix; | |
663 | int opcode = fragP->fr_literal[offset] & 0xff; | |
664 | ||
665 | switch (opcode) | |
666 | { | |
667 | case 0xc8: | |
668 | opcode = 0xc9; | |
669 | break; | |
670 | case 0xc9: | |
671 | opcode = 0xc8; | |
672 | break; | |
673 | case 0xc0: | |
674 | opcode = 0xc2; | |
675 | break; | |
676 | case 0xc2: | |
677 | opcode = 0xc0; | |
678 | break; | |
679 | case 0xc3: | |
680 | opcode = 0xc1; | |
681 | break; | |
682 | case 0xc1: | |
683 | opcode = 0xc3; | |
684 | break; | |
685 | case 0xc4: | |
686 | opcode = 0xc6; | |
687 | break; | |
688 | case 0xc6: | |
689 | opcode = 0xc4; | |
690 | break; | |
691 | case 0xc7: | |
692 | opcode = 0xc5; | |
693 | break; | |
694 | case 0xc5: | |
695 | opcode = 0xc7; | |
696 | break; | |
697 | default: | |
698 | abort (); | |
699 | } | |
700 | fragP->fr_literal[offset] = opcode; | |
701 | ||
702 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 703 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
704 | fix_new (fragP, fragP->fr_fix + 1, 1, |
705 | symbol_new (buf, sec, 0, fragP->fr_next), | |
706 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
707 | ||
708 | /* Now create the unconditional branch + fixup to the | |
709 | final target. */ | |
710 | fragP->fr_literal[offset + 2] = 0xdc; | |
711 | fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, | |
712 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
713 | fragP->fr_var = 0; | |
714 | fragP->fr_fix += 7; | |
715 | } | |
716 | else if (fragP->fr_subtype == 3) | |
717 | { | |
718 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
719 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
720 | fragP->fr_var = 0; | |
721 | fragP->fr_fix += 3; | |
722 | } | |
723 | else if (fragP->fr_subtype == 4) | |
724 | { | |
725 | /* Reverse the condition of the first branch. */ | |
726 | int offset = fragP->fr_fix; | |
727 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
728 | ||
729 | switch (opcode) | |
730 | { | |
731 | case 0xe8: | |
732 | opcode = 0xe9; | |
733 | break; | |
734 | case 0xe9: | |
735 | opcode = 0xe8; | |
736 | break; | |
737 | case 0xea: | |
738 | opcode = 0xeb; | |
739 | break; | |
740 | case 0xeb: | |
741 | opcode = 0xea; | |
742 | break; | |
743 | default: | |
744 | abort (); | |
745 | } | |
746 | fragP->fr_literal[offset + 1] = opcode; | |
747 | ||
748 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 749 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
750 | fix_new (fragP, fragP->fr_fix + 2, 1, |
751 | symbol_new (buf, sec, 0, fragP->fr_next), | |
752 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
753 | ||
754 | /* Now create the unconditional branch + fixup to the | |
755 | final target. */ | |
756 | fragP->fr_literal[offset + 3] = 0xcc; | |
757 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
758 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
759 | fragP->fr_var = 0; | |
760 | fragP->fr_fix += 6; | |
761 | } | |
762 | else if (fragP->fr_subtype == 5) | |
763 | { | |
764 | /* Reverse the condition of the first branch. */ | |
765 | int offset = fragP->fr_fix; | |
766 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
767 | ||
768 | switch (opcode) | |
769 | { | |
770 | case 0xe8: | |
771 | opcode = 0xe9; | |
772 | break; | |
773 | case 0xea: | |
774 | opcode = 0xeb; | |
775 | break; | |
776 | case 0xeb: | |
777 | opcode = 0xea; | |
778 | break; | |
779 | default: | |
780 | abort (); | |
781 | } | |
782 | fragP->fr_literal[offset + 1] = opcode; | |
783 | ||
784 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 785 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
786 | fix_new (fragP, fragP->fr_fix + 2, 1, |
787 | symbol_new (buf, sec, 0, fragP->fr_next), | |
788 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
789 | ||
790 | /* Now create the unconditional branch + fixup to the | |
791 | final target. */ | |
792 | fragP->fr_literal[offset + 3] = 0xdc; | |
793 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
794 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
795 | fragP->fr_var = 0; | |
796 | fragP->fr_fix += 8; | |
797 | } | |
798 | else if (fragP->fr_subtype == 6) | |
799 | { | |
800 | int offset = fragP->fr_fix; | |
801 | fragP->fr_literal[offset] = 0xcd; | |
802 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, | |
803 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
804 | fragP->fr_var = 0; | |
805 | fragP->fr_fix += 5; | |
806 | } | |
807 | else if (fragP->fr_subtype == 7) | |
808 | { | |
809 | int offset = fragP->fr_fix; | |
810 | fragP->fr_literal[offset] = 0xdd; | |
811 | fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; | |
812 | fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; | |
813 | ||
814 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
815 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
816 | fragP->fr_var = 0; | |
817 | fragP->fr_fix += 7; | |
818 | } | |
819 | else if (fragP->fr_subtype == 8) | |
820 | { | |
821 | int offset = fragP->fr_fix; | |
822 | fragP->fr_literal[offset] = 0xfa; | |
823 | fragP->fr_literal[offset + 1] = 0xff; | |
824 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
825 | fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); | |
826 | fragP->fr_var = 0; | |
827 | fragP->fr_fix += 4; | |
828 | } | |
829 | else if (fragP->fr_subtype == 9) | |
830 | { | |
831 | int offset = fragP->fr_fix; | |
832 | fragP->fr_literal[offset] = 0xfc; | |
833 | fragP->fr_literal[offset + 1] = 0xff; | |
834 | ||
835 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, | |
836 | fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); | |
837 | fragP->fr_var = 0; | |
838 | fragP->fr_fix += 6; | |
839 | } | |
840 | else if (fragP->fr_subtype == 10) | |
841 | { | |
842 | fragP->fr_literal[fragP->fr_fix] = 0xca; | |
843 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
844 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
845 | fragP->fr_var = 0; | |
846 | fragP->fr_fix += 2; | |
847 | } | |
848 | else if (fragP->fr_subtype == 11) | |
849 | { | |
850 | int offset = fragP->fr_fix; | |
851 | fragP->fr_literal[offset] = 0xcc; | |
852 | ||
853 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
854 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
855 | fragP->fr_var = 0; | |
856 | fragP->fr_fix += 3; | |
857 | } | |
858 | else if (fragP->fr_subtype == 12) | |
859 | { | |
860 | int offset = fragP->fr_fix; | |
861 | fragP->fr_literal[offset] = 0xdc; | |
862 | ||
863 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
864 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
865 | fragP->fr_var = 0; | |
866 | fragP->fr_fix += 5; | |
867 | } | |
868 | else | |
869 | abort (); | |
870 | } | |
871 | ||
872 | valueT | |
873 | md_section_align (seg, addr) | |
874 | asection *seg; | |
875 | valueT addr; | |
876 | { | |
877 | int align = bfd_get_section_alignment (stdoutput, seg); | |
878 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
879 | } | |
880 | ||
881 | void | |
882 | md_begin () | |
883 | { | |
884 | char *prev_name = ""; | |
885 | register const struct mn10300_opcode *op; | |
886 | ||
87271fa6 | 887 | mn10300_hash = hash_new (); |
252b5132 RH |
888 | |
889 | /* Insert unique names into hash table. The MN10300 instruction set | |
890 | has many identical opcode names that have different opcodes based | |
891 | on the operands. This hash table then provides a quick index to | |
892 | the first opcode with a particular name in the opcode table. */ | |
893 | ||
894 | op = mn10300_opcodes; | |
895 | while (op->name) | |
896 | { | |
87271fa6 | 897 | if (strcmp (prev_name, op->name)) |
252b5132 RH |
898 | { |
899 | prev_name = (char *) op->name; | |
900 | hash_insert (mn10300_hash, op->name, (char *) op); | |
901 | } | |
902 | op++; | |
903 | } | |
904 | ||
252b5132 | 905 | /* Set the default machine type. */ |
0a727238 | 906 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) |
252b5132 RH |
907 | as_warn (_("could not set architecture and machine")); |
908 | ||
0a727238 | 909 | current_machine = MN103; |
252b5132 RH |
910 | } |
911 | ||
912 | void | |
87271fa6 | 913 | md_assemble (str) |
252b5132 RH |
914 | char *str; |
915 | { | |
916 | char *s; | |
917 | struct mn10300_opcode *opcode; | |
918 | struct mn10300_opcode *next_opcode; | |
919 | const unsigned char *opindex_ptr; | |
920 | int next_opindex, relaxable; | |
eb0dfd58 | 921 | unsigned long insn, extension, size = 0; |
252b5132 RH |
922 | char *f; |
923 | int i; | |
924 | int match; | |
925 | ||
926 | /* Get the opcode. */ | |
3882b010 | 927 | for (s = str; *s != '\0' && !ISSPACE (*s); s++) |
252b5132 RH |
928 | ; |
929 | if (*s != '\0') | |
930 | *s++ = '\0'; | |
931 | ||
87271fa6 NC |
932 | /* Find the first opcode with the proper name. */ |
933 | opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str); | |
252b5132 RH |
934 | if (opcode == NULL) |
935 | { | |
936 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
937 | return; | |
938 | } | |
939 | ||
940 | str = s; | |
3882b010 | 941 | while (ISSPACE (*str)) |
252b5132 RH |
942 | ++str; |
943 | ||
944 | input_line_pointer = str; | |
945 | ||
87271fa6 | 946 | for (;;) |
252b5132 RH |
947 | { |
948 | const char *errmsg; | |
949 | int op_idx; | |
950 | char *hold; | |
951 | int extra_shift = 0; | |
952 | ||
252b5132 RH |
953 | errmsg = _("Invalid opcode/operands"); |
954 | ||
955 | /* Reset the array of register operands. */ | |
956 | memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); | |
957 | ||
958 | relaxable = 0; | |
959 | fc = 0; | |
960 | match = 0; | |
961 | next_opindex = 0; | |
962 | insn = opcode->opcode; | |
963 | extension = 0; | |
964 | ||
965 | /* If the instruction is not available on the current machine | |
966 | then it can not possibly match. */ | |
967 | if (opcode->machine | |
aa15f6f7 AO |
968 | && !(opcode->machine == AM33 && HAVE_AM33) |
969 | && !(opcode->machine == AM30 && HAVE_AM30)) | |
252b5132 RH |
970 | goto error; |
971 | ||
972 | for (op_idx = 1, opindex_ptr = opcode->operands; | |
973 | *opindex_ptr != 0; | |
974 | opindex_ptr++, op_idx++) | |
975 | { | |
976 | const struct mn10300_operand *operand; | |
977 | expressionS ex; | |
978 | ||
979 | if (next_opindex == 0) | |
980 | { | |
981 | operand = &mn10300_operands[*opindex_ptr]; | |
982 | } | |
983 | else | |
984 | { | |
985 | operand = &mn10300_operands[next_opindex]; | |
986 | next_opindex = 0; | |
987 | } | |
988 | ||
989 | while (*str == ' ' || *str == ',') | |
990 | ++str; | |
991 | ||
992 | if (operand->flags & MN10300_OPERAND_RELAX) | |
993 | relaxable = 1; | |
994 | ||
87271fa6 | 995 | /* Gather the operand. */ |
252b5132 RH |
996 | hold = input_line_pointer; |
997 | input_line_pointer = str; | |
998 | ||
999 | if (operand->flags & MN10300_OPERAND_PAREN) | |
1000 | { | |
1001 | if (*input_line_pointer != ')' && *input_line_pointer != '(') | |
1002 | { | |
1003 | input_line_pointer = hold; | |
1004 | str = hold; | |
1005 | goto error; | |
1006 | } | |
1007 | input_line_pointer++; | |
1008 | goto keep_going; | |
1009 | } | |
1010 | /* See if we can match the operands. */ | |
1011 | else if (operand->flags & MN10300_OPERAND_DREG) | |
1012 | { | |
1013 | if (!data_register_name (&ex)) | |
1014 | { | |
1015 | input_line_pointer = hold; | |
1016 | str = hold; | |
1017 | goto error; | |
1018 | } | |
1019 | } | |
1020 | else if (operand->flags & MN10300_OPERAND_AREG) | |
1021 | { | |
1022 | if (!address_register_name (&ex)) | |
1023 | { | |
1024 | input_line_pointer = hold; | |
1025 | str = hold; | |
1026 | goto error; | |
1027 | } | |
1028 | } | |
1029 | else if (operand->flags & MN10300_OPERAND_SP) | |
1030 | { | |
1031 | char *start = input_line_pointer; | |
1032 | char c = get_symbol_end (); | |
1033 | ||
1034 | if (strcasecmp (start, "sp") != 0) | |
1035 | { | |
1036 | *input_line_pointer = c; | |
1037 | input_line_pointer = hold; | |
1038 | str = hold; | |
1039 | goto error; | |
1040 | } | |
1041 | *input_line_pointer = c; | |
1042 | goto keep_going; | |
1043 | } | |
85cb2cf9 JL |
1044 | else if (operand->flags & MN10300_OPERAND_RREG) |
1045 | { | |
1046 | if (!r_register_name (&ex)) | |
1047 | { | |
1048 | input_line_pointer = hold; | |
1049 | str = hold; | |
1050 | goto error; | |
1051 | } | |
1052 | } | |
1053 | else if (operand->flags & MN10300_OPERAND_XRREG) | |
1054 | { | |
1055 | if (!xr_register_name (&ex)) | |
1056 | { | |
1057 | input_line_pointer = hold; | |
1058 | str = hold; | |
1059 | goto error; | |
1060 | } | |
1061 | } | |
1062 | else if (operand->flags & MN10300_OPERAND_USP) | |
1063 | { | |
1064 | char *start = input_line_pointer; | |
1065 | char c = get_symbol_end (); | |
1066 | ||
1067 | if (strcasecmp (start, "usp") != 0) | |
1068 | { | |
1069 | *input_line_pointer = c; | |
1070 | input_line_pointer = hold; | |
1071 | str = hold; | |
1072 | goto error; | |
1073 | } | |
1074 | *input_line_pointer = c; | |
1075 | goto keep_going; | |
1076 | } | |
1077 | else if (operand->flags & MN10300_OPERAND_SSP) | |
1078 | { | |
1079 | char *start = input_line_pointer; | |
1080 | char c = get_symbol_end (); | |
1081 | ||
1082 | if (strcasecmp (start, "ssp") != 0) | |
1083 | { | |
1084 | *input_line_pointer = c; | |
1085 | input_line_pointer = hold; | |
1086 | str = hold; | |
1087 | goto error; | |
1088 | } | |
1089 | *input_line_pointer = c; | |
1090 | goto keep_going; | |
1091 | } | |
1092 | else if (operand->flags & MN10300_OPERAND_MSP) | |
1093 | { | |
1094 | char *start = input_line_pointer; | |
1095 | char c = get_symbol_end (); | |
1096 | ||
1097 | if (strcasecmp (start, "msp") != 0) | |
1098 | { | |
1099 | *input_line_pointer = c; | |
1100 | input_line_pointer = hold; | |
1101 | str = hold; | |
1102 | goto error; | |
1103 | } | |
1104 | *input_line_pointer = c; | |
1105 | goto keep_going; | |
1106 | } | |
1107 | else if (operand->flags & MN10300_OPERAND_PC) | |
1108 | { | |
1109 | char *start = input_line_pointer; | |
1110 | char c = get_symbol_end (); | |
1111 | ||
1112 | if (strcasecmp (start, "pc") != 0) | |
1113 | { | |
1114 | *input_line_pointer = c; | |
1115 | input_line_pointer = hold; | |
1116 | str = hold; | |
1117 | goto error; | |
1118 | } | |
1119 | *input_line_pointer = c; | |
1120 | goto keep_going; | |
1121 | } | |
1122 | else if (operand->flags & MN10300_OPERAND_EPSW) | |
1123 | { | |
1124 | char *start = input_line_pointer; | |
1125 | char c = get_symbol_end (); | |
1126 | ||
1127 | if (strcasecmp (start, "epsw") != 0) | |
1128 | { | |
1129 | *input_line_pointer = c; | |
1130 | input_line_pointer = hold; | |
1131 | str = hold; | |
1132 | goto error; | |
1133 | } | |
1134 | *input_line_pointer = c; | |
1135 | goto keep_going; | |
1136 | } | |
1137 | else if (operand->flags & MN10300_OPERAND_PLUS) | |
1138 | { | |
1139 | if (*input_line_pointer != '+') | |
1140 | { | |
1141 | input_line_pointer = hold; | |
1142 | str = hold; | |
1143 | goto error; | |
1144 | } | |
1145 | input_line_pointer++; | |
1146 | goto keep_going; | |
1147 | } | |
252b5132 RH |
1148 | else if (operand->flags & MN10300_OPERAND_PSW) |
1149 | { | |
1150 | char *start = input_line_pointer; | |
1151 | char c = get_symbol_end (); | |
1152 | ||
1153 | if (strcasecmp (start, "psw") != 0) | |
1154 | { | |
1155 | *input_line_pointer = c; | |
1156 | input_line_pointer = hold; | |
1157 | str = hold; | |
1158 | goto error; | |
1159 | } | |
1160 | *input_line_pointer = c; | |
1161 | goto keep_going; | |
1162 | } | |
1163 | else if (operand->flags & MN10300_OPERAND_MDR) | |
1164 | { | |
1165 | char *start = input_line_pointer; | |
1166 | char c = get_symbol_end (); | |
1167 | ||
1168 | if (strcasecmp (start, "mdr") != 0) | |
1169 | { | |
1170 | *input_line_pointer = c; | |
1171 | input_line_pointer = hold; | |
1172 | str = hold; | |
1173 | goto error; | |
1174 | } | |
1175 | *input_line_pointer = c; | |
1176 | goto keep_going; | |
1177 | } | |
1178 | else if (operand->flags & MN10300_OPERAND_REG_LIST) | |
1179 | { | |
1180 | unsigned int value = 0; | |
1181 | if (*input_line_pointer != '[') | |
1182 | { | |
1183 | input_line_pointer = hold; | |
1184 | str = hold; | |
1185 | goto error; | |
1186 | } | |
1187 | ||
1188 | /* Eat the '['. */ | |
1189 | input_line_pointer++; | |
87271fa6 | 1190 | |
252b5132 | 1191 | /* We used to reject a null register list here; however, |
87271fa6 NC |
1192 | we accept it now so the compiler can emit "call" |
1193 | instructions for all calls to named functions. | |
252b5132 RH |
1194 | |
1195 | The linker can then fill in the appropriate bits for the | |
1196 | register list and stack size or change the instruction | |
1197 | into a "calls" if using "call" is not profitable. */ | |
1198 | while (*input_line_pointer != ']') | |
1199 | { | |
1200 | char *start; | |
1201 | char c; | |
1202 | ||
1203 | if (*input_line_pointer == ',') | |
1204 | input_line_pointer++; | |
1205 | ||
1206 | start = input_line_pointer; | |
1207 | c = get_symbol_end (); | |
1208 | ||
1209 | if (strcasecmp (start, "d2") == 0) | |
1210 | { | |
1211 | value |= 0x80; | |
1212 | *input_line_pointer = c; | |
1213 | } | |
1214 | else if (strcasecmp (start, "d3") == 0) | |
1215 | { | |
1216 | value |= 0x40; | |
1217 | *input_line_pointer = c; | |
1218 | } | |
1219 | else if (strcasecmp (start, "a2") == 0) | |
1220 | { | |
1221 | value |= 0x20; | |
1222 | *input_line_pointer = c; | |
1223 | } | |
1224 | else if (strcasecmp (start, "a3") == 0) | |
1225 | { | |
1226 | value |= 0x10; | |
1227 | *input_line_pointer = c; | |
1228 | } | |
1229 | else if (strcasecmp (start, "other") == 0) | |
1230 | { | |
1231 | value |= 0x08; | |
1232 | *input_line_pointer = c; | |
1233 | } | |
0a727238 | 1234 | else if (HAVE_AM33 |
85cb2cf9 JL |
1235 | && strcasecmp (start, "exreg0") == 0) |
1236 | { | |
1237 | value |= 0x04; | |
1238 | *input_line_pointer = c; | |
1239 | } | |
0a727238 | 1240 | else if (HAVE_AM33 |
85cb2cf9 JL |
1241 | && strcasecmp (start, "exreg1") == 0) |
1242 | { | |
1243 | value |= 0x02; | |
1244 | *input_line_pointer = c; | |
1245 | } | |
0a727238 | 1246 | else if (HAVE_AM33 |
85cb2cf9 JL |
1247 | && strcasecmp (start, "exother") == 0) |
1248 | { | |
1249 | value |= 0x01; | |
1250 | *input_line_pointer = c; | |
1251 | } | |
0a727238 | 1252 | else if (HAVE_AM33 |
85cb2cf9 JL |
1253 | && strcasecmp (start, "all") == 0) |
1254 | { | |
1255 | value |= 0xff; | |
1256 | *input_line_pointer = c; | |
1257 | } | |
252b5132 RH |
1258 | else |
1259 | { | |
1260 | input_line_pointer = hold; | |
1261 | str = hold; | |
1262 | goto error; | |
1263 | } | |
1264 | } | |
1265 | input_line_pointer++; | |
1266 | mn10300_insert_operand (&insn, &extension, operand, | |
1267 | value, (char *) NULL, 0, 0); | |
1268 | goto keep_going; | |
1269 | ||
1270 | } | |
1271 | else if (data_register_name (&ex)) | |
1272 | { | |
1273 | input_line_pointer = hold; | |
1274 | str = hold; | |
1275 | goto error; | |
1276 | } | |
1277 | else if (address_register_name (&ex)) | |
1278 | { | |
1279 | input_line_pointer = hold; | |
1280 | str = hold; | |
1281 | goto error; | |
1282 | } | |
1283 | else if (other_register_name (&ex)) | |
1284 | { | |
1285 | input_line_pointer = hold; | |
1286 | str = hold; | |
1287 | goto error; | |
1288 | } | |
0a727238 | 1289 | else if (HAVE_AM33 && r_register_name (&ex)) |
85cb2cf9 JL |
1290 | { |
1291 | input_line_pointer = hold; | |
1292 | str = hold; | |
1293 | goto error; | |
1294 | } | |
0a727238 | 1295 | else if (HAVE_AM33 && xr_register_name (&ex)) |
85cb2cf9 JL |
1296 | { |
1297 | input_line_pointer = hold; | |
1298 | str = hold; | |
1299 | goto error; | |
1300 | } | |
252b5132 RH |
1301 | else if (*str == ')' || *str == '(') |
1302 | { | |
1303 | input_line_pointer = hold; | |
1304 | str = hold; | |
1305 | goto error; | |
1306 | } | |
1307 | else | |
1308 | { | |
1309 | expression (&ex); | |
1310 | } | |
1311 | ||
87271fa6 | 1312 | switch (ex.X_op) |
252b5132 RH |
1313 | { |
1314 | case O_illegal: | |
1315 | errmsg = _("illegal operand"); | |
1316 | goto error; | |
1317 | case O_absent: | |
1318 | errmsg = _("missing operand"); | |
1319 | goto error; | |
1320 | case O_register: | |
1321 | { | |
1322 | int mask; | |
1323 | ||
1324 | mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; | |
0a727238 AO |
1325 | if (HAVE_AM33) |
1326 | mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; | |
252b5132 RH |
1327 | if ((operand->flags & mask) == 0) |
1328 | { | |
1329 | input_line_pointer = hold; | |
1330 | str = hold; | |
1331 | goto error; | |
1332 | } | |
87271fa6 | 1333 | |
252b5132 RH |
1334 | if (opcode->format == FMT_D1 || opcode->format == FMT_S1) |
1335 | extra_shift = 8; | |
1336 | else if (opcode->format == FMT_D2 | |
1337 | || opcode->format == FMT_D4 | |
1338 | || opcode->format == FMT_S2 | |
1339 | || opcode->format == FMT_S4 | |
1340 | || opcode->format == FMT_S6 | |
1341 | || opcode->format == FMT_D5) | |
1342 | extra_shift = 16; | |
85cb2cf9 JL |
1343 | else if (opcode->format == FMT_D7) |
1344 | extra_shift = 8; | |
1345 | else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) | |
1346 | extra_shift = 8; | |
252b5132 RH |
1347 | else |
1348 | extra_shift = 0; | |
87271fa6 | 1349 | |
252b5132 RH |
1350 | mn10300_insert_operand (&insn, &extension, operand, |
1351 | ex.X_add_number, (char *) NULL, | |
1352 | 0, extra_shift); | |
1353 | ||
252b5132 RH |
1354 | /* And note the register number in the register array. */ |
1355 | mn10300_reg_operands[op_idx - 1] = ex.X_add_number; | |
1356 | break; | |
1357 | } | |
1358 | ||
1359 | case O_constant: | |
1360 | /* If this operand can be promoted, and it doesn't | |
1361 | fit into the allocated bitfield for this insn, | |
1362 | then promote it (ie this opcode does not match). */ | |
1363 | if (operand->flags | |
1364 | & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) | |
87271fa6 | 1365 | && !check_operand (insn, operand, ex.X_add_number)) |
252b5132 RH |
1366 | { |
1367 | input_line_pointer = hold; | |
1368 | str = hold; | |
1369 | goto error; | |
1370 | } | |
1371 | ||
1372 | mn10300_insert_operand (&insn, &extension, operand, | |
1373 | ex.X_add_number, (char *) NULL, | |
1374 | 0, 0); | |
1375 | break; | |
1376 | ||
1377 | default: | |
1378 | /* If this operand can be promoted, then this opcode didn't | |
1379 | match since we can't know if it needed promotion! */ | |
1380 | if (operand->flags & MN10300_OPERAND_PROMOTE) | |
1381 | { | |
1382 | input_line_pointer = hold; | |
1383 | str = hold; | |
1384 | goto error; | |
1385 | } | |
1386 | ||
1387 | /* We need to generate a fixup for this expression. */ | |
1388 | if (fc >= MAX_INSN_FIXUPS) | |
1389 | as_fatal (_("too many fixups")); | |
1390 | fixups[fc].exp = ex; | |
1391 | fixups[fc].opindex = *opindex_ptr; | |
1392 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
1393 | ++fc; | |
1394 | break; | |
1395 | } | |
1396 | ||
1397 | keep_going: | |
1398 | str = input_line_pointer; | |
1399 | input_line_pointer = hold; | |
1400 | ||
1401 | while (*str == ' ' || *str == ',') | |
1402 | ++str; | |
1403 | ||
1404 | } | |
1405 | ||
1406 | /* Make sure we used all the operands! */ | |
1407 | if (*str != ',') | |
1408 | match = 1; | |
1409 | ||
1410 | /* If this instruction has registers that must not match, verify | |
1411 | that they do indeed not match. */ | |
1412 | if (opcode->no_match_operands) | |
1413 | { | |
1414 | int i; | |
1415 | ||
1416 | /* Look at each operand to see if it's marked. */ | |
1417 | for (i = 0; i < MN10300_MAX_OPERANDS; i++) | |
1418 | { | |
1419 | if ((1 << i) & opcode->no_match_operands) | |
1420 | { | |
1421 | int j; | |
1422 | ||
1423 | /* operand I is marked. Check that it does not match any | |
1424 | operands > I which are marked. */ | |
1425 | for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) | |
1426 | { | |
1427 | if (((1 << j) & opcode->no_match_operands) | |
1428 | && mn10300_reg_operands[i] == mn10300_reg_operands[j]) | |
1429 | { | |
1430 | errmsg = _("Invalid register specification."); | |
1431 | match = 0; | |
1432 | goto error; | |
1433 | } | |
1434 | } | |
1435 | } | |
1436 | } | |
1437 | } | |
1438 | ||
1439 | error: | |
1440 | if (match == 0) | |
87271fa6 | 1441 | { |
252b5132 | 1442 | next_opcode = opcode + 1; |
87271fa6 | 1443 | if (!strcmp (next_opcode->name, opcode->name)) |
252b5132 RH |
1444 | { |
1445 | opcode = next_opcode; | |
1446 | continue; | |
1447 | } | |
87271fa6 | 1448 | |
252b5132 RH |
1449 | as_bad ("%s", errmsg); |
1450 | return; | |
87271fa6 | 1451 | } |
252b5132 RH |
1452 | break; |
1453 | } | |
87271fa6 | 1454 | |
3882b010 | 1455 | while (ISSPACE (*str)) |
252b5132 RH |
1456 | ++str; |
1457 | ||
1458 | if (*str != '\0') | |
1459 | as_bad (_("junk at end of line: `%s'"), str); | |
1460 | ||
1461 | input_line_pointer = str; | |
1462 | ||
1463 | /* Determine the size of the instruction. */ | |
1464 | if (opcode->format == FMT_S0) | |
1465 | size = 1; | |
1466 | ||
1467 | if (opcode->format == FMT_S1 || opcode->format == FMT_D0) | |
1468 | size = 2; | |
1469 | ||
1470 | if (opcode->format == FMT_S2 || opcode->format == FMT_D1) | |
1471 | size = 3; | |
1472 | ||
85cb2cf9 JL |
1473 | if (opcode->format == FMT_D6) |
1474 | size = 3; | |
1475 | ||
1476 | if (opcode->format == FMT_D7 || opcode->format == FMT_D10) | |
1477 | size = 4; | |
1478 | ||
1479 | if (opcode->format == FMT_D8) | |
1480 | size = 6; | |
1481 | ||
1482 | if (opcode->format == FMT_D9) | |
1483 | size = 7; | |
252b5132 RH |
1484 | |
1485 | if (opcode->format == FMT_S4) | |
1486 | size = 5; | |
1487 | ||
1488 | if (opcode->format == FMT_S6 || opcode->format == FMT_D5) | |
1489 | size = 7; | |
1490 | ||
1491 | if (opcode->format == FMT_D2) | |
1492 | size = 4; | |
1493 | ||
1494 | if (opcode->format == FMT_D4) | |
1495 | size = 6; | |
1496 | ||
1497 | if (relaxable && fc > 0) | |
1498 | { | |
1499 | int type; | |
1500 | ||
076dc439 AO |
1501 | /* We want to anchor the line info to the previous frag (if |
1502 | there isn't one, create it), so that, when the insn is | |
1503 | resized, we still get the right address for the beginning of | |
1504 | the region. */ | |
1505 | f = frag_more (0); | |
1506 | dwarf2_emit_insn (0); | |
1507 | ||
87271fa6 | 1508 | /* bCC */ |
252b5132 RH |
1509 | if (size == 2) |
1510 | { | |
1511 | /* Handle bra specially. Basically treat it like jmp so | |
1512 | that we automatically handle 8, 16 and 32 bit offsets | |
1513 | correctly as well as jumps to an undefined address. | |
1514 | ||
1515 | It is also important to not treat it like other bCC | |
1516 | instructions since the long forms of bra is different | |
1517 | from other bCC instructions. */ | |
1518 | if (opcode->opcode == 0xca00) | |
1519 | type = 10; | |
1520 | else | |
1521 | type = 0; | |
1522 | } | |
87271fa6 | 1523 | /* call */ |
252b5132 | 1524 | else if (size == 5) |
87271fa6 NC |
1525 | type = 6; |
1526 | /* calls */ | |
252b5132 RH |
1527 | else if (size == 4) |
1528 | type = 8; | |
87271fa6 | 1529 | /* jmp */ |
252b5132 RH |
1530 | else if (size == 3 && opcode->opcode == 0xcc0000) |
1531 | type = 10; | |
87271fa6 | 1532 | /* bCC (uncommon cases) */ |
252b5132 RH |
1533 | else |
1534 | type = 3; | |
1535 | ||
1536 | f = frag_var (rs_machine_dependent, 8, 8 - size, type, | |
1537 | fixups[0].exp.X_add_symbol, | |
1538 | fixups[0].exp.X_add_number, | |
1539 | (char *)fixups[0].opindex); | |
87271fa6 | 1540 | |
252b5132 RH |
1541 | /* This is pretty hokey. We basically just care about the |
1542 | opcode, so we have to write out the first word big endian. | |
1543 | ||
1544 | The exception is "call", which has two operands that we | |
1545 | care about. | |
1546 | ||
1547 | The first operand (the register list) happens to be in the | |
1548 | first instruction word, and will be in the right place if | |
1549 | we output the first word in big endian mode. | |
1550 | ||
1551 | The second operand (stack size) is in the extension word, | |
1552 | and we want it to appear as the first character in the extension | |
1553 | word (as it appears in memory). Luckily, writing the extension | |
1554 | word in big endian format will do what we want. */ | |
1555 | number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); | |
1556 | if (size > 8) | |
1557 | { | |
1558 | number_to_chars_bigendian (f + 4, extension, 4); | |
1559 | number_to_chars_bigendian (f + 8, 0, size - 8); | |
1560 | } | |
1561 | else if (size > 4) | |
1562 | number_to_chars_bigendian (f + 4, extension, size - 4); | |
1563 | } | |
1564 | else | |
1565 | { | |
1566 | /* Allocate space for the instruction. */ | |
1567 | f = frag_more (size); | |
1568 | ||
1569 | /* Fill in bytes for the instruction. Note that opcode fields | |
1570 | are written big-endian, 16 & 32bit immediates are written | |
1571 | little endian. Egad. */ | |
1572 | if (opcode->format == FMT_S0 | |
1573 | || opcode->format == FMT_S1 | |
1574 | || opcode->format == FMT_D0 | |
85cb2cf9 JL |
1575 | || opcode->format == FMT_D6 |
1576 | || opcode->format == FMT_D7 | |
1577 | || opcode->format == FMT_D10 | |
252b5132 RH |
1578 | || opcode->format == FMT_D1) |
1579 | { | |
1580 | number_to_chars_bigendian (f, insn, size); | |
1581 | } | |
1582 | else if (opcode->format == FMT_S2 | |
1583 | && opcode->opcode != 0xdf0000 | |
1584 | && opcode->opcode != 0xde0000) | |
1585 | { | |
1586 | /* A format S2 instruction that is _not_ "ret" and "retf". */ | |
1587 | number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); | |
1588 | number_to_chars_littleendian (f + 1, insn & 0xffff, 2); | |
1589 | } | |
1590 | else if (opcode->format == FMT_S2) | |
1591 | { | |
1592 | /* This must be a ret or retf, which is written entirely in | |
1593 | big-endian format. */ | |
1594 | number_to_chars_bigendian (f, insn, 3); | |
1595 | } | |
1596 | else if (opcode->format == FMT_S4 | |
1597 | && opcode->opcode != 0xdc000000) | |
1598 | { | |
1599 | /* This must be a format S4 "call" instruction. What a pain. */ | |
1600 | unsigned long temp = (insn >> 8) & 0xffff; | |
1601 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1602 | number_to_chars_littleendian (f + 1, temp, 2); | |
1603 | number_to_chars_bigendian (f + 3, insn & 0xff, 1); | |
1604 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
1605 | } | |
1606 | else if (opcode->format == FMT_S4) | |
1607 | { | |
1608 | /* This must be a format S4 "jmp" instruction. */ | |
1609 | unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); | |
1610 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1611 | number_to_chars_littleendian (f + 1, temp, 4); | |
1612 | } | |
1613 | else if (opcode->format == FMT_S6) | |
1614 | { | |
1615 | unsigned long temp = ((insn & 0xffffff) << 8) | |
1616 | | ((extension >> 16) & 0xff); | |
1617 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1618 | number_to_chars_littleendian (f + 1, temp, 4); | |
1619 | number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); | |
1620 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1621 | } | |
1622 | else if (opcode->format == FMT_D2 | |
1623 | && opcode->opcode != 0xfaf80000 | |
1624 | && opcode->opcode != 0xfaf00000 | |
1625 | && opcode->opcode != 0xfaf40000) | |
1626 | { | |
1627 | /* A format D2 instruction where the 16bit immediate is | |
1628 | really a single 16bit value, not two 8bit values. */ | |
1629 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
1630 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
1631 | } | |
1632 | else if (opcode->format == FMT_D2) | |
1633 | { | |
1634 | /* A format D2 instruction where the 16bit immediate | |
1635 | is really two 8bit immediates. */ | |
1636 | number_to_chars_bigendian (f, insn, 4); | |
1637 | } | |
1638 | else if (opcode->format == FMT_D4) | |
1639 | { | |
1640 | unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); | |
87271fa6 | 1641 | |
252b5132 RH |
1642 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
1643 | number_to_chars_littleendian (f + 2, temp, 4); | |
1644 | } | |
1645 | else if (opcode->format == FMT_D5) | |
1646 | { | |
87271fa6 NC |
1647 | unsigned long temp = (((insn & 0xffff) << 16) |
1648 | | ((extension >> 8) & 0xffff)); | |
1649 | ||
252b5132 RH |
1650 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
1651 | number_to_chars_littleendian (f + 2, temp, 4); | |
1652 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1653 | } | |
85cb2cf9 JL |
1654 | else if (opcode->format == FMT_D8) |
1655 | { | |
87271fa6 NC |
1656 | unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); |
1657 | ||
1658 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
1659 | number_to_chars_bigendian (f + 3, (temp & 0xff), 1); | |
1660 | number_to_chars_littleendian (f + 4, temp >> 8, 2); | |
85cb2cf9 JL |
1661 | } |
1662 | else if (opcode->format == FMT_D9) | |
1663 | { | |
87271fa6 NC |
1664 | unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); |
1665 | ||
1666 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
1667 | number_to_chars_littleendian (f + 3, temp, 4); | |
85cb2cf9 | 1668 | } |
252b5132 RH |
1669 | |
1670 | /* Create any fixups. */ | |
1671 | for (i = 0; i < fc; i++) | |
1672 | { | |
1673 | const struct mn10300_operand *operand; | |
1674 | ||
1675 | operand = &mn10300_operands[fixups[i].opindex]; | |
1676 | if (fixups[i].reloc != BFD_RELOC_UNUSED) | |
1677 | { | |
1678 | reloc_howto_type *reloc_howto; | |
1679 | int size; | |
1680 | int offset; | |
1681 | fixS *fixP; | |
1682 | ||
87271fa6 NC |
1683 | reloc_howto = bfd_reloc_type_lookup (stdoutput, |
1684 | fixups[i].reloc); | |
252b5132 RH |
1685 | |
1686 | if (!reloc_howto) | |
87271fa6 NC |
1687 | abort (); |
1688 | ||
252b5132 RH |
1689 | size = bfd_get_reloc_size (reloc_howto); |
1690 | ||
1691 | if (size < 1 || size > 4) | |
87271fa6 | 1692 | abort (); |
252b5132 RH |
1693 | |
1694 | offset = 4 - size; | |
1695 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1696 | size, &fixups[i].exp, | |
1697 | reloc_howto->pc_relative, | |
1698 | fixups[i].reloc); | |
1699 | } | |
1700 | else | |
1701 | { | |
1702 | int reloc, pcrel, reloc_size, offset; | |
1703 | fixS *fixP; | |
1704 | ||
1705 | reloc = BFD_RELOC_NONE; | |
1706 | /* How big is the reloc? Remember SPLIT relocs are | |
1707 | implicitly 32bits. */ | |
1708 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1709 | reloc_size = 32; | |
85cb2cf9 JL |
1710 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
1711 | reloc_size = 24; | |
252b5132 RH |
1712 | else |
1713 | reloc_size = operand->bits; | |
1714 | ||
1715 | /* Is the reloc pc-relative? */ | |
1716 | pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; | |
1717 | ||
a7c92dae | 1718 | offset = size - (reloc_size + operand->shift) / 8; |
eb0dfd58 | 1719 | |
252b5132 RH |
1720 | /* Choose a proper BFD relocation type. */ |
1721 | if (pcrel) | |
1722 | { | |
1723 | if (reloc_size == 32) | |
1724 | reloc = BFD_RELOC_32_PCREL; | |
1725 | else if (reloc_size == 16) | |
1726 | reloc = BFD_RELOC_16_PCREL; | |
1727 | else if (reloc_size == 8) | |
1728 | reloc = BFD_RELOC_8_PCREL; | |
1729 | else | |
1730 | abort (); | |
1731 | } | |
1732 | else | |
1733 | { | |
1734 | if (reloc_size == 32) | |
1735 | reloc = BFD_RELOC_32; | |
1736 | else if (reloc_size == 16) | |
1737 | reloc = BFD_RELOC_16; | |
1738 | else if (reloc_size == 8) | |
1739 | reloc = BFD_RELOC_8; | |
1740 | else | |
1741 | abort (); | |
1742 | } | |
1743 | ||
1744 | /* Convert the size of the reloc into what fix_new_exp wants. */ | |
1745 | reloc_size = reloc_size / 8; | |
1746 | if (reloc_size == 8) | |
1747 | reloc_size = 0; | |
1748 | else if (reloc_size == 16) | |
1749 | reloc_size = 1; | |
1750 | else if (reloc_size == 32) | |
1751 | reloc_size = 2; | |
1752 | ||
1753 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1754 | reloc_size, &fixups[i].exp, pcrel, | |
1755 | ((bfd_reloc_code_real_type) reloc)); | |
1756 | ||
1757 | if (pcrel) | |
1758 | fixP->fx_offset += offset; | |
1759 | } | |
1760 | } | |
e8b1cae5 | 1761 | |
076dc439 AO |
1762 | dwarf2_emit_insn (size); |
1763 | } | |
252b5132 RH |
1764 | } |
1765 | ||
87271fa6 NC |
1766 | /* If while processing a fixup, a reloc really needs to be created |
1767 | then it is done here. */ | |
252b5132 | 1768 | |
252b5132 RH |
1769 | arelent * |
1770 | tc_gen_reloc (seg, fixp) | |
b4c1ea07 | 1771 | asection *seg ATTRIBUTE_UNUSED; |
252b5132 RH |
1772 | fixS *fixp; |
1773 | { | |
1774 | arelent *reloc; | |
1775 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1776 | ||
1777 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1778 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1779 | { | |
1780 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
87271fa6 NC |
1781 | _("reloc %d not supported by object file format"), |
1782 | (int) fixp->fx_r_type); | |
252b5132 RH |
1783 | return NULL; |
1784 | } | |
1785 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1786 | ||
1787 | if (fixp->fx_addsy && fixp->fx_subsy) | |
1788 | { | |
7dc8f5ce AO |
1789 | reloc->sym_ptr_ptr = NULL; |
1790 | ||
4e75439a AO |
1791 | /* If we got a difference between two symbols, and the |
1792 | subtracted symbol is in the current section, use a | |
1793 | PC-relative relocation. If both symbols are in the same | |
1794 | section, the difference would have already been simplified | |
1795 | to a constant. */ | |
1796 | if (S_GET_SEGMENT (fixp->fx_subsy) == seg) | |
1797 | { | |
1798 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1799 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1800 | reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy) | |
1801 | + fixp->fx_offset); | |
1802 | ||
1803 | switch (fixp->fx_r_type) | |
1804 | { | |
1805 | case BFD_RELOC_8: | |
1806 | reloc->howto = bfd_reloc_type_lookup (stdoutput, | |
1807 | BFD_RELOC_8_PCREL); | |
1808 | return reloc; | |
5d6255fe | 1809 | |
4e75439a AO |
1810 | case BFD_RELOC_16: |
1811 | reloc->howto = bfd_reloc_type_lookup (stdoutput, | |
1812 | BFD_RELOC_16_PCREL); | |
1813 | return reloc; | |
1814 | ||
1815 | case BFD_RELOC_24: | |
1816 | reloc->howto = bfd_reloc_type_lookup (stdoutput, | |
1817 | BFD_RELOC_24_PCREL); | |
1818 | return reloc; | |
1819 | ||
1820 | case BFD_RELOC_32: | |
1821 | reloc->howto = bfd_reloc_type_lookup (stdoutput, | |
1822 | BFD_RELOC_32_PCREL); | |
1823 | return reloc; | |
1824 | ||
1825 | default: | |
1826 | /* Try to compute the absolute value below. */ | |
1827 | break; | |
1828 | } | |
1829 | } | |
87271fa6 | 1830 | |
252b5132 RH |
1831 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) |
1832 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1833 | { | |
1834 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1835 | "Difference of symbols in different sections is not supported"); | |
252b5132 | 1836 | } |
6e22e505 AO |
1837 | else |
1838 | { | |
1839 | char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; | |
1840 | ||
1841 | reloc->addend = (S_GET_VALUE (fixp->fx_addsy) | |
1842 | - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); | |
1843 | ||
1844 | switch (fixp->fx_r_type) | |
1845 | { | |
1846 | case BFD_RELOC_8: | |
1847 | md_number_to_chars (fixpos, reloc->addend, 1); | |
1848 | break; | |
5d6255fe | 1849 | |
6e22e505 AO |
1850 | case BFD_RELOC_16: |
1851 | md_number_to_chars (fixpos, reloc->addend, 2); | |
1852 | break; | |
252b5132 | 1853 | |
6e22e505 AO |
1854 | case BFD_RELOC_24: |
1855 | md_number_to_chars (fixpos, reloc->addend, 3); | |
1856 | break; | |
1857 | ||
1858 | case BFD_RELOC_32: | |
1859 | md_number_to_chars (fixpos, reloc->addend, 4); | |
1860 | break; | |
1861 | ||
1862 | default: | |
1863 | reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol; | |
1864 | return reloc; | |
1865 | } | |
1866 | } | |
1867 | ||
7dc8f5ce AO |
1868 | if (reloc->sym_ptr_ptr) |
1869 | free (reloc->sym_ptr_ptr); | |
6e22e505 AO |
1870 | free (reloc); |
1871 | return NULL; | |
252b5132 | 1872 | } |
87271fa6 | 1873 | else |
252b5132 | 1874 | { |
87271fa6 | 1875 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
310b5aa2 | 1876 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
1877 | reloc->addend = fixp->fx_offset; |
1878 | } | |
1879 | return reloc; | |
1880 | } | |
1881 | ||
1882 | int | |
1883 | md_estimate_size_before_relax (fragp, seg) | |
1884 | fragS *fragp; | |
1885 | asection *seg; | |
1886 | { | |
93c2a809 AM |
1887 | if (fragp->fr_subtype == 6 |
1888 | && (!S_IS_DEFINED (fragp->fr_symbol) | |
1889 | || seg != S_GET_SEGMENT (fragp->fr_symbol))) | |
1890 | fragp->fr_subtype = 7; | |
1891 | else if (fragp->fr_subtype == 8 | |
1892 | && (!S_IS_DEFINED (fragp->fr_symbol) | |
1893 | || seg != S_GET_SEGMENT (fragp->fr_symbol))) | |
1894 | fragp->fr_subtype = 9; | |
1895 | else if (fragp->fr_subtype == 10 | |
1896 | && (!S_IS_DEFINED (fragp->fr_symbol) | |
1897 | || seg != S_GET_SEGMENT (fragp->fr_symbol))) | |
1898 | fragp->fr_subtype = 12; | |
1899 | ||
1900 | if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) | |
1901 | abort (); | |
1902 | ||
1903 | return md_relax_table[fragp->fr_subtype].rlx_length; | |
87271fa6 | 1904 | } |
252b5132 RH |
1905 | |
1906 | long | |
1907 | md_pcrel_from (fixp) | |
1908 | fixS *fixp; | |
1909 | { | |
87271fa6 | 1910 | if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy)) |
252b5132 RH |
1911 | { |
1912 | /* The symbol is undefined. Let the linker figure it out. */ | |
1913 | return 0; | |
1914 | } | |
1915 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
252b5132 RH |
1916 | } |
1917 | ||
94f592af NC |
1918 | void |
1919 | md_apply_fix3 (fixP, valP, seg) | |
1920 | fixS * fixP; | |
1921 | valueT * valP; | |
252b5132 RH |
1922 | segT seg; |
1923 | { | |
94f592af | 1924 | char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal; |
58a77e41 | 1925 | int size = 0; |
94f592af | 1926 | int value = (int) * valP; |
58a77e41 | 1927 | |
94f592af | 1928 | assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
58a77e41 EC |
1929 | |
1930 | /* This should never happen. */ | |
1931 | if (seg->flags & SEC_ALLOC) | |
94f592af | 1932 | abort (); |
58a77e41 | 1933 | |
c51ce5f0 EC |
1934 | /* The value we are passed in *valuep includes the symbol values. |
1935 | Since we are using BFD_ASSEMBLER, if we are doing this relocation | |
1936 | the code in write.c is going to call bfd_install_relocation, which | |
1937 | is also going to use the symbol value. That means that if the | |
1938 | reloc is fully resolved we want to use *valuep since | |
1939 | bfd_install_relocation is not being used. | |
1940 | ||
1941 | However, if the reloc is not fully resolved we do not want to use | |
1942 | *valuep, and must use fx_offset instead. However, if the reloc | |
1943 | is PC relative, we do want to use *valuep since it includes the | |
1944 | result of md_pcrel_from. */ | |
94f592af NC |
1945 | if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel) |
1946 | value = fixP->fx_offset; | |
c51ce5f0 | 1947 | |
58a77e41 EC |
1948 | /* If the fix is relative to a symbol which is not defined, or not |
1949 | in the same segment as the fix, we cannot resolve it here. */ | |
94f592af NC |
1950 | if (fixP->fx_addsy != NULL |
1951 | && (! S_IS_DEFINED (fixP->fx_addsy) | |
1952 | || (S_GET_SEGMENT (fixP->fx_addsy) != seg))) | |
58a77e41 | 1953 | { |
94f592af NC |
1954 | fixP->fx_done = 0; |
1955 | return; | |
58a77e41 EC |
1956 | } |
1957 | ||
94f592af | 1958 | switch (fixP->fx_r_type) |
58a77e41 EC |
1959 | { |
1960 | case BFD_RELOC_8: | |
96f37af6 | 1961 | case BFD_RELOC_8_PCREL: |
58a77e41 EC |
1962 | size = 1; |
1963 | break; | |
1964 | ||
1965 | case BFD_RELOC_16: | |
96f37af6 | 1966 | case BFD_RELOC_16_PCREL: |
58a77e41 EC |
1967 | size = 2; |
1968 | break; | |
1969 | ||
1970 | case BFD_RELOC_32: | |
96f37af6 | 1971 | case BFD_RELOC_32_PCREL: |
58a77e41 EC |
1972 | size = 4; |
1973 | break; | |
1974 | ||
1975 | case BFD_RELOC_VTABLE_INHERIT: | |
1976 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af NC |
1977 | fixP->fx_done = 0; |
1978 | return; | |
58a77e41 EC |
1979 | |
1980 | case BFD_RELOC_NONE: | |
1981 | default: | |
94f592af NC |
1982 | as_bad_where (fixP->fx_file, fixP->fx_line, |
1983 | _("Bad relocation fixup type (%d)"), fixP->fx_r_type); | |
58a77e41 EC |
1984 | } |
1985 | ||
c51ce5f0 | 1986 | md_number_to_chars (fixpos, value, size); |
58a77e41 | 1987 | |
b653e7f9 | 1988 | /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ |
94f592af NC |
1989 | if (fixP->fx_addsy == NULL) |
1990 | fixP->fx_done = 1; | |
58a77e41 EC |
1991 | } |
1992 | ||
1993 | /* Return nonzero if the fixup in FIXP will require a relocation, | |
1994 | even it if appears that the fixup could be completely handled | |
1995 | within GAS. */ | |
1996 | ||
1997 | int | |
1998 | mn10300_force_relocation (fixp) | |
1999 | struct fix *fixp; | |
2000 | { | |
2001 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2002 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2003 | return 1; | |
2004 | ||
a161fe53 | 2005 | return S_FORCE_RELOC (fixp->fx_addsy); |
58a77e41 EC |
2006 | } |
2007 | ||
2008 | /* Return zero if the fixup in fixp should be left alone and not | |
2009 | adjusted. */ | |
2010 | ||
b34976b6 | 2011 | bfd_boolean |
58a77e41 EC |
2012 | mn10300_fix_adjustable (fixp) |
2013 | struct fix *fixp; | |
2014 | { | |
58a77e41 EC |
2015 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
2016 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2017 | return 0; | |
2018 | ||
7e8f4100 AO |
2019 | /* Do not adjust relocations involving symbols in code sections, |
2020 | because it breaks linker relaxations. This could be fixed in the | |
2021 | linker, but this fix is simpler, and it pretty much only affects | |
2022 | object size a little bit. */ | |
2023 | if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) | |
2024 | return 0; | |
2025 | ||
58a77e41 | 2026 | return 1; |
252b5132 RH |
2027 | } |
2028 | ||
2029 | /* Insert an operand value into an instruction. */ | |
2030 | ||
2031 | static void | |
2032 | mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift) | |
2033 | unsigned long *insnp; | |
2034 | unsigned long *extensionp; | |
2035 | const struct mn10300_operand *operand; | |
2036 | offsetT val; | |
2037 | char *file; | |
2038 | unsigned int line; | |
2039 | unsigned int shift; | |
2040 | { | |
2041 | /* No need to check 32bit operands for a bit. Note that | |
2042 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
2043 | if (operand->bits != 32 | |
2044 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
2045 | { | |
2046 | long min, max; | |
2047 | offsetT test; | |
2048 | int bits; | |
2049 | ||
2050 | bits = operand->bits; | |
85cb2cf9 JL |
2051 | if (operand->flags & MN10300_OPERAND_24BIT) |
2052 | bits = 24; | |
252b5132 RH |
2053 | |
2054 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
2055 | { | |
2056 | max = (1 << (bits - 1)) - 1; | |
2057 | min = - (1 << (bits - 1)); | |
2058 | } | |
2059 | else | |
87271fa6 NC |
2060 | { |
2061 | max = (1 << bits) - 1; | |
2062 | min = 0; | |
2063 | } | |
252b5132 RH |
2064 | |
2065 | test = val; | |
2066 | ||
252b5132 | 2067 | if (test < (offsetT) min || test > (offsetT) max) |
87271fa6 NC |
2068 | { |
2069 | const char *err = | |
2070 | _("operand out of range (%s not between %ld and %ld)"); | |
2071 | char buf[100]; | |
2072 | ||
2073 | sprint_value (buf, test); | |
2074 | if (file == (char *) NULL) | |
2075 | as_warn (err, buf, min, max); | |
2076 | else | |
2077 | as_warn_where (file, line, err, buf, min, max); | |
2078 | } | |
252b5132 RH |
2079 | } |
2080 | ||
2081 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
2082 | { | |
2083 | *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); | |
2084 | *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) | |
2085 | << operand->shift); | |
2086 | } | |
85cb2cf9 JL |
2087 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
2088 | { | |
2089 | *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); | |
2090 | *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) | |
2091 | << operand->shift); | |
2092 | } | |
252b5132 RH |
2093 | else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) |
2094 | { | |
2095 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
2096 | << (operand->shift + shift)); | |
2097 | ||
2098 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
2099 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
2100 | << (operand->shift + shift + operand->bits)); | |
2101 | } | |
2102 | else | |
2103 | { | |
2104 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
2105 | << (operand->shift + shift)); | |
2106 | ||
2107 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
2108 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
2109 | << (operand->shift + shift + operand->bits)); | |
2110 | } | |
2111 | } | |
2112 | ||
2113 | static unsigned long | |
2114 | check_operand (insn, operand, val) | |
b4c1ea07 | 2115 | unsigned long insn ATTRIBUTE_UNUSED; |
252b5132 RH |
2116 | const struct mn10300_operand *operand; |
2117 | offsetT val; | |
2118 | { | |
2119 | /* No need to check 32bit operands for a bit. Note that | |
2120 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
2121 | if (operand->bits != 32 | |
2122 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
2123 | { | |
2124 | long min, max; | |
2125 | offsetT test; | |
2126 | int bits; | |
2127 | ||
2128 | bits = operand->bits; | |
85cb2cf9 JL |
2129 | if (operand->flags & MN10300_OPERAND_24BIT) |
2130 | bits = 24; | |
252b5132 RH |
2131 | |
2132 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
2133 | { | |
2134 | max = (1 << (bits - 1)) - 1; | |
2135 | min = - (1 << (bits - 1)); | |
2136 | } | |
2137 | else | |
87271fa6 NC |
2138 | { |
2139 | max = (1 << bits) - 1; | |
2140 | min = 0; | |
2141 | } | |
252b5132 RH |
2142 | |
2143 | test = val; | |
2144 | ||
252b5132 RH |
2145 | if (test < (offsetT) min || test > (offsetT) max) |
2146 | return 0; | |
2147 | else | |
2148 | return 1; | |
2149 | } | |
2150 | return 1; | |
2151 | } | |
2152 | ||
2153 | static void | |
2154 | set_arch_mach (mach) | |
0e1a166b | 2155 | unsigned int mach; |
252b5132 RH |
2156 | { |
2157 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) | |
2158 | as_warn (_("could not set architecture and machine")); | |
2159 | ||
2160 | current_machine = mach; | |
2161 | } |