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85e747d2 | 1 | /* Cell SPU GNU/Linux multi-architecture debugging support. |
ecd75fc8 | 2 | Copyright (C) 2009-2014 Free Software Foundation, Inc. |
85e747d2 UW |
3 | |
4 | Contributed by Ulrich Weigand <[email protected]>. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
dcf7800b | 10 | the Free Software Foundation; either version 3 of the License, or |
85e747d2 UW |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
dcf7800b | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
85e747d2 UW |
20 | |
21 | #include "defs.h" | |
22 | #include "gdbcore.h" | |
23 | #include "gdbcmd.h" | |
0e9f083f | 24 | #include <string.h> |
85e747d2 UW |
25 | #include "gdb_assert.h" |
26 | #include "arch-utils.h" | |
27 | #include "observer.h" | |
28 | #include "inferior.h" | |
29 | #include "regcache.h" | |
30 | #include "symfile.h" | |
31 | #include "objfiles.h" | |
32 | #include "solib.h" | |
33 | #include "solist.h" | |
34 | ||
35 | #include "ppc-tdep.h" | |
36 | #include "ppc-linux-tdep.h" | |
37 | #include "spu-tdep.h" | |
38 | ||
39 | /* This module's target vector. */ | |
40 | static struct target_ops spu_ops; | |
41 | ||
42 | /* Number of SPE objects loaded into the current inferior. */ | |
43 | static int spu_nr_solib; | |
44 | ||
45 | /* Stand-alone SPE executable? */ | |
46 | #define spu_standalone_p() \ | |
47 | (symfile_objfile && symfile_objfile->obfd \ | |
48 | && bfd_get_arch (symfile_objfile->obfd) == bfd_arch_spu) | |
49 | ||
50 | /* PPU side system calls. */ | |
51 | #define INSTR_SC 0x44000002 | |
52 | #define NR_spu_run 0x0116 | |
53 | ||
54 | /* If the PPU thread is currently stopped on a spu_run system call, | |
55 | return to FD and ADDR the file handle and NPC parameter address | |
56 | used with the system call. Return non-zero if successful. */ | |
57 | static int | |
58 | parse_spufs_run (ptid_t ptid, int *fd, CORE_ADDR *addr) | |
59 | { | |
f5656ead | 60 | enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ()); |
85e747d2 UW |
61 | struct gdbarch_tdep *tdep; |
62 | struct regcache *regcache; | |
e362b510 | 63 | gdb_byte buf[4]; |
85e747d2 UW |
64 | ULONGEST regval; |
65 | ||
66 | /* If we're not on PPU, there's nothing to detect. */ | |
f5656ead | 67 | if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc) |
85e747d2 UW |
68 | return 0; |
69 | ||
70 | /* Get PPU-side registers. */ | |
f5656ead TT |
71 | regcache = get_thread_arch_regcache (ptid, target_gdbarch ()); |
72 | tdep = gdbarch_tdep (target_gdbarch ()); | |
85e747d2 UW |
73 | |
74 | /* Fetch instruction preceding current NIP. */ | |
75 | if (target_read_memory (regcache_read_pc (regcache) - 4, buf, 4) != 0) | |
76 | return 0; | |
77 | /* It should be a "sc" instruction. */ | |
78 | if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC) | |
79 | return 0; | |
80 | /* System call number should be NR_spu_run. */ | |
81 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum, ®val); | |
82 | if (regval != NR_spu_run) | |
83 | return 0; | |
84 | ||
85 | /* Register 3 contains fd, register 4 the NPC param pointer. */ | |
86 | regcache_cooked_read_unsigned (regcache, PPC_ORIG_R3_REGNUM, ®val); | |
87 | *fd = (int) regval; | |
88 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 4, ®val); | |
89 | *addr = (CORE_ADDR) regval; | |
90 | return 1; | |
91 | } | |
92 | ||
93 | /* Find gdbarch for SPU context SPUFS_FD. */ | |
94 | static struct gdbarch * | |
95 | spu_gdbarch (int spufs_fd) | |
96 | { | |
97 | struct gdbarch_info info; | |
98 | gdbarch_info_init (&info); | |
99 | info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu); | |
100 | info.byte_order = BFD_ENDIAN_BIG; | |
101 | info.osabi = GDB_OSABI_LINUX; | |
102 | info.tdep_info = (void *) &spufs_fd; | |
103 | return gdbarch_find_by_info (info); | |
104 | } | |
105 | ||
106 | /* Override the to_thread_architecture routine. */ | |
107 | static struct gdbarch * | |
108 | spu_thread_architecture (struct target_ops *ops, ptid_t ptid) | |
109 | { | |
110 | int spufs_fd; | |
111 | CORE_ADDR spufs_addr; | |
112 | ||
113 | if (parse_spufs_run (ptid, &spufs_fd, &spufs_addr)) | |
114 | return spu_gdbarch (spufs_fd); | |
115 | ||
f5656ead | 116 | return target_gdbarch (); |
85e747d2 UW |
117 | } |
118 | ||
119 | /* Override the to_region_ok_for_hw_watchpoint routine. */ | |
120 | static int | |
31568a15 TT |
121 | spu_region_ok_for_hw_watchpoint (struct target_ops *self, |
122 | CORE_ADDR addr, int len) | |
85e747d2 UW |
123 | { |
124 | struct target_ops *ops_beneath = find_target_beneath (&spu_ops); | |
125 | while (ops_beneath && !ops_beneath->to_region_ok_for_hw_watchpoint) | |
126 | ops_beneath = find_target_beneath (ops_beneath); | |
127 | ||
128 | /* We cannot watch SPU local store. */ | |
129 | if (SPUADDR_SPU (addr) != -1) | |
130 | return 0; | |
131 | ||
132 | if (ops_beneath) | |
31568a15 TT |
133 | return ops_beneath->to_region_ok_for_hw_watchpoint (ops_beneath, |
134 | addr, len); | |
85e747d2 UW |
135 | |
136 | return 0; | |
137 | } | |
138 | ||
139 | /* Override the to_fetch_registers routine. */ | |
140 | static void | |
141 | spu_fetch_registers (struct target_ops *ops, | |
142 | struct regcache *regcache, int regno) | |
143 | { | |
144 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
145 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
146 | struct target_ops *ops_beneath = find_target_beneath (ops); | |
147 | int spufs_fd; | |
148 | CORE_ADDR spufs_addr; | |
149 | ||
150 | /* This version applies only if we're currently in spu_run. */ | |
151 | if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu) | |
152 | { | |
153 | while (ops_beneath && !ops_beneath->to_fetch_registers) | |
154 | ops_beneath = find_target_beneath (ops_beneath); | |
155 | ||
156 | gdb_assert (ops_beneath); | |
157 | ops_beneath->to_fetch_registers (ops_beneath, regcache, regno); | |
158 | return; | |
159 | } | |
160 | ||
161 | /* We must be stopped on a spu_run system call. */ | |
162 | if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr)) | |
163 | return; | |
164 | ||
165 | /* The ID register holds the spufs file handle. */ | |
166 | if (regno == -1 || regno == SPU_ID_REGNUM) | |
167 | { | |
e362b510 | 168 | gdb_byte buf[4]; |
85e747d2 UW |
169 | store_unsigned_integer (buf, 4, byte_order, spufs_fd); |
170 | regcache_raw_supply (regcache, SPU_ID_REGNUM, buf); | |
171 | } | |
172 | ||
173 | /* The NPC register is found in PPC memory at SPUFS_ADDR. */ | |
174 | if (regno == -1 || regno == SPU_PC_REGNUM) | |
175 | { | |
e362b510 | 176 | gdb_byte buf[4]; |
85e747d2 UW |
177 | |
178 | if (target_read (ops_beneath, TARGET_OBJECT_MEMORY, NULL, | |
179 | buf, spufs_addr, sizeof buf) == sizeof buf) | |
180 | regcache_raw_supply (regcache, SPU_PC_REGNUM, buf); | |
181 | } | |
182 | ||
183 | /* The GPRs are found in the "regs" spufs file. */ | |
184 | if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS)) | |
185 | { | |
e362b510 PA |
186 | gdb_byte buf[16 * SPU_NUM_GPRS]; |
187 | char annex[32]; | |
85e747d2 UW |
188 | int i; |
189 | ||
190 | xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd); | |
191 | if (target_read (ops_beneath, TARGET_OBJECT_SPU, annex, | |
192 | buf, 0, sizeof buf) == sizeof buf) | |
193 | for (i = 0; i < SPU_NUM_GPRS; i++) | |
194 | regcache_raw_supply (regcache, i, buf + i*16); | |
195 | } | |
196 | } | |
197 | ||
198 | /* Override the to_store_registers routine. */ | |
199 | static void | |
200 | spu_store_registers (struct target_ops *ops, | |
201 | struct regcache *regcache, int regno) | |
202 | { | |
203 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
204 | struct target_ops *ops_beneath = find_target_beneath (ops); | |
205 | int spufs_fd; | |
206 | CORE_ADDR spufs_addr; | |
207 | ||
208 | /* This version applies only if we're currently in spu_run. */ | |
209 | if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_spu) | |
210 | { | |
211 | while (ops_beneath && !ops_beneath->to_fetch_registers) | |
212 | ops_beneath = find_target_beneath (ops_beneath); | |
213 | ||
214 | gdb_assert (ops_beneath); | |
215 | ops_beneath->to_store_registers (ops_beneath, regcache, regno); | |
216 | return; | |
217 | } | |
218 | ||
219 | /* We must be stopped on a spu_run system call. */ | |
220 | if (!parse_spufs_run (inferior_ptid, &spufs_fd, &spufs_addr)) | |
221 | return; | |
222 | ||
223 | /* The NPC register is found in PPC memory at SPUFS_ADDR. */ | |
224 | if (regno == -1 || regno == SPU_PC_REGNUM) | |
225 | { | |
e362b510 | 226 | gdb_byte buf[4]; |
85e747d2 UW |
227 | regcache_raw_collect (regcache, SPU_PC_REGNUM, buf); |
228 | ||
229 | target_write (ops_beneath, TARGET_OBJECT_MEMORY, NULL, | |
230 | buf, spufs_addr, sizeof buf); | |
231 | } | |
232 | ||
233 | /* The GPRs are found in the "regs" spufs file. */ | |
234 | if (regno == -1 || (regno >= 0 && regno < SPU_NUM_GPRS)) | |
235 | { | |
e362b510 PA |
236 | gdb_byte buf[16 * SPU_NUM_GPRS]; |
237 | char annex[32]; | |
85e747d2 UW |
238 | int i; |
239 | ||
240 | for (i = 0; i < SPU_NUM_GPRS; i++) | |
241 | regcache_raw_collect (regcache, i, buf + i*16); | |
242 | ||
243 | xsnprintf (annex, sizeof annex, "%d/regs", spufs_fd); | |
244 | target_write (ops_beneath, TARGET_OBJECT_SPU, annex, | |
245 | buf, 0, sizeof buf); | |
246 | } | |
247 | } | |
248 | ||
249 | /* Override the to_xfer_partial routine. */ | |
9b409511 | 250 | static enum target_xfer_status |
85e747d2 UW |
251 | spu_xfer_partial (struct target_ops *ops, enum target_object object, |
252 | const char *annex, gdb_byte *readbuf, | |
9b409511 YQ |
253 | const gdb_byte *writebuf, ULONGEST offset, ULONGEST len, |
254 | ULONGEST *xfered_len) | |
85e747d2 UW |
255 | { |
256 | struct target_ops *ops_beneath = find_target_beneath (ops); | |
257 | while (ops_beneath && !ops_beneath->to_xfer_partial) | |
258 | ops_beneath = find_target_beneath (ops_beneath); | |
259 | gdb_assert (ops_beneath); | |
260 | ||
261 | /* Use the "mem" spufs file to access SPU local store. */ | |
262 | if (object == TARGET_OBJECT_MEMORY) | |
263 | { | |
264 | int fd = SPUADDR_SPU (offset); | |
265 | CORE_ADDR addr = SPUADDR_ADDR (offset); | |
d2ed6730 UW |
266 | char mem_annex[32], lslr_annex[32]; |
267 | gdb_byte buf[32]; | |
268 | ULONGEST lslr; | |
9b409511 | 269 | enum target_xfer_status ret; |
85e747d2 | 270 | |
d2ed6730 | 271 | if (fd >= 0) |
85e747d2 UW |
272 | { |
273 | xsnprintf (mem_annex, sizeof mem_annex, "%d/mem", fd); | |
d2ed6730 UW |
274 | ret = ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU, |
275 | mem_annex, readbuf, writebuf, | |
9b409511 YQ |
276 | addr, len, xfered_len); |
277 | if (ret == TARGET_XFER_OK) | |
d2ed6730 UW |
278 | return ret; |
279 | ||
280 | /* SPU local store access wraps the address around at the | |
281 | local store limit. We emulate this here. To avoid needing | |
282 | an extra access to retrieve the LSLR, we only do that after | |
283 | trying the original address first, and getting end-of-file. */ | |
284 | xsnprintf (lslr_annex, sizeof lslr_annex, "%d/lslr", fd); | |
285 | memset (buf, 0, sizeof buf); | |
286 | if (ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU, | |
287 | lslr_annex, buf, NULL, | |
9b409511 YQ |
288 | 0, sizeof buf, xfered_len) |
289 | != TARGET_XFER_OK) | |
d2ed6730 UW |
290 | return ret; |
291 | ||
001f13d8 | 292 | lslr = strtoulst ((char *) buf, NULL, 16); |
85e747d2 UW |
293 | return ops_beneath->to_xfer_partial (ops_beneath, TARGET_OBJECT_SPU, |
294 | mem_annex, readbuf, writebuf, | |
9b409511 | 295 | addr & lslr, len, xfered_len); |
85e747d2 UW |
296 | } |
297 | } | |
298 | ||
299 | return ops_beneath->to_xfer_partial (ops_beneath, object, annex, | |
9b409511 | 300 | readbuf, writebuf, offset, len, xfered_len); |
85e747d2 UW |
301 | } |
302 | ||
303 | /* Override the to_search_memory routine. */ | |
304 | static int | |
305 | spu_search_memory (struct target_ops* ops, | |
306 | CORE_ADDR start_addr, ULONGEST search_space_len, | |
307 | const gdb_byte *pattern, ULONGEST pattern_len, | |
308 | CORE_ADDR *found_addrp) | |
309 | { | |
310 | struct target_ops *ops_beneath = find_target_beneath (ops); | |
311 | while (ops_beneath && !ops_beneath->to_search_memory) | |
312 | ops_beneath = find_target_beneath (ops_beneath); | |
313 | ||
314 | /* For SPU local store, always fall back to the simple method. Likewise | |
315 | if we do not have any target-specific special implementation. */ | |
316 | if (!ops_beneath || SPUADDR_SPU (start_addr) >= 0) | |
317 | return simple_search_memory (ops, | |
318 | start_addr, search_space_len, | |
319 | pattern, pattern_len, found_addrp); | |
320 | ||
321 | return ops_beneath->to_search_memory (ops_beneath, | |
322 | start_addr, search_space_len, | |
323 | pattern, pattern_len, found_addrp); | |
324 | } | |
325 | ||
326 | ||
327 | /* Push and pop the SPU multi-architecture support target. */ | |
328 | ||
329 | static void | |
330 | spu_multiarch_activate (void) | |
331 | { | |
332 | /* If GDB was configured without SPU architecture support, | |
333 | we cannot install SPU multi-architecture support either. */ | |
334 | if (spu_gdbarch (-1) == NULL) | |
335 | return; | |
336 | ||
337 | push_target (&spu_ops); | |
338 | ||
339 | /* Make sure the thread architecture is re-evaluated. */ | |
340 | registers_changed (); | |
341 | } | |
342 | ||
343 | static void | |
344 | spu_multiarch_deactivate (void) | |
345 | { | |
346 | unpush_target (&spu_ops); | |
347 | ||
348 | /* Make sure the thread architecture is re-evaluated. */ | |
349 | registers_changed (); | |
350 | } | |
351 | ||
352 | static void | |
353 | spu_multiarch_inferior_created (struct target_ops *ops, int from_tty) | |
354 | { | |
355 | if (spu_standalone_p ()) | |
356 | spu_multiarch_activate (); | |
357 | } | |
358 | ||
359 | static void | |
360 | spu_multiarch_solib_loaded (struct so_list *so) | |
361 | { | |
362 | if (!spu_standalone_p ()) | |
363 | if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu) | |
364 | if (spu_nr_solib++ == 0) | |
365 | spu_multiarch_activate (); | |
366 | } | |
367 | ||
368 | static void | |
369 | spu_multiarch_solib_unloaded (struct so_list *so) | |
370 | { | |
371 | if (!spu_standalone_p ()) | |
372 | if (so->abfd && bfd_get_arch (so->abfd) == bfd_arch_spu) | |
373 | if (--spu_nr_solib == 0) | |
374 | spu_multiarch_deactivate (); | |
375 | } | |
376 | ||
377 | static void | |
378 | spu_mourn_inferior (struct target_ops *ops) | |
379 | { | |
380 | struct target_ops *ops_beneath = find_target_beneath (ops); | |
381 | while (ops_beneath && !ops_beneath->to_mourn_inferior) | |
382 | ops_beneath = find_target_beneath (ops_beneath); | |
383 | ||
384 | gdb_assert (ops_beneath); | |
385 | ops_beneath->to_mourn_inferior (ops_beneath); | |
386 | spu_multiarch_deactivate (); | |
387 | } | |
388 | ||
389 | ||
390 | /* Initialize the SPU multi-architecture support target. */ | |
391 | ||
392 | static void | |
393 | init_spu_ops (void) | |
394 | { | |
395 | spu_ops.to_shortname = "spu"; | |
396 | spu_ops.to_longname = "SPU multi-architecture support."; | |
397 | spu_ops.to_doc = "SPU multi-architecture support."; | |
398 | spu_ops.to_mourn_inferior = spu_mourn_inferior; | |
399 | spu_ops.to_fetch_registers = spu_fetch_registers; | |
400 | spu_ops.to_store_registers = spu_store_registers; | |
401 | spu_ops.to_xfer_partial = spu_xfer_partial; | |
402 | spu_ops.to_search_memory = spu_search_memory; | |
403 | spu_ops.to_region_ok_for_hw_watchpoint = spu_region_ok_for_hw_watchpoint; | |
404 | spu_ops.to_thread_architecture = spu_thread_architecture; | |
405 | spu_ops.to_stratum = arch_stratum; | |
406 | spu_ops.to_magic = OPS_MAGIC; | |
407 | } | |
408 | ||
693be288 JK |
409 | /* -Wmissing-prototypes */ |
410 | extern initialize_file_ftype _initialize_spu_multiarch; | |
411 | ||
85e747d2 UW |
412 | void |
413 | _initialize_spu_multiarch (void) | |
414 | { | |
415 | /* Install ourselves on the target stack. */ | |
416 | init_spu_ops (); | |
12070676 | 417 | complete_target_initialization (&spu_ops); |
85e747d2 UW |
418 | |
419 | /* Install observers to watch for SPU objects. */ | |
420 | observer_attach_inferior_created (spu_multiarch_inferior_created); | |
421 | observer_attach_solib_loaded (spu_multiarch_solib_loaded); | |
422 | observer_attach_solib_unloaded (spu_multiarch_solib_unloaded); | |
423 | } | |
424 |