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* configure.tgt: Add pattern for i[3456]86-*-netbsdelf*.
[binutils.git] / gdb / ia64-tdep.c
CommitLineData
16461d7d
KB		 1/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "inferior.h"
24#include "symfile.h" /* for entry_point_address */
25#include "gdbcore.h"
8064c6ae 26#include "arch-utils.h"
16461d7d
KB		 27#include "floatformat.h"
28
29#include "objfiles.h"
30#include "elf/common.h" /* for DT_PLTGOT value */
244bc108 31#include "elf-bfd.h"
16461d7d
KB		 32
33typedef enum instruction_type
34{
35 A, /* Integer ALU ; I-unit or M-unit */
36 I, /* Non-ALU integer; I-unit */
37 M, /* Memory ; M-unit */
38 F, /* Floating-point ; F-unit */
39 B, /* Branch ; B-unit */
40 L, /* Extended (L+X) ; I-unit */
41 X, /* Extended (L+X) ; I-unit */
42 undefined /* undefined or reserved */
43} instruction_type;
44
45/* We represent IA-64 PC addresses as the value of the instruction
46 pointer or'd with some bit combination in the low nibble which
47 represents the slot number in the bundle addressed by the
48 instruction pointer. The problem is that the Linux kernel
49 multiplies its slot numbers (for exceptions) by one while the
50 disassembler multiplies its slot numbers by 6. In addition, I've
51 heard it said that the simulator uses 1 as the multiplier.
52
53 I've fixed the disassembler so that the bytes_per_line field will
54 be the slot multiplier. If bytes_per_line comes in as zero, it
55 is set to six (which is how it was set up initially). -- objdump
56 displays pretty disassembly dumps with this value. For our purposes,
57 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
58 never want to also display the raw bytes the way objdump does. */
59
60#define SLOT_MULTIPLIER 1
61
62/* Length in bytes of an instruction bundle */
63
64#define BUNDLE_LEN 16
65
66extern void _initialize_ia64_tdep (void);
67
244bc108
KB		 68extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
69
16461d7d
KB		 70static gdbarch_init_ftype ia64_gdbarch_init;
71
72static gdbarch_register_name_ftype ia64_register_name;
73static gdbarch_register_raw_size_ftype ia64_register_raw_size;
74static gdbarch_register_virtual_size_ftype ia64_register_virtual_size;
75static gdbarch_register_virtual_type_ftype ia64_register_virtual_type;
76static gdbarch_register_byte_ftype ia64_register_byte;
77static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
78static gdbarch_frame_chain_ftype ia64_frame_chain;
79static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc;
80static gdbarch_skip_prologue_ftype ia64_skip_prologue;
81static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs;
82static gdbarch_get_saved_register_ftype ia64_get_saved_register;
83static gdbarch_extract_return_value_ftype ia64_extract_return_value;
84static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address;
85static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
86static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
87static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info;
88static gdbarch_store_return_value_ftype ia64_store_return_value;
89static gdbarch_store_struct_return_ftype ia64_store_struct_return;
90static gdbarch_push_arguments_ftype ia64_push_arguments;
91static gdbarch_push_return_address_ftype ia64_push_return_address;
92static gdbarch_pop_frame_ftype ia64_pop_frame;
93static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call;
16461d7d 94static void ia64_pop_frame_regular (struct frame_info *frame);
64a5b29c 95static struct type *is_float_or_hfa_type (struct type *t);
16461d7d
KB		 96
97static int ia64_num_regs = 590;
98
99static int pc_regnum = IA64_IP_REGNUM;
100static int sp_regnum = IA64_GR12_REGNUM;
101static int fp_regnum = IA64_VFP_REGNUM;
102static int lr_regnum = IA64_VRAP_REGNUM;
103
104static LONGEST ia64_call_dummy_words[] = {0};
105
106/* Array of register names; There should be ia64_num_regs strings in
107 the initializer. */
108
109static char *ia64_register_names[] =
110{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
111 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
112 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
113 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
114 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
115 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
116 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
117 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
118 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
119 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
120 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
121 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
122 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
123 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
124 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
125 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
126
127 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
128 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
129 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
130 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
131 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
132 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
133 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
134 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
135 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
136 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
137 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
138 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
139 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
140 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
141 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
142 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
143
144 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
145 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
146 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
147 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
148 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
149 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
150 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
151 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
152
153 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
154
155 "vfp", "vrap",
156
157 "pr", "ip", "psr", "cfm",
158
159 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
160 "", "", "", "", "", "", "", "",
161 "rsc", "bsp", "bspstore", "rnat",
162 "", "fcr", "", "",
163 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
164 "ccv", "", "", "", "unat", "", "", "",
165 "fpsr", "", "", "", "itc",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "",
168 "pfs", "lc", "ec",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", "", "", "", "", "", "", "",
172 "", "", "", "", "", "", "", "", "", "",
173 "", "", "", "", "", "", "", "", "", "",
174 "", "", "", "", "", "", "", "", "", "",
175 "",
176 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
177 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
178 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
179 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
180 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
181 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
182 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
183 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
184 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
185 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
186 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
187 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
188 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
189 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
190 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
191 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
192};
193
194struct frame_extra_info
244bc108
KB		 195 {
196 CORE_ADDR bsp; /* points at r32 for the current frame */
197 CORE_ADDR cfm; /* cfm value for current frame */
198 int sof; /* Size of frame (decoded from cfm value) */
199 int sol; /* Size of locals (decoded from cfm value) */
200 CORE_ADDR after_prologue;
201 /* Address of first instruction after the last
16461d7d
KB		 202 prologue instruction; Note that there may
203 be instructions from the function's body
204 intermingled with the prologue. */
244bc108
KB		 205 int mem_stack_frame_size;
206 /* Size of the memory stack frame (may be zero),
16461d7d 207 or -1 if it has not been determined yet. */
244bc108
KB		 208 int fp_reg; /* Register number (if any) used a frame pointer
209 for this frame. 0 if no register is being used
16461d7d 210 as the frame pointer. */
244bc108
KB		 211 };
212
213struct gdbarch_tdep
214 {
215 int os_ident; /* From the ELF header, one of the ELFOSABI_
216 constants: ELFOSABI_LINUX, ELFOSABI_MONTEREY,
217 etc. */
218 CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
219 /* OS specific function which, given a frame address
220 and register number, returns the offset to the
221 given register from the start of the frame. */
222 };
223
224#define SIGCONTEXT_REGISTER_ADDRESS (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
16461d7d
KB		 225
226static char *
227ia64_register_name (int reg)
228{
229 return ia64_register_names[reg];
230}
231
232int
233ia64_register_raw_size (int reg)
234{
235 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
236}
237
238int
239ia64_register_virtual_size (int reg)
240{
241 return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
242}
243
244/* Return true iff register N's virtual format is different from
245 its raw format. */
246int
247ia64_register_convertible (int nr)
248{
249 return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
250}
251
252const struct floatformat floatformat_ia64_ext =
253{
254 floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
255 floatformat_intbit_yes
256};
257
258void
259ia64_register_convert_to_virtual (int regnum, struct type *type,
260 char *from, char *to)
261{
262 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
263 {
264 DOUBLEST val;
265 floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
266 store_floating(to, TYPE_LENGTH(type), val);
267 }
268 else
269 error("ia64_register_convert_to_virtual called with non floating point register number");
270}
271
272void
273ia64_register_convert_to_raw (struct type *type, int regnum,
274 char *from, char *to)
275{
276 if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
277 {
278 DOUBLEST val = extract_floating (from, TYPE_LENGTH(type));
279 floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
280 }
281 else
282 error("ia64_register_convert_to_raw called with non floating point register number");
283}
284
285struct type *
286ia64_register_virtual_type (int reg)
287{
288 if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
289 return builtin_type_long_double;
290 else
291 return builtin_type_long;
292}
293
294int
295ia64_register_byte (int reg)
296{
297 return (8 * reg) +
298 (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
299}
300
244bc108
KB		 301/* Read the given register from a sigcontext structure in the
302 specified frame. */
303
304static CORE_ADDR
305read_sigcontext_register (struct frame_info *frame, int regnum)
306{
307 CORE_ADDR regaddr;
308
309 if (frame == NULL)
310 internal_error ("read_sigcontext_register: NULL frame");
311 if (!frame->signal_handler_caller)
312 internal_error (
313 "read_sigcontext_register: frame not a signal_handler_caller");
314 if (SIGCONTEXT_REGISTER_ADDRESS == 0)
315 internal_error (
316 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
317
318 regaddr = SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regnum);
319 if (regaddr)
320 return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
321 else
322 internal_error (
323 "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
324}
325
16461d7d
KB		 326/* Extract ``len'' bits from an instruction bundle starting at
327 bit ``from''. */
328
244bc108 329static long long
16461d7d
KB		 330extract_bit_field (char *bundle, int from, int len)
331{
332 long long result = 0LL;
333 int to = from + len;
334 int from_byte = from / 8;
335 int to_byte = to / 8;
336 unsigned char *b = (unsigned char *) bundle;
337 unsigned char c;
338 int lshift;
339 int i;
340
341 c = b[from_byte];
342 if (from_byte == to_byte)
343 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
344 result = c >> (from % 8);
345 lshift = 8 - (from % 8);
346
347 for (i = from_byte+1; i < to_byte; i++)
348 {
349 result |= ((long long) b[i]) << lshift;
350 lshift += 8;
351 }
352
353 if (from_byte < to_byte && (to % 8 != 0))
354 {
355 c = b[to_byte];
356 c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
357 result |= ((long long) c) << lshift;
358 }
359
360 return result;
361}
362
363/* Replace the specified bits in an instruction bundle */
364
244bc108 365static void
16461d7d
KB		 366replace_bit_field (char *bundle, long long val, int from, int len)
367{
368 int to = from + len;
369 int from_byte = from / 8;
370 int to_byte = to / 8;
371 unsigned char *b = (unsigned char *) bundle;
372 unsigned char c;
373
374 if (from_byte == to_byte)
375 {
376 unsigned char left, right;
377 c = b[from_byte];
378 left = (c >> (to % 8)) << (to % 8);
379 right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
380 c = (unsigned char) (val & 0xff);
381 c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
382 c |= right | left;
383 b[from_byte] = c;
384 }
385 else
386 {
387 int i;
388 c = b[from_byte];
389 c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
390 c = c | (val << (from % 8));
391 b[from_byte] = c;
392 val >>= 8 - from % 8;
393
394 for (i = from_byte+1; i < to_byte; i++)
395 {
396 c = val & 0xff;
397 val >>= 8;
398 b[i] = c;
399 }
400
401 if (to % 8 != 0)
402 {
403 unsigned char cv = (unsigned char) val;
404 c = b[to_byte];
405 c = c >> (to % 8) << (to % 8);
406 c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
407 b[to_byte] = c;
408 }
409 }
410}
411
412/* Return the contents of slot N (for N = 0, 1, or 2) in
413 and instruction bundle */
414
244bc108 415static long long
16461d7d
KB		 416slotN_contents (unsigned char *bundle, int slotnum)
417{
418 return extract_bit_field (bundle, 5+41*slotnum, 41);
419}
420
421/* Store an instruction in an instruction bundle */
422
244bc108 423static void
16461d7d
KB		 424replace_slotN_contents (unsigned char *bundle, long long instr, int slotnum)
425{
426 replace_bit_field (bundle, instr, 5+41*slotnum, 41);
427}
428
64a5b29c 429static enum instruction_type template_encoding_table[32][3] =
16461d7d
KB		 430{
431 { M, I, I }, /* 00 */
432 { M, I, I }, /* 01 */
433 { M, I, I }, /* 02 */
434 { M, I, I }, /* 03 */
435 { M, L, X }, /* 04 */
436 { M, L, X }, /* 05 */
437 { undefined, undefined, undefined }, /* 06 */
438 { undefined, undefined, undefined }, /* 07 */
439 { M, M, I }, /* 08 */
440 { M, M, I }, /* 09 */
441 { M, M, I }, /* 0A */
442 { M, M, I }, /* 0B */
443 { M, F, I }, /* 0C */
444 { M, F, I }, /* 0D */
445 { M, M, F }, /* 0E */
446 { M, M, F }, /* 0F */
447 { M, I, B }, /* 10 */
448 { M, I, B }, /* 11 */
449 { M, B, B }, /* 12 */
450 { M, B, B }, /* 13 */
451 { undefined, undefined, undefined }, /* 14 */
452 { undefined, undefined, undefined }, /* 15 */
453 { B, B, B }, /* 16 */
454 { B, B, B }, /* 17 */
455 { M, M, B }, /* 18 */
456 { M, M, B }, /* 19 */
457 { undefined, undefined, undefined }, /* 1A */
458 { undefined, undefined, undefined }, /* 1B */
459 { M, F, B }, /* 1C */
460 { M, F, B }, /* 1D */
461 { undefined, undefined, undefined }, /* 1E */
462 { undefined, undefined, undefined }, /* 1F */
463};
464
465/* Fetch and (partially) decode an instruction at ADDR and return the
466 address of the next instruction to fetch. */
467
468static CORE_ADDR
469fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
470{
471 char bundle[BUNDLE_LEN];
472 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
473 long long template;
474 int val;
475
476 if (slotnum > 2)
477 error("Can't fetch instructions for slot numbers greater than 2.");
478
479 addr &= ~0x0f;
480
481 val = target_read_memory (addr, bundle, BUNDLE_LEN);
482
483 if (val != 0)
484 return 0;
485
486 *instr = slotN_contents (bundle, slotnum);
487 template = extract_bit_field (bundle, 0, 5);
488 *it = template_encoding_table[(int)template][slotnum];
489
64a5b29c 490 if (slotnum == 2 || (slotnum == 1 && *it == L))
16461d7d
KB		 491 addr += 16;
492 else
493 addr += (slotnum + 1) * SLOT_MULTIPLIER;
494
495 return addr;
496}
497
498/* There are 5 different break instructions (break.i, break.b,
499 break.m, break.f, and break.x), but they all have the same
500 encoding. (The five bit template in the low five bits of the
501 instruction bundle distinguishes one from another.)
502
503 The runtime architecture manual specifies that break instructions
504 used for debugging purposes must have the upper two bits of the 21
505 bit immediate set to a 0 and a 1 respectively. A breakpoint
506 instruction encodes the most significant bit of its 21 bit
507 immediate at bit 36 of the 41 bit instruction. The penultimate msb
508 is at bit 25 which leads to the pattern below.
509
510 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
511 it turns out that 0x80000 was used as the syscall break in the early
512 simulators. So I changed the pattern slightly to do "break.i 0x080001"
513 instead. But that didn't work either (I later found out that this
514 pattern was used by the simulator that I was using.) So I ended up
515 using the pattern seen below. */
516
517#if 0
518#define BREAKPOINT 0x00002000040LL
519#endif
520#define BREAKPOINT 0x00003333300LL
521
522static int
523ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
524{
525 char bundle[BUNDLE_LEN];
526 int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
527 long long instr;
528 int val;
529
530 if (slotnum > 2)
531 error("Can't insert breakpoint for slot numbers greater than 2.");
532
533 addr &= ~0x0f;
534
535 val = target_read_memory (addr, bundle, BUNDLE_LEN);
536 instr = slotN_contents (bundle, slotnum);
537 memcpy(contents_cache, &instr, sizeof(instr));
538 replace_slotN_contents (bundle, BREAKPOINT, slotnum);
539 if (val == 0)
540 target_write_memory (addr, bundle, BUNDLE_LEN);
541
542 return val;
543}
544
545static int
546ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
547{
548 char bundle[BUNDLE_LEN];
549 int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
550 long long instr;
551 int val;
552
553 addr &= ~0x0f;
554
555 val = target_read_memory (addr, bundle, BUNDLE_LEN);
556 memcpy (&instr, contents_cache, sizeof instr);
557 replace_slotN_contents (bundle, instr, slotnum);
558 if (val == 0)
559 target_write_memory (addr, bundle, BUNDLE_LEN);
560
561 return val;
562}
563
564/* We don't really want to use this, but remote.c needs to call it in order
565 to figure out if Z-packets are supported or not. Oh, well. */
566unsigned char *
567ia64_breakpoint_from_pc (pcptr, lenptr)
568 CORE_ADDR *pcptr;
569 int *lenptr;
570{
571 static unsigned char breakpoint[] =
572 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
573 *lenptr = sizeof (breakpoint);
574#if 0
575 *pcptr &= ~0x0f;
576#endif
577 return breakpoint;
578}
579
580CORE_ADDR
581ia64_read_pc (int pid)
582{
583 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
584 CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, pid);
585 int slot_num = (psr_value >> 41) & 3;
586
587 return pc_value | (slot_num * SLOT_MULTIPLIER);
588}
589
590void
591ia64_write_pc (CORE_ADDR new_pc, int pid)
592{
593 int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
594 CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, pid);
595 psr_value &= ~(3LL << 41);
596 psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
597
598 new_pc &= ~0xfLL;
599
600 write_register_pid (IA64_PSR_REGNUM, psr_value, pid);
601 write_register_pid (IA64_IP_REGNUM, new_pc, pid);
602}
603
604#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
605
606/* Returns the address of the slot that's NSLOTS slots away from
607 the address ADDR. NSLOTS may be positive or negative. */
608static CORE_ADDR
609rse_address_add(CORE_ADDR addr, int nslots)
610{
611 CORE_ADDR new_addr;
612 int mandatory_nat_slots = nslots / 63;
613 int direction = nslots < 0 ? -1 : 1;
614
615 new_addr = addr + 8 * (nslots + mandatory_nat_slots);
616
617 if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
618 new_addr += 8 * direction;
619
620 if (IS_NaT_COLLECTION_ADDR(new_addr))
621 new_addr += 8 * direction;
622
623 return new_addr;
624}
625
626/* The IA-64 frame chain is a bit odd. We won't always have a frame
627 pointer, so we use the SP value as the FP for the purpose of
628 creating a frame. There is sometimes a register (not fixed) which
629 is used as a frame pointer. When this register exists, it is not
630 especially hard to determine which one is being used. It isn't
631 even really hard to compute the frame chain, but it can be
632 computationally expensive. So, instead of making life difficult
633 (and slow), we pick a more convenient representation of the frame
634 chain, knowing that we'll have to make some small adjustments
635 in other places. (E.g, note that read_fp() and write_fp() are
636 actually read_sp() and write_sp() below in ia64_gdbarch_init()
637 below.)
638
639 Okay, so what is the frame chain exactly? It'll be the SP value
640 at the time that the function in question was entered.
641
642 Note that this *should* actually the frame pointer for the current
643 function! But as I note above, if we were to attempt to find the
644 address of the beginning of the previous frame, we'd waste a lot
645 of cycles for no good reason. So instead, we simply choose to
646 represent the frame chain as the end of the previous frame instead
647 of the beginning. */
648
649CORE_ADDR
650ia64_frame_chain (struct frame_info *frame)
651{
244bc108
KB		 652 if (frame->signal_handler_caller)
653 return read_sigcontext_register (frame, sp_regnum);
654 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
655 return frame->frame;
16461d7d 656 else
244bc108
KB		 657 {
658 FRAME_INIT_SAVED_REGS (frame);
659 if (frame->saved_regs[IA64_VFP_REGNUM])
660 return read_memory_integer (frame->saved_regs[IA64_VFP_REGNUM], 8);
661 else
662 return frame->frame + frame->extra_info->mem_stack_frame_size;
663 }
16461d7d
KB		 664}
665
666CORE_ADDR
667ia64_frame_saved_pc (struct frame_info *frame)
668{
244bc108
KB		 669 if (frame->signal_handler_caller)
670 return read_sigcontext_register (frame, pc_regnum);
671 else if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
672 return generic_read_register_dummy (frame->pc, frame->frame, pc_regnum);
673 else
674 {
675 FRAME_INIT_SAVED_REGS (frame);
16461d7d 676
244bc108
KB		 677 if (frame->saved_regs[IA64_VRAP_REGNUM])
678 return read_memory_integer (frame->saved_regs[IA64_VRAP_REGNUM], 8);
679 else if (frame->next && frame->next->signal_handler_caller)
680 return read_sigcontext_register (frame->next, IA64_BR0_REGNUM);
681 else /* either frameless, or not far enough along in the prologue... */
682 return ia64_saved_pc_after_call (frame);
683 }
16461d7d
KB		 684}
685
686#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
687 || (8 <= (_regnum_) && (_regnum_) <= 11) \
688 || (14 <= (_regnum_) && (_regnum_) <= 31))
689#define imm9(_instr_) \
690 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
691 | (((_instr_) & 0x00008000000LL) >> 20) \
692 | (((_instr_) & 0x00000001fc0LL) >> 6))
693
694static CORE_ADDR
695examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
696{
697 CORE_ADDR next_pc;
698 CORE_ADDR last_prologue_pc = pc;
16461d7d
KB		 699 instruction_type it;
700 long long instr;
701 int do_fsr_stuff = 0;
702
703 int cfm_reg = 0;
704 int ret_reg = 0;
705 int fp_reg = 0;
706 int unat_save_reg = 0;
707 int pr_save_reg = 0;
708 int mem_stack_frame_size = 0;
709 int spill_reg = 0;
710 CORE_ADDR spill_addr = 0;
0927a22b
KB		 711 char instores[8];
712 char infpstores[8];
713
714 memset (instores, 0, sizeof instores);
715 memset (infpstores, 0, sizeof infpstores);
16461d7d
KB		 716
717 if (frame && !frame->saved_regs)
718 {
719 frame_saved_regs_zalloc (frame);
720 do_fsr_stuff = 1;
721 }
722
723 if (frame
724 && !do_fsr_stuff
725 && frame->extra_info->after_prologue != 0
726 && frame->extra_info->after_prologue <= lim_pc)
727 return frame->extra_info->after_prologue;
728
729 /* Must start with an alloc instruction */
730 next_pc = fetch_instruction (pc, &it, &instr);
731 if (pc < lim_pc && next_pc
732 && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
733 {
734 /* alloc */
735 int sor = (int) ((instr & 0x00078000000LL) >> 27);
736 int sol = (int) ((instr & 0x00007f00000LL) >> 20);
737 int sof = (int) ((instr & 0x000000fe000LL) >> 13);
738 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
739 we could compare against the size given to us via the cfm as
740 either a sanity check or possibly to see if the frame has been
741 changed by a later alloc instruction... */
742 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
743 cfm_reg = rN;
744 last_prologue_pc = next_pc;
745 pc = next_pc;
746 }
747 else
748 pc = lim_pc; /* We're done early */
749
750 /* Loop, looking for prologue instructions, keeping track of
751 where preserved registers were spilled. */
752 while (pc < lim_pc)
753 {
754 next_pc = fetch_instruction (pc, &it, &instr);
755 if (next_pc == 0)
756 break;
757
0927a22b
KB		 758 if (it == B || ((instr & 0x3fLL) != 0LL))
759 {
760 /* Exit loop upon hitting a branch instruction or a predicated
761 instruction. */
762 break;
763 }
764 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
16461d7d
KB		 765 {
766 /* Move from BR */
767 int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
768 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
769 int qp = (int) (instr & 0x0000000003f);
770
771 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
772 {
773 ret_reg = rN;
774 last_prologue_pc = next_pc;
775 }
776 }
777 else if ((it == I || it == M)
778 && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
779 {
780 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
781 int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
782 | ((instr & 0x001f8000000LL) >> 20)
783 | ((instr & 0x000000fe000LL) >> 13));
784 int rM = (int) ((instr & 0x00007f00000LL) >> 20);
785 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
786 int qp = (int) (instr & 0x0000000003fLL);
787
788 if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
789 {
790 /* mov rN, r12 */
791 fp_reg = rN;
792 last_prologue_pc = next_pc;
793 }
794 else if (qp == 0 && rN == 12 && rM == 12)
795 {
796 /* adds r12, -mem_stack_frame_size, r12 */
797 mem_stack_frame_size -= imm;
798 last_prologue_pc = next_pc;
799 }
800 else if (qp == 0 && rN == 2
801 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
802 {
803 /* adds r2, spilloffset, rFramePointer
804 or
805 adds r2, spilloffset, r12
806
807 Get ready for stf.spill or st8.spill instructions.
808 The address to start spilling at is loaded into r2.
809 FIXME: Why r2? That's what gcc currently uses; it
810 could well be different for other compilers. */
811
812 /* Hmm... whether or not this will work will depend on
813 where the pc is. If it's still early in the prologue
814 this'll be wrong. FIXME */
815 spill_addr = (frame ? frame->frame : 0)
816 + (rM == 12 ? 0 : mem_stack_frame_size)
817 + imm;
818 spill_reg = rN;
819 last_prologue_pc = next_pc;
820 }
821 }
822 else if (it == M
823 && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
824 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
825 {
826 /* stf.spill [rN] = fM, imm9
827 or
828 stf.spill [rN] = fM */
829
830 int imm = imm9(instr);
831 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
832 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
833 int qp = (int) (instr & 0x0000000003fLL);
834 if (qp == 0 && rN == spill_reg && spill_addr != 0
835 && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
836 {
837 if (do_fsr_stuff)
838 frame->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
839
840 if ((instr & 0x1efc0000000) == 0x0eec0000000)
841 spill_addr += imm;
842 else
843 spill_addr = 0; /* last one; must be done */
844 last_prologue_pc = next_pc;
845 }
846 }
847 else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
848 || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
849 {
850 /* mov.m rN = arM
851 or
852 mov.i rN = arM */
853
854 int arM = (int) ((instr & 0x00007f00000LL) >> 20);
855 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
856 int qp = (int) (instr & 0x0000000003fLL);
857 if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
858 {
859 /* We have something like "mov.m r3 = ar.unat". Remember the
860 r3 (or whatever) and watch for a store of this register... */
861 unat_save_reg = rN;
862 last_prologue_pc = next_pc;
863 }
864 }
865 else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
866 {
867 /* mov rN = pr */
868 int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
869 int qp = (int) (instr & 0x0000000003fLL);
870 if (qp == 0 && isScratch (rN))
871 {
872 pr_save_reg = rN;
873 last_prologue_pc = next_pc;
874 }
875 }
876 else if (it == M
877 && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
878 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
879 {
880 /* st8 [rN] = rM
881 or
882 st8 [rN] = rM, imm9 */
883 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
884 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
885 int qp = (int) (instr & 0x0000000003fLL);
886 if (qp == 0 && rN == spill_reg && spill_addr != 0
887 && (rM == unat_save_reg || rM == pr_save_reg))
888 {
889 /* We've found a spill of either the UNAT register or the PR
890 register. (Well, not exactly; what we've actually found is
891 a spill of the register that UNAT or PR was moved to).
892 Record that fact and move on... */
893 if (rM == unat_save_reg)
894 {
895 /* Track UNAT register */
896 if (do_fsr_stuff)
897 frame->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
898 unat_save_reg = 0;
899 }
900 else
901 {
902 /* Track PR register */
903 if (do_fsr_stuff)
904 frame->saved_regs[IA64_PR_REGNUM] = spill_addr;
905 pr_save_reg = 0;
906 }
907 if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
908 /* st8 [rN] = rM, imm9 */
909 spill_addr += imm9(instr);
910 else
911 spill_addr = 0; /* must be done spilling */
912 last_prologue_pc = next_pc;
913 }
0927a22b
KB		 914 else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
915 {
916 /* Allow up to one store of each input register. */
917 instores[rM-32] = 1;
918 last_prologue_pc = next_pc;
919 }
920 }
921 else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
922 {
923 /* One of
924 st1 [rN] = rM
925 st2 [rN] = rM
926 st4 [rN] = rM
927 st8 [rN] = rM
928 Note that the st8 case is handled in the clause above.
929
930 Advance over stores of input registers. One store per input
931 register is permitted. */
932 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
933 int qp = (int) (instr & 0x0000000003fLL);
934 if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
935 {
936 instores[rM-32] = 1;
937 last_prologue_pc = next_pc;
938 }
939 }
940 else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
941 {
942 /* Either
943 stfs [rN] = fM
944 or
945 stfd [rN] = fM
946
947 Advance over stores of floating point input registers. Again
948 one store per register is permitted */
949 int fM = (int) ((instr & 0x000000fe000LL) >> 13);
950 int qp = (int) (instr & 0x0000000003fLL);
951 if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
952 {
953 infpstores[fM-8] = 1;
954 last_prologue_pc = next_pc;
955 }
16461d7d
KB		 956 }
957 else if (it == M
958 && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
959 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
960 {
961 /* st8.spill [rN] = rM
962 or
963 st8.spill [rN] = rM, imm9 */
964 int rN = (int) ((instr & 0x00007f00000LL) >> 20);
965 int rM = (int) ((instr & 0x000000fe000LL) >> 13);
966 int qp = (int) (instr & 0x0000000003fLL);
967 if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
968 {
969 /* We've found a spill of one of the preserved general purpose
970 regs. Record the spill address and advance the spill
971 register if appropriate. */
972 if (do_fsr_stuff)
973 frame->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
974 if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
975 /* st8.spill [rN] = rM, imm9 */
976 spill_addr += imm9(instr);
977 else
978 spill_addr = 0; /* Done spilling */
979 last_prologue_pc = next_pc;
980 }
981 }
16461d7d
KB		 982
983 pc = next_pc;
984 }
985
986 if (do_fsr_stuff) {
987 int i;
988 CORE_ADDR addr;
989
990 for (i = 0, addr = frame->extra_info->bsp;
991 i < frame->extra_info->sof;
992 i++, addr += 8)
993 {
994 if (IS_NaT_COLLECTION_ADDR (addr))
995 {
996 addr += 8;
997 }
998 frame->saved_regs[IA64_GR32_REGNUM + i] = addr;
999
1000 if (i+32 == cfm_reg)
1001 frame->saved_regs[IA64_CFM_REGNUM] = addr;
1002 if (i+32 == ret_reg)
1003 frame->saved_regs[IA64_VRAP_REGNUM] = addr;
1004 if (i+32 == fp_reg)
1005 frame->saved_regs[IA64_VFP_REGNUM] = addr;
1006 }
1007 }
1008
1009 if (frame && frame->extra_info) {
1010 frame->extra_info->after_prologue = last_prologue_pc;
1011 frame->extra_info->mem_stack_frame_size = mem_stack_frame_size;
1012 frame->extra_info->fp_reg = fp_reg;
1013 }
1014
1015 return last_prologue_pc;
1016}
1017
1018CORE_ADDR
1019ia64_skip_prologue (CORE_ADDR pc)
1020{
1021 return examine_prologue (pc, pc+1024, 0);
1022}
1023
1024void
1025ia64_frame_init_saved_regs (struct frame_info *frame)
1026{
16461d7d
KB		 1027 if (frame->saved_regs)
1028 return;
1029
244bc108
KB		 1030 if (frame->signal_handler_caller && SIGCONTEXT_REGISTER_ADDRESS)
1031 {
1032 int regno;
16461d7d 1033
244bc108 1034 frame_saved_regs_zalloc (frame);
16461d7d 1035
244bc108
KB		 1036 frame->saved_regs[IA64_VRAP_REGNUM] =
1037 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_IP_REGNUM);
1038 frame->saved_regs[IA64_CFM_REGNUM] =
1039 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CFM_REGNUM);
1040 frame->saved_regs[IA64_PSR_REGNUM] =
1041 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PSR_REGNUM);
1042#if 0
1043 frame->saved_regs[IA64_BSP_REGNUM] =
1044 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
1045#endif
1046 frame->saved_regs[IA64_RNAT_REGNUM] =
1047 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_RNAT_REGNUM);
1048 frame->saved_regs[IA64_CCV_REGNUM] =
1049 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_CCV_REGNUM);
1050 frame->saved_regs[IA64_UNAT_REGNUM] =
1051 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_UNAT_REGNUM);
1052 frame->saved_regs[IA64_FPSR_REGNUM] =
1053 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_FPSR_REGNUM);
1054 frame->saved_regs[IA64_PFS_REGNUM] =
1055 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_PFS_REGNUM);
1056 frame->saved_regs[IA64_LC_REGNUM] =
1057 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_LC_REGNUM);
1058 for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
1059 if (regno != sp_regnum)
1060 frame->saved_regs[regno] =
1061 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1062 for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1063 frame->saved_regs[regno] =
1064 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
1065 for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
1066 frame->saved_regs[regno] =
1067 SIGCONTEXT_REGISTER_ADDRESS (frame->frame, regno);
16461d7d
KB		 1068 }
1069 else
1070 {
244bc108 1071 CORE_ADDR func_start;
16461d7d 1072
244bc108
KB		 1073 func_start = get_pc_function_start (frame->pc);
1074 examine_prologue (func_start, frame->pc, frame);
1075 }
16461d7d
KB		 1076}
1077
1078void
1079ia64_get_saved_register (char *raw_buffer,
1080 int *optimized,
1081 CORE_ADDR *addrp,
1082 struct frame_info *frame,
1083 int regnum,
1084 enum lval_type *lval)
1085{
244bc108 1086 int is_dummy_frame;
16461d7d
KB		 1087
1088 if (!target_has_registers)
1089 error ("No registers.");
1090
1091 if (optimized != NULL)
1092 *optimized = 0;
244bc108
KB		 1093
1094 if (addrp != NULL)
1095 *addrp = 0;
1096
1097 if (lval != NULL)
1098 *lval = not_lval;
1099
1100 is_dummy_frame = PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame);
1101
1102 if (regnum == SP_REGNUM && frame->next)
16461d7d
KB		 1103 {
1104 /* Handle SP values for all frames but the topmost. */
16461d7d
KB		 1105 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
1106 }
1107 else if (regnum == IA64_BSP_REGNUM)
1108 {
16461d7d
KB		 1109 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
1110 frame->extra_info->bsp);
1111 }
1112 else if (regnum == IA64_VFP_REGNUM)
1113 {
1114 /* If the function in question uses an automatic register (r32-r127)
1115 for the frame pointer, it'll be found by ia64_find_saved_register()
1116 above. If the function lacks one of these frame pointers, we can
1117 still provide a value since we know the size of the frame */
1118 CORE_ADDR vfp = frame->frame + frame->extra_info->mem_stack_frame_size;
16461d7d
KB		 1119 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
1120 }
1121 else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
1122 {
1123 char pr_raw_buffer[MAX_REGISTER_RAW_SIZE];
1124 int pr_optim;
1125 enum lval_type pr_lval;
1126 CORE_ADDR pr_addr;
1127 int prN_val;
1128 ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
1129 frame, IA64_PR_REGNUM, &pr_lval);
1130 prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
1131 regnum - IA64_PR0_REGNUM, 1);
1132 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
16461d7d
KB		 1133 }
1134 else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1135 {
1136 char unat_raw_buffer[MAX_REGISTER_RAW_SIZE];
1137 int unat_optim;
1138 enum lval_type unat_lval;
1139 CORE_ADDR unat_addr;
1140 int unatN_val;
1141 ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
1142 frame, IA64_UNAT_REGNUM, &unat_lval);
1143 unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
1144 regnum - IA64_NAT0_REGNUM, 1);
1145 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
1146 unatN_val);
16461d7d
KB		 1147 }
1148 else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1149 {
1150 int natval = 0;
1151 /* Find address of general register corresponding to nat bit we're
1152 interested in. */
244bc108
KB		 1153 CORE_ADDR gr_addr = 0;
1154
1155 if (!is_dummy_frame)
1156 {
1157 FRAME_INIT_SAVED_REGS (frame);
1158 gr_addr = frame->saved_regs[ regnum - IA64_NAT0_REGNUM
1159 + IA64_GR0_REGNUM];
1160 }
16461d7d
KB		 1161 if (gr_addr)
1162 {
1163 /* Compute address of nat collection bits */
1164 CORE_ADDR nat_addr = gr_addr | 0x1f8;
1165 CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
1166 CORE_ADDR nat_collection;
1167 int nat_bit;
1168 /* If our nat collection address is bigger than bsp, we have to get
1169 the nat collection from rnat. Otherwise, we fetch the nat
1170 collection from the computed address. */
1171 if (nat_addr >= bsp)
1172 nat_collection = read_register (IA64_RNAT_REGNUM);
1173 else
1174 nat_collection = read_memory_integer (nat_addr, 8);
1175 nat_bit = (gr_addr >> 3) & 0x3f;
1176 natval = (nat_collection >> nat_bit) & 1;
1177 }
1178 store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
244bc108
KB		 1179 }
1180 else if (regnum == IA64_IP_REGNUM)
1181 {
1182 CORE_ADDR pc;
1183 if (frame->next)
1184 {
1185 /* FIXME: Set *addrp, *lval when possible. */
1186 pc = ia64_frame_saved_pc (frame->next);
1187 }
1188 else
1189 {
1190 pc = read_pc ();
1191 }
1192 store_address (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
1193 }
1194 else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
1195 {
1196 CORE_ADDR addr = 0;
1197 if (!is_dummy_frame)
1198 {
1199 FRAME_INIT_SAVED_REGS (frame);
1200 addr = frame->saved_regs[regnum];
1201 }
1202
1203 if (addr != 0)
1204 {
1205 if (lval != NULL)
1206 *lval = lval_memory;
1207 if (addrp != NULL)
1208 *addrp = addr;
1209 read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
1210 }
1211 else
1212 {
1213 /* r32 - r127 must be fetchable via memory. If they aren't,
1214 then the register is unavailable */
1215 memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
1216 }
16461d7d
KB		 1217 }
1218 else
1219 {
244bc108
KB		 1220 generic_get_saved_register (raw_buffer, optimized, addrp, frame,
1221 regnum, lval);
16461d7d 1222 }
16461d7d
KB		 1223}
1224
1225/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1226 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1227 and TYPE is the type (which is known to be struct, union or array). */
1228int
1229ia64_use_struct_convention (int gcc_p, struct type *type)
1230{
64a5b29c
KB		 1231 struct type *float_elt_type;
1232
1233 /* HFAs are structures (or arrays) consisting entirely of floating
1234 point values of the same length. Up to 8 of these are returned
1235 in registers. Don't use the struct convention when this is the
1236 case. */
1237 float_elt_type = is_float_or_hfa_type (type);
1238 if (float_elt_type != NULL
1239 && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
1240 return 0;
1241
1242 /* Other structs of length 32 or less are returned in r8-r11.
1243 Don't use the struct convention for those either. */
16461d7d
KB		 1244 return TYPE_LENGTH (type) > 32;
1245}
1246
1247void
1248ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
1249{
64a5b29c
KB		 1250 struct type *float_elt_type;
1251
1252 float_elt_type = is_float_or_hfa_type (type);
1253 if (float_elt_type != NULL)
1254 {
1255 int offset = 0;
1256 int regnum = IA64_FR8_REGNUM;
1257 int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
1258
1259 while (n-- > 0)
1260 {
1261 ia64_register_convert_to_virtual (regnum, float_elt_type,
1262 &regbuf[REGISTER_BYTE (regnum)], valbuf + offset);
1263 offset += TYPE_LENGTH (float_elt_type);
1264 regnum++;
1265 }
1266 }
16461d7d 1267 else
64a5b29c
KB		 1268 memcpy (valbuf, &regbuf[REGISTER_BYTE (IA64_GR8_REGNUM)],
1269 TYPE_LENGTH (type));
16461d7d
KB		 1270}
1271
1272/* FIXME: Turn this into a stack of some sort. Unfortunately, something
1273 like this is necessary though since the IA-64 calling conventions specify
1274 that r8 is not preserved. */
1275static CORE_ADDR struct_return_address;
1276
1277CORE_ADDR
1278ia64_extract_struct_value_address (char *regbuf)
1279{
1280 /* FIXME: See above. */
1281 return struct_return_address;
1282}
1283
1284void
1285ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1286{
1287 /* FIXME: See above. */
1288 /* Note that most of the work was done in ia64_push_arguments() */
1289 struct_return_address = addr;
1290}
1291
1292int
1293ia64_frameless_function_invocation (struct frame_info *frame)
1294{
1295 /* FIXME: Implement */
1296 return 0;
1297}
1298
1299CORE_ADDR
1300ia64_saved_pc_after_call (struct frame_info *frame)
1301{
1302 return read_register (IA64_BR0_REGNUM);
1303}
1304
1305CORE_ADDR
1306ia64_frame_args_address (struct frame_info *frame)
1307{
1308 /* frame->frame points at the SP for this frame; But we want the start
1309 of the frame, not the end. Calling frame chain will get his for us. */
1310 return ia64_frame_chain (frame);
1311}
1312
1313CORE_ADDR
1314ia64_frame_locals_address (struct frame_info *frame)
1315{
1316 /* frame->frame points at the SP for this frame; But we want the start
1317 of the frame, not the end. Calling frame chain will get his for us. */
1318 return ia64_frame_chain (frame);
1319}
1320
1321void
1322ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
1323{
1324 CORE_ADDR bsp, cfm;
244bc108
KB		 1325 int next_frame_is_call_dummy = ((frame->next != NULL)
1326 && PC_IN_CALL_DUMMY (frame->next->pc, frame->next->frame,
1327 frame->next->frame));
16461d7d
KB		 1328
1329 frame->extra_info = (struct frame_extra_info *)
1330 frame_obstack_alloc (sizeof (struct frame_extra_info));
1331
1332 if (frame->next == 0)
1333 {
1334 bsp = read_register (IA64_BSP_REGNUM);
1335 cfm = read_register (IA64_CFM_REGNUM);
1336
1337 }
244bc108
KB		 1338 else if (frame->next->signal_handler_caller)
1339 {
1340 bsp = read_sigcontext_register (frame->next, IA64_BSP_REGNUM);
1341 cfm = read_sigcontext_register (frame->next, IA64_CFM_REGNUM);
1342 }
1343 else if (next_frame_is_call_dummy)
1344 {
1345 bsp = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1346 IA64_BSP_REGNUM);
1347 cfm = generic_read_register_dummy (frame->next->pc, frame->next->frame,
1348 IA64_CFM_REGNUM);
1349 }
16461d7d
KB		 1350 else
1351 {
1352 struct frame_info *frn = frame->next;
16461d7d
KB		 1353
1354 FRAME_INIT_SAVED_REGS (frn);
1355
1356 if (frn->saved_regs[IA64_CFM_REGNUM] != 0)
1357 cfm = read_memory_integer (frn->saved_regs[IA64_CFM_REGNUM], 8);
244bc108
KB		 1358 else if (frn->next && frn->next->signal_handler_caller)
1359 cfm = read_sigcontext_register (frn->next, IA64_PFS_REGNUM);
1360 else if (frn->next
1361 && PC_IN_CALL_DUMMY (frn->next->pc, frn->next->frame,
1362 frn->next->frame))
1363 cfm = generic_read_register_dummy (frn->next->pc, frn->next->frame,
1364 IA64_PFS_REGNUM);
16461d7d 1365 else
76d689a6 1366 cfm = read_register (IA64_PFS_REGNUM);
16461d7d
KB		 1367
1368 bsp = frn->extra_info->bsp;
1369 }
1370 frame->extra_info->cfm = cfm;
1371 frame->extra_info->sof = cfm & 0x7f;
1372 frame->extra_info->sol = (cfm >> 7) & 0x7f;
244bc108
KB		 1373 if (frame->next == 0
1374 || frame->next->signal_handler_caller
1375 || next_frame_is_call_dummy)
16461d7d
KB		 1376 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sof);
1377 else
1378 frame->extra_info->bsp = rse_address_add (bsp, -frame->extra_info->sol);
1379
1380 frame->extra_info->after_prologue = 0;
1381 frame->extra_info->mem_stack_frame_size = -1; /* Not yet determined */
1382 frame->extra_info->fp_reg = 0;
1383}
1384
64a5b29c
KB		 1385static int
1386is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
1387{
1388 switch (TYPE_CODE (t))
1389 {
1390 case TYPE_CODE_FLT:
1391 if (*etp)
1392 return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
1393 else
1394 {
1395 *etp = t;
1396 return 1;
1397 }
1398 break;
1399 case TYPE_CODE_ARRAY:
1400 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t), etp);
1401 break;
1402 case TYPE_CODE_STRUCT:
1403 {
1404 int i;
1405
1406 for (i = 0; i < TYPE_NFIELDS (t); i++)
1407 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t, i), etp))
1408 return 0;
1409 return 1;
1410 }
1411 break;
1412 default:
1413 return 0;
1414 break;
1415 }
1416}
1417
1418/* Determine if the given type is one of the floating point types or
1419 and HFA (which is a struct, array, or combination thereof whose
1420 bottom-most elements are all of the same floating point type.) */
1421
1422static struct type *
1423is_float_or_hfa_type (struct type *t)
1424{
1425 struct type *et = 0;
1426
1427 return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
1428}
1429
1430
1431/* Attempt to find (and return) the global pointer for the given
1432 function.
1433
1434 This is a rather nasty bit of code searchs for the .dynamic section
1435 in the objfile corresponding to the pc of the function we're trying
1436 to call. Once it finds the addresses at which the .dynamic section
1437 lives in the child process, it scans the Elf64_Dyn entries for a
1438 DT_PLTGOT tag. If it finds one of these, the corresponding
1439 d_un.d_ptr value is the global pointer. */
1440
1441static CORE_ADDR
1442find_global_pointer (CORE_ADDR faddr)
1443{
76d689a6 1444 struct obj_section *faddr_sect;
64a5b29c 1445
76d689a6
KB		 1446 faddr_sect = find_pc_section (faddr);
1447 if (faddr_sect != NULL)
64a5b29c
KB		 1448 {
1449 struct obj_section *osect;
1450
76d689a6 1451 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1452 {
1453 if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
1454 break;
1455 }
1456
76d689a6 1457 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1458 {
1459 CORE_ADDR addr;
1460
1461 addr = osect->addr;
1462 while (addr < osect->endaddr)
1463 {
1464 int status;
1465 LONGEST tag;
1466 char buf[8];
1467
1468 status = target_read_memory (addr, buf, sizeof (buf));
1469 if (status != 0)
1470 break;
1471 tag = extract_signed_integer (buf, sizeof (buf));
1472
1473 if (tag == DT_PLTGOT)
1474 {
1475 CORE_ADDR global_pointer;
1476
1477 status = target_read_memory (addr + 8, buf, sizeof (buf));
1478 if (status != 0)
1479 break;
1480 global_pointer = extract_address (buf, sizeof (buf));
1481
1482 /* The payoff... */
1483 return global_pointer;
1484 }
1485
1486 if (tag == DT_NULL)
1487 break;
1488
1489 addr += 16;
1490 }
1491 }
1492 }
1493 return 0;
1494}
1495
1496/* Given a function's address, attempt to find (and return) the
1497 corresponding (canonical) function descriptor. Return 0 if
1498 not found. */
1499static CORE_ADDR
1500find_extant_func_descr (CORE_ADDR faddr)
1501{
76d689a6 1502 struct obj_section *faddr_sect;
64a5b29c
KB		 1503
1504 /* Return early if faddr is already a function descriptor */
76d689a6
KB		 1505 faddr_sect = find_pc_section (faddr);
1506 if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
64a5b29c
KB		 1507 return faddr;
1508
76d689a6 1509 if (faddr_sect != NULL)
64a5b29c 1510 {
76d689a6
KB		 1511 struct obj_section *osect;
1512 ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
64a5b29c
KB		 1513 {
1514 if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
1515 break;
1516 }
1517
76d689a6 1518 if (osect < faddr_sect->objfile->sections_end)
64a5b29c
KB		 1519 {
1520 CORE_ADDR addr;
1521
1522 addr = osect->addr;
1523 while (addr < osect->endaddr)
1524 {
1525 int status;
1526 LONGEST faddr2;
1527 char buf[8];
1528
1529 status = target_read_memory (addr, buf, sizeof (buf));
1530 if (status != 0)
1531 break;
1532 faddr2 = extract_signed_integer (buf, sizeof (buf));
1533
1534 if (faddr == faddr2)
1535 return addr;
1536
1537 addr += 16;
1538 }
1539 }
1540 }
1541 return 0;
1542}
1543
1544/* Attempt to find a function descriptor corresponding to the
1545 given address. If none is found, construct one on the
1546 stack using the address at fdaptr */
1547
1548static CORE_ADDR
1549find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
1550{
1551 CORE_ADDR fdesc;
1552
1553 fdesc = find_extant_func_descr (faddr);
1554
1555 if (fdesc == 0)
1556 {
1557 CORE_ADDR global_pointer;
1558 char buf[16];
1559
1560 fdesc = *fdaptr;
1561 *fdaptr += 16;
1562
1563 global_pointer = find_global_pointer (faddr);
1564
1565 if (global_pointer == 0)
1566 global_pointer = read_register (IA64_GR1_REGNUM);
1567
1568 store_address (buf, 8, faddr);
1569 store_address (buf + 8, 8, global_pointer);
1570
1571 write_memory (fdesc, buf, 16);
1572 }
1573
1574 return fdesc;
1575}
16461d7d
KB		 1576
1577CORE_ADDR
1578ia64_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
1579 int struct_return, CORE_ADDR struct_addr)
1580{
1581 int argno;
1582 value_ptr arg;
1583 struct type *type;
1584 int len, argoffset;
64a5b29c 1585 int nslots, rseslots, memslots, slotnum, nfuncargs;
16461d7d 1586 int floatreg;
64a5b29c 1587 CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
16461d7d
KB		 1588
1589 nslots = 0;
64a5b29c 1590 nfuncargs = 0;
16461d7d
KB		 1591 /* Count the number of slots needed for the arguments */
1592 for (argno = 0; argno < nargs; argno++)
1593 {
1594 arg = args[argno];
1595 type = check_typedef (VALUE_TYPE (arg));
1596 len = TYPE_LENGTH (type);
1597
1598 /* FIXME: This is crude and it is wrong (IMO), but it matches
1599 what gcc does, I think. */
1600 if (len > 8 && (nslots & 1))
1601 nslots++;
1602
64a5b29c
KB		 1603 if (TYPE_CODE (type) == TYPE_CODE_FUNC)
1604 nfuncargs++;
1605
16461d7d
KB		 1606 nslots += (len + 7) / 8;
1607 }
1608
64a5b29c 1609 /* Divvy up the slots between the RSE and the memory stack */
16461d7d
KB		 1610 rseslots = (nslots > 8) ? 8 : nslots;
1611 memslots = nslots - rseslots;
1612
64a5b29c 1613 /* Allocate a new RSE frame */
16461d7d
KB		 1614 cfm = read_register (IA64_CFM_REGNUM);
1615
1616 bsp = read_register (IA64_BSP_REGNUM);
1617 bsp = rse_address_add (bsp, cfm & 0x7f);
1618 new_bsp = rse_address_add (bsp, rseslots);
1619 write_register (IA64_BSP_REGNUM, new_bsp);
1620
1621 pfs = read_register (IA64_PFS_REGNUM);
1622 pfs &= 0xc000000000000000LL;
1623 pfs |= (cfm & 0xffffffffffffLL);
1624 write_register (IA64_PFS_REGNUM, pfs);
1625
1626 cfm &= 0xc000000000000000LL;
1627 cfm |= rseslots;
1628 write_register (IA64_CFM_REGNUM, cfm);
1629
64a5b29c
KB		 1630 /* We will attempt to find function descriptors in the .opd segment,
1631 but if we can't we'll construct them ourselves. That being the
1632 case, we'll need to reserve space on the stack for them. */
1633 funcdescaddr = sp - nfuncargs * 16;
1634 funcdescaddr &= ~0xfLL;
1635
1636 /* Adjust the stack pointer to it's new value. The calling conventions
1637 require us to have 16 bytes of scratch, plus whatever space is
1638 necessary for the memory slots and our function descriptors */
1639 sp = sp - 16 - (memslots + nfuncargs) * 8;
16461d7d
KB		 1640 sp &= ~0xfLL; /* Maintain 16 byte alignment */
1641
64a5b29c
KB		 1642 /* Place the arguments where they belong. The arguments will be
1643 either placed in the RSE backing store or on the memory stack.
1644 In addition, floating point arguments or HFAs are placed in
1645 floating point registers. */
16461d7d
KB		 1646 slotnum = 0;
1647 floatreg = IA64_FR8_REGNUM;
1648 for (argno = 0; argno < nargs; argno++)
1649 {
64a5b29c
KB		 1650 struct type *float_elt_type;
1651
16461d7d
KB		 1652 arg = args[argno];
1653 type = check_typedef (VALUE_TYPE (arg));
1654 len = TYPE_LENGTH (type);
64a5b29c
KB		 1655
1656 /* Special handling for function parameters */
1657 if (len == 8
1658 && TYPE_CODE (type) == TYPE_CODE_PTR
1659 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
1660 {
1661 char val_buf[8];
1662
1663 store_address (val_buf, 8,
1664 find_func_descr (extract_address (VALUE_CONTENTS (arg), 8),
1665 &funcdescaddr));
1666 if (slotnum < rseslots)
1667 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1668 else
1669 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1670 slotnum++;
1671 continue;
1672 }
1673
1674 /* Normal slots */
16461d7d
KB		 1675 if (len > 8 && (slotnum & 1))
1676 slotnum++;
1677 argoffset = 0;
1678 while (len > 0)
1679 {
1680 char val_buf[8];
1681
1682 memset (val_buf, 0, 8);
1683 memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
1684
1685 if (slotnum < rseslots)
1686 write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
1687 else
1688 write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
1689
1690 argoffset += 8;
1691 len -= 8;
1692 slotnum++;
1693 }
64a5b29c
KB		 1694
1695 /* Handle floating point types (including HFAs) */
1696 float_elt_type = is_float_or_hfa_type (type);
1697 if (float_elt_type != NULL)
1698 {
1699 argoffset = 0;
1700 len = TYPE_LENGTH (type);
1701 while (len > 0 && floatreg < IA64_FR16_REGNUM)
1702 {
1703 ia64_register_convert_to_raw (
1704 float_elt_type,
1705 floatreg,
1706 VALUE_CONTENTS (arg) + argoffset,
1707 &registers[REGISTER_BYTE (floatreg)]);
1708 floatreg++;
1709 argoffset += TYPE_LENGTH (float_elt_type);
1710 len -= TYPE_LENGTH (float_elt_type);
1711 }
16461d7d
KB		 1712 }
1713 }
1714
64a5b29c 1715 /* Store the struct return value in r8 if necessary. */
16461d7d
KB		 1716 if (struct_return)
1717 {
1718 store_address (&registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
1719 REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
1720 struct_addr);
1721 }
1722
64a5b29c 1723 /* Sync gdb's idea of what the registers are with the target. */
16461d7d
KB		 1724 target_store_registers (-1);
1725
1726 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1727 to be defined to call generic_save_dummy_frame_tos(). But at the
1728 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1729 I chose to put this call here instead of using the old mechanisms.
1730 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1731 line
1732
1733 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1734
1735 to ia64_gdbarch_init() and remove the line below. */
1736 generic_save_dummy_frame_tos (sp);
1737
1738 return sp;
1739}
1740
1741CORE_ADDR
1742ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1743{
64a5b29c 1744 CORE_ADDR global_pointer = find_global_pointer (pc);
16461d7d 1745
64a5b29c
KB		 1746 if (global_pointer != 0)
1747 write_register (IA64_GR1_REGNUM, global_pointer);
16461d7d
KB		 1748
1749 write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
1750 return sp;
1751}
1752
1753void
1754ia64_store_return_value (struct type *type, char *valbuf)
1755{
1756 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1757 {
1758 ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
1759 &registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
1760 target_store_registers (IA64_FR8_REGNUM);
1761 }
1762 else
1763 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
1764 valbuf, TYPE_LENGTH (type));
1765}
1766
1767void
1768ia64_pop_frame (void)
1769{
1770 generic_pop_current_frame (ia64_pop_frame_regular);
1771}
1772
1773static void
1774ia64_pop_frame_regular (struct frame_info *frame)
1775{
1776 int regno;
1777 CORE_ADDR bsp, cfm, pfs;
1778
1779 FRAME_INIT_SAVED_REGS (frame);
1780
1781 for (regno = 0; regno < ia64_num_regs; regno++)
1782 {
1783 if (frame->saved_regs[regno]
1784 && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
1785 && regno != pc_regnum
1786 && regno != sp_regnum
1787 && regno != IA64_PFS_REGNUM
1788 && regno != IA64_CFM_REGNUM
1789 && regno != IA64_BSP_REGNUM
1790 && regno != IA64_BSPSTORE_REGNUM)
1791 {
1792 write_register (regno,
1793 read_memory_integer (frame->saved_regs[regno],
1794 REGISTER_RAW_SIZE (regno)));
1795 }
1796 }
1797
1798 write_register (sp_regnum, FRAME_CHAIN (frame));
1799 write_pc (FRAME_SAVED_PC (frame));
1800
1801 cfm = read_register (IA64_CFM_REGNUM);
1802
1803 if (frame->saved_regs[IA64_PFS_REGNUM])
1804 {
1805 pfs = read_memory_integer (frame->saved_regs[IA64_PFS_REGNUM],
1806 REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
1807 }
1808 else
1809 pfs = read_register (IA64_PFS_REGNUM);
1810
1811 /* Compute the new bsp by *adding* the difference between the
1812 size of the frame and the size of the locals (both wrt the
1813 frame that we're going back to). This seems kind of strange,
1814 especially since it seems like we ought to be subtracting the
1815 size of the locals... and we should; but the linux kernel
1816 wants bsp to be set at the end of all used registers. It's
1817 likely that this code will need to be revised to accomodate
1818 other operating systems. */
1819 bsp = rse_address_add (frame->extra_info->bsp,
1820 (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
1821 write_register (IA64_BSP_REGNUM, bsp);
1822
1823 /* FIXME: What becomes of the epilog count in the PFS? */
1824 cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
1825 write_register (IA64_CFM_REGNUM, cfm);
1826
1827 flush_cached_frames ();
1828}
1829
1830static void
1831ia64_remote_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
1832 CORE_ADDR *targ_addr, int *targ_len)
1833{
1834 *targ_addr = memaddr;
1835 *targ_len = nr_bytes;
1836}
1837
244bc108
KB		 1838static void
1839process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1840{
1841 int *os_ident_ptr = obj;
1842 const char *name;
1843 unsigned int sectsize;
1844
1845 name = bfd_get_section_name (abfd, sect);
1846 sectsize = bfd_section_size (abfd, sect);
1847 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1848 {
1849 unsigned int name_length, data_length, note_type;
1850 char *note = alloca (sectsize);
1851
1852 bfd_get_section_contents (abfd, sect, note,
1853 (file_ptr) 0, (bfd_size_type) sectsize);
1854
1855 name_length = bfd_h_get_32 (abfd, note);
1856 data_length = bfd_h_get_32 (abfd, note + 4);
1857 note_type = bfd_h_get_32 (abfd, note + 8);
1858
1859 if (name_length == 4 && data_length == 16 && note_type == 1
1860 && strcmp (note + 12, "GNU") == 0)
1861 {
1862 int os_number = bfd_h_get_32 (abfd, note + 16);
1863
1864 /* The case numbers are from abi-tags in glibc */
1865 switch (os_number)
1866 {
1867 case 0 :
1868 *os_ident_ptr = ELFOSABI_LINUX;
1869 break;
1870#if 0 /* FIXME: Enable after internal repository is synced with sourceware */
1871 case 1 :
1872 *os_ident_ptr = ELFOSABI_HURD;
1873 break;
1874 case 2 :
1875 *os_ident_ptr = ELFOSABI_SOLARIS;
1876 break;
1877#endif
1878 default :
1879 internal_error (
1880 "process_note_abi_sections: unknown OS number %d", os_number);
1881 break;
1882 }
1883 }
1884 }
1885}
1886
16461d7d
KB		 1887static struct gdbarch *
1888ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1889{
1890 struct gdbarch *gdbarch;
244bc108
KB		 1891 struct gdbarch_tdep *tdep;
1892 int os_ident;
1893
1894 if (info.abfd != NULL
1895 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1896 {
1897 os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
1898
1899 /* If os_ident is 0, it is not necessarily the case that we're on a
02240683 1900 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
244bc108
KB		 1901 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1902 zero. So we have to check for note sections too. */
1903 if (os_ident == 0)
1904 {
1905 bfd_map_over_sections (info.abfd,
1906 process_note_abi_tag_sections,
1907 &os_ident);
1908 }
1909 }
1910 else
1911 os_ident = -1;
16461d7d 1912
244bc108
KB		 1913 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1914 arches != NULL;
1915 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1916 {
1917 if (gdbarch_tdep (current_gdbarch)->os_ident != os_ident)
1918 continue;
1919 return arches->gdbarch;
1920 }
16461d7d 1921
244bc108
KB		 1922 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1923 gdbarch = gdbarch_alloc (&info, tdep);
1924 tdep->os_ident = os_ident;
1925
1926 if (os_ident == ELFOSABI_LINUX)
1927 tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
1928 else
1929 tdep->sigcontext_register_address = 0;
16461d7d
KB		 1930
1931 set_gdbarch_short_bit (gdbarch, 16);
1932 set_gdbarch_int_bit (gdbarch, 32);
1933 set_gdbarch_long_bit (gdbarch, 64);
1934 set_gdbarch_long_long_bit (gdbarch, 64);
1935 set_gdbarch_float_bit (gdbarch, 32);
1936 set_gdbarch_double_bit (gdbarch, 64);
1937 set_gdbarch_long_double_bit (gdbarch, 64);
1938 set_gdbarch_ptr_bit (gdbarch, 64);
1939
1940 set_gdbarch_num_regs (gdbarch, ia64_num_regs);
1941 set_gdbarch_sp_regnum (gdbarch, sp_regnum);
1942 set_gdbarch_fp_regnum (gdbarch, fp_regnum);
1943 set_gdbarch_pc_regnum (gdbarch, pc_regnum);
1944
1945 set_gdbarch_register_name (gdbarch, ia64_register_name);
1946 set_gdbarch_register_size (gdbarch, 8);
1947 set_gdbarch_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
1948 set_gdbarch_register_byte (gdbarch, ia64_register_byte);
1949 set_gdbarch_register_raw_size (gdbarch, ia64_register_raw_size);
1950 set_gdbarch_max_register_raw_size (gdbarch, 16);
1951 set_gdbarch_register_virtual_size (gdbarch, ia64_register_virtual_size);
1952 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1953 set_gdbarch_register_virtual_type (gdbarch, ia64_register_virtual_type);
1954
1955 set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
1956
1957 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1958 set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
1959
1960 set_gdbarch_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
1961
1962 set_gdbarch_frame_chain (gdbarch, ia64_frame_chain);
244bc108 1963 set_gdbarch_frame_chain_valid (gdbarch, generic_func_frame_chain_valid);
16461d7d
KB		 1964 set_gdbarch_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
1965
1966 set_gdbarch_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
1967 set_gdbarch_get_saved_register (gdbarch, ia64_get_saved_register);
1968
1969 set_gdbarch_register_convertible (gdbarch, ia64_register_convertible);
1970 set_gdbarch_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
1971 set_gdbarch_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
1972
1973 set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
1974 set_gdbarch_extract_return_value (gdbarch, ia64_extract_return_value);
1975
1976 set_gdbarch_store_struct_return (gdbarch, ia64_store_struct_return);
1977 set_gdbarch_store_return_value (gdbarch, ia64_store_return_value);
1978 set_gdbarch_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
1979
1980 set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
1981 set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
1982 set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
1983 set_gdbarch_read_pc (gdbarch, ia64_read_pc);
1984 set_gdbarch_write_pc (gdbarch, ia64_write_pc);
1985
1986 /* Settings for calling functions in the inferior. */
1987 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1988 set_gdbarch_call_dummy_length (gdbarch, 0);
1989 set_gdbarch_push_arguments (gdbarch, ia64_push_arguments);
1990 set_gdbarch_push_return_address (gdbarch, ia64_push_return_address);
1991 set_gdbarch_pop_frame (gdbarch, ia64_pop_frame);
1992
1993 set_gdbarch_call_dummy_p (gdbarch, 1);
1994 set_gdbarch_call_dummy_words (gdbarch, ia64_call_dummy_words);
1995 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
1996 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1997 set_gdbarch_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
1998 set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
1999 set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
2000
2001 /* We won't necessarily have a frame pointer and even if we do,
2002 it winds up being extraordinarly messy when attempting to find
2003 the frame chain. So for the purposes of creating frames (which
2004 is all read_fp() is used for), simply use the stack pointer value
2005 instead. */
2006 set_gdbarch_read_fp (gdbarch, generic_target_read_sp);
2007 set_gdbarch_write_fp (gdbarch, generic_target_write_sp);
2008
2009 /* Settings that should be unnecessary. */
2010 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2011
2012 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2013 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2014
2015 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2016 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2017 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2018 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
2019 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
2020 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2021 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
2022 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
2023
2024 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2025 set_gdbarch_function_start_offset (gdbarch, 0);
2026
2027 set_gdbarch_remote_translate_xfer_address (
2028 gdbarch, ia64_remote_translate_xfer_address);
2029
2030 return gdbarch;
2031}
2032
2033void
2034_initialize_ia64_tdep (void)
2035{
2036 register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
2037
2038 tm_print_insn = print_insn_ia64;
2039 tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
2040}
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