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c906108c SS |
1 | /* Definitions for the Macraigor Systems BDM Wiggler |
2 | Copyright 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | #ifndef OCD_H | |
22 | #define OCD_H | |
23 | ||
24 | /* Wiggler serial protocol definitions */ | |
25 | ||
26 | #define DLE 020 /* Quote char */ | |
27 | #define SYN 026 /* Start of packet */ | |
c5aa993b | 28 | #define RAW_SYN ((026 << 8) | 026) /* get_quoted_char found a naked SYN */ |
c906108c SS |
29 | |
30 | /* Status flags */ | |
31 | ||
32 | #define OCD_FLAG_RESET 0x01 /* Target is being reset */ | |
33 | #define OCD_FLAG_STOPPED 0x02 /* Target is halted */ | |
34 | #define OCD_FLAG_BDM 0x04 /* Target is in BDM */ | |
35 | #define OCD_FLAG_PWF 0x08 /* Power failed */ | |
c5aa993b | 36 | #define OCD_FLAG_CABLE_DISC 0x10 /* BDM cable disconnected */ |
c906108c SS |
37 | |
38 | /* Commands */ | |
39 | ||
40 | #define OCD_AYT 0x0 /* Are you there? */ | |
41 | #define OCD_GET_VERSION 0x1 /* Get Version */ | |
42 | #define OCD_SET_BAUD_RATE 0x2 /* Set Baud Rate */ | |
43 | #define OCD_INIT 0x10 /* Initialize Wiggler */ | |
44 | #define OCD_SET_SPEED 0x11 /* Set Speed */ | |
c5aa993b | 45 | #define OCD_GET_STATUS_MASK 0x12 /* Get Status Mask */ |
c906108c SS |
46 | #define OCD_GET_CTRS 0x13 /* Get Error Counters */ |
47 | #define OCD_SET_FUNC_CODE 0x14 /* Set Function Code */ | |
48 | #define OCD_SET_CTL_FLAGS 0x15 /* Set Control Flags */ | |
49 | #define OCD_SET_BUF_ADDR 0x16 /* Set Register Buffer Address */ | |
50 | #define OCD_RUN 0x20 /* Run Target from PC */ | |
51 | #define OCD_RUN_ADDR 0x21 /* Run Target from Specified Address */ | |
52 | #define OCD_STOP 0x22 /* Stop Target */ | |
53 | #define OCD_RESET_RUN 0x23 /* Reset Target and Run */ | |
54 | #define OCD_RESET 0x24 /* Reset Target and Halt */ | |
55 | #define OCD_STEP 0x25 /* Single step */ | |
56 | #define OCD_READ_REGS 0x30 /* Read Registers */ | |
57 | #define OCD_WRITE_REGS 0x31 /* Write Registers */ | |
58 | #define OCD_READ_MEM 0x32 /* Read Memory */ | |
59 | #define OCD_WRITE_MEM 0x33 /* Write Memory */ | |
60 | #define OCD_FILL_MEM 0x34 /* Fill Memory */ | |
61 | #define OCD_MOVE_MEM 0x35 /* Move Memory */ | |
62 | ||
63 | #define OCD_READ_INT_MEM 0x80 /* Read Internal Memory */ | |
64 | #define OCD_WRITE_INT_MEM 0x81 /* Write Internal Memory */ | |
65 | #define OCD_JUMP 0x82 /* Jump to Subroutine */ | |
66 | ||
67 | #define OCD_ERASE_FLASH 0x90 /* Erase flash memory */ | |
68 | #define OCD_PROGRAM_FLASH 0x91 /* Write flash memory */ | |
69 | #define OCD_EXIT_MON 0x93 /* Exit the flash programming monitor */ | |
70 | #define OCD_ENTER_MON 0x94 /* Enter the flash programming monitor */ | |
71 | ||
72 | #define OCD_SET_STATUS 0x0a /* Set status */ | |
73 | #define OCD_SET_CONNECTION 0xf0 /* Set connection (init Wigglers.dll) */ | |
74 | #define OCD_LOG_FILE 0xf1 /* Cmd to get Wigglers.dll to log cmds */ | |
75 | #define OCD_FLAG_STOP 0x0 /* Stop the target, enter BDM */ | |
76 | #define OCD_FLAG_START 0x01 /* Start the target at PC */ | |
c5aa993b | 77 | #define OCD_FLAG_RETURN_STATUS 0x04 /* Return async status */ |
c906108c SS |
78 | |
79 | /* Target type (for OCD_INIT command) */ | |
80 | ||
c5aa993b JM |
81 | enum ocd_target_type |
82 | { | |
83 | OCD_TARGET_CPU32 = 0x0, /* Moto cpu32 family */ | |
84 | OCD_TARGET_CPU16 = 0x1, | |
85 | OCD_TARGET_MOTO_PPC = 0x2, /* Motorola PPC 5xx/8xx */ | |
86 | OCD_TARGET_IBM_PPC = 0x3 | |
87 | }; /* IBM PPC 4xx */ | |
c906108c | 88 | |
a14ed312 KB |
89 | void ocd_open (char *name, int from_tty, enum ocd_target_type, |
90 | struct target_ops *ops); | |
c906108c | 91 | |
a14ed312 | 92 | void ocd_close (int quitting); |
c906108c | 93 | |
a14ed312 | 94 | void ocd_detach (char *args, int from_tty); |
c906108c | 95 | |
a14ed312 | 96 | void ocd_resume (int pid, int step, enum target_signal siggnal); |
c906108c | 97 | |
a14ed312 | 98 | void ocd_prepare_to_store (void); |
c906108c | 99 | |
a14ed312 | 100 | void ocd_stop (void); |
c906108c | 101 | |
a14ed312 | 102 | void ocd_files_info (struct target_ops *ignore); |
c906108c SS |
103 | |
104 | ||
a14ed312 KB |
105 | int ocd_xfer_memory (CORE_ADDR memaddr, char *myaddr, |
106 | int len, int should_write, struct target_ops *target); | |
c906108c | 107 | |
a14ed312 | 108 | void ocd_mourn (void); |
c906108c | 109 | |
a14ed312 | 110 | void ocd_create_inferior (char *exec_file, char *args, char **env); |
c906108c | 111 | |
a14ed312 | 112 | int ocd_thread_alive (int th); |
c906108c | 113 | |
a14ed312 | 114 | void ocd_error (char *s, int error_code); |
c906108c | 115 | |
a14ed312 | 116 | void ocd_kill (void); |
c906108c | 117 | |
a14ed312 | 118 | void ocd_load (char *args, int from_tty); |
c906108c | 119 | |
a14ed312 KB |
120 | unsigned char *ocd_read_bdm_registers (int first_bdm_regno, |
121 | int last_bdm_regno, int *reglen); | |
c906108c | 122 | |
a14ed312 | 123 | CORE_ADDR ocd_read_bdm_register (int bdm_regno); |
c906108c | 124 | |
a14ed312 KB |
125 | void ocd_write_bdm_registers (int first_bdm_regno, |
126 | unsigned char *regptr, int reglen); | |
c906108c | 127 | |
a14ed312 | 128 | void ocd_write_bdm_register (int bdm_regno, CORE_ADDR reg); |
c906108c | 129 | |
a14ed312 | 130 | int ocd_wait (void); |
c906108c | 131 | |
a14ed312 KB |
132 | int ocd_insert_breakpoint (CORE_ADDR addr, char *contents_cache); |
133 | int ocd_remove_breakpoint (CORE_ADDR addr, char *contents_cache); | |
c906108c | 134 | |
a14ed312 | 135 | int ocd_write_bytes (CORE_ADDR memaddr, char *myaddr, int len); |
c906108c SS |
136 | |
137 | #endif /* OCD_H */ |