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* config/tc-i960.c (line_comment_chars): Add '#'.
[binutils.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132
RH		 26#include "subsegs.h"
27
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
114static void ppc_change_csect PARAMS ((symbolS *));
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC		 185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
252b5132
RH		 189\f
190/* The target specific pseudo-ops which we support. */
191
192const pseudo_typeS md_pseudo_table[] =
193{
194 /* Pseudo-ops which must be overridden. */
195 { "byte", ppc_byte, 0 },
196
197#ifdef OBJ_XCOFF
198 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
199 legitimately belong in the obj-*.c file. However, XCOFF is based
200 on COFF, and is only implemented for the RS/6000. We just use
201 obj-coff.c, and add what we need here. */
202 { "comm", ppc_comm, 0 },
203 { "lcomm", ppc_comm, 1 },
204 { "bb", ppc_bb, 0 },
205 { "bc", ppc_bc, 0 },
206 { "bf", ppc_bf, 0 },
207 { "bi", ppc_biei, 0 },
208 { "bs", ppc_bs, 0 },
209 { "csect", ppc_csect, 0 },
210 { "data", ppc_section, 'd' },
211 { "eb", ppc_eb, 0 },
212 { "ec", ppc_ec, 0 },
213 { "ef", ppc_ef, 0 },
214 { "ei", ppc_biei, 1 },
215 { "es", ppc_es, 0 },
216 { "extern", ppc_extern, 0 },
217 { "function", ppc_function, 0 },
218 { "lglobl", ppc_lglobl, 0 },
219 { "rename", ppc_rename, 0 },
220 { "section", ppc_named_section, 0 },
221 { "stabx", ppc_stabx, 0 },
222 { "text", ppc_section, 't' },
223 { "toc", ppc_toc, 0 },
224 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 225 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 226 { "word", ppc_xcoff_cons, 1 },
227 { "short", ppc_xcoff_cons, 1 },
228 { "vbyte", ppc_vbyte, 0 },
229#endif
230
231#ifdef OBJ_ELF
0baf16f2
AM		 232 { "llong", ppc_elf_cons, 8 },
233 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 234 { "long", ppc_elf_cons, 4 },
235 { "word", ppc_elf_cons, 2 },
236 { "short", ppc_elf_cons, 2 },
237 { "rdata", ppc_elf_rdata, 0 },
238 { "rodata", ppc_elf_rdata, 0 },
239 { "lcomm", ppc_elf_lcomm, 0 },
240#endif
241
242#ifdef TE_PE
99a814a1 243 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 244 { "previous", ppc_previous, 0 },
245 { "pdata", ppc_pdata, 0 },
246 { "ydata", ppc_ydata, 0 },
247 { "reldata", ppc_reldata, 0 },
248 { "rdata", ppc_rdata, 0 },
249 { "ualong", ppc_ualong, 0 },
250 { "znop", ppc_znop, 0 },
251 { "comm", ppc_pe_comm, 0 },
252 { "lcomm", ppc_pe_comm, 1 },
253 { "section", ppc_pe_section, 0 },
254 { "function", ppc_pe_function,0 },
255 { "tocd", ppc_pe_tocd, 0 },
256#endif
257
0baf16f2 258#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 259 { "tc", ppc_tc, 0 },
0baf16f2
AM		 260 { "machine", ppc_machine, 0 },
261#endif
252b5132
RH		 262
263 { NULL, NULL, 0 }
264};
265
266\f
99a814a1
AM		 267/* Predefined register names if -mregnames (or default for Windows NT).
268 In general, there are lots of them, in an attempt to be compatible
269 with a number of other Windows NT assemblers. */
252b5132
RH		 270
271/* Structure to hold information about predefined registers. */
272struct pd_reg
273 {
274 char *name;
275 int value;
276 };
277
278/* List of registers that are pre-defined:
279
280 Each general register has predefined names of the form:
281 1. r<reg_num> which has the value <reg_num>.
282 2. r.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each floating point register has predefined names of the form:
285 1. f<reg_num> which has the value <reg_num>.
286 2. f.<reg_num> which has the value <reg_num>.
287
7a899fff
C		 288 Each vector unit register has predefined names of the form:
289 1. v<reg_num> which has the value <reg_num>.
290 2. v.<reg_num> which has the value <reg_num>.
291
252b5132
RH		 292 Each condition register has predefined names of the form:
293 1. cr<reg_num> which has the value <reg_num>.
294 2. cr.<reg_num> which has the value <reg_num>.
295
296 There are individual registers as well:
297 sp or r.sp has the value 1
298 rtoc or r.toc has the value 2
299 fpscr has the value 0
300 xer has the value 1
301 lr has the value 8
302 ctr has the value 9
303 pmr has the value 0
304 dar has the value 19
305 dsisr has the value 18
306 dec has the value 22
307 sdr1 has the value 25
308 srr0 has the value 26
309 srr1 has the value 27
310
81d4177b 311 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 312
313static const struct pd_reg pre_defined_registers[] =
314{
315 { "cr.0", 0 }, /* Condition Registers */
316 { "cr.1", 1 },
317 { "cr.2", 2 },
318 { "cr.3", 3 },
319 { "cr.4", 4 },
320 { "cr.5", 5 },
321 { "cr.6", 6 },
322 { "cr.7", 7 },
323
324 { "cr0", 0 },
325 { "cr1", 1 },
326 { "cr2", 2 },
327 { "cr3", 3 },
328 { "cr4", 4 },
329 { "cr5", 5 },
330 { "cr6", 6 },
331 { "cr7", 7 },
332
333 { "ctr", 9 },
334
335 { "dar", 19 }, /* Data Access Register */
336 { "dec", 22 }, /* Decrementer */
337 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
338
339 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 340 { "f.1", 1 },
341 { "f.10", 10 },
342 { "f.11", 11 },
343 { "f.12", 12 },
344 { "f.13", 13 },
345 { "f.14", 14 },
346 { "f.15", 15 },
347 { "f.16", 16 },
348 { "f.17", 17 },
349 { "f.18", 18 },
350 { "f.19", 19 },
351 { "f.2", 2 },
352 { "f.20", 20 },
353 { "f.21", 21 },
354 { "f.22", 22 },
355 { "f.23", 23 },
356 { "f.24", 24 },
357 { "f.25", 25 },
358 { "f.26", 26 },
359 { "f.27", 27 },
360 { "f.28", 28 },
361 { "f.29", 29 },
362 { "f.3", 3 },
252b5132
RH		 363 { "f.30", 30 },
364 { "f.31", 31 },
81d4177b
KH		 365 { "f.4", 4 },
366 { "f.5", 5 },
367 { "f.6", 6 },
368 { "f.7", 7 },
369 { "f.8", 8 },
370 { "f.9", 9 },
371
372 { "f0", 0 },
373 { "f1", 1 },
374 { "f10", 10 },
375 { "f11", 11 },
376 { "f12", 12 },
377 { "f13", 13 },
378 { "f14", 14 },
379 { "f15", 15 },
380 { "f16", 16 },
381 { "f17", 17 },
382 { "f18", 18 },
383 { "f19", 19 },
384 { "f2", 2 },
385 { "f20", 20 },
386 { "f21", 21 },
387 { "f22", 22 },
388 { "f23", 23 },
389 { "f24", 24 },
390 { "f25", 25 },
391 { "f26", 26 },
392 { "f27", 27 },
393 { "f28", 28 },
394 { "f29", 29 },
395 { "f3", 3 },
252b5132
RH		 396 { "f30", 30 },
397 { "f31", 31 },
81d4177b
KH		 398 { "f4", 4 },
399 { "f5", 5 },
400 { "f6", 6 },
401 { "f7", 7 },
402 { "f8", 8 },
403 { "f9", 9 },
252b5132
RH		 404
405 { "fpscr", 0 },
406
407 { "lr", 8 }, /* Link Register */
408
409 { "pmr", 0 },
410
411 { "r.0", 0 }, /* General Purpose Registers */
412 { "r.1", 1 },
413 { "r.10", 10 },
414 { "r.11", 11 },
415 { "r.12", 12 },
416 { "r.13", 13 },
417 { "r.14", 14 },
418 { "r.15", 15 },
419 { "r.16", 16 },
420 { "r.17", 17 },
421 { "r.18", 18 },
422 { "r.19", 19 },
423 { "r.2", 2 },
424 { "r.20", 20 },
425 { "r.21", 21 },
426 { "r.22", 22 },
427 { "r.23", 23 },
428 { "r.24", 24 },
429 { "r.25", 25 },
430 { "r.26", 26 },
431 { "r.27", 27 },
432 { "r.28", 28 },
433 { "r.29", 29 },
434 { "r.3", 3 },
435 { "r.30", 30 },
436 { "r.31", 31 },
437 { "r.4", 4 },
438 { "r.5", 5 },
439 { "r.6", 6 },
440 { "r.7", 7 },
441 { "r.8", 8 },
442 { "r.9", 9 },
443
444 { "r.sp", 1 }, /* Stack Pointer */
445
446 { "r.toc", 2 }, /* Pointer to the table of contents */
447
448 { "r0", 0 }, /* More general purpose registers */
449 { "r1", 1 },
450 { "r10", 10 },
451 { "r11", 11 },
452 { "r12", 12 },
453 { "r13", 13 },
454 { "r14", 14 },
455 { "r15", 15 },
456 { "r16", 16 },
457 { "r17", 17 },
458 { "r18", 18 },
459 { "r19", 19 },
460 { "r2", 2 },
461 { "r20", 20 },
462 { "r21", 21 },
463 { "r22", 22 },
464 { "r23", 23 },
465 { "r24", 24 },
466 { "r25", 25 },
467 { "r26", 26 },
468 { "r27", 27 },
469 { "r28", 28 },
470 { "r29", 29 },
471 { "r3", 3 },
472 { "r30", 30 },
473 { "r31", 31 },
474 { "r4", 4 },
475 { "r5", 5 },
476 { "r6", 6 },
477 { "r7", 7 },
478 { "r8", 8 },
479 { "r9", 9 },
480
481 { "rtoc", 2 }, /* Table of contents */
482
483 { "sdr1", 25 }, /* Storage Description Register 1 */
484
485 { "sp", 1 },
486
487 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
488 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 489
7a899fff 490 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 491 { "v.1", 1 },
492 { "v.10", 10 },
493 { "v.11", 11 },
494 { "v.12", 12 },
495 { "v.13", 13 },
496 { "v.14", 14 },
497 { "v.15", 15 },
498 { "v.16", 16 },
499 { "v.17", 17 },
500 { "v.18", 18 },
501 { "v.19", 19 },
502 { "v.2", 2 },
503 { "v.20", 20 },
504 { "v.21", 21 },
505 { "v.22", 22 },
506 { "v.23", 23 },
507 { "v.24", 24 },
508 { "v.25", 25 },
509 { "v.26", 26 },
510 { "v.27", 27 },
511 { "v.28", 28 },
512 { "v.29", 29 },
513 { "v.3", 3 },
7a899fff
C		 514 { "v.30", 30 },
515 { "v.31", 31 },
81d4177b
KH		 516 { "v.4", 4 },
517 { "v.5", 5 },
518 { "v.6", 6 },
519 { "v.7", 7 },
520 { "v.8", 8 },
521 { "v.9", 9 },
7a899fff
C		 522
523 { "v0", 0 },
81d4177b
KH		 524 { "v1", 1 },
525 { "v10", 10 },
526 { "v11", 11 },
527 { "v12", 12 },
528 { "v13", 13 },
529 { "v14", 14 },
530 { "v15", 15 },
531 { "v16", 16 },
532 { "v17", 17 },
533 { "v18", 18 },
534 { "v19", 19 },
535 { "v2", 2 },
536 { "v20", 20 },
537 { "v21", 21 },
538 { "v22", 22 },
539 { "v23", 23 },
540 { "v24", 24 },
541 { "v25", 25 },
542 { "v26", 26 },
543 { "v27", 27 },
544 { "v28", 28 },
545 { "v29", 29 },
546 { "v3", 3 },
7a899fff
C		 547 { "v30", 30 },
548 { "v31", 31 },
81d4177b
KH		 549 { "v4", 4 },
550 { "v5", 5 },
551 { "v6", 6 },
552 { "v7", 7 },
553 { "v8", 8 },
7a899fff 554 { "v9", 9 },
252b5132
RH		 555
556 { "xer", 1 },
557
558};
559
bc805888 560#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 561
562/* Given NAME, find the register number associated with that name, return
563 the integer value associated with the given name or -1 on failure. */
564
565static int reg_name_search
566 PARAMS ((const struct pd_reg *, int, const char * name));
567
568static int
569reg_name_search (regs, regcount, name)
570 const struct pd_reg *regs;
571 int regcount;
572 const char *name;
573{
574 int middle, low, high;
575 int cmp;
576
577 low = 0;
578 high = regcount - 1;
579
580 do
581 {
582 middle = (low + high) / 2;
583 cmp = strcasecmp (name, regs[middle].name);
584 if (cmp < 0)
585 high = middle - 1;
586 else if (cmp > 0)
587 low = middle + 1;
588 else
589 return regs[middle].value;
590 }
591 while (low <= high);
592
593 return -1;
594}
595
596/*
99a814a1 597 * Summary of register_name.
252b5132
RH		 598 *
599 * in: Input_line_pointer points to 1st char of operand.
600 *
601 * out: A expressionS.
602 * The operand may have been a register: in this case, X_op == O_register,
603 * X_add_number is set to the register number, and truth is returned.
604 * Input_line_pointer->(next non-blank) char after operand, or is in its
605 * original state.
606 */
607
b34976b6 608static bfd_boolean
252b5132
RH		 609register_name (expressionP)
610 expressionS *expressionP;
611{
612 int reg_number;
613 char *name;
614 char *start;
615 char c;
616
99a814a1 617 /* Find the spelling of the operand. */
252b5132 618 start = name = input_line_pointer;
3882b010 619 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 620 name = ++input_line_pointer;
621
3882b010 622 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 623 return FALSE;
252b5132
RH		 624
625 c = get_symbol_end ();
626 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
627
468cced8
AM		 628 /* Put back the delimiting char. */
629 *input_line_pointer = c;
630
99a814a1 631 /* Look to see if it's in the register table. */
81d4177b 632 if (reg_number >= 0)
252b5132
RH		 633 {
634 expressionP->X_op = O_register;
635 expressionP->X_add_number = reg_number;
81d4177b 636
99a814a1 637 /* Make the rest nice. */
252b5132
RH		 638 expressionP->X_add_symbol = NULL;
639 expressionP->X_op_symbol = NULL;
b34976b6 640 return TRUE;
252b5132 641 }
468cced8
AM		 642
643 /* Reset the line as if we had not done anything. */
644 input_line_pointer = start;
b34976b6 645 return FALSE;
252b5132
RH		 646}
647\f
648/* This function is called for each symbol seen in an expression. It
649 handles the special parsing which PowerPC assemblers are supposed
650 to use for condition codes. */
651
652/* Whether to do the special parsing. */
b34976b6 653static bfd_boolean cr_operand;
252b5132
RH		 654
655/* Names to recognize in a condition code. This table is sorted. */
656static const struct pd_reg cr_names[] =
657{
658 { "cr0", 0 },
659 { "cr1", 1 },
660 { "cr2", 2 },
661 { "cr3", 3 },
662 { "cr4", 4 },
663 { "cr5", 5 },
664 { "cr6", 6 },
665 { "cr7", 7 },
666 { "eq", 2 },
667 { "gt", 1 },
668 { "lt", 0 },
669 { "so", 3 },
670 { "un", 3 }
671};
672
673/* Parsing function. This returns non-zero if it recognized an
674 expression. */
675
676int
677ppc_parse_name (name, expr)
678 const char *name;
679 expressionS *expr;
680{
681 int val;
682
683 if (! cr_operand)
684 return 0;
685
686 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
687 name);
688 if (val < 0)
689 return 0;
690
691 expr->X_op = O_constant;
692 expr->X_add_number = val;
693
694 return 1;
695}
696\f
697/* Local variables. */
698
699/* The type of processor we are assembling for. This is one or more
700 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 701static unsigned long ppc_cpu = 0;
252b5132 702
2b3c4602
AM		 703/* Whether to target xcoff64/elf64. */
704static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 705
252b5132
RH		 706/* Opcode hash table. */
707static struct hash_control *ppc_hash;
708
709/* Macro hash table. */
710static struct hash_control *ppc_macro_hash;
711
712#ifdef OBJ_ELF
99a814a1 713/* What type of shared library support to use. */
5d6f4f16 714static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 715
99a814a1 716/* Flags to set in the elf header. */
252b5132
RH		 717static flagword ppc_flags = 0;
718
719/* Whether this is Solaris or not. */
720#ifdef TARGET_SOLARIS_COMMENT
b34976b6 721#define SOLARIS_P TRUE
252b5132 722#else
b34976b6 723#define SOLARIS_P FALSE
252b5132
RH		 724#endif
725
b34976b6 726static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 727#endif
728
729#ifdef OBJ_XCOFF
730
731/* The RS/6000 assembler uses the .csect pseudo-op to generate code
732 using a bunch of different sections. These assembler sections,
733 however, are all encompassed within the .text or .data sections of
734 the final output file. We handle this by using different
735 subsegments within these main segments. */
736
737/* Next subsegment to allocate within the .text segment. */
738static subsegT ppc_text_subsegment = 2;
739
740/* Linked list of csects in the text section. */
741static symbolS *ppc_text_csects;
742
743/* Next subsegment to allocate within the .data segment. */
744static subsegT ppc_data_subsegment = 2;
745
746/* Linked list of csects in the data section. */
747static symbolS *ppc_data_csects;
748
749/* The current csect. */
750static symbolS *ppc_current_csect;
751
752/* The RS/6000 assembler uses a TOC which holds addresses of functions
753 and variables. Symbols are put in the TOC with the .tc pseudo-op.
754 A special relocation is used when accessing TOC entries. We handle
755 the TOC as a subsegment within the .data segment. We set it up if
756 we see a .toc pseudo-op, and save the csect symbol here. */
757static symbolS *ppc_toc_csect;
758
759/* The first frag in the TOC subsegment. */
760static fragS *ppc_toc_frag;
761
762/* The first frag in the first subsegment after the TOC in the .data
763 segment. NULL if there are no subsegments after the TOC. */
764static fragS *ppc_after_toc_frag;
765
766/* The current static block. */
767static symbolS *ppc_current_block;
768
769/* The COFF debugging section; set by md_begin. This is not the
770 .debug section, but is instead the secret BFD section which will
771 cause BFD to set the section number of a symbol to N_DEBUG. */
772static asection *ppc_coff_debug_section;
773
774#endif /* OBJ_XCOFF */
775
776#ifdef TE_PE
777
778/* Various sections that we need for PE coff support. */
779static segT ydata_section;
780static segT pdata_section;
781static segT reldata_section;
782static segT rdata_section;
783static segT tocdata_section;
784
81d4177b 785/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 786static segT ppc_previous_section;
787static segT ppc_current_section;
788
789#endif /* TE_PE */
790
791#ifdef OBJ_ELF
792symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 793#define PPC_APUINFO_ISEL 0x40
794#define PPC_APUINFO_PMR 0x41
795#define PPC_APUINFO_RFMCI 0x42
796#define PPC_APUINFO_CACHELCK 0x43
797#define PPC_APUINFO_SPE 0x100
798#define PPC_APUINFO_EFS 0x101
799#define PPC_APUINFO_BRLOCK 0x102
800
b34976b6
AM		 801/*
802 * We keep a list of APUinfo
6a0c61b7
EZ		 803 */
804unsigned long *ppc_apuinfo_list;
805unsigned int ppc_apuinfo_num;
806unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 807#endif /* OBJ_ELF */
808\f
809#ifdef OBJ_ELF
15c1449b 810const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 811#else
15c1449b 812const char *const md_shortopts = "um:";
252b5132 813#endif
15c1449b 814const struct option md_longopts[] = {
252b5132
RH		 815 {NULL, no_argument, NULL, 0}
816};
15c1449b 817const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 818
819int
820md_parse_option (c, arg)
821 int c;
822 char *arg;
823{
824 switch (c)
825 {
826 case 'u':
827 /* -u means that any undefined symbols should be treated as
828 external, which is the default for gas anyhow. */
829 break;
830
831#ifdef OBJ_ELF
832 case 'l':
833 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 834 sake, recognize -be also. */
252b5132
RH		 835 if (strcmp (arg, "e") == 0)
836 {
837 target_big_endian = 0;
838 set_target_endian = 1;
839 }
840 else
841 return 0;
842
843 break;
844
845 case 'b':
846 if (strcmp (arg, "e") == 0)
847 {
848 target_big_endian = 1;
849 set_target_endian = 1;
850 }
851 else
852 return 0;
853
854 break;
855
856 case 'K':
99a814a1 857 /* Recognize -K PIC. */
252b5132
RH		 858 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
859 {
860 shlib = SHLIB_PIC;
861 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
862 }
863 else
864 return 0;
865
866 break;
867#endif
868
7f6d05e8
CP		 869 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
870 case 'a':
871 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 872 {
873#ifdef BFD64
874 ppc_obj64 = 1;
875#else
876 as_fatal (_("%s unsupported"), "-a64");
877#endif
878 }
7f6d05e8 879 else if (strcmp (arg, "32") == 0)
2b3c4602 880 ppc_obj64 = 0;
7f6d05e8
CP		 881 else
882 return 0;
883 break;
81d4177b 884
252b5132
RH		 885 case 'm':
886 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 887 (RIOS2). */
252b5132 888 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 889 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH		 890 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
891 else if (strcmp (arg, "pwr") == 0)
2b3c4602 892 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 893 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 894 instructions that are holdovers from the Power. */
252b5132 895 else if (strcmp (arg, "601") == 0)
b34976b6
AM		 896 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
897 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 898 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 899 PowerPC 603/604. */
252b5132
RH		 900 else if (strcmp (arg, "ppc") == 0
901 || strcmp (arg, "ppc32") == 0
252b5132
RH		 902 || strcmp (arg, "603") == 0
903 || strcmp (arg, "604") == 0)
6a0c61b7 904 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 905 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 906 else if (strcmp (arg, "403") == 0
b34976b6
AM		 907 || strcmp (arg, "405") == 0)
908 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
909 | PPC_OPCODE_403 | PPC_OPCODE_32);
418c1742 910 else if (strcmp (arg, "7400") == 0
b34976b6
AM		 911 || strcmp (arg, "7410") == 0
912 || strcmp (arg, "7450") == 0
913 || strcmp (arg, "7455") == 0)
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 916 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM		 917 {
918 if (ppc_cpu == 0)
919 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
920 else
921 ppc_cpu |= PPC_OPCODE_ALTIVEC;
922 }
6a0c61b7
EZ		 923 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
924 {
b34976b6
AM		 925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
926 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
927 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
928 | PPC_OPCODE_RFMCI);
929 }
6a0c61b7
EZ		 930 else if (strcmp (arg, "spe") == 0)
931 {
932 if (ppc_cpu == 0)
933 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
934 else
935 ppc_cpu |= PPC_OPCODE_SPE;
936 }
252b5132 937 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 938 620. */
252b5132
RH		 939 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
940 {
6a0c61b7 941 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 942 }
d0e9a01c
RH		 943 else if (strcmp (arg, "ppc64bridge") == 0)
944 {
b34976b6
AM		 945 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
946 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG		 947 }
948 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
949 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ		 950 {
951 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
952 }
418c1742
MG		 953 /* -mbooke64 means enable 64-bit BookE support. */
954 else if (strcmp (arg, "booke64") == 0)
955 {
b34976b6
AM		 956 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
957 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 958 }
23e1d84c
AM		 959 else if (strcmp (arg, "power4") == 0)
960 {
b34976b6
AM		 961 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
962 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 963 }
252b5132
RH		 964 /* -mcom means assemble for the common intersection between Power
965 and PowerPC. At present, we just allow the union, rather
966 than the intersection. */
967 else if (strcmp (arg, "com") == 0)
2b3c4602 968 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH		 969 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
970 else if (strcmp (arg, "any") == 0)
2b3c4602 971 ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
252b5132
RH		 972
973 else if (strcmp (arg, "regnames") == 0)
b34976b6 974 reg_names_p = TRUE;
252b5132
RH		 975
976 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 977 reg_names_p = FALSE;
252b5132
RH		 978
979#ifdef OBJ_ELF
99a814a1
AM		 980 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
981 that require relocation. */
252b5132
RH		 982 else if (strcmp (arg, "relocatable") == 0)
983 {
5d6f4f16 984 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 985 ppc_flags |= EF_PPC_RELOCATABLE;
986 }
987
988 else if (strcmp (arg, "relocatable-lib") == 0)
989 {
5d6f4f16 990 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 991 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
992 }
993
99a814a1 994 /* -memb, set embedded bit. */
252b5132
RH		 995 else if (strcmp (arg, "emb") == 0)
996 ppc_flags |= EF_PPC_EMB;
997
99a814a1
AM		 998 /* -mlittle/-mbig set the endianess. */
999 else if (strcmp (arg, "little") == 0
1000 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1001 {
1002 target_big_endian = 0;
1003 set_target_endian = 1;
1004 }
1005
1006 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1007 {
1008 target_big_endian = 1;
1009 set_target_endian = 1;
1010 }
1011
1012 else if (strcmp (arg, "solaris") == 0)
1013 {
b34976b6 1014 msolaris = TRUE;
252b5132
RH		 1015 ppc_comment_chars = ppc_solaris_comment_chars;
1016 }
1017
1018 else if (strcmp (arg, "no-solaris") == 0)
1019 {
b34976b6 1020 msolaris = FALSE;
252b5132
RH		 1021 ppc_comment_chars = ppc_eabi_comment_chars;
1022 }
1023#endif
1024 else
1025 {
1026 as_bad (_("invalid switch -m%s"), arg);
1027 return 0;
1028 }
1029 break;
1030
1031#ifdef OBJ_ELF
1032 /* -V: SVR4 argument to print version ID. */
1033 case 'V':
1034 print_version_id ();
1035 break;
1036
1037 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1038 should be emitted or not. FIXME: Not implemented. */
1039 case 'Q':
1040 break;
1041
1042 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1043 rather than .stabs.excl, which is ignored by the linker.
1044 FIXME: Not implemented. */
1045 case 's':
1046 if (arg)
1047 return 0;
1048
1049 break;
1050#endif
1051
1052 default:
1053 return 0;
1054 }
1055
1056 return 1;
1057}
1058
1059void
1060md_show_usage (stream)
1061 FILE *stream;
1062{
bc805888 1063 fprintf (stream, _("\
252b5132 1064PowerPC options:\n\
df12615d
AM		 1065-a32 generate ELF32/XCOFF32\n\
1066-a64 generate ELF64/XCOFF64\n\
252b5132 1067-u ignored\n\
23e1d84c
AM		 1068-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1069-mpwr generate code for POWER (RIOS1)\n\
1070-m601 generate code for PowerPC 601\n\
418c1742 1071-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1072 generate code for PowerPC 603/604\n\
df12615d 1073-m403, -m405 generate code for PowerPC 403/405\n\
f5c120c5 1074-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1075 generate code For PowerPC 7400/7410/7450/7455\n"));
1076 fprintf (stream, _("\
23e1d84c 1077-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1078-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1079-mbooke64 generate code for 64-bit PowerPC BookE\n\
1080-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1081-mpower4 generate code for Power4 architecture\n\
252b5132 1082-mcom generate code Power/PowerPC common instructions\n\
df12615d 1083-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1084 fprintf (stream, _("\
df12615d 1085-maltivec generate code for AltiVec\n\
6a0c61b7 1086-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1087-mspe generate code for Motorola SPE instructions\n\
1088-mregnames Allow symbolic names for registers\n\
1089-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1090#ifdef OBJ_ELF
bc805888 1091 fprintf (stream, _("\
252b5132
RH		 1092-mrelocatable support for GCC's -mrelocatble option\n\
1093-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1094-memb set PPC_EMB bit in ELF flags\n\
df12615d 1095-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1096 generate code for a little endian machine\n\
df12615d
AM		 1097-mbig, -mbig-endian, -b, -be\n\
1098 generate code for a big endian machine\n\
252b5132
RH		 1099-msolaris generate code for Solaris\n\
1100-mno-solaris do not generate code for Solaris\n\
1101-V print assembler version number\n\
1102-Qy, -Qn ignored\n"));
1103#endif
1104}
1105\f
1106/* Set ppc_cpu if it is not already set. */
1107
1108static void
1109ppc_set_cpu ()
1110{
1111 const char *default_os = TARGET_OS;
1112 const char *default_cpu = TARGET_CPU;
1113
1114 if (ppc_cpu == 0)
1115 {
2a98c3a6
AM		 1116 if (ppc_obj64)
1117 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1118 else if (strncmp (default_os, "aix", 3) == 0
1119 && default_os[3] >= '4' && default_os[3] <= '9')
2b3c4602 1120 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1121 else if (strncmp (default_os, "aix3", 4) == 0)
2b3c4602 1122 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1123 else if (strcmp (default_cpu, "rs6000") == 0)
2b3c4602 1124 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1125 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1126 {
1127 if (default_cpu[7] == '6' && default_cpu[8] == '4')
1128 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1129 else
1130 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1131 }
252b5132 1132 else
99a814a1
AM		 1133 as_fatal (_("Unknown default cpu = %s, os = %s"),
1134 default_cpu, default_os);
252b5132
RH		 1135 }
1136}
1137
1138/* Figure out the BFD architecture to use. */
1139
1140enum bfd_architecture
1141ppc_arch ()
1142{
1143 const char *default_cpu = TARGET_CPU;
1144 ppc_set_cpu ();
1145
1146 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1147 return bfd_arch_powerpc;
1148 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1149 return bfd_arch_rs6000;
1150 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1151 {
1152 if (strcmp (default_cpu, "rs6000") == 0)
1153 return bfd_arch_rs6000;
0baf16f2 1154 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1155 return bfd_arch_powerpc;
1156 }
1157
1158 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1159 return bfd_arch_unknown;
1160}
1161
7f6d05e8
CP		 1162unsigned long
1163ppc_mach ()
1164{
2a98c3a6
AM		 1165 if (ppc_obj64)
1166 return bfd_mach_ppc64;
1167 else if (ppc_arch () == bfd_arch_rs6000)
1168 return bfd_mach_rs6k;
1169 else
1170 return bfd_mach_ppc;
7f6d05e8
CP		 1171}
1172
81d4177b 1173extern char*
99a814a1 1174ppc_target_format ()
7f6d05e8
CP		 1175{
1176#ifdef OBJ_COFF
1177#ifdef TE_PE
99a814a1 1178 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1179#elif TE_POWERMAC
0baf16f2 1180 return "xcoff-powermac";
7f6d05e8 1181#else
eb1e0e80 1182# ifdef TE_AIX5
2b3c4602 1183 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1184# else
2b3c4602 1185 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1186# endif
7f6d05e8 1187#endif
7f6d05e8
CP		 1188#endif
1189#ifdef OBJ_ELF
0baf16f2 1190 return (target_big_endian
2b3c4602
AM		 1191 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1192 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1193#endif
1194}
1195
252b5132
RH		 1196/* This function is called when the assembler starts up. It is called
1197 after the options have been parsed and the output file has been
1198 opened. */
1199
1200void
1201md_begin ()
1202{
1203 register const struct powerpc_opcode *op;
1204 const struct powerpc_opcode *op_end;
1205 const struct powerpc_macro *macro;
1206 const struct powerpc_macro *macro_end;
b34976b6 1207 bfd_boolean dup_insn = FALSE;
252b5132
RH		 1208
1209 ppc_set_cpu ();
1210
1211#ifdef OBJ_ELF
81d4177b 1212 /* Set the ELF flags if desired. */
252b5132
RH		 1213 if (ppc_flags && !msolaris)
1214 bfd_set_private_flags (stdoutput, ppc_flags);
1215#endif
1216
1217 /* Insert the opcodes into a hash table. */
1218 ppc_hash = hash_new ();
1219
1220 op_end = powerpc_opcodes + powerpc_num_opcodes;
1221 for (op = powerpc_opcodes; op < op_end; op++)
1222 {
1223 know ((op->opcode & op->mask) == op->opcode);
1224
2b3c4602 1225 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1226 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1227 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1228 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1229 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1230 /* Certain instructions (eg: extsw) do not exist in the
1231 32-bit BookE instruction set, but they do exist in the
1232 64-bit BookE instruction set, and other PPC instruction
1233 sets. Check to see if the opcode has the BOOKE64 flag set.
1234 If it does make sure that the target CPU is not the BookE32. */
1235 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1236 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1237 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1238 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1239 || ((op->flags & PPC_OPCODE_POWER4)
1240 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1241 {
1242 const char *retval;
1243
1244 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1245 if (retval != (const char *) NULL)
1246 {
99a814a1 1247 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1248 if ((ppc_cpu & PPC_OPCODE_601) != 0
1249 && (op->flags & PPC_OPCODE_POWER) != 0)
1250 continue;
1251
99a814a1
AM		 1252 as_bad (_("Internal assembler error for instruction %s"),
1253 op->name);
b34976b6 1254 dup_insn = TRUE;
252b5132
RH		 1255 }
1256 }
1257 }
1258
1259 /* Insert the macros into a hash table. */
1260 ppc_macro_hash = hash_new ();
1261
1262 macro_end = powerpc_macros + powerpc_num_macros;
1263 for (macro = powerpc_macros; macro < macro_end; macro++)
1264 {
1265 if ((macro->flags & ppc_cpu) != 0)
1266 {
1267 const char *retval;
1268
1269 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1270 if (retval != (const char *) NULL)
1271 {
1272 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1273 dup_insn = TRUE;
252b5132
RH		 1274 }
1275 }
1276 }
1277
1278 if (dup_insn)
1279 abort ();
1280
99a814a1
AM		 1281 /* Tell the main code what the endianness is if it is not overidden
1282 by the user. */
252b5132
RH		 1283 if (!set_target_endian)
1284 {
1285 set_target_endian = 1;
1286 target_big_endian = PPC_BIG_ENDIAN;
1287 }
1288
1289#ifdef OBJ_XCOFF
1290 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1291
1292 /* Create dummy symbols to serve as initial csects. This forces the
1293 text csects to precede the data csects. These symbols will not
1294 be output. */
1295 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1296 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1297 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1298 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1299#endif
1300
1301#ifdef TE_PE
1302
1303 ppc_current_section = text_section;
81d4177b 1304 ppc_previous_section = 0;
252b5132
RH		 1305
1306#endif
1307}
1308
6a0c61b7
EZ		 1309void
1310ppc_cleanup ()
1311{
dc1d03fc 1312#ifdef OBJ_ELF
6a0c61b7
EZ		 1313 if (ppc_apuinfo_list == NULL)
1314 return;
1315
1316 /* Ok, so write the section info out. We have this layout:
1317
1318 byte data what
1319 ---- ---- ----
1320 0 8 length of "APUinfo\0"
1321 4 (n*4) number of APU's (4 bytes each)
1322 8 2 note type 2
1323 12 "APUinfo\0" name
1324 20 APU#1 first APU's info
1325 24 APU#2 second APU's info
1326 ... ...
1327 */
1328 {
1329 char *p;
1330 asection *seg = now_seg;
1331 subsegT subseg = now_subseg;
1332 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1333 unsigned int i;
6a0c61b7
EZ		 1334
1335 /* Create the .PPC.EMB.apuinfo section. */
1336 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1337 bfd_set_section_flags (stdoutput,
1338 apuinfo_secp,
e1a9cb8e 1339 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1340
1341 p = frag_more (4);
1342 md_number_to_chars (p, (valueT) 8, 4);
1343
1344 p = frag_more (4);
1345 md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
1346
1347 p = frag_more (4);
1348 md_number_to_chars (p, (valueT) 2, 4);
1349
1350 p = frag_more (8);
1351 strcpy (p, "APUinfo");
1352
1353 for (i = 0; i < ppc_apuinfo_num; i++)
1354 {
b34976b6
AM		 1355 p = frag_more (4);
1356 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1357 }
1358
1359 frag_align (2, 0, 0);
1360
1361 /* We probably can't restore the current segment, for there likely
1362 isn't one yet... */
1363 if (seg && subseg)
1364 subseg_set (seg, subseg);
1365 }
dc1d03fc 1366#endif
6a0c61b7
EZ		 1367}
1368
252b5132
RH		 1369/* Insert an operand value into an instruction. */
1370
1371static unsigned long
1372ppc_insert_operand (insn, operand, val, file, line)
1373 unsigned long insn;
1374 const struct powerpc_operand *operand;
1375 offsetT val;
1376 char *file;
1377 unsigned int line;
1378{
1379 if (operand->bits != 32)
1380 {
1381 long min, max;
1382 offsetT test;
1383
1384 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1385 {
d0e9a01c 1386 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1387 max = (1 << operand->bits) - 1;
1388 else
1389 max = (1 << (operand->bits - 1)) - 1;
1390 min = - (1 << (operand->bits - 1));
1391
2b3c4602 1392 if (!ppc_obj64)
252b5132
RH		 1393 {
1394 /* Some people write 32 bit hex constants with the sign
1395 extension done by hand. This shouldn't really be
1396 valid, but, to permit this code to assemble on a 64
1397 bit host, we sign extend the 32 bit value. */
1398 if (val > 0
92161534
ILT		 1399 && (val & (offsetT) 0x80000000) != 0
1400 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1401 {
1402 val -= 0x80000000;
1403 val -= 0x80000000;
1404 }
1405 }
1406 }
1407 else
1408 {
1409 max = (1 << operand->bits) - 1;
1410 min = 0;
1411 }
1412
1413 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1414 test = - val;
1415 else
1416 test = val;
1417
1418 if (test < (offsetT) min || test > (offsetT) max)
1419 {
1420 const char *err =
1421 _("operand out of range (%s not between %ld and %ld)");
1422 char buf[100];
1423
1424 sprint_value (buf, test);
0baf16f2 1425 as_bad_where (file, line, err, buf, min, max);
252b5132
RH		 1426 }
1427 }
1428
1429 if (operand->insert)
1430 {
1431 const char *errmsg;
1432
1433 errmsg = NULL;
2b3c4602 1434 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1435 if (errmsg != (const char *) NULL)
0baf16f2 1436 as_bad_where (file, line, errmsg);
252b5132
RH		 1437 }
1438 else
1439 insn |= (((long) val & ((1 << operand->bits) - 1))
1440 << operand->shift);
1441
1442 return insn;
1443}
1444
1445\f
1446#ifdef OBJ_ELF
1447/* Parse @got, etc. and return the desired relocation. */
1448static bfd_reloc_code_real_type
1449ppc_elf_suffix (str_p, exp_p)
1450 char **str_p;
1451 expressionS *exp_p;
1452{
1453 struct map_bfd {
1454 char *string;
1455 int length;
15c1449b 1456 int reloc;
252b5132
RH		 1457 };
1458
1459 char ident[20];
1460 char *str = *str_p;
1461 char *str2;
1462 int ch;
1463 int len;
15c1449b 1464 const struct map_bfd *ptr;
252b5132 1465
bc805888 1466#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1467
15c1449b 1468 static const struct map_bfd mapping[] = {
cdba85ec
AM		 1469 MAP ("l", (int) BFD_RELOC_LO16),
1470 MAP ("h", (int) BFD_RELOC_HI16),
1471 MAP ("ha", (int) BFD_RELOC_HI16_S),
1472 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1473 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1474 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1475 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1476 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1477 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1478 MAP ("fixup", (int) BFD_RELOC_CTOR),
1479 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1480 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1481 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1482 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1483 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1484 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1485 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1486 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1487 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1488 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1489 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1490 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1491 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1492 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1493 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1494 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1495 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1496 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1497 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1498 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1499 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1500 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1501 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1502 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1503 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1504 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1505 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1506 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1507 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1508 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1509 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1510 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1511 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1512 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1513 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1514 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1515 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1516 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1517 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1518 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1519 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1520 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1521 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1522 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1523 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1524 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1525 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1526 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1527 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1528 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1529 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1530 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1531 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1532 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1533 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1534 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1535 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1536 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM		 1537 /* The following are only valid for ppc64. Negative values are
1538 used instead of a flag. */
cdba85ec
AM		 1539 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1540 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1541 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1542 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1543 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1544 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1545 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1546 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1547 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1548 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1549 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1550 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1551 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1552 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1553 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1554 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1555 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1556 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH		 1557 };
1558
1559 if (*str++ != '@')
1560 return BFD_RELOC_UNUSED;
1561
1562 for (ch = *str, str2 = ident;
1563 (str2 < ident + sizeof (ident) - 1
3882b010 1564 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1565 ch = *++str)
1566 {
3882b010 1567 *str2++ = TOLOWER (ch);
252b5132
RH		 1568 }
1569
1570 *str2 = '\0';
1571 len = str2 - ident;
1572
1573 ch = ident[0];
1574 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1575 if (ch == ptr->string[0]
1576 && len == ptr->length
1577 && memcmp (ident, ptr->string, ptr->length) == 0)
1578 {
15c1449b
AM		 1579 int reloc = ptr->reloc;
1580
2b3c4602 1581 if (reloc < 0)
15c1449b 1582 {
2b3c4602 1583 if (!ppc_obj64)
15c1449b
AM		 1584 return BFD_RELOC_UNUSED;
1585 reloc = -reloc;
1586 }
1587
cdba85ec 1588 if (!ppc_obj64)
5f6db75a
AM		 1589 if (exp_p->X_add_number != 0
1590 && (reloc == (int) BFD_RELOC_16_GOTOFF
1591 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1592 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1593 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1594 as_warn (_("identifier+constant@got means identifier@got+constant"));
1595
1596 /* Now check for identifier@suffix+constant. */
1597 if (*str == '-' || *str == '+')
252b5132 1598 {
5f6db75a
AM		 1599 char *orig_line = input_line_pointer;
1600 expressionS new_exp;
1601
1602 input_line_pointer = str;
1603 expression (&new_exp);
1604 if (new_exp.X_op == O_constant)
252b5132 1605 {
5f6db75a
AM		 1606 exp_p->X_add_number += new_exp.X_add_number;
1607 str = input_line_pointer;
252b5132 1608 }
5f6db75a
AM		 1609
1610 if (&input_line_pointer != str_p)
1611 input_line_pointer = orig_line;
252b5132 1612 }
252b5132 1613 *str_p = str;
0baf16f2 1614
2b3c4602 1615 if (reloc == (int) BFD_RELOC_PPC64_TOC
0baf16f2
AM		 1616 && exp_p->X_op == O_symbol)
1617 {
1618 /* This reloc type ignores the symbol. Change the symbol
1619 so that the dummy .TOC. symbol can be omitted from the
1620 object file. */
1621 exp_p->X_add_symbol = &abs_symbol;
1622 }
1623
15c1449b 1624 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1625 }
1626
1627 return BFD_RELOC_UNUSED;
1628}
1629
99a814a1
AM		 1630/* Like normal .long/.short/.word, except support @got, etc.
1631 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1632static void
1633ppc_elf_cons (nbytes)
0baf16f2 1634 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1635{
1636 expressionS exp;
1637 bfd_reloc_code_real_type reloc;
1638
1639 if (is_it_end_of_statement ())
1640 {
1641 demand_empty_rest_of_line ();
1642 return;
1643 }
1644
1645 do
1646 {
1647 expression (&exp);
1648 if (exp.X_op == O_symbol
1649 && *input_line_pointer == '@'
99a814a1
AM		 1650 && (reloc = ppc_elf_suffix (&input_line_pointer,
1651 &exp)) != BFD_RELOC_UNUSED)
252b5132 1652 {
99a814a1
AM		 1653 reloc_howto_type *reloc_howto;
1654 int size;
1655
1656 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1657 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1658
1659 if (size > nbytes)
0baf16f2
AM		 1660 {
1661 as_bad (_("%s relocations do not fit in %d bytes\n"),
1662 reloc_howto->name, nbytes);
1663 }
252b5132
RH		 1664 else
1665 {
0baf16f2
AM		 1666 char *p;
1667 int offset;
252b5132 1668
0baf16f2
AM		 1669 p = frag_more (nbytes);
1670 offset = 0;
1671 if (target_big_endian)
1672 offset = nbytes - size;
99a814a1
AM		 1673 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1674 &exp, 0, reloc);
252b5132
RH		 1675 }
1676 }
1677 else
1678 emit_expr (&exp, (unsigned int) nbytes);
1679 }
1680 while (*input_line_pointer++ == ',');
1681
99a814a1
AM		 1682 /* Put terminator back into stream. */
1683 input_line_pointer--;
252b5132
RH		 1684 demand_empty_rest_of_line ();
1685}
1686
1687/* Solaris pseduo op to change to the .rodata section. */
1688static void
1689ppc_elf_rdata (xxx)
1690 int xxx;
1691{
1692 char *save_line = input_line_pointer;
1693 static char section[] = ".rodata\n";
1694
99a814a1 1695 /* Just pretend this is .section .rodata */
252b5132
RH		 1696 input_line_pointer = section;
1697 obj_elf_section (xxx);
1698
1699 input_line_pointer = save_line;
1700}
1701
99a814a1 1702/* Pseudo op to make file scope bss items. */
252b5132 1703static void
99a814a1 1704ppc_elf_lcomm (xxx)
92161534 1705 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1706{
1707 register char *name;
1708 register char c;
1709 register char *p;
1710 offsetT size;
1711 register symbolS *symbolP;
1712 offsetT align;
1713 segT old_sec;
1714 int old_subsec;
1715 char *pfrag;
1716 int align2;
1717
1718 name = input_line_pointer;
1719 c = get_symbol_end ();
1720
99a814a1 1721 /* just after name is now '\0'. */
252b5132
RH		 1722 p = input_line_pointer;
1723 *p = c;
1724 SKIP_WHITESPACE ();
1725 if (*input_line_pointer != ',')
1726 {
1727 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1728 ignore_rest_of_line ();
1729 return;
1730 }
1731
1732 input_line_pointer++; /* skip ',' */
1733 if ((size = get_absolute_expression ()) < 0)
1734 {
1735 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1736 ignore_rest_of_line ();
1737 return;
1738 }
1739
1740 /* The third argument to .lcomm is the alignment. */
1741 if (*input_line_pointer != ',')
1742 align = 8;
1743 else
1744 {
1745 ++input_line_pointer;
1746 align = get_absolute_expression ();
1747 if (align <= 0)
1748 {
1749 as_warn (_("ignoring bad alignment"));
1750 align = 8;
1751 }
1752 }
1753
1754 *p = 0;
1755 symbolP = symbol_find_or_make (name);
1756 *p = c;
1757
1758 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1759 {
1760 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1761 S_GET_NAME (symbolP));
1762 ignore_rest_of_line ();
1763 return;
1764 }
1765
1766 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1767 {
1768 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1769 S_GET_NAME (symbolP),
1770 (long) S_GET_VALUE (symbolP),
1771 (long) size);
1772
1773 ignore_rest_of_line ();
1774 return;
1775 }
1776
99a814a1 1777 /* Allocate_bss. */
252b5132
RH		 1778 old_sec = now_seg;
1779 old_subsec = now_subseg;
1780 if (align)
1781 {
99a814a1 1782 /* Convert to a power of 2 alignment. */
252b5132
RH		 1783 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1784 if (align != 1)
1785 {
1786 as_bad (_("Common alignment not a power of 2"));
1787 ignore_rest_of_line ();
1788 return;
1789 }
1790 }
1791 else
1792 align2 = 0;
1793
1794 record_alignment (bss_section, align2);
1795 subseg_set (bss_section, 0);
1796 if (align2)
1797 frag_align (align2, 0, 0);
1798 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1799 symbol_get_frag (symbolP)->fr_symbol = 0;
1800 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1801 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1802 (char *) 0);
1803 *pfrag = 0;
1804 S_SET_SIZE (symbolP, size);
1805 S_SET_SEGMENT (symbolP, bss_section);
1806 subseg_set (old_sec, old_subsec);
1807 demand_empty_rest_of_line ();
1808}
1809
1810/* Validate any relocations emitted for -mrelocatable, possibly adding
1811 fixups for word relocations in writable segments, so we can adjust
1812 them at runtime. */
1813static void
1814ppc_elf_validate_fix (fixp, seg)
1815 fixS *fixp;
1816 segT seg;
1817{
1818 if (fixp->fx_done || fixp->fx_pcrel)
1819 return;
1820
1821 switch (shlib)
1822 {
1823 case SHLIB_NONE:
1824 case SHLIB_PIC:
1825 return;
1826
5d6f4f16 1827 case SHLIB_MRELOCATABLE:
252b5132
RH		 1828 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1829 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1830 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1831 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1832 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1833 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1834 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1835 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1836 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1837 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1838 && strcmp (segment_name (seg), ".got2") != 0
1839 && strcmp (segment_name (seg), ".dtors") != 0
1840 && strcmp (segment_name (seg), ".ctors") != 0
1841 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1842 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1843 && strcmp (segment_name (seg), ".eh_frame") != 0
1844 && strcmp (segment_name (seg), ".ex_shared") != 0)
1845 {
1846 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1847 || fixp->fx_r_type != BFD_RELOC_CTOR)
1848 {
1849 as_bad_where (fixp->fx_file, fixp->fx_line,
1850 _("Relocation cannot be done when using -mrelocatable"));
1851 }
1852 }
1853 return;
1854 }
1855}
0baf16f2 1856
7e8d4ab4
AM		 1857/* Prevent elf_frob_file_before_adjust removing a weak undefined
1858 function descriptor sym if the corresponding code sym is used. */
1859
1860void
1861ppc_frob_file_before_adjust ()
0baf16f2 1862{
7e8d4ab4 1863 symbolS *symp;
0baf16f2 1864
7e8d4ab4
AM		 1865 if (!ppc_obj64)
1866 return;
1867
1868 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1869 {
7e8d4ab4
AM		 1870 const char *name;
1871 char *dotname;
1872 symbolS *dotsym;
1873 size_t len;
1874
1875 name = S_GET_NAME (symp);
1876 if (name[0] == '.')
1877 continue;
1878
1879 if (! S_IS_WEAK (symp)
1880 || S_IS_DEFINED (symp))
1881 continue;
1882
1883 len = strlen (name) + 1;
1884 dotname = xmalloc (len + 1);
1885 dotname[0] = '.';
1886 memcpy (dotname + 1, name, len);
1887 dotsym = symbol_find (dotname);
1888 free (dotname);
1889 if (dotsym != NULL && (symbol_used_p (dotsym)
1890 || symbol_used_in_reloc_p (dotsym)))
1891 {
1892 symbol_mark_used (symp);
1893 }
0baf16f2
AM		 1894 }
1895
7e8d4ab4
AM		 1896 /* Don't emit .TOC. symbol. */
1897 symp = symbol_find (".TOC.");
1898 if (symp != NULL)
1899 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1900}
252b5132
RH		 1901#endif /* OBJ_ELF */
1902\f
1903#ifdef TE_PE
1904
1905/*
99a814a1 1906 * Summary of parse_toc_entry.
252b5132
RH		 1907 *
1908 * in: Input_line_pointer points to the '[' in one of:
1909 *
1910 * [toc] [tocv] [toc32] [toc64]
1911 *
1912 * Anything else is an error of one kind or another.
1913 *
81d4177b 1914 * out:
252b5132
RH		 1915 * return value: success or failure
1916 * toc_kind: kind of toc reference
1917 * input_line_pointer:
1918 * success: first char after the ']'
1919 * failure: unchanged
1920 *
1921 * settings:
1922 *
1923 * [toc] - rv == success, toc_kind = default_toc
1924 * [tocv] - rv == success, toc_kind = data_in_toc
1925 * [toc32] - rv == success, toc_kind = must_be_32
1926 * [toc64] - rv == success, toc_kind = must_be_64
1927 *
1928 */
1929
81d4177b
KH		 1930enum toc_size_qualifier
1931{
252b5132
RH		 1932 default_toc, /* The toc cell constructed should be the system default size */
1933 data_in_toc, /* This is a direct reference to a toc cell */
1934 must_be_32, /* The toc cell constructed must be 32 bits wide */
1935 must_be_64 /* The toc cell constructed must be 64 bits wide */
1936};
1937
1938static int
99a814a1 1939parse_toc_entry (toc_kind)
252b5132
RH		 1940 enum toc_size_qualifier *toc_kind;
1941{
1942 char *start;
1943 char *toc_spec;
1944 char c;
1945 enum toc_size_qualifier t;
1946
99a814a1 1947 /* Save the input_line_pointer. */
252b5132
RH		 1948 start = input_line_pointer;
1949
99a814a1 1950 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1951 ++input_line_pointer;
1952 SKIP_WHITESPACE ();
81d4177b 1953
99a814a1 1954 /* Find the spelling of the operand. */
252b5132
RH		 1955 toc_spec = input_line_pointer;
1956 c = get_symbol_end ();
1957
99a814a1 1958 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1959 {
1960 t = default_toc;
1961 }
99a814a1 1962 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1963 {
1964 t = data_in_toc;
1965 }
99a814a1 1966 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1967 {
1968 t = must_be_32;
1969 }
99a814a1 1970 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 1971 {
1972 t = must_be_64;
1973 }
1974 else
1975 {
1976 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 1977 *input_line_pointer = c;
1978 input_line_pointer = start;
252b5132
RH		 1979 return 0;
1980 }
1981
99a814a1
AM		 1982 /* Now find the ']'. */
1983 *input_line_pointer = c;
252b5132 1984
81d4177b
KH		 1985 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1986 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 1987
1988 if (c != ']')
1989 {
1990 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 1991 input_line_pointer = start;
252b5132
RH		 1992 return 0;
1993 }
1994
99a814a1 1995 *toc_kind = t;
252b5132
RH		 1996 return 1;
1997}
1998#endif
1999\f
2000
dc1d03fc 2001#ifdef OBJ_ELF
6a0c61b7
EZ		 2002#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2003static void
dc1d03fc 2004ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2005 unsigned int apu, version;
2006{
2007 unsigned int i;
2008
2009 /* Check we don't already exist. */
2010 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2011 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2012 return;
b34976b6 2013
6a0c61b7
EZ		 2014 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2015 {
2016 if (ppc_apuinfo_num_alloc == 0)
2017 {
2018 ppc_apuinfo_num_alloc = 4;
2019 ppc_apuinfo_list = (unsigned long *)
2020 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2021 }
2022 else
2023 {
2024 ppc_apuinfo_num_alloc += 4;
2025 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2026 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2027 }
2028 }
dc1d03fc 2029 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2030}
2031#undef APUID
dc1d03fc 2032#endif
6a0c61b7
EZ		 2033\f
2034
252b5132
RH		 2035/* We need to keep a list of fixups. We can't simply generate them as
2036 we go, because that would require us to first create the frag, and
2037 that would screw up references to ``.''. */
2038
2039struct ppc_fixup
2040{
2041 expressionS exp;
2042 int opindex;
2043 bfd_reloc_code_real_type reloc;
2044};
2045
2046#define MAX_INSN_FIXUPS (5)
2047
2048/* This routine is called for each instruction to be assembled. */
2049
2050void
2051md_assemble (str)
2052 char *str;
2053{
2054 char *s;
2055 const struct powerpc_opcode *opcode;
2056 unsigned long insn;
2057 const unsigned char *opindex_ptr;
2058 int skip_optional;
2059 int need_paren;
2060 int next_opindex;
2061 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2062 int fc;
2063 char *f;
2064 int i;
2065#ifdef OBJ_ELF
2066 bfd_reloc_code_real_type reloc;
2067#endif
2068
2069 /* Get the opcode. */
3882b010 2070 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2071 ;
2072 if (*s != '\0')
2073 *s++ = '\0';
2074
2075 /* Look up the opcode in the hash table. */
2076 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2077 if (opcode == (const struct powerpc_opcode *) NULL)
2078 {
2079 const struct powerpc_macro *macro;
2080
2081 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2082 if (macro == (const struct powerpc_macro *) NULL)
2083 as_bad (_("Unrecognized opcode: `%s'"), str);
2084 else
2085 ppc_macro (s, macro);
2086
2087 return;
2088 }
2089
2090 insn = opcode->opcode;
2091
2092 str = s;
3882b010 2093 while (ISSPACE (*str))
252b5132
RH		 2094 ++str;
2095
2096 /* PowerPC operands are just expressions. The only real issue is
2097 that a few operand types are optional. All cases which might use
2098 an optional operand separate the operands only with commas (in
2099 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2100 cases never have optional operands). There is never more than
2101 one optional operand for an instruction. So, before we start
2102 seriously parsing the operands, we check to see if we have an
2103 optional operand, and, if we do, we count the number of commas to
2104 see whether the operand should be omitted. */
2105 skip_optional = 0;
2106 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2107 {
2108 const struct powerpc_operand *operand;
2109
2110 operand = &powerpc_operands[*opindex_ptr];
2111 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2112 {
2113 unsigned int opcount;
7fe9cf6b
NC		 2114 unsigned int num_operands_expected;
2115 unsigned int i;
252b5132
RH		 2116
2117 /* There is an optional operand. Count the number of
2118 commas in the input line. */
2119 if (*str == '\0')
2120 opcount = 0;
2121 else
2122 {
2123 opcount = 1;
2124 s = str;
2125 while ((s = strchr (s, ',')) != (char *) NULL)
2126 {
2127 ++opcount;
2128 ++s;
2129 }
2130 }
2131
7fe9cf6b
NC		 2132 /* Compute the number of expected operands.
2133 Do not count fake operands. */
2134 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2135 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2136 ++ num_operands_expected;
2137
252b5132
RH		 2138 /* If there are fewer operands in the line then are called
2139 for by the instruction, we want to skip the optional
2140 operand. */
7fe9cf6b 2141 if (opcount < num_operands_expected)
252b5132
RH		 2142 skip_optional = 1;
2143
2144 break;
2145 }
2146 }
2147
2148 /* Gather the operands. */
2149 need_paren = 0;
2150 next_opindex = 0;
2151 fc = 0;
2152 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2153 {
2154 const struct powerpc_operand *operand;
2155 const char *errmsg;
2156 char *hold;
2157 expressionS ex;
2158 char endc;
2159
2160 if (next_opindex == 0)
2161 operand = &powerpc_operands[*opindex_ptr];
2162 else
2163 {
2164 operand = &powerpc_operands[next_opindex];
2165 next_opindex = 0;
2166 }
252b5132
RH		 2167 errmsg = NULL;
2168
2169 /* If this is a fake operand, then we do not expect anything
2170 from the input. */
2171 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2172 {
2b3c4602 2173 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2174 if (errmsg != (const char *) NULL)
2175 as_bad (errmsg);
2176 continue;
2177 }
2178
2179 /* If this is an optional operand, and we are skipping it, just
2180 insert a zero. */
2181 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2182 && skip_optional)
2183 {
2184 if (operand->insert)
2185 {
2b3c4602 2186 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2187 if (errmsg != (const char *) NULL)
2188 as_bad (errmsg);
2189 }
2190 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2191 next_opindex = *opindex_ptr + 1;
2192 continue;
2193 }
2194
2195 /* Gather the operand. */
2196 hold = input_line_pointer;
2197 input_line_pointer = str;
2198
2199#ifdef TE_PE
81d4177b 2200 if (*input_line_pointer == '[')
252b5132
RH		 2201 {
2202 /* We are expecting something like the second argument here:
99a814a1
AM		 2203 *
2204 * lwz r4,[toc].GS.0.static_int(rtoc)
2205 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2206 * The argument following the `]' must be a symbol name, and the
2207 * register must be the toc register: 'rtoc' or '2'
2208 *
2209 * The effect is to 0 as the displacement field
2210 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2211 * the appropriate variation) reloc against it based on the symbol.
2212 * The linker will build the toc, and insert the resolved toc offset.
2213 *
2214 * Note:
2215 * o The size of the toc entry is currently assumed to be
2216 * 32 bits. This should not be assumed to be a hard coded
2217 * number.
2218 * o In an effort to cope with a change from 32 to 64 bits,
2219 * there are also toc entries that are specified to be
2220 * either 32 or 64 bits:
2221 * lwz r4,[toc32].GS.0.static_int(rtoc)
2222 * lwz r4,[toc64].GS.0.static_int(rtoc)
2223 * These demand toc entries of the specified size, and the
2224 * instruction probably requires it.
2225 */
252b5132
RH		 2226
2227 int valid_toc;
2228 enum toc_size_qualifier toc_kind;
2229 bfd_reloc_code_real_type toc_reloc;
2230
99a814a1
AM		 2231 /* Go parse off the [tocXX] part. */
2232 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2233
81d4177b 2234 if (!valid_toc)
252b5132 2235 {
99a814a1
AM		 2236 /* Note: message has already been issued.
2237 FIXME: what sort of recovery should we do?
2238 demand_rest_of_line (); return; ? */
252b5132
RH		 2239 }
2240
99a814a1
AM		 2241 /* Now get the symbol following the ']'. */
2242 expression (&ex);
252b5132
RH		 2243
2244 switch (toc_kind)
2245 {
2246 case default_toc:
99a814a1
AM		 2247 /* In this case, we may not have seen the symbol yet,
2248 since it is allowed to appear on a .extern or .globl
2249 or just be a label in the .data section. */
252b5132
RH		 2250 toc_reloc = BFD_RELOC_PPC_TOC16;
2251 break;
2252 case data_in_toc:
99a814a1
AM		 2253 /* 1. The symbol must be defined and either in the toc
2254 section, or a global.
2255 2. The reloc generated must have the TOCDEFN flag set
2256 in upper bit mess of the reloc type.
2257 FIXME: It's a little confusing what the tocv
2258 qualifier can be used for. At the very least, I've
2259 seen three uses, only one of which I'm sure I can
2260 explain. */
81d4177b
KH		 2261 if (ex.X_op == O_symbol)
2262 {
252b5132 2263 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2264 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2265 != tocdata_section)
252b5132 2266 {
99a814a1 2267 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2268 }
2269 }
2270
2271 toc_reloc = BFD_RELOC_PPC_TOC16;
2272 break;
2273 case must_be_32:
99a814a1
AM		 2274 /* FIXME: these next two specifically specify 32/64 bit
2275 toc entries. We don't support them today. Is this
2276 the right way to say that? */
252b5132
RH		 2277 toc_reloc = BFD_RELOC_UNUSED;
2278 as_bad (_("Unimplemented toc32 expression modifier"));
2279 break;
2280 case must_be_64:
99a814a1 2281 /* FIXME: see above. */
252b5132
RH		 2282 toc_reloc = BFD_RELOC_UNUSED;
2283 as_bad (_("Unimplemented toc64 expression modifier"));
2284 break;
2285 default:
bc805888 2286 fprintf (stderr,
99a814a1
AM		 2287 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2288 toc_kind);
bc805888 2289 abort ();
252b5132
RH		 2290 break;
2291 }
2292
2293 /* We need to generate a fixup for this expression. */
2294 if (fc >= MAX_INSN_FIXUPS)
2295 as_fatal (_("too many fixups"));
2296
2297 fixups[fc].reloc = toc_reloc;
2298 fixups[fc].exp = ex;
2299 fixups[fc].opindex = *opindex_ptr;
2300 ++fc;
2301
99a814a1
AM		 2302 /* Ok. We've set up the fixup for the instruction. Now make it
2303 look like the constant 0 was found here. */
252b5132
RH		 2304 ex.X_unsigned = 1;
2305 ex.X_op = O_constant;
2306 ex.X_add_number = 0;
2307 ex.X_add_symbol = NULL;
2308 ex.X_op_symbol = NULL;
2309 }
2310
2311 else
2312#endif /* TE_PE */
2313 {
2314 if (! register_name (&ex))
2315 {
2316 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2317 cr_operand = TRUE;
252b5132 2318 expression (&ex);
b34976b6 2319 cr_operand = FALSE;
252b5132
RH		 2320 }
2321 }
2322
2323 str = input_line_pointer;
2324 input_line_pointer = hold;
2325
2326 if (ex.X_op == O_illegal)
2327 as_bad (_("illegal operand"));
2328 else if (ex.X_op == O_absent)
2329 as_bad (_("missing operand"));
2330 else if (ex.X_op == O_register)
2331 {
2332 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2333 (char *) NULL, 0);
2334 }
2335 else if (ex.X_op == O_constant)
2336 {
2337#ifdef OBJ_ELF
81d4177b 2338 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2339 char *orig_str = str;
2340
2341 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2342 switch (reloc)
2343 {
2344 default:
2345 str = orig_str;
2346 break;
2347
2348 case BFD_RELOC_LO16:
2349 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2350 something which cleared it, we always produce a
2351 signed value. */
2352 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2353 ex.X_add_number &= 0xffff;
2354 else
0baf16f2 2355 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2356 break;
2357
2358 case BFD_RELOC_HI16:
0baf16f2
AM		 2359 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2360 ex.X_add_number = PPC_HI (ex.X_add_number);
2361 else
2362 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2363 break;
2364
2365 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2366 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2367 ex.X_add_number = PPC_HA (ex.X_add_number);
2368 else
2369 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2370 break;
2371
0baf16f2
AM		 2372 case BFD_RELOC_PPC64_HIGHER:
2373 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2374 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2375 else
2376 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2377 break;
2378
2379 case BFD_RELOC_PPC64_HIGHER_S:
2380 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2381 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2382 else
2383 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2384 break;
0baf16f2
AM		 2385
2386 case BFD_RELOC_PPC64_HIGHEST:
2387 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2388 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2389 else
2390 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2391 break;
2392
2393 case BFD_RELOC_PPC64_HIGHEST_S:
2394 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2395 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2396 else
2397 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2398 break;
252b5132 2399 }
0baf16f2 2400#endif /* OBJ_ELF */
252b5132
RH		 2401 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2402 (char *) NULL, 0);
2403 }
2404#ifdef OBJ_ELF
2405 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2406 {
cdba85ec
AM		 2407 /* Some TLS tweaks. */
2408 switch (reloc)
2409 {
2410 default:
2411 break;
2412 case BFD_RELOC_PPC_TLS:
2413 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2414 (char *) NULL, 0);
2415 break;
2416 /* We'll only use the 32 (or 64) bit form of these relocations
2417 in constants. Instructions get the 16 bit form. */
2418 case BFD_RELOC_PPC_DTPREL:
2419 reloc = BFD_RELOC_PPC_DTPREL16;
2420 break;
2421 case BFD_RELOC_PPC_TPREL:
2422 reloc = BFD_RELOC_PPC_TPREL16;
2423 break;
2424 }
2425
99a814a1
AM		 2426 /* For the absolute forms of branches, convert the PC
2427 relative form back into the absolute. */
252b5132
RH		 2428 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2429 {
2430 switch (reloc)
2431 {
2432 case BFD_RELOC_PPC_B26:
2433 reloc = BFD_RELOC_PPC_BA26;
2434 break;
2435 case BFD_RELOC_PPC_B16:
2436 reloc = BFD_RELOC_PPC_BA16;
2437 break;
2438 case BFD_RELOC_PPC_B16_BRTAKEN:
2439 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2440 break;
2441 case BFD_RELOC_PPC_B16_BRNTAKEN:
2442 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2443 break;
2444 default:
2445 break;
2446 }
2447 }
2448
2b3c4602 2449 if (ppc_obj64
adadcc0c 2450 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2451 {
2452 switch (reloc)
2453 {
2454 case BFD_RELOC_16:
2455 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2456 break;
2457 case BFD_RELOC_LO16:
2458 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2459 break;
2460 case BFD_RELOC_16_GOTOFF:
2461 reloc = BFD_RELOC_PPC64_GOT16_DS;
2462 break;
2463 case BFD_RELOC_LO16_GOTOFF:
2464 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2465 break;
2466 case BFD_RELOC_LO16_PLTOFF:
2467 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2468 break;
1cfc59d5 2469 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2470 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2471 break;
2472 case BFD_RELOC_LO16_BASEREL:
2473 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2474 break;
2475 case BFD_RELOC_PPC_TOC16:
2476 reloc = BFD_RELOC_PPC64_TOC16_DS;
2477 break;
2478 case BFD_RELOC_PPC64_TOC16_LO:
2479 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2480 break;
2481 case BFD_RELOC_PPC64_PLTGOT16:
2482 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2483 break;
2484 case BFD_RELOC_PPC64_PLTGOT16_LO:
2485 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2486 break;
cdba85ec
AM		 2487 case BFD_RELOC_PPC_DTPREL16:
2488 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2489 break;
2490 case BFD_RELOC_PPC_DTPREL16_LO:
2491 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2492 break;
2493 case BFD_RELOC_PPC_TPREL16:
2494 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2495 break;
2496 case BFD_RELOC_PPC_TPREL16_LO:
2497 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2498 break;
2499 case BFD_RELOC_PPC_GOT_DTPREL16:
2500 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2501 case BFD_RELOC_PPC_GOT_TPREL16:
2502 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2503 break;
0baf16f2
AM		 2504 default:
2505 as_bad (_("unsupported relocation for DS offset field"));
2506 break;
2507 }
2508 }
2509
252b5132
RH		 2510 /* We need to generate a fixup for this expression. */
2511 if (fc >= MAX_INSN_FIXUPS)
2512 as_fatal (_("too many fixups"));
2513 fixups[fc].exp = ex;
2514 fixups[fc].opindex = 0;
2515 fixups[fc].reloc = reloc;
2516 ++fc;
2517 }
2518#endif /* OBJ_ELF */
2519
2520 else
2521 {
2522 /* We need to generate a fixup for this expression. */
2523 if (fc >= MAX_INSN_FIXUPS)
2524 as_fatal (_("too many fixups"));
2525 fixups[fc].exp = ex;
2526 fixups[fc].opindex = *opindex_ptr;
2527 fixups[fc].reloc = BFD_RELOC_UNUSED;
2528 ++fc;
2529 }
2530
2531 if (need_paren)
2532 {
2533 endc = ')';
2534 need_paren = 0;
2535 }
2536 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2537 {
2538 endc = '(';
2539 need_paren = 1;
2540 }
2541 else
2542 endc = ',';
2543
2544 /* The call to expression should have advanced str past any
2545 whitespace. */
2546 if (*str != endc
2547 && (endc != ',' || *str != '\0'))
2548 {
2549 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2550 break;
2551 }
2552
2553 if (*str != '\0')
2554 ++str;
2555 }
2556
3882b010 2557 while (ISSPACE (*str))
252b5132
RH		 2558 ++str;
2559
2560 if (*str != '\0')
2561 as_bad (_("junk at end of line: `%s'"), str);
2562
dc1d03fc 2563#ifdef OBJ_ELF
6a0c61b7
EZ		 2564 /* Do we need/want a APUinfo section? */
2565 if (ppc_cpu & (PPC_OPCODE_SPE
2566 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2567 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2568 | PPC_OPCODE_RFMCI))
2569 {
2570 /* These are all version "1". */
2571 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2572 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2573 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2574 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2575 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2576 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2577 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2578 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2579 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2580 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2581 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2582 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2583 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2584 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2585 }
dc1d03fc 2586#endif
6a0c61b7 2587
252b5132
RH		 2588 /* Write out the instruction. */
2589 f = frag_more (4);
2590 md_number_to_chars (f, insn, 4);
2591
5d6f4f16
GK		 2592#ifdef OBJ_ELF
2593 dwarf2_emit_insn (4);
2594#endif
2595
252b5132
RH		 2596 /* Create any fixups. At this point we do not use a
2597 bfd_reloc_code_real_type, but instead just use the
2598 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2599 handle fixups for any operand type, although that is admittedly
2600 not a very exciting feature. We pick a BFD reloc type in
94f592af 2601 md_apply_fix3. */
252b5132
RH		 2602 for (i = 0; i < fc; i++)
2603 {
2604 const struct powerpc_operand *operand;
2605
2606 operand = &powerpc_operands[fixups[i].opindex];
2607 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2608 {
99a814a1 2609 reloc_howto_type *reloc_howto;
252b5132
RH		 2610 int size;
2611 int offset;
2612 fixS *fixP;
2613
99a814a1 2614 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2615 if (!reloc_howto)
2616 abort ();
2617
2618 size = bfd_get_reloc_size (reloc_howto);
2619 offset = target_big_endian ? (4 - size) : 0;
2620
2621 if (size < 1 || size > 4)
bc805888 2622 abort ();
252b5132 2623
99a814a1
AM		 2624 fixP = fix_new_exp (frag_now,
2625 f - frag_now->fr_literal + offset,
2626 size,
2627 &fixups[i].exp,
2628 reloc_howto->pc_relative,
252b5132
RH		 2629 fixups[i].reloc);
2630
2631 /* Turn off complaints that the addend is too large for things like
2632 foo+100000@ha. */
2633 switch (fixups[i].reloc)
2634 {
2635 case BFD_RELOC_16_GOTOFF:
2636 case BFD_RELOC_PPC_TOC16:
2637 case BFD_RELOC_LO16:
2638 case BFD_RELOC_HI16:
2639 case BFD_RELOC_HI16_S:
0baf16f2 2640#ifdef OBJ_ELF
0baf16f2
AM		 2641 case BFD_RELOC_PPC64_HIGHER:
2642 case BFD_RELOC_PPC64_HIGHER_S:
2643 case BFD_RELOC_PPC64_HIGHEST:
2644 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2645#endif
252b5132
RH		 2646 fixP->fx_no_overflow = 1;
2647 break;
2648 default:
2649 break;
2650 }
2651 }
2652 else
99a814a1
AM		 2653 fix_new_exp (frag_now,
2654 f - frag_now->fr_literal,
2655 4,
252b5132
RH		 2656 &fixups[i].exp,
2657 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2658 ((bfd_reloc_code_real_type)
99a814a1 2659 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2660 }
2661}
2662
2663/* Handle a macro. Gather all the operands, transform them as
2664 described by the macro, and call md_assemble recursively. All the
2665 operands are separated by commas; we don't accept parentheses
2666 around operands here. */
2667
2668static void
2669ppc_macro (str, macro)
2670 char *str;
2671 const struct powerpc_macro *macro;
2672{
2673 char *operands[10];
2674 unsigned int count;
2675 char *s;
2676 unsigned int len;
2677 const char *format;
2678 int arg;
2679 char *send;
2680 char *complete;
2681
2682 /* Gather the users operands into the operands array. */
2683 count = 0;
2684 s = str;
2685 while (1)
2686 {
2687 if (count >= sizeof operands / sizeof operands[0])
2688 break;
2689 operands[count++] = s;
2690 s = strchr (s, ',');
2691 if (s == (char *) NULL)
2692 break;
2693 *s++ = '\0';
81d4177b 2694 }
252b5132
RH		 2695
2696 if (count != macro->operands)
2697 {
2698 as_bad (_("wrong number of operands"));
2699 return;
2700 }
2701
2702 /* Work out how large the string must be (the size is unbounded
2703 because it includes user input). */
2704 len = 0;
2705 format = macro->format;
2706 while (*format != '\0')
2707 {
2708 if (*format != '%')
2709 {
2710 ++len;
2711 ++format;
2712 }
2713 else
2714 {
2715 arg = strtol (format + 1, &send, 10);
2716 know (send != format && arg >= 0 && arg < count);
2717 len += strlen (operands[arg]);
2718 format = send;
2719 }
2720 }
2721
2722 /* Put the string together. */
2723 complete = s = (char *) alloca (len + 1);
2724 format = macro->format;
2725 while (*format != '\0')
2726 {
2727 if (*format != '%')
2728 *s++ = *format++;
2729 else
2730 {
2731 arg = strtol (format + 1, &send, 10);
2732 strcpy (s, operands[arg]);
2733 s += strlen (s);
2734 format = send;
2735 }
2736 }
2737 *s = '\0';
2738
2739 /* Assemble the constructed instruction. */
2740 md_assemble (complete);
81d4177b 2741}
252b5132
RH		 2742\f
2743#ifdef OBJ_ELF
99a814a1 2744/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2745
2746int
2747ppc_section_letter (letter, ptr_msg)
2748 int letter;
2749 char **ptr_msg;
2750{
2751 if (letter == 'e')
2752 return SHF_EXCLUDE;
2753
13ae64f3 2754 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2755 return -1;
252b5132
RH		 2756}
2757
2758int
9de8d8f1
RH		 2759ppc_section_word (str, len)
2760 char *str;
2761 size_t len;
252b5132 2762{
9de8d8f1
RH		 2763 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2764 return SHF_EXCLUDE;
252b5132 2765
9de8d8f1 2766 return -1;
252b5132
RH		 2767}
2768
2769int
9de8d8f1
RH		 2770ppc_section_type (str, len)
2771 char *str;
2772 size_t len;
252b5132 2773{
9de8d8f1
RH		 2774 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2775 return SHT_ORDERED;
252b5132 2776
9de8d8f1 2777 return -1;
252b5132
RH		 2778}
2779
2780int
2781ppc_section_flags (flags, attr, type)
2782 int flags;
2783 int attr;
2784 int type;
2785{
2786 if (type == SHT_ORDERED)
2787 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2788
2789 if (attr & SHF_EXCLUDE)
2790 flags |= SEC_EXCLUDE;
2791
2792 return flags;
2793}
2794#endif /* OBJ_ELF */
2795
2796\f
2797/* Pseudo-op handling. */
2798
2799/* The .byte pseudo-op. This is similar to the normal .byte
2800 pseudo-op, but it can also take a single ASCII string. */
2801
2802static void
2803ppc_byte (ignore)
92161534 2804 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2805{
2806 if (*input_line_pointer != '\"')
2807 {
2808 cons (1);
2809 return;
2810 }
2811
2812 /* Gather characters. A real double quote is doubled. Unusual
2813 characters are not permitted. */
2814 ++input_line_pointer;
2815 while (1)
2816 {
2817 char c;
2818
2819 c = *input_line_pointer++;
2820
2821 if (c == '\"')
2822 {
2823 if (*input_line_pointer != '\"')
2824 break;
2825 ++input_line_pointer;
2826 }
2827
2828 FRAG_APPEND_1_CHAR (c);
2829 }
2830
2831 demand_empty_rest_of_line ();
2832}
2833\f
2834#ifdef OBJ_XCOFF
2835
2836/* XCOFF specific pseudo-op handling. */
2837
2838/* This is set if we are creating a .stabx symbol, since we don't want
2839 to handle symbol suffixes for such symbols. */
b34976b6 2840static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2841
2842/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2843 symbols in the .bss segment as though they were local common
1ad63b2f
TR		 2844 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2845 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2846
2847static void
2848ppc_comm (lcomm)
2849 int lcomm;
2850{
2851 asection *current_seg = now_seg;
2852 subsegT current_subseg = now_subseg;
2853 char *name;
2854 char endc;
2855 char *end_name;
2856 offsetT size;
2857 offsetT align;
2858 symbolS *lcomm_sym = NULL;
2859 symbolS *sym;
2860 char *pfrag;
2861
2862 name = input_line_pointer;
2863 endc = get_symbol_end ();
2864 end_name = input_line_pointer;
2865 *end_name = endc;
2866
2867 if (*input_line_pointer != ',')
2868 {
2869 as_bad (_("missing size"));
2870 ignore_rest_of_line ();
2871 return;
2872 }
2873 ++input_line_pointer;
2874
2875 size = get_absolute_expression ();
2876 if (size < 0)
2877 {
2878 as_bad (_("negative size"));
2879 ignore_rest_of_line ();
2880 return;
2881 }
2882
2883 if (! lcomm)
2884 {
2885 /* The third argument to .comm is the alignment. */
2886 if (*input_line_pointer != ',')
1ad63b2f 2887 align = 2;
252b5132
RH		 2888 else
2889 {
2890 ++input_line_pointer;
2891 align = get_absolute_expression ();
2892 if (align <= 0)
2893 {
2894 as_warn (_("ignoring bad alignment"));
1ad63b2f 2895 align = 2;
252b5132
RH		 2896 }
2897 }
2898 }
2899 else
2900 {
2901 char *lcomm_name;
2902 char lcomm_endc;
2903
1ad63b2f 2904 if (size <= 4)
252b5132
RH		 2905 align = 2;
2906 else
2907 align = 3;
2908
2909 /* The third argument to .lcomm appears to be the real local
2910 common symbol to create. References to the symbol named in
2911 the first argument are turned into references to the third
2912 argument. */
2913 if (*input_line_pointer != ',')
2914 {
2915 as_bad (_("missing real symbol name"));
2916 ignore_rest_of_line ();
2917 return;
2918 }
2919 ++input_line_pointer;
2920
2921 lcomm_name = input_line_pointer;
2922 lcomm_endc = get_symbol_end ();
81d4177b 2923
252b5132
RH		 2924 lcomm_sym = symbol_find_or_make (lcomm_name);
2925
2926 *input_line_pointer = lcomm_endc;
2927 }
2928
2929 *end_name = '\0';
2930 sym = symbol_find_or_make (name);
2931 *end_name = endc;
2932
2933 if (S_IS_DEFINED (sym)
2934 || S_GET_VALUE (sym) != 0)
2935 {
2936 as_bad (_("attempt to redefine symbol"));
2937 ignore_rest_of_line ();
2938 return;
2939 }
81d4177b 2940
252b5132 2941 record_alignment (bss_section, align);
81d4177b 2942
252b5132
RH		 2943 if (! lcomm
2944 || ! S_IS_DEFINED (lcomm_sym))
2945 {
2946 symbolS *def_sym;
2947 offsetT def_size;
2948
2949 if (! lcomm)
2950 {
2951 def_sym = sym;
2952 def_size = size;
2953 S_SET_EXTERNAL (sym);
2954 }
2955 else
2956 {
809ffe0d 2957 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2958 def_sym = lcomm_sym;
2959 def_size = 0;
2960 }
2961
2962 subseg_set (bss_section, 1);
2963 frag_align (align, 0, 0);
81d4177b 2964
809ffe0d 2965 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 2966 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2967 def_size, (char *) NULL);
2968 *pfrag = 0;
2969 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2970 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 2971 }
2972 else if (lcomm)
2973 {
2974 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 2975 symbol_get_frag (lcomm_sym)->fr_offset =
2976 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2977 &~ ((1 << align) - 1));
809ffe0d
ILT		 2978 if (align > symbol_get_tc (lcomm_sym)->align)
2979 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 2980 }
2981
2982 if (lcomm)
2983 {
2984 /* Make sym an offset from lcomm_sym. */
2985 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 2986 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
2987 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
2988 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 2989 }
2990
2991 subseg_set (current_seg, current_subseg);
2992
2993 demand_empty_rest_of_line ();
2994}
2995
2996/* The .csect pseudo-op. This switches us into a different
2997 subsegment. The first argument is a symbol whose value is the
2998 start of the .csect. In COFF, csect symbols get special aux
2999 entries defined by the x_csect field of union internal_auxent. The
3000 optional second argument is the alignment (the default is 2). */
3001
3002static void
3003ppc_csect (ignore)
5480ccf3 3004 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3005{
3006 char *name;
3007 char endc;
3008 symbolS *sym;
3009
3010 name = input_line_pointer;
3011 endc = get_symbol_end ();
81d4177b 3012
252b5132
RH		 3013 sym = symbol_find_or_make (name);
3014
3015 *input_line_pointer = endc;
3016
3017 if (S_GET_NAME (sym)[0] == '\0')
3018 {
3019 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3020 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3021 }
3022
3023 ppc_change_csect (sym);
3024
3025 if (*input_line_pointer == ',')
3026 {
3027 ++input_line_pointer;
809ffe0d 3028 symbol_get_tc (sym)->align = get_absolute_expression ();
252b5132
RH		 3029 }
3030
3031 demand_empty_rest_of_line ();
3032}
3033
3034/* Change to a different csect. */
3035
3036static void
3037ppc_change_csect (sym)
3038 symbolS *sym;
3039{
3040 if (S_IS_DEFINED (sym))
809ffe0d 3041 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3042 else
3043 {
3044 symbolS **list_ptr;
3045 int after_toc;
3046 int hold_chunksize;
3047 symbolS *list;
3048
3049 /* This is a new csect. We need to look at the symbol class to
3050 figure out whether it should go in the text section or the
3051 data section. */
3052 after_toc = 0;
809ffe0d 3053 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3054 {
3055 case XMC_PR:
3056 case XMC_RO:
3057 case XMC_DB:
3058 case XMC_GL:
3059 case XMC_XO:
3060 case XMC_SV:
3061 case XMC_TI:
3062 case XMC_TB:
3063 S_SET_SEGMENT (sym, text_section);
809ffe0d 3064 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3065 ++ppc_text_subsegment;
3066 list_ptr = &ppc_text_csects;
3067 break;
3068 case XMC_RW:
3069 case XMC_TC0:
3070 case XMC_TC:
3071 case XMC_DS:
3072 case XMC_UA:
3073 case XMC_BS:
3074 case XMC_UC:
3075 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3076 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3077 == ppc_data_subsegment))
252b5132
RH		 3078 after_toc = 1;
3079 S_SET_SEGMENT (sym, data_section);
809ffe0d 3080 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3081 ++ppc_data_subsegment;
3082 list_ptr = &ppc_data_csects;
3083 break;
3084 default:
3085 abort ();
3086 }
3087
3088 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3089 changing subsegments, so that we don't use a lot of memory
3090 space for what may be a small section. */
252b5132
RH		 3091 hold_chunksize = chunksize;
3092 chunksize = 64;
3093
809ffe0d
ILT		 3094 subseg_new (segment_name (S_GET_SEGMENT (sym)),
3095 symbol_get_tc (sym)->subseg);
252b5132
RH		 3096
3097 chunksize = hold_chunksize;
3098
3099 if (after_toc)
3100 ppc_after_toc_frag = frag_now;
3101
809ffe0d 3102 symbol_set_frag (sym, frag_now);
252b5132
RH		 3103 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3104
b4f96c78 3105 symbol_get_tc (sym)->align = 2;
809ffe0d
ILT		 3106 symbol_get_tc (sym)->output = 1;
3107 symbol_get_tc (sym)->within = sym;
81d4177b 3108
252b5132 3109 for (list = *list_ptr;
809ffe0d
ILT		 3110 symbol_get_tc (list)->next != (symbolS *) NULL;
3111 list = symbol_get_tc (list)->next)
252b5132 3112 ;
809ffe0d 3113 symbol_get_tc (list)->next = sym;
81d4177b 3114
252b5132 3115 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3116 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3117 &symbol_lastP);
252b5132
RH		 3118 }
3119
3120 ppc_current_csect = sym;
3121}
3122
3123/* This function handles the .text and .data pseudo-ops. These
3124 pseudo-ops aren't really used by XCOFF; we implement them for the
3125 convenience of people who aren't used to XCOFF. */
3126
3127static void
3128ppc_section (type)
3129 int type;
3130{
3131 const char *name;
3132 symbolS *sym;
3133
3134 if (type == 't')
3135 name = ".text[PR]";
3136 else if (type == 'd')
3137 name = ".data[RW]";
3138 else
3139 abort ();
3140
3141 sym = symbol_find_or_make (name);
3142
3143 ppc_change_csect (sym);
3144
3145 demand_empty_rest_of_line ();
3146}
3147
3148/* This function handles the .section pseudo-op. This is mostly to
3149 give an error, since XCOFF only supports .text, .data and .bss, but
3150 we do permit the user to name the text or data section. */
3151
3152static void
3153ppc_named_section (ignore)
5480ccf3 3154 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3155{
3156 char *user_name;
3157 const char *real_name;
3158 char c;
3159 symbolS *sym;
3160
3161 user_name = input_line_pointer;
3162 c = get_symbol_end ();
3163
3164 if (strcmp (user_name, ".text") == 0)
3165 real_name = ".text[PR]";
3166 else if (strcmp (user_name, ".data") == 0)
3167 real_name = ".data[RW]";
3168 else
3169 {
3170 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3171 *input_line_pointer = c;
3172 ignore_rest_of_line ();
3173 return;
3174 }
3175
3176 *input_line_pointer = c;
3177
3178 sym = symbol_find_or_make (real_name);
3179
3180 ppc_change_csect (sym);
3181
3182 demand_empty_rest_of_line ();
3183}
3184
3185/* The .extern pseudo-op. We create an undefined symbol. */
3186
3187static void
3188ppc_extern (ignore)
5480ccf3 3189 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3190{
3191 char *name;
3192 char endc;
3193
3194 name = input_line_pointer;
3195 endc = get_symbol_end ();
3196
3197 (void) symbol_find_or_make (name);
3198
3199 *input_line_pointer = endc;
3200
3201 demand_empty_rest_of_line ();
3202}
3203
3204/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3205
3206static void
3207ppc_lglobl (ignore)
5480ccf3 3208 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3209{
3210 char *name;
3211 char endc;
3212 symbolS *sym;
3213
3214 name = input_line_pointer;
3215 endc = get_symbol_end ();
3216
3217 sym = symbol_find_or_make (name);
3218
3219 *input_line_pointer = endc;
3220
809ffe0d 3221 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3222
3223 demand_empty_rest_of_line ();
3224}
3225
3226/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3227 although I don't know why it bothers. */
3228
3229static void
3230ppc_rename (ignore)
5480ccf3 3231 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3232{
3233 char *name;
3234 char endc;
3235 symbolS *sym;
3236 int len;
3237
3238 name = input_line_pointer;
3239 endc = get_symbol_end ();
3240
3241 sym = symbol_find_or_make (name);
3242
3243 *input_line_pointer = endc;
3244
3245 if (*input_line_pointer != ',')
3246 {
3247 as_bad (_("missing rename string"));
3248 ignore_rest_of_line ();
3249 return;
3250 }
3251 ++input_line_pointer;
3252
809ffe0d 3253 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3254
3255 demand_empty_rest_of_line ();
3256}
3257
3258/* The .stabx pseudo-op. This is similar to a normal .stabs
3259 pseudo-op, but slightly different. A sample is
3260 .stabx "main:F-1",.main,142,0
3261 The first argument is the symbol name to create. The second is the
3262 value, and the third is the storage class. The fourth seems to be
3263 always zero, and I am assuming it is the type. */
3264
3265static void
3266ppc_stabx (ignore)
5480ccf3 3267 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3268{
3269 char *name;
3270 int len;
3271 symbolS *sym;
3272 expressionS exp;
3273
3274 name = demand_copy_C_string (&len);
3275
3276 if (*input_line_pointer != ',')
3277 {
3278 as_bad (_("missing value"));
3279 return;
3280 }
3281 ++input_line_pointer;
3282
b34976b6 3283 ppc_stab_symbol = TRUE;
252b5132 3284 sym = symbol_make (name);
b34976b6 3285 ppc_stab_symbol = FALSE;
252b5132 3286
809ffe0d 3287 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3288
3289 (void) expression (&exp);
3290
3291 switch (exp.X_op)
3292 {
3293 case O_illegal:
3294 case O_absent:
3295 case O_big:
3296 as_bad (_("illegal .stabx expression; zero assumed"));
3297 exp.X_add_number = 0;
3298 /* Fall through. */
3299 case O_constant:
3300 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3301 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3302 break;
3303
3304 case O_symbol:
3305 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3306 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3307 else
3308 {
3309 S_SET_VALUE (sym,
3310 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3311 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3312 }
3313 break;
3314
3315 default:
3316 /* The value is some complex expression. This will probably
99a814a1
AM		 3317 fail at some later point, but this is probably the right
3318 thing to do here. */
809ffe0d 3319 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3320 break;
3321 }
3322
3323 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3324 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3325
3326 if (*input_line_pointer != ',')
3327 {
3328 as_bad (_("missing class"));
3329 return;
3330 }
3331 ++input_line_pointer;
3332
3333 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3334
3335 if (*input_line_pointer != ',')
3336 {
3337 as_bad (_("missing type"));
3338 return;
3339 }
3340 ++input_line_pointer;
3341
3342 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3343
809ffe0d 3344 symbol_get_tc (sym)->output = 1;
252b5132 3345
6877bb43 3346 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3347
809ffe0d 3348 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3349
41ea10b1 3350 /* In this case :
99a814a1 3351
41ea10b1
TR		 3352 .bs name
3353 .stabx "z",arrays_,133,0
3354 .es
99a814a1 3355
41ea10b1 3356 .comm arrays_,13768,3
99a814a1 3357
41ea10b1
TR		 3358 resolve_symbol_value will copy the exp's "within" into sym's when the
3359 offset is 0. Since this seems to be corner case problem,
3360 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3361 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3362
3363 if (exp.X_op == O_symbol)
41ea10b1
TR		 3364 {
3365 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3366 }
6877bb43 3367 }
99a814a1 3368
252b5132
RH		 3369 if (exp.X_op != O_symbol
3370 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3371 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3372 ppc_frob_label (sym);
3373 else
3374 {
3375 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3376 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3377 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3378 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3379 }
3380
3381 demand_empty_rest_of_line ();
3382}
3383
3384/* The .function pseudo-op. This takes several arguments. The first
3385 argument seems to be the external name of the symbol. The second
3386 argment seems to be the label for the start of the function. gcc
3387 uses the same name for both. I have no idea what the third and
3388 fourth arguments are meant to be. The optional fifth argument is
3389 an expression for the size of the function. In COFF this symbol
3390 gets an aux entry like that used for a csect. */
3391
3392static void
3393ppc_function (ignore)
5480ccf3 3394 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3395{
3396 char *name;
3397 char endc;
3398 char *s;
3399 symbolS *ext_sym;
3400 symbolS *lab_sym;
3401
3402 name = input_line_pointer;
3403 endc = get_symbol_end ();
3404
3405 /* Ignore any [PR] suffix. */
3406 name = ppc_canonicalize_symbol_name (name);
3407 s = strchr (name, '[');
3408 if (s != (char *) NULL
3409 && strcmp (s + 1, "PR]") == 0)
3410 *s = '\0';
3411
3412 ext_sym = symbol_find_or_make (name);
3413
3414 *input_line_pointer = endc;
3415
3416 if (*input_line_pointer != ',')
3417 {
3418 as_bad (_("missing symbol name"));
3419 ignore_rest_of_line ();
3420 return;
3421 }
3422 ++input_line_pointer;
3423
3424 name = input_line_pointer;
3425 endc = get_symbol_end ();
3426
3427 lab_sym = symbol_find_or_make (name);
3428
3429 *input_line_pointer = endc;
3430
3431 if (ext_sym != lab_sym)
3432 {
809ffe0d
ILT		 3433 expressionS exp;
3434
3435 exp.X_op = O_symbol;
3436 exp.X_add_symbol = lab_sym;
3437 exp.X_op_symbol = NULL;
3438 exp.X_add_number = 0;
3439 exp.X_unsigned = 0;
3440 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3441 }
3442
809ffe0d
ILT		 3443 if (symbol_get_tc (ext_sym)->class == -1)
3444 symbol_get_tc (ext_sym)->class = XMC_PR;
3445 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3446
3447 if (*input_line_pointer == ',')
3448 {
3449 expressionS ignore;
3450
3451 /* Ignore the third argument. */
3452 ++input_line_pointer;
3453 expression (&ignore);
3454 if (*input_line_pointer == ',')
3455 {
3456 /* Ignore the fourth argument. */
3457 ++input_line_pointer;
3458 expression (&ignore);
3459 if (*input_line_pointer == ',')
3460 {
3461 /* The fifth argument is the function size. */
3462 ++input_line_pointer;
809ffe0d
ILT		 3463 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3464 absolute_section,
3465 (valueT) 0,
3466 &zero_address_frag);
3467 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3468 }
3469 }
3470 }
3471
3472 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3473 SF_SET_FUNCTION (ext_sym);
3474 SF_SET_PROCESS (ext_sym);
3475 coff_add_linesym (ext_sym);
3476
3477 demand_empty_rest_of_line ();
3478}
3479
3480/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3481 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3482 with the correct line number */
5d6255fe 3483
8642cce8 3484static symbolS *saved_bi_sym = 0;
252b5132
RH		 3485
3486static void
3487ppc_bf (ignore)
5480ccf3 3488 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3489{
3490 symbolS *sym;
3491
3492 sym = symbol_make (".bf");
3493 S_SET_SEGMENT (sym, text_section);
809ffe0d 3494 symbol_set_frag (sym, frag_now);
252b5132
RH		 3495 S_SET_VALUE (sym, frag_now_fix ());
3496 S_SET_STORAGE_CLASS (sym, C_FCN);
3497
3498 coff_line_base = get_absolute_expression ();
3499
3500 S_SET_NUMBER_AUXILIARY (sym, 1);
3501 SA_SET_SYM_LNNO (sym, coff_line_base);
3502
8642cce8 3503 /* Line number for bi. */
5d6255fe 3504 if (saved_bi_sym)
8642cce8
TR		 3505 {
3506 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3507 saved_bi_sym = 0;
3508 }
5d6255fe 3509
8642cce8 3510
809ffe0d 3511 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3512
3513 ppc_frob_label (sym);
3514
3515 demand_empty_rest_of_line ();
3516}
3517
3518/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3519 ".ef", except that the line number is absolute, not relative to the
3520 most recent ".bf" symbol. */
3521
3522static void
3523ppc_ef (ignore)
5480ccf3 3524 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3525{
3526 symbolS *sym;
3527
3528 sym = symbol_make (".ef");
3529 S_SET_SEGMENT (sym, text_section);
809ffe0d 3530 symbol_set_frag (sym, frag_now);
252b5132
RH		 3531 S_SET_VALUE (sym, frag_now_fix ());
3532 S_SET_STORAGE_CLASS (sym, C_FCN);
3533 S_SET_NUMBER_AUXILIARY (sym, 1);
3534 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3535 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3536
3537 ppc_frob_label (sym);
3538
3539 demand_empty_rest_of_line ();
3540}
3541
3542/* The .bi and .ei pseudo-ops. These take a string argument and
3543 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3544 the symbol list. The value of .bi will be know when the next .bf
3545 is encountered. */
252b5132
RH		 3546
3547static void
3548ppc_biei (ei)
3549 int ei;
3550{
3551 static symbolS *last_biei;
3552
3553 char *name;
3554 int len;
3555 symbolS *sym;
3556 symbolS *look;
3557
3558 name = demand_copy_C_string (&len);
3559
3560 /* The value of these symbols is actually file offset. Here we set
3561 the value to the index into the line number entries. In
3562 ppc_frob_symbols we set the fix_line field, which will cause BFD
3563 to do the right thing. */
3564
3565 sym = symbol_make (name);
3566 /* obj-coff.c currently only handles line numbers correctly in the
3567 .text section. */
3568 S_SET_SEGMENT (sym, text_section);
3569 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3570 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3571
3572 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3573 symbol_get_tc (sym)->output = 1;
81d4177b 3574
8642cce8 3575 /* Save bi. */
5d6255fe 3576 if (ei)
8642cce8
TR		 3577 saved_bi_sym = 0;
3578 else
3579 saved_bi_sym = sym;
3580
252b5132
RH		 3581 for (look = last_biei ? last_biei : symbol_rootP;
3582 (look != (symbolS *) NULL
3583 && (S_GET_STORAGE_CLASS (look) == C_FILE
3584 || S_GET_STORAGE_CLASS (look) == C_BINCL
3585 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3586 look = symbol_next (look))
3587 ;
3588 if (look != (symbolS *) NULL)
3589 {
3590 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3591 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3592 last_biei = sym;
3593 }
3594
3595 demand_empty_rest_of_line ();
3596}
3597
3598/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3599 There is one argument, which is a csect symbol. The value of the
3600 .bs symbol is the index of this csect symbol. */
3601
3602static void
3603ppc_bs (ignore)
5480ccf3 3604 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3605{
3606 char *name;
3607 char endc;
3608 symbolS *csect;
3609 symbolS *sym;
3610
3611 if (ppc_current_block != NULL)
3612 as_bad (_("nested .bs blocks"));
3613
3614 name = input_line_pointer;
3615 endc = get_symbol_end ();
3616
3617 csect = symbol_find_or_make (name);
3618
3619 *input_line_pointer = endc;
3620
3621 sym = symbol_make (".bs");
3622 S_SET_SEGMENT (sym, now_seg);
3623 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3624 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3625 symbol_get_tc (sym)->output = 1;
252b5132 3626
809ffe0d 3627 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3628
3629 ppc_frob_label (sym);
3630
3631 ppc_current_block = sym;
3632
3633 demand_empty_rest_of_line ();
3634}
3635
3636/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3637
3638static void
3639ppc_es (ignore)
5480ccf3 3640 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3641{
3642 symbolS *sym;
3643
3644 if (ppc_current_block == NULL)
3645 as_bad (_(".es without preceding .bs"));
3646
3647 sym = symbol_make (".es");
3648 S_SET_SEGMENT (sym, now_seg);
3649 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3650 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3651 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3652
3653 ppc_frob_label (sym);
3654
3655 ppc_current_block = NULL;
3656
3657 demand_empty_rest_of_line ();
3658}
3659
3660/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3661 line number. */
3662
3663static void
3664ppc_bb (ignore)
5480ccf3 3665 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3666{
3667 symbolS *sym;
3668
3669 sym = symbol_make (".bb");
3670 S_SET_SEGMENT (sym, text_section);
809ffe0d 3671 symbol_set_frag (sym, frag_now);
252b5132
RH		 3672 S_SET_VALUE (sym, frag_now_fix ());
3673 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3674
3675 S_SET_NUMBER_AUXILIARY (sym, 1);
3676 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3677
809ffe0d 3678 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3679
3680 SF_SET_PROCESS (sym);
3681
3682 ppc_frob_label (sym);
3683
3684 demand_empty_rest_of_line ();
3685}
3686
3687/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3688 line number. */
3689
3690static void
3691ppc_eb (ignore)
5480ccf3 3692 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3693{
3694 symbolS *sym;
3695
3696 sym = symbol_make (".eb");
3697 S_SET_SEGMENT (sym, text_section);
809ffe0d 3698 symbol_set_frag (sym, frag_now);
252b5132
RH		 3699 S_SET_VALUE (sym, frag_now_fix ());
3700 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3701 S_SET_NUMBER_AUXILIARY (sym, 1);
3702 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3703 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3704
3705 SF_SET_PROCESS (sym);
3706
3707 ppc_frob_label (sym);
3708
3709 demand_empty_rest_of_line ();
3710}
3711
3712/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3713 specified name. */
3714
3715static void
3716ppc_bc (ignore)
5480ccf3 3717 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3718{
3719 char *name;
3720 int len;
3721 symbolS *sym;
3722
3723 name = demand_copy_C_string (&len);
3724 sym = symbol_make (name);
3725 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3726 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3727 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3728 S_SET_VALUE (sym, 0);
809ffe0d 3729 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3730
3731 ppc_frob_label (sym);
3732
3733 demand_empty_rest_of_line ();
3734}
3735
3736/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3737
3738static void
3739ppc_ec (ignore)
5480ccf3 3740 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3741{
3742 symbolS *sym;
3743
3744 sym = symbol_make (".ec");
3745 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3746 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3747 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3748 S_SET_VALUE (sym, 0);
809ffe0d 3749 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3750
3751 ppc_frob_label (sym);
3752
3753 demand_empty_rest_of_line ();
3754}
3755
3756/* The .toc pseudo-op. Switch to the .toc subsegment. */
3757
3758static void
3759ppc_toc (ignore)
5480ccf3 3760 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3761{
3762 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3763 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3764 else
3765 {
3766 subsegT subseg;
3767 symbolS *sym;
3768 symbolS *list;
81d4177b 3769
252b5132
RH		 3770 subseg = ppc_data_subsegment;
3771 ++ppc_data_subsegment;
3772
3773 subseg_new (segment_name (data_section), subseg);
3774 ppc_toc_frag = frag_now;
3775
3776 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3777 symbol_set_frag (sym, frag_now);
252b5132
RH		 3778 S_SET_SEGMENT (sym, data_section);
3779 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3780 symbol_get_tc (sym)->subseg = subseg;
3781 symbol_get_tc (sym)->output = 1;
3782 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3783
3784 ppc_toc_csect = sym;
81d4177b 3785
252b5132 3786 for (list = ppc_data_csects;
809ffe0d
ILT		 3787 symbol_get_tc (list)->next != (symbolS *) NULL;
3788 list = symbol_get_tc (list)->next)
252b5132 3789 ;
809ffe0d 3790 symbol_get_tc (list)->next = sym;
252b5132
RH		 3791
3792 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3793 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3794 &symbol_lastP);
252b5132
RH		 3795 }
3796
3797 ppc_current_csect = ppc_toc_csect;
3798
3799 demand_empty_rest_of_line ();
3800}
3801
3802/* The AIX assembler automatically aligns the operands of a .long or
3803 .short pseudo-op, and we want to be compatible. */
3804
3805static void
3806ppc_xcoff_cons (log_size)
3807 int log_size;
3808{
3809 frag_align (log_size, 0, 0);
3810 record_alignment (now_seg, log_size);
3811 cons (1 << log_size);
3812}
3813
3814static void
3815ppc_vbyte (dummy)
5480ccf3 3816 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3817{
3818 expressionS exp;
3819 int byte_count;
3820
3821 (void) expression (&exp);
3822
3823 if (exp.X_op != O_constant)
3824 {
3825 as_bad (_("non-constant byte count"));
3826 return;
3827 }
3828
3829 byte_count = exp.X_add_number;
3830
3831 if (*input_line_pointer != ',')
3832 {
3833 as_bad (_("missing value"));
3834 return;
3835 }
3836
3837 ++input_line_pointer;
3838 cons (byte_count);
3839}
3840
3841#endif /* OBJ_XCOFF */
0baf16f2 3842#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3843\f
3844/* The .tc pseudo-op. This is used when generating either XCOFF or
3845 ELF. This takes two or more arguments.
3846
3847 When generating XCOFF output, the first argument is the name to
3848 give to this location in the toc; this will be a symbol with class
0baf16f2 3849 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3850 this location in the TOC; often there is just one more argument, a
0baf16f2
AM		 3851 relocateable symbol reference. The size of the value to store
3852 depends on target word size. A 32-bit target uses 4-byte values, a
3853 64-bit target uses 8-byte values.
252b5132
RH		 3854
3855 When not generating XCOFF output, the arguments are the same, but
3856 the first argument is simply ignored. */
3857
3858static void
3859ppc_tc (ignore)
92161534 3860 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3861{
3862#ifdef OBJ_XCOFF
3863
3864 /* Define the TOC symbol name. */
3865 {
3866 char *name;
3867 char endc;
3868 symbolS *sym;
3869
3870 if (ppc_toc_csect == (symbolS *) NULL
3871 || ppc_toc_csect != ppc_current_csect)
3872 {
3873 as_bad (_(".tc not in .toc section"));
3874 ignore_rest_of_line ();
3875 return;
3876 }
3877
3878 name = input_line_pointer;
3879 endc = get_symbol_end ();
3880
3881 sym = symbol_find_or_make (name);
3882
3883 *input_line_pointer = endc;
3884
3885 if (S_IS_DEFINED (sym))
3886 {
3887 symbolS *label;
3888
809ffe0d
ILT		 3889 label = symbol_get_tc (ppc_current_csect)->within;
3890 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3891 {
3892 as_bad (_(".tc with no label"));
3893 ignore_rest_of_line ();
3894 return;
3895 }
3896
3897 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3898 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3899 S_SET_VALUE (label, S_GET_VALUE (sym));
3900
3901 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3902 ++input_line_pointer;
3903
3904 return;
3905 }
3906
3907 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3908 symbol_set_frag (sym, frag_now);
252b5132 3909 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3910 symbol_get_tc (sym)->class = XMC_TC;
3911 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3912
3913 ppc_frob_label (sym);
3914 }
3915
0baf16f2
AM		 3916#endif /* OBJ_XCOFF */
3917#ifdef OBJ_ELF
9c7977b3 3918 int align;
252b5132
RH		 3919
3920 /* Skip the TOC symbol name. */
3921 while (is_part_of_name (*input_line_pointer)
3922 || *input_line_pointer == '['
3923 || *input_line_pointer == ']'
3924 || *input_line_pointer == '{'
3925 || *input_line_pointer == '}')
3926 ++input_line_pointer;
3927
0baf16f2 3928 /* Align to a four/eight byte boundary. */
2b3c4602 3929 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3930 frag_align (align, 0, 0);
3931 record_alignment (now_seg, align);
0baf16f2 3932#endif /* OBJ_ELF */
252b5132
RH		 3933
3934 if (*input_line_pointer != ',')
3935 demand_empty_rest_of_line ();
3936 else
3937 {
3938 ++input_line_pointer;
2b3c4602 3939 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3940 }
3941}
0baf16f2
AM		 3942
3943/* Pseudo-op .machine. */
15c1449b 3944/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3945 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM		 3946 and the target format accordingly. Unfortunately, the target
3947 format is selected in output-file.c:output_file_create before we
3948 even get to md_begin, so it's not possible without changing
3949 as.c:main. */
0baf16f2
AM		 3950
3951static void
3952ppc_machine (ignore)
3953 int ignore ATTRIBUTE_UNUSED;
3954{
3955 discard_rest_of_line ();
3956}
3957
3958/* See whether a symbol is in the TOC section. */
3959
3960static int
3961ppc_is_toc_sym (sym)
3962 symbolS *sym;
3963{
3964#ifdef OBJ_XCOFF
3965 return symbol_get_tc (sym)->class == XMC_TC;
3966#endif
3967#ifdef OBJ_ELF
3968 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3969 if (ppc_obj64)
0baf16f2
AM		 3970 return strcmp (sname, ".toc") == 0;
3971 else
3972 return strcmp (sname, ".got") == 0;
3973#endif
3974}
3975#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 3976\f
3977#ifdef TE_PE
3978
99a814a1 3979/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 3980
3981/* Set the current section. */
3982static void
3983ppc_set_current_section (new)
3984 segT new;
3985{
3986 ppc_previous_section = ppc_current_section;
3987 ppc_current_section = new;
3988}
3989
3990/* pseudo-op: .previous
3991 behaviour: toggles the current section with the previous section.
3992 errors: None
99a814a1
AM		 3993 warnings: "No previous section" */
3994
252b5132 3995static void
99a814a1 3996ppc_previous (ignore)
5480ccf3 3997 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3998{
3999 symbolS *tmp;
4000
81d4177b 4001 if (ppc_previous_section == NULL)
252b5132 4002 {
99a814a1 4003 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4004 return;
4005 }
4006
99a814a1 4007 subseg_set (ppc_previous_section, 0);
252b5132 4008
99a814a1 4009 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4010}
4011
4012/* pseudo-op: .pdata
4013 behaviour: predefined read only data section
b34976b6 4014 double word aligned
252b5132
RH		 4015 errors: None
4016 warnings: None
4017 initial: .section .pdata "adr3"
b34976b6 4018 a - don't know -- maybe a misprint
252b5132
RH		 4019 d - initialized data
4020 r - readable
4021 3 - double word aligned (that would be 4 byte boundary)
4022
4023 commentary:
4024 Tag index tables (also known as the function table) for exception
99a814a1 4025 handling, debugging, etc. */
252b5132 4026
252b5132 4027static void
99a814a1 4028ppc_pdata (ignore)
5480ccf3 4029 int ignore ATTRIBUTE_UNUSED;
252b5132 4030{
81d4177b 4031 if (pdata_section == 0)
252b5132
RH		 4032 {
4033 pdata_section = subseg_new (".pdata", 0);
81d4177b 4034
252b5132
RH		 4035 bfd_set_section_flags (stdoutput, pdata_section,
4036 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4037 | SEC_READONLY | SEC_DATA ));
81d4177b 4038
252b5132
RH		 4039 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4040 }
4041 else
4042 {
99a814a1 4043 pdata_section = subseg_new (".pdata", 0);
252b5132 4044 }
99a814a1 4045 ppc_set_current_section (pdata_section);
252b5132
RH		 4046}
4047
4048/* pseudo-op: .ydata
4049 behaviour: predefined read only data section
b34976b6 4050 double word aligned
252b5132
RH		 4051 errors: None
4052 warnings: None
4053 initial: .section .ydata "drw3"
b34976b6 4054 a - don't know -- maybe a misprint
252b5132
RH		 4055 d - initialized data
4056 r - readable
4057 3 - double word aligned (that would be 4 byte boundary)
4058 commentary:
4059 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4060 debugging, etc. */
4061
252b5132 4062static void
99a814a1 4063ppc_ydata (ignore)
5480ccf3 4064 int ignore ATTRIBUTE_UNUSED;
252b5132 4065{
81d4177b 4066 if (ydata_section == 0)
252b5132
RH		 4067 {
4068 ydata_section = subseg_new (".ydata", 0);
4069 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4070 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4071 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4072
4073 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4074 }
4075 else
4076 {
4077 ydata_section = subseg_new (".ydata", 0);
4078 }
99a814a1 4079 ppc_set_current_section (ydata_section);
252b5132
RH		 4080}
4081
4082/* pseudo-op: .reldata
4083 behaviour: predefined read write data section
b34976b6 4084 double word aligned (4-byte)
252b5132
RH		 4085 FIXME: relocation is applied to it
4086 FIXME: what's the difference between this and .data?
4087 errors: None
4088 warnings: None
4089 initial: .section .reldata "drw3"
4090 d - initialized data
4091 r - readable
4092 w - writeable
4093 3 - double word aligned (that would be 8 byte boundary)
4094
4095 commentary:
4096 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4097 function descriptors, etc. */
4098
252b5132 4099static void
99a814a1 4100ppc_reldata (ignore)
5480ccf3 4101 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4102{
4103 if (reldata_section == 0)
4104 {
4105 reldata_section = subseg_new (".reldata", 0);
4106
4107 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4108 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4109 | SEC_DATA));
252b5132
RH		 4110
4111 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4112 }
4113 else
4114 {
4115 reldata_section = subseg_new (".reldata", 0);
4116 }
99a814a1 4117 ppc_set_current_section (reldata_section);
252b5132
RH		 4118}
4119
4120/* pseudo-op: .rdata
4121 behaviour: predefined read only data section
b34976b6 4122 double word aligned
252b5132
RH		 4123 errors: None
4124 warnings: None
4125 initial: .section .rdata "dr3"
4126 d - initialized data
4127 r - readable
99a814a1
AM		 4128 3 - double word aligned (that would be 4 byte boundary) */
4129
252b5132 4130static void
99a814a1 4131ppc_rdata (ignore)
5480ccf3 4132 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4133{
4134 if (rdata_section == 0)
4135 {
4136 rdata_section = subseg_new (".rdata", 0);
4137 bfd_set_section_flags (stdoutput, rdata_section,
4138 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4139 | SEC_READONLY | SEC_DATA ));
4140
4141 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4142 }
4143 else
4144 {
4145 rdata_section = subseg_new (".rdata", 0);
4146 }
99a814a1 4147 ppc_set_current_section (rdata_section);
252b5132
RH		 4148}
4149
4150/* pseudo-op: .ualong
81d4177b 4151 behaviour: much like .int, with the exception that no alignment is
b34976b6 4152 performed.
252b5132
RH		 4153 FIXME: test the alignment statement
4154 errors: None
99a814a1
AM		 4155 warnings: None */
4156
252b5132 4157static void
99a814a1 4158ppc_ualong (ignore)
5480ccf3 4159 int ignore ATTRIBUTE_UNUSED;
252b5132 4160{
99a814a1
AM		 4161 /* Try for long. */
4162 cons (4);
252b5132
RH		 4163}
4164
4165/* pseudo-op: .znop <symbol name>
4166 behaviour: Issue a nop instruction
b34976b6 4167 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4168 the supplied symbol name.
4169 errors: None
99a814a1
AM		 4170 warnings: Missing symbol name */
4171
252b5132 4172static void
99a814a1 4173ppc_znop (ignore)
5480ccf3 4174 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4175{
4176 unsigned long insn;
4177 const struct powerpc_opcode *opcode;
4178 expressionS ex;
4179 char *f;
252b5132 4180 symbolS *sym;
252b5132
RH		 4181 char *symbol_name;
4182 char c;
4183 char *name;
4184 unsigned int exp;
4185 flagword flags;
4186 asection *sec;
4187
99a814a1 4188 /* Strip out the symbol name. */
252b5132
RH		 4189 symbol_name = input_line_pointer;
4190 c = get_symbol_end ();
4191
4192 name = xmalloc (input_line_pointer - symbol_name + 1);
4193 strcpy (name, symbol_name);
4194
4195 sym = symbol_find_or_make (name);
4196
4197 *input_line_pointer = c;
4198
4199 SKIP_WHITESPACE ();
4200
4201 /* Look up the opcode in the hash table. */
4202 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4203
99a814a1 4204 /* Stick in the nop. */
252b5132
RH		 4205 insn = opcode->opcode;
4206
4207 /* Write out the instruction. */
4208 f = frag_more (4);
4209 md_number_to_chars (f, insn, 4);
4210 fix_new (frag_now,
4211 f - frag_now->fr_literal,
4212 4,
4213 sym,
4214 0,
4215 0,
4216 BFD_RELOC_16_GOT_PCREL);
4217
4218}
4219
81d4177b
KH		 4220/* pseudo-op:
4221 behaviour:
4222 errors:
99a814a1
AM		 4223 warnings: */
4224
252b5132 4225static void
99a814a1 4226ppc_pe_comm (lcomm)
252b5132
RH		 4227 int lcomm;
4228{
4229 register char *name;
4230 register char c;
4231 register char *p;
4232 offsetT temp;
4233 register symbolS *symbolP;
4234 offsetT align;
4235
4236 name = input_line_pointer;
4237 c = get_symbol_end ();
4238
99a814a1 4239 /* just after name is now '\0'. */
252b5132
RH		 4240 p = input_line_pointer;
4241 *p = c;
4242 SKIP_WHITESPACE ();
4243 if (*input_line_pointer != ',')
4244 {
4245 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4246 ignore_rest_of_line ();
4247 return;
4248 }
4249
4250 input_line_pointer++; /* skip ',' */
4251 if ((temp = get_absolute_expression ()) < 0)
4252 {
4253 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4254 ignore_rest_of_line ();
4255 return;
4256 }
4257
4258 if (! lcomm)
4259 {
4260 /* The third argument to .comm is the alignment. */
4261 if (*input_line_pointer != ',')
4262 align = 3;
4263 else
4264 {
4265 ++input_line_pointer;
4266 align = get_absolute_expression ();
4267 if (align <= 0)
4268 {
4269 as_warn (_("ignoring bad alignment"));
4270 align = 3;
4271 }
4272 }
4273 }
4274
4275 *p = 0;
4276 symbolP = symbol_find_or_make (name);
4277
4278 *p = c;
4279 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4280 {
4281 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4282 S_GET_NAME (symbolP));
4283 ignore_rest_of_line ();
4284 return;
4285 }
4286
4287 if (S_GET_VALUE (symbolP))
4288 {
4289 if (S_GET_VALUE (symbolP) != (valueT) temp)
4290 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4291 S_GET_NAME (symbolP),
4292 (long) S_GET_VALUE (symbolP),
4293 (long) temp);
4294 }
4295 else
4296 {
4297 S_SET_VALUE (symbolP, (valueT) temp);
4298 S_SET_EXTERNAL (symbolP);
4299 }
4300
4301 demand_empty_rest_of_line ();
4302}
4303
4304/*
4305 * implement the .section pseudo op:
4306 * .section name {, "flags"}
4307 * ^ ^
4308 * | +--- optional flags: 'b' for bss
4309 * | 'i' for info
4310 * +-- section name 'l' for lib
4311 * 'n' for noload
4312 * 'o' for over
4313 * 'w' for data
4314 * 'd' (apparently m88k for data)
4315 * 'x' for text
4316 * But if the argument is not a quoted string, treat it as a
4317 * subsegment number.
4318 *
4319 * FIXME: this is a copy of the section processing from obj-coff.c, with
4320 * additions/changes for the moto-pas assembler support. There are three
4321 * categories:
4322 *
81d4177b 4323 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4324 * setting bits that bfd probably neither understands or uses. The
4325 * correct approach (?) will have to incorporate extra fields attached
4326 * to the section to hold the system specific stuff. (krk)
4327 *
4328 * Section Contents:
4329 * 'a' - unknown - referred to in documentation, but no definition supplied
4330 * 'c' - section has code
4331 * 'd' - section has initialized data
4332 * 'u' - section has uninitialized data
4333 * 'i' - section contains directives (info)
4334 * 'n' - section can be discarded
4335 * 'R' - remove section at link time
4336 *
4337 * Section Protection:
4338 * 'r' - section is readable
4339 * 'w' - section is writeable
4340 * 'x' - section is executable
4341 * 's' - section is sharable
4342 *
4343 * Section Alignment:
4344 * '0' - align to byte boundary
4345 * '1' - align to halfword undary
4346 * '2' - align to word boundary
4347 * '3' - align to doubleword boundary
4348 * '4' - align to quadword boundary
4349 * '5' - align to 32 byte boundary
4350 * '6' - align to 64 byte boundary
4351 *
4352 */
4353
4354void
4355ppc_pe_section (ignore)
5480ccf3 4356 int ignore ATTRIBUTE_UNUSED;
252b5132 4357{
99a814a1 4358 /* Strip out the section name. */
252b5132
RH		 4359 char *section_name;
4360 char c;
4361 char *name;
4362 unsigned int exp;
4363 flagword flags;
4364 segT sec;
4365 int align;
4366
4367 section_name = input_line_pointer;
4368 c = get_symbol_end ();
4369
4370 name = xmalloc (input_line_pointer - section_name + 1);
4371 strcpy (name, section_name);
4372
4373 *input_line_pointer = c;
4374
4375 SKIP_WHITESPACE ();
4376
4377 exp = 0;
4378 flags = SEC_NO_FLAGS;
4379
4380 if (strcmp (name, ".idata$2") == 0)
4381 {
4382 align = 0;
4383 }
4384 else if (strcmp (name, ".idata$3") == 0)
4385 {
4386 align = 0;
4387 }
4388 else if (strcmp (name, ".idata$4") == 0)
4389 {
4390 align = 2;
4391 }
4392 else if (strcmp (name, ".idata$5") == 0)
4393 {
4394 align = 2;
4395 }
4396 else if (strcmp (name, ".idata$6") == 0)
4397 {
4398 align = 1;
4399 }
4400 else
99a814a1
AM		 4401 /* Default alignment to 16 byte boundary. */
4402 align = 4;
252b5132
RH		 4403
4404 if (*input_line_pointer == ',')
4405 {
4406 ++input_line_pointer;
4407 SKIP_WHITESPACE ();
4408 if (*input_line_pointer != '"')
4409 exp = get_absolute_expression ();
4410 else
4411 {
4412 ++input_line_pointer;
4413 while (*input_line_pointer != '"'
4414 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4415 {
4416 switch (*input_line_pointer)
4417 {
4418 /* Section Contents */
4419 case 'a': /* unknown */
4420 as_bad (_("Unsupported section attribute -- 'a'"));
4421 break;
4422 case 'c': /* code section */
81d4177b 4423 flags |= SEC_CODE;
252b5132
RH		 4424 break;
4425 case 'd': /* section has initialized data */
4426 flags |= SEC_DATA;
4427 break;
4428 case 'u': /* section has uninitialized data */
4429 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4430 in winnt.h */
4431 flags |= SEC_ROM;
4432 break;
4433 case 'i': /* section contains directives (info) */
4434 /* FIXME: This is IMAGE_SCN_LNK_INFO
4435 in winnt.h */
4436 flags |= SEC_HAS_CONTENTS;
4437 break;
4438 case 'n': /* section can be discarded */
81d4177b 4439 flags &=~ SEC_LOAD;
252b5132
RH		 4440 break;
4441 case 'R': /* Remove section at link time */
4442 flags |= SEC_NEVER_LOAD;
4443 break;
4444
4445 /* Section Protection */
4446 case 'r': /* section is readable */
4447 flags |= IMAGE_SCN_MEM_READ;
4448 break;
4449 case 'w': /* section is writeable */
4450 flags |= IMAGE_SCN_MEM_WRITE;
4451 break;
4452 case 'x': /* section is executable */
4453 flags |= IMAGE_SCN_MEM_EXECUTE;
4454 break;
4455 case 's': /* section is sharable */
4456 flags |= IMAGE_SCN_MEM_SHARED;
4457 break;
4458
4459 /* Section Alignment */
4460 case '0': /* align to byte boundary */
4461 flags |= IMAGE_SCN_ALIGN_1BYTES;
4462 align = 0;
4463 break;
4464 case '1': /* align to halfword boundary */
4465 flags |= IMAGE_SCN_ALIGN_2BYTES;
4466 align = 1;
4467 break;
4468 case '2': /* align to word boundary */
4469 flags |= IMAGE_SCN_ALIGN_4BYTES;
4470 align = 2;
4471 break;
4472 case '3': /* align to doubleword boundary */
4473 flags |= IMAGE_SCN_ALIGN_8BYTES;
4474 align = 3;
4475 break;
4476 case '4': /* align to quadword boundary */
4477 flags |= IMAGE_SCN_ALIGN_16BYTES;
4478 align = 4;
4479 break;
4480 case '5': /* align to 32 byte boundary */
4481 flags |= IMAGE_SCN_ALIGN_32BYTES;
4482 align = 5;
4483 break;
4484 case '6': /* align to 64 byte boundary */
4485 flags |= IMAGE_SCN_ALIGN_64BYTES;
4486 align = 6;
4487 break;
4488
4489 default:
99a814a1
AM		 4490 as_bad (_("unknown section attribute '%c'"),
4491 *input_line_pointer);
252b5132
RH		 4492 break;
4493 }
4494 ++input_line_pointer;
4495 }
4496 if (*input_line_pointer == '"')
4497 ++input_line_pointer;
4498 }
4499 }
4500
4501 sec = subseg_new (name, (subsegT) exp);
4502
99a814a1 4503 ppc_set_current_section (sec);
252b5132
RH		 4504
4505 if (flags != SEC_NO_FLAGS)
4506 {
4507 if (! bfd_set_section_flags (stdoutput, sec, flags))
4508 as_bad (_("error setting flags for \"%s\": %s"),
4509 bfd_section_name (stdoutput, sec),
4510 bfd_errmsg (bfd_get_error ()));
4511 }
4512
99a814a1 4513 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4514
4515}
4516
4517static void
4518ppc_pe_function (ignore)
5480ccf3 4519 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4520{
4521 char *name;
4522 char endc;
4523 symbolS *ext_sym;
4524
4525 name = input_line_pointer;
4526 endc = get_symbol_end ();
4527
4528 ext_sym = symbol_find_or_make (name);
4529
4530 *input_line_pointer = endc;
4531
4532 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4533 SF_SET_FUNCTION (ext_sym);
4534 SF_SET_PROCESS (ext_sym);
4535 coff_add_linesym (ext_sym);
4536
4537 demand_empty_rest_of_line ();
4538}
4539
4540static void
4541ppc_pe_tocd (ignore)
5480ccf3 4542 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4543{
4544 if (tocdata_section == 0)
4545 {
4546 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4547 /* FIXME: section flags won't work. */
252b5132
RH		 4548 bfd_set_section_flags (stdoutput, tocdata_section,
4549 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4550 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4551
4552 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4553 }
4554 else
4555 {
4556 rdata_section = subseg_new (".tocd", 0);
4557 }
4558
99a814a1 4559 ppc_set_current_section (tocdata_section);
252b5132
RH		 4560
4561 demand_empty_rest_of_line ();
4562}
4563
4564/* Don't adjust TOC relocs to use the section symbol. */
4565
4566int
4567ppc_pe_fix_adjustable (fix)
4568 fixS *fix;
4569{
4570 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4571}
4572
4573#endif
4574\f
4575#ifdef OBJ_XCOFF
4576
4577/* XCOFF specific symbol and file handling. */
4578
4579/* Canonicalize the symbol name. We use the to force the suffix, if
4580 any, to use square brackets, and to be in upper case. */
4581
4582char *
4583ppc_canonicalize_symbol_name (name)
4584 char *name;
4585{
4586 char *s;
4587
4588 if (ppc_stab_symbol)
4589 return name;
4590
4591 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4592 ;
4593 if (*s != '\0')
4594 {
4595 char brac;
4596
4597 if (*s == '[')
4598 brac = ']';
4599 else
4600 {
4601 *s = '[';
4602 brac = '}';
4603 }
4604
4605 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4606 *s = TOUPPER (*s);
252b5132
RH		 4607
4608 if (*s == '\0' || s[1] != '\0')
4609 as_bad (_("bad symbol suffix"));
4610
4611 *s = ']';
4612 }
4613
4614 return name;
4615}
4616
4617/* Set the class of a symbol based on the suffix, if any. This is
4618 called whenever a new symbol is created. */
4619
4620void
4621ppc_symbol_new_hook (sym)
4622 symbolS *sym;
4623{
809ffe0d 4624 struct ppc_tc_sy *tc;
252b5132
RH		 4625 const char *s;
4626
809ffe0d
ILT		 4627 tc = symbol_get_tc (sym);
4628 tc->next = NULL;
4629 tc->output = 0;
4630 tc->class = -1;
4631 tc->real_name = NULL;
4632 tc->subseg = 0;
4633 tc->align = 0;
4634 tc->size = NULL;
4635 tc->within = NULL;
252b5132
RH		 4636
4637 if (ppc_stab_symbol)
4638 return;
4639
4640 s = strchr (S_GET_NAME (sym), '[');
4641 if (s == (const char *) NULL)
4642 {
4643 /* There is no suffix. */
4644 return;
4645 }
4646
4647 ++s;
4648
4649 switch (s[0])
4650 {
4651 case 'B':
4652 if (strcmp (s, "BS]") == 0)
809ffe0d 4653 tc->class = XMC_BS;
252b5132
RH		 4654 break;
4655 case 'D':
4656 if (strcmp (s, "DB]") == 0)
809ffe0d 4657 tc->class = XMC_DB;
252b5132 4658 else if (strcmp (s, "DS]") == 0)
809ffe0d 4659 tc->class = XMC_DS;
252b5132
RH		 4660 break;
4661 case 'G':
4662 if (strcmp (s, "GL]") == 0)
809ffe0d 4663 tc->class = XMC_GL;
252b5132
RH		 4664 break;
4665 case 'P':
4666 if (strcmp (s, "PR]") == 0)
809ffe0d 4667 tc->class = XMC_PR;
252b5132
RH		 4668 break;
4669 case 'R':
4670 if (strcmp (s, "RO]") == 0)
809ffe0d 4671 tc->class = XMC_RO;
252b5132 4672 else if (strcmp (s, "RW]") == 0)
809ffe0d 4673 tc->class = XMC_RW;
252b5132
RH		 4674 break;
4675 case 'S':
4676 if (strcmp (s, "SV]") == 0)
809ffe0d 4677 tc->class = XMC_SV;
252b5132
RH		 4678 break;
4679 case 'T':
4680 if (strcmp (s, "TC]") == 0)
809ffe0d 4681 tc->class = XMC_TC;
252b5132 4682 else if (strcmp (s, "TI]") == 0)
809ffe0d 4683 tc->class = XMC_TI;
252b5132 4684 else if (strcmp (s, "TB]") == 0)
809ffe0d 4685 tc->class = XMC_TB;
252b5132 4686 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4687 tc->class = XMC_TC0;
252b5132
RH		 4688 break;
4689 case 'U':
4690 if (strcmp (s, "UA]") == 0)
809ffe0d 4691 tc->class = XMC_UA;
252b5132 4692 else if (strcmp (s, "UC]") == 0)
809ffe0d 4693 tc->class = XMC_UC;
252b5132
RH		 4694 break;
4695 case 'X':
4696 if (strcmp (s, "XO]") == 0)
809ffe0d 4697 tc->class = XMC_XO;
252b5132
RH		 4698 break;
4699 }
4700
809ffe0d 4701 if (tc->class == -1)
252b5132
RH		 4702 as_bad (_("Unrecognized symbol suffix"));
4703}
4704
4705/* Set the class of a label based on where it is defined. This
4706 handles symbols without suffixes. Also, move the symbol so that it
4707 follows the csect symbol. */
4708
4709void
4710ppc_frob_label (sym)
4711 symbolS *sym;
4712{
4713 if (ppc_current_csect != (symbolS *) NULL)
4714 {
809ffe0d
ILT		 4715 if (symbol_get_tc (sym)->class == -1)
4716 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4717
4718 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4719 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4720 &symbol_rootP, &symbol_lastP);
4721 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4722 }
4723}
4724
4725/* This variable is set by ppc_frob_symbol if any absolute symbols are
4726 seen. It tells ppc_adjust_symtab whether it needs to look through
4727 the symbols. */
4728
b34976b6 4729static bfd_boolean ppc_saw_abs;
252b5132
RH		 4730
4731/* Change the name of a symbol just before writing it out. Set the
4732 real name if the .rename pseudo-op was used. Otherwise, remove any
4733 class suffix. Return 1 if the symbol should not be included in the
4734 symbol table. */
4735
4736int
4737ppc_frob_symbol (sym)
4738 symbolS *sym;
4739{
4740 static symbolS *ppc_last_function;
4741 static symbolS *set_end;
4742
4743 /* Discard symbols that should not be included in the output symbol
4744 table. */
809ffe0d
ILT		 4745 if (! symbol_used_in_reloc_p (sym)
4746 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4747 || (! S_IS_EXTERNAL (sym)
809ffe0d 4748 && ! symbol_get_tc (sym)->output
252b5132
RH		 4749 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4750 return 1;
4751
a161fe53
AM		 4752 /* This one will disappear anyway. Don't make a csect sym for it. */
4753 if (sym == abs_section_sym)
4754 return 1;
4755
809ffe0d
ILT		 4756 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4757 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4758 else
4759 {
4760 const char *name;
4761 const char *s;
4762
4763 name = S_GET_NAME (sym);
4764 s = strchr (name, '[');
4765 if (s != (char *) NULL)
4766 {
4767 unsigned int len;
4768 char *snew;
4769
4770 len = s - name;
4771 snew = xmalloc (len + 1);
4772 memcpy (snew, name, len);
4773 snew[len] = '\0';
4774
4775 S_SET_NAME (sym, snew);
4776 }
4777 }
4778
4779 if (set_end != (symbolS *) NULL)
4780 {
4781 SA_SET_SYM_ENDNDX (set_end, sym);
4782 set_end = NULL;
4783 }
4784
4785 if (SF_GET_FUNCTION (sym))
4786 {
4787 if (ppc_last_function != (symbolS *) NULL)
4788 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4789 ppc_last_function = sym;
809ffe0d 4790 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4791 {
6386f3a7 4792 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4793 SA_SET_SYM_FSIZE (sym,
4794 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4795 }
4796 }
4797 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4798 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4799 {
4800 if (ppc_last_function == (symbolS *) NULL)
4801 as_bad (_(".ef with no preceding .function"));
4802 else
4803 {
4804 set_end = ppc_last_function;
4805 ppc_last_function = NULL;
4806
4807 /* We don't have a C_EFCN symbol, but we need to force the
4808 COFF backend to believe that it has seen one. */
4809 coff_last_function = NULL;
4810 }
4811 }
4812
4813 if (! S_IS_EXTERNAL (sym)
809ffe0d 4814 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4815 && S_GET_STORAGE_CLASS (sym) != C_FILE
4816 && S_GET_STORAGE_CLASS (sym) != C_FCN
4817 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4818 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4819 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4820 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4821 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4822 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4823 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4824
4825 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4826 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4827 {
4828 int i;
4829 union internal_auxent *a;
4830
4831 /* Create a csect aux. */
4832 i = S_GET_NUMBER_AUXILIARY (sym);
4833 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4834 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4835 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4836 {
4837 /* This is the TOC table. */
4838 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4839 a->x_csect.x_scnlen.l = 0;
4840 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4841 }
809ffe0d 4842 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4843 {
4844 /* This is a csect symbol. x_scnlen is the size of the
4845 csect. */
809ffe0d 4846 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4847 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4848 S_GET_SEGMENT (sym))
4849 - S_GET_VALUE (sym));
4850 else
4851 {
6386f3a7 4852 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4853 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4854 - S_GET_VALUE (sym));
4855 }
809ffe0d 4856 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4857 }
4858 else if (S_GET_SEGMENT (sym) == bss_section)
4859 {
4860 /* This is a common symbol. */
809ffe0d
ILT		 4861 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4862 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4863 if (S_IS_EXTERNAL (sym))
809ffe0d 4864 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4865 else
809ffe0d 4866 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4867 }
4868 else if (S_GET_SEGMENT (sym) == absolute_section)
4869 {
4870 /* This is an absolute symbol. The csect will be created by
99a814a1 4871 ppc_adjust_symtab. */
b34976b6 4872 ppc_saw_abs = TRUE;
252b5132 4873 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4874 if (symbol_get_tc (sym)->class == -1)
4875 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4876 }
4877 else if (! S_IS_DEFINED (sym))
4878 {
4879 /* This is an external symbol. */
4880 a->x_csect.x_scnlen.l = 0;
4881 a->x_csect.x_smtyp = XTY_ER;
4882 }
809ffe0d 4883 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4884 {
4885 symbolS *next;
4886
4887 /* This is a TOC definition. x_scnlen is the size of the
4888 TOC entry. */
4889 next = symbol_next (sym);
809ffe0d 4890 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4891 next = symbol_next (next);
4892 if (next == (symbolS *) NULL
809ffe0d 4893 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4894 {
4895 if (ppc_after_toc_frag == (fragS *) NULL)
4896 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4897 data_section)
4898 - S_GET_VALUE (sym));
4899 else
4900 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4901 - S_GET_VALUE (sym));
4902 }
4903 else
4904 {
6386f3a7 4905 resolve_symbol_value (next);
252b5132
RH		 4906 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4907 - S_GET_VALUE (sym));
4908 }
4909 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4910 }
4911 else
4912 {
4913 symbolS *csect;
4914
4915 /* This is a normal symbol definition. x_scnlen is the
4916 symbol index of the containing csect. */
4917 if (S_GET_SEGMENT (sym) == text_section)
4918 csect = ppc_text_csects;
4919 else if (S_GET_SEGMENT (sym) == data_section)
4920 csect = ppc_data_csects;
4921 else
4922 abort ();
4923
4924 /* Skip the initial dummy symbol. */
809ffe0d 4925 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4926
4927 if (csect == (symbolS *) NULL)
4928 {
4929 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4930 a->x_csect.x_scnlen.l = 0;
4931 }
4932 else
4933 {
809ffe0d 4934 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4935 {
6386f3a7 4936 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 4937 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4938 > S_GET_VALUE (sym))
252b5132 4939 break;
809ffe0d 4940 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4941 }
4942
809ffe0d
ILT		 4943 a->x_csect.x_scnlen.p =
4944 coffsymbol (symbol_get_bfdsym (csect))->native;
4945 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4946 1;
252b5132
RH		 4947 }
4948 a->x_csect.x_smtyp = XTY_LD;
4949 }
81d4177b 4950
252b5132
RH		 4951 a->x_csect.x_parmhash = 0;
4952 a->x_csect.x_snhash = 0;
809ffe0d 4953 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 4954 a->x_csect.x_smclas = XMC_PR;
4955 else
809ffe0d 4956 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 4957 a->x_csect.x_stab = 0;
4958 a->x_csect.x_snstab = 0;
4959
4960 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4961 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 4962 }
4963 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4964 {
4965 /* We want the value to be the symbol index of the referenced
4966 csect symbol. BFD will do that for us if we set the right
4967 flags. */
b782de16
AM		 4968 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4969 combined_entry_type *c = coffsymbol (bsym)->native;
4970
4971 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4972 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 4973 }
4974 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4975 {
4976 symbolS *block;
4977 symbolS *csect;
4978
4979 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 4980 block = symbol_get_tc (sym)->within;
4981 csect = symbol_get_tc (block)->within;
6386f3a7 4982 resolve_symbol_value (csect);
252b5132
RH		 4983 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
4984 }
4985 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
4986 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
4987 {
4988 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 4989 BFD will do that for us if we set the right flags. We have
4990 already set the value correctly. */
809ffe0d 4991 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 4992 }
4993
4994 return 0;
4995}
4996
4997/* Adjust the symbol table. This creates csect symbols for all
4998 absolute symbols. */
4999
5000void
5001ppc_adjust_symtab ()
5002{
5003 symbolS *sym;
5004
5005 if (! ppc_saw_abs)
5006 return;
5007
5008 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5009 {
5010 symbolS *csect;
5011 int i;
5012 union internal_auxent *a;
5013
5014 if (S_GET_SEGMENT (sym) != absolute_section)
5015 continue;
5016
5017 csect = symbol_create (".abs[XO]", absolute_section,
5018 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5019 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5020 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5021 i = S_GET_NUMBER_AUXILIARY (csect);
5022 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5023 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5024 a->x_csect.x_scnlen.l = 0;
5025 a->x_csect.x_smtyp = XTY_SD;
5026 a->x_csect.x_parmhash = 0;
5027 a->x_csect.x_snhash = 0;
5028 a->x_csect.x_smclas = XMC_XO;
5029 a->x_csect.x_stab = 0;
5030 a->x_csect.x_snstab = 0;
5031
5032 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5033
5034 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5035 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5036 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5037 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5038 }
5039
b34976b6 5040 ppc_saw_abs = FALSE;
252b5132
RH		 5041}
5042
5043/* Set the VMA for a section. This is called on all the sections in
5044 turn. */
5045
5046void
5047ppc_frob_section (sec)
5048 asection *sec;
5049{
5050 static bfd_size_type vma = 0;
5051
5052 bfd_set_section_vma (stdoutput, sec, vma);
5053 vma += bfd_section_size (stdoutput, sec);
5054}
5055
5056#endif /* OBJ_XCOFF */
5057\f
5058/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5059 of type TYPE, and store the appropriate bytes in *LITP. The number
5060 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5061 returned, or NULL on OK. */
5062
5063char *
5064md_atof (type, litp, sizep)
5065 int type;
5066 char *litp;
5067 int *sizep;
5068{
5069 int prec;
5070 LITTLENUM_TYPE words[4];
5071 char *t;
5072 int i;
5073
5074 switch (type)
5075 {
5076 case 'f':
5077 prec = 2;
5078 break;
5079
5080 case 'd':
5081 prec = 4;
5082 break;
5083
5084 default:
5085 *sizep = 0;
5086 return _("bad call to md_atof");
5087 }
5088
5089 t = atof_ieee (input_line_pointer, type, words);
5090 if (t)
5091 input_line_pointer = t;
5092
5093 *sizep = prec * 2;
5094
5095 if (target_big_endian)
5096 {
5097 for (i = 0; i < prec; i++)
5098 {
5099 md_number_to_chars (litp, (valueT) words[i], 2);
5100 litp += 2;
5101 }
5102 }
5103 else
5104 {
5105 for (i = prec - 1; i >= 0; i--)
5106 {
5107 md_number_to_chars (litp, (valueT) words[i], 2);
5108 litp += 2;
5109 }
5110 }
81d4177b 5111
252b5132
RH		 5112 return NULL;
5113}
5114
5115/* Write a value out to the object file, using the appropriate
5116 endianness. */
5117
5118void
5119md_number_to_chars (buf, val, n)
5120 char *buf;
5121 valueT val;
5122 int n;
5123{
5124 if (target_big_endian)
5125 number_to_chars_bigendian (buf, val, n);
5126 else
5127 number_to_chars_littleendian (buf, val, n);
5128}
5129
5130/* Align a section (I don't know why this is machine dependent). */
5131
5132valueT
5133md_section_align (seg, addr)
5134 asection *seg;
5135 valueT addr;
5136{
5137 int align = bfd_get_section_alignment (stdoutput, seg);
5138
5139 return ((addr + (1 << align) - 1) & (-1 << align));
5140}
5141
5142/* We don't have any form of relaxing. */
5143
5144int
5145md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5146 fragS *fragp ATTRIBUTE_UNUSED;
5147 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5148{
5149 abort ();
5150 return 0;
5151}
5152
5153/* Convert a machine dependent frag. We never generate these. */
5154
5155void
5156md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5157 bfd *abfd ATTRIBUTE_UNUSED;
5158 asection *sec ATTRIBUTE_UNUSED;
5159 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5160{
5161 abort ();
5162}
5163
5164/* We have no need to default values of symbols. */
5165
252b5132
RH		 5166symbolS *
5167md_undefined_symbol (name)
92161534 5168 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5169{
5170 return 0;
5171}
5172\f
5173/* Functions concerning relocs. */
5174
5175/* The location from which a PC relative jump should be calculated,
5176 given a PC relative reloc. */
5177
5178long
5179md_pcrel_from_section (fixp, sec)
5180 fixS *fixp;
92161534 5181 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5182{
5183 return fixp->fx_frag->fr_address + fixp->fx_where;
5184}
5185
5186#ifdef OBJ_XCOFF
5187
5188/* This is called to see whether a fixup should be adjusted to use a
5189 section symbol. We take the opportunity to change a fixup against
5190 a symbol in the TOC subsegment into a reloc against the
5191 corresponding .tc symbol. */
5192
5193int
5194ppc_fix_adjustable (fix)
5195 fixS *fix;
5196{
b782de16
AM		 5197 valueT val = resolve_symbol_value (fix->fx_addsy);
5198 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5199 TC_SYMFIELD_TYPE *tc;
5200
5201 if (symseg == absolute_section)
5202 return 0;
252b5132 5203
252b5132 5204 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5205 && fix->fx_addsy != ppc_toc_csect
b782de16 5206 && symseg == data_section
252b5132
RH		 5207 && val >= ppc_toc_frag->fr_address
5208 && (ppc_after_toc_frag == (fragS *) NULL
5209 || val < ppc_after_toc_frag->fr_address))
5210 {
5211 symbolS *sy;
5212
5213 for (sy = symbol_next (ppc_toc_csect);
5214 sy != (symbolS *) NULL;
5215 sy = symbol_next (sy))
5216 {
b782de16
AM		 5217 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5218
5219 if (sy_tc->class == XMC_TC0)
252b5132 5220 continue;
b782de16 5221 if (sy_tc->class != XMC_TC)
252b5132 5222 break;
b782de16 5223 if (val == resolve_symbol_value (sy))
252b5132
RH		 5224 {
5225 fix->fx_addsy = sy;
5226 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5227 return 0;
5228 }
5229 }
5230
5231 as_bad_where (fix->fx_file, fix->fx_line,
5232 _("symbol in .toc does not match any .tc"));
5233 }
5234
5235 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5236 tc = symbol_get_tc (fix->fx_addsy);
5237 if (tc->subseg == 0
5238 && tc->class != XMC_TC0
5239 && tc->class != XMC_TC
5240 && symseg != bss_section
252b5132 5241 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5242 && (symseg != data_section
252b5132
RH		 5243 || ppc_toc_csect == NULL
5244 || val < ppc_toc_frag->fr_address
5245 || (ppc_after_toc_frag != NULL
5246 && val >= ppc_after_toc_frag->fr_address)))
5247 {
5248 symbolS *csect;
b782de16 5249 symbolS *next_csect;
252b5132 5250
b782de16 5251 if (symseg == text_section)
252b5132 5252 csect = ppc_text_csects;
b782de16 5253 else if (symseg == data_section)
252b5132
RH		 5254 csect = ppc_data_csects;
5255 else
5256 abort ();
5257
5258 /* Skip the initial dummy symbol. */
809ffe0d 5259 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5260
5261 if (csect != (symbolS *) NULL)
5262 {
b782de16
AM		 5263 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5264 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5265 {
5266 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5267 have to look through the full symbol table to see
5268 whether this is the csect we want. Note that we will
5269 only get here if the csect has zero length. */
b782de16
AM		 5270 if (symbol_get_frag (csect)->fr_address == val
5271 && S_GET_VALUE (csect) == val)
252b5132
RH		 5272 {
5273 symbolS *scan;
5274
809ffe0d 5275 for (scan = symbol_next (csect);
252b5132 5276 scan != NULL;
809ffe0d 5277 scan = symbol_next (scan))
252b5132 5278 {
809ffe0d 5279 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5280 break;
5281 if (scan == fix->fx_addsy)
5282 break;
5283 }
5284
5285 /* If we found the symbol before the next csect
99a814a1 5286 symbol, then this is the csect we want. */
252b5132
RH		 5287 if (scan == fix->fx_addsy)
5288 break;
5289 }
5290
b782de16 5291 csect = next_csect;
252b5132
RH		 5292 }
5293
b782de16 5294 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5295 fix->fx_addsy = csect;
5296 }
b782de16 5297 return 0;
252b5132
RH		 5298 }
5299
5300 /* Adjust a reloc against a .lcomm symbol to be against the base
5301 .lcomm. */
b782de16 5302 if (symseg == bss_section
252b5132
RH		 5303 && ! S_IS_EXTERNAL (fix->fx_addsy))
5304 {
b782de16
AM		 5305 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5306
5307 fix->fx_offset += val - resolve_symbol_value (sy);
5308 fix->fx_addsy = sy;
252b5132
RH		 5309 }
5310
5311 return 0;
5312}
5313
5314/* A reloc from one csect to another must be kept. The assembler
5315 will, of course, keep relocs between sections, and it will keep
5316 absolute relocs, but we need to force it to keep PC relative relocs
5317 between two csects in the same section. */
5318
5319int
5320ppc_force_relocation (fix)
5321 fixS *fix;
5322{
5323 /* At this point fix->fx_addsy should already have been converted to
5324 a csect symbol. If the csect does not include the fragment, then
5325 we need to force the relocation. */
5326 if (fix->fx_pcrel
5327 && fix->fx_addsy != NULL
809ffe0d
ILT		 5328 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5329 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5330 > fix->fx_frag->fr_address)
5331 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5332 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5333 <= fix->fx_frag->fr_address))))
5334 return 1;
5335
ae6063d4 5336 return generic_force_reloc (fix);
252b5132
RH		 5337}
5338
5339#endif /* OBJ_XCOFF */
5340
0baf16f2 5341#ifdef OBJ_ELF
a161fe53
AM		 5342/* If this function returns non-zero, it guarantees that a relocation
5343 will be emitted for a fixup. */
5344
5345int
5346ppc_force_relocation (fix)
5347 fixS *fix;
5348{
5349 /* Branch prediction relocations must force a relocation, as must
5350 the vtable description relocs. */
5351 switch (fix->fx_r_type)
5352 {
5353 case BFD_RELOC_PPC_B16_BRTAKEN:
5354 case BFD_RELOC_PPC_B16_BRNTAKEN:
5355 case BFD_RELOC_PPC_BA16_BRTAKEN:
5356 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5357 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5358 return 1;
5359 default:
5360 break;
5361 }
5362
cdba85ec
AM		 5363 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5364 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5365 return 1;
5366
ae6063d4 5367 return generic_force_reloc (fix);
a161fe53
AM		 5368}
5369
0baf16f2
AM		 5370int
5371ppc_fix_adjustable (fix)
5372 fixS *fix;
252b5132 5373{
0baf16f2
AM		 5374 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5375 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5376 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5377 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5378 && fix->fx_r_type != BFD_RELOC_GPREL16
5379 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5380 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5381 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5382 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5383 && (fix->fx_pcrel
5384 || (fix->fx_subsy != NULL
5385 && (S_GET_SEGMENT (fix->fx_subsy)
5386 == S_GET_SEGMENT (fix->fx_addsy)))
5387 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5388}
0baf16f2 5389#endif
252b5132
RH		 5390
5391/* Apply a fixup to the object code. This is called for all the
5392 fixups we generated by the call to fix_new_exp, above. In the call
5393 above we used a reloc code which was the largest legal reloc code
5394 plus the operand index. Here we undo that to recover the operand
5395 index. At this point all symbol values should be fully resolved,
5396 and we attempt to completely resolve the reloc. If we can not do
5397 that, we determine the correct reloc code and put it back in the
5398 fixup. */
5399
94f592af
NC		 5400void
5401md_apply_fix3 (fixP, valP, seg)
5402 fixS *fixP;
5403 valueT * valP;
0baf16f2 5404 segT seg ATTRIBUTE_UNUSED;
252b5132 5405{
94f592af 5406 valueT value = * valP;
252b5132
RH		 5407
5408#ifdef OBJ_ELF
94f592af 5409 if (fixP->fx_addsy != NULL)
252b5132 5410 {
a161fe53 5411 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5412 if (fixP->fx_pcrel)
5413 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5414 }
5415 else
94f592af 5416 fixP->fx_done = 1;
252b5132 5417#else
a161fe53 5418 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5419 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5420 doing this relocation the code in write.c is going to call
5421 bfd_install_relocation, which is also going to use the symbol
5422 value. That means that if the reloc is fully resolved we want to
a161fe53 5423 use *valP since bfd_install_relocation is not being used.
252b5132 5424 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5425 *valP, and must use fx_offset instead. However, if the reloc
5426 is PC relative, we do want to use *valP since it includes the
252b5132 5427 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5428 if (fixP->fx_addsy == (symbolS *) NULL)
5429 fixP->fx_done = 1;
5430
5431 else if (fixP->fx_pcrel)
5432 ;
5433
252b5132 5434 else
a161fe53
AM		 5435 value = fixP->fx_offset;
5436#endif
5437
5438 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5439 {
a161fe53
AM		 5440 /* We can't actually support subtracting a symbol. */
5441 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5442 }
252b5132 5443
94f592af 5444 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5445 {
5446 int opindex;
5447 const struct powerpc_operand *operand;
5448 char *where;
5449 unsigned long insn;
5450
94f592af 5451 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5452
5453 operand = &powerpc_operands[opindex];
5454
5455#ifdef OBJ_XCOFF
0baf16f2
AM		 5456 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5457 does not generate a reloc. It uses the offset of `sym' within its
5458 csect. Other usages, such as `.long sym', generate relocs. This
5459 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5460 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5461 && operand->bits == 16
5462 && operand->shift == 0
2b3c4602 5463 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5464 && fixP->fx_addsy != NULL
5465 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5466 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5467 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5468 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5469 {
94f592af
NC		 5470 value = fixP->fx_offset;
5471 fixP->fx_done = 1;
252b5132
RH		 5472 }
5473#endif
5474
5475 /* Fetch the instruction, insert the fully resolved operand
5476 value, and stuff the instruction back again. */
94f592af 5477 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5478 if (target_big_endian)
5479 insn = bfd_getb32 ((unsigned char *) where);
5480 else
5481 insn = bfd_getl32 ((unsigned char *) where);
5482 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5483 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5484 if (target_big_endian)
5485 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5486 else
5487 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5488
94f592af
NC		 5489 if (fixP->fx_done)
5490 /* Nothing else to do here. */
5491 return;
252b5132 5492
94f592af 5493 assert (fixP->fx_addsy != NULL);
0baf16f2 5494
252b5132
RH		 5495 /* Determine a BFD reloc value based on the operand information.
5496 We are only prepared to turn a few of the operands into
0baf16f2 5497 relocs. */
11b37b7b
AM		 5498 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5499 && operand->bits == 26
5500 && operand->shift == 0)
94f592af 5501 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5502 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5503 && operand->bits == 16
5504 && operand->shift == 0)
95210096
AM		 5505 {
5506 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5507#ifdef OBJ_XCOFF
5508 fixP->fx_size = 2;
5509 if (target_big_endian)
5510 fixP->fx_where += 2;
5511#endif
5512 }
11b37b7b
AM		 5513 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5514 && operand->bits == 26
5515 && operand->shift == 0)
94f592af 5516 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5517 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5518 && operand->bits == 16
5519 && operand->shift == 0)
95210096
AM		 5520 {
5521 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5522#ifdef OBJ_XCOFF
5523 fixP->fx_size = 2;
5524 if (target_big_endian)
5525 fixP->fx_where += 2;
5526#endif
5527 }
0baf16f2 5528#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5529 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5530 && operand->bits == 16
a7fc733f 5531 && operand->shift == 0)
11b37b7b 5532 {
a7fc733f
AM		 5533 if (ppc_is_toc_sym (fixP->fx_addsy))
5534 {
5535 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5536#ifdef OBJ_ELF
a7fc733f
AM		 5537 if (ppc_obj64
5538 && (operand->flags & PPC_OPERAND_DS) != 0)
5539 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5540#endif
5541 }
5542 else
5543 {
5544 fixP->fx_r_type = BFD_RELOC_16;
5545#ifdef OBJ_ELF
5546 if (ppc_obj64
5547 && (operand->flags & PPC_OPERAND_DS) != 0)
5548 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5549#endif
a7fc733f 5550 }
94f592af 5551 fixP->fx_size = 2;
11b37b7b 5552 if (target_big_endian)
94f592af 5553 fixP->fx_where += 2;
11b37b7b 5554 }
0baf16f2 5555#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5556 else
252b5132
RH		 5557 {
5558 char *sfile;
5559 unsigned int sline;
5560
5561 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5562 symbol. */
94f592af
NC		 5563 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5564 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5565 _("unresolved expression that must be resolved"));
5566 else
94f592af 5567 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5568 _("unsupported relocation against %s"),
94f592af
NC		 5569 S_GET_NAME (fixP->fx_addsy));
5570 fixP->fx_done = 1;
5571 return;
252b5132
RH		 5572 }
5573 }
5574 else
5575 {
5576#ifdef OBJ_ELF
94f592af 5577 ppc_elf_validate_fix (fixP, seg);
252b5132 5578#endif
94f592af 5579 switch (fixP->fx_r_type)
252b5132 5580 {
252b5132 5581 case BFD_RELOC_CTOR:
2b3c4602 5582 if (ppc_obj64)
9c7977b3
AM		 5583 goto ctor64;
5584 /* fall through */
5585
0baf16f2 5586 case BFD_RELOC_32:
94f592af
NC		 5587 if (fixP->fx_pcrel)
5588 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5589 /* fall through */
252b5132
RH		 5590
5591 case BFD_RELOC_RVA:
5592 case BFD_RELOC_32_PCREL:
252b5132 5593 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5594 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5595 value, 4);
5596 break;
5597
7f6d05e8 5598 case BFD_RELOC_64:
9c7977b3 5599 ctor64:
94f592af
NC		 5600 if (fixP->fx_pcrel)
5601 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5602 /* fall through */
0baf16f2 5603
7f6d05e8 5604 case BFD_RELOC_64_PCREL:
94f592af 5605 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5606 value, 8);
81d4177b 5607 break;
0baf16f2 5608
252b5132
RH		 5609 case BFD_RELOC_LO16:
5610 case BFD_RELOC_16:
5611 case BFD_RELOC_GPREL16:
5612 case BFD_RELOC_16_GOT_PCREL:
5613 case BFD_RELOC_16_GOTOFF:
5614 case BFD_RELOC_LO16_GOTOFF:
5615 case BFD_RELOC_HI16_GOTOFF:
5616 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5617 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5618 case BFD_RELOC_LO16_BASEREL:
5619 case BFD_RELOC_HI16_BASEREL:
5620 case BFD_RELOC_HI16_S_BASEREL:
5621 case BFD_RELOC_PPC_EMB_NADDR16:
5622 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5623 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5624 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5625 case BFD_RELOC_PPC_EMB_SDAI16:
5626 case BFD_RELOC_PPC_EMB_SDA2REL:
5627 case BFD_RELOC_PPC_EMB_SDA2I16:
5628 case BFD_RELOC_PPC_EMB_RELSEC16:
5629 case BFD_RELOC_PPC_EMB_RELST_LO:
5630 case BFD_RELOC_PPC_EMB_RELST_HI:
5631 case BFD_RELOC_PPC_EMB_RELST_HA:
5632 case BFD_RELOC_PPC_EMB_RELSDA:
5633 case BFD_RELOC_PPC_TOC16:
0baf16f2 5634#ifdef OBJ_ELF
0baf16f2
AM		 5635 case BFD_RELOC_PPC64_TOC16_LO:
5636 case BFD_RELOC_PPC64_TOC16_HI:
5637 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5638#endif
94f592af 5639 if (fixP->fx_pcrel)
252b5132 5640 {
94f592af
NC		 5641 if (fixP->fx_addsy != NULL)
5642 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5643 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5644 bfd_get_reloc_code_name (fixP->fx_r_type),
5645 S_GET_NAME (fixP->fx_addsy));
252b5132 5646 else
94f592af 5647 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5648 _("cannot emit PC relative %s relocation"),
94f592af 5649 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5650 }
5651
94f592af 5652 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5653 value, 2);
5654 break;
5655
5656 /* This case happens when you write, for example,
5657 lis %r3,(L1-L2)@ha
5658 where L1 and L2 are defined later. */
5659 case BFD_RELOC_HI16:
94f592af 5660 if (fixP->fx_pcrel)
252b5132 5661 abort ();
94f592af 5662 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5663 PPC_HI (value), 2);
252b5132 5664 break;
0baf16f2 5665
252b5132 5666 case BFD_RELOC_HI16_S:
94f592af 5667 if (fixP->fx_pcrel)
252b5132 5668 abort ();
94f592af 5669 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5670 PPC_HA (value), 2);
5671 break;
5672
5673#ifdef OBJ_ELF
0baf16f2 5674 case BFD_RELOC_PPC64_HIGHER:
94f592af 5675 if (fixP->fx_pcrel)
0baf16f2 5676 abort ();
94f592af 5677 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5678 PPC_HIGHER (value), 2);
252b5132
RH		 5679 break;
5680
0baf16f2 5681 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5682 if (fixP->fx_pcrel)
0baf16f2 5683 abort ();
94f592af 5684 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5685 PPC_HIGHERA (value), 2);
5686 break;
5687
5688 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5689 if (fixP->fx_pcrel)
0baf16f2 5690 abort ();
94f592af 5691 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5692 PPC_HIGHEST (value), 2);
5693 break;
5694
5695 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5696 if (fixP->fx_pcrel)
0baf16f2 5697 abort ();
94f592af 5698 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5699 PPC_HIGHESTA (value), 2);
5700 break;
5701
5702 case BFD_RELOC_PPC64_ADDR16_DS:
5703 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5704 case BFD_RELOC_PPC64_GOT16_DS:
5705 case BFD_RELOC_PPC64_GOT16_LO_DS:
5706 case BFD_RELOC_PPC64_PLT16_LO_DS:
5707 case BFD_RELOC_PPC64_SECTOFF_DS:
5708 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5709 case BFD_RELOC_PPC64_TOC16_DS:
5710 case BFD_RELOC_PPC64_TOC16_LO_DS:
5711 case BFD_RELOC_PPC64_PLTGOT16_DS:
5712 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5713 if (fixP->fx_pcrel)
0baf16f2
AM		 5714 abort ();
5715 {
94f592af 5716 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
adadcc0c 5717 long val, mask;
0baf16f2
AM		 5718
5719 if (target_big_endian)
adadcc0c 5720 val = bfd_getb32 (where - 2);
0baf16f2 5721 else
adadcc0c
AM		 5722 val = bfd_getl32 (where);
5723 mask = 0xfffc;
5724 /* lq insns reserve the four lsbs. */
5725 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
5726 && (val & (0x3f << 26)) == (56 << 26))
5727 mask = 0xfff0;
5728 val |= value & mask;
0baf16f2
AM		 5729 if (target_big_endian)
5730 bfd_putb16 ((bfd_vma) val, where);
5731 else
5732 bfd_putl16 ((bfd_vma) val, where);
5733 }
5734 break;
cdba85ec
AM		 5735
5736 case BFD_RELOC_PPC_TLS:
5737 case BFD_RELOC_PPC_DTPMOD:
5738 case BFD_RELOC_PPC_TPREL16:
5739 case BFD_RELOC_PPC_TPREL16_LO:
5740 case BFD_RELOC_PPC_TPREL16_HI:
5741 case BFD_RELOC_PPC_TPREL16_HA:
5742 case BFD_RELOC_PPC_TPREL:
5743 case BFD_RELOC_PPC_DTPREL16:
5744 case BFD_RELOC_PPC_DTPREL16_LO:
5745 case BFD_RELOC_PPC_DTPREL16_HI:
5746 case BFD_RELOC_PPC_DTPREL16_HA:
5747 case BFD_RELOC_PPC_DTPREL:
5748 case BFD_RELOC_PPC_GOT_TLSGD16:
5749 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5750 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5751 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5752 case BFD_RELOC_PPC_GOT_TLSLD16:
5753 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5754 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5755 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5756 case BFD_RELOC_PPC_GOT_TPREL16:
5757 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5758 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5759 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5760 case BFD_RELOC_PPC_GOT_DTPREL16:
5761 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5762 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5763 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5764 case BFD_RELOC_PPC64_TPREL16_DS:
5765 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5766 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5767 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5768 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5769 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5770 case BFD_RELOC_PPC64_DTPREL16_DS:
5771 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5772 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5773 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5774 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5775 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5776 break;
0baf16f2 5777#endif
252b5132 5778 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5779 bytes, rather than 2, so offset it here appropriately. */
252b5132 5780 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5781 if (fixP->fx_pcrel)
252b5132
RH		 5782 abort ();
5783
94f592af 5784 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5785 + ((target_big_endian) ? 2 : 0),
5786 value, 2);
5787 break;
5788
5789 case BFD_RELOC_8:
94f592af 5790 if (fixP->fx_pcrel)
252b5132
RH		 5791 abort ();
5792
94f592af 5793 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5794 value, 1);
5795 break;
5796
5797 case BFD_RELOC_24_PLT_PCREL:
5798 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5799 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5800 abort ();
5801
94f592af 5802 if (fixP->fx_done)
99a814a1
AM		 5803 {
5804 char *where;
5805 unsigned long insn;
5806
5807 /* Fetch the instruction, insert the fully resolved operand
5808 value, and stuff the instruction back again. */
94f592af 5809 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5810 if (target_big_endian)
5811 insn = bfd_getb32 ((unsigned char *) where);
5812 else
5813 insn = bfd_getl32 ((unsigned char *) where);
5814 if ((value & 3) != 0)
94f592af 5815 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5816 _("must branch to an address a multiple of 4"));
5817 if ((offsetT) value < -0x40000000
5818 || (offsetT) value >= 0x40000000)
94f592af 5819 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5820 _("@local or @plt branch destination is too far away, %ld bytes"),
5821 (long) value);
5822 insn = insn | (value & 0x03fffffc);
5823 if (target_big_endian)
5824 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5825 else
5826 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5827 }
252b5132
RH		 5828 break;
5829
5830 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5831 fixP->fx_done = 0;
5832 if (fixP->fx_addsy
5833 && !S_IS_DEFINED (fixP->fx_addsy)
5834 && !S_IS_WEAK (fixP->fx_addsy))
5835 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5836 break;
5837
5838 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5839 fixP->fx_done = 0;
252b5132
RH		 5840 break;
5841
0baf16f2 5842#ifdef OBJ_ELF
0baf16f2
AM		 5843 /* Generated by reference to `sym@tocbase'. The sym is
5844 ignored by the linker. */
5845 case BFD_RELOC_PPC64_TOC:
94f592af 5846 fixP->fx_done = 0;
0baf16f2 5847 break;
0baf16f2 5848#endif
252b5132 5849 default:
bc805888 5850 fprintf (stderr,
94f592af 5851 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5852 fflush (stderr);
252b5132
RH		 5853 abort ();
5854 }
5855 }
5856
5857#ifdef OBJ_ELF
94f592af 5858 fixP->fx_addnumber = value;
252b5132 5859#else
94f592af
NC		 5860 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5861 fixP->fx_addnumber = 0;
252b5132
RH		 5862 else
5863 {
5864#ifdef TE_PE
94f592af 5865 fixP->fx_addnumber = 0;
252b5132
RH		 5866#else
5867 /* We want to use the offset within the data segment of the
5868 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5869 fixP->fx_addnumber =
5870 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5871#endif
5872 }
5873#endif
252b5132
RH		 5874}
5875
5876/* Generate a reloc for a fixup. */
5877
5878arelent *
5879tc_gen_reloc (seg, fixp)
92161534 5880 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5881 fixS *fixp;
5882{
5883 arelent *reloc;
5884
5885 reloc = (arelent *) xmalloc (sizeof (arelent));
5886
49309057
ILT		 5887 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5888 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5889 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5890 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5891 if (reloc->howto == (reloc_howto_type *) NULL)
5892 {
5893 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 5894 _("reloc %d not supported by object file format"),
5895 (int) fixp->fx_r_type);
252b5132
RH		 5896 return NULL;
5897 }
5898 reloc->addend = fixp->fx_addnumber;
5899
5900 return reloc;
5901}
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