]> Git Repo - binutils.git/blame - gas/ChangeLog
include/opcode/
[binutils.git] / gas / ChangeLog
CommitLineData
9622b051
AM
12006-06-06 Ben Elliston <[email protected]>
2 Anton Blanchard <[email protected]>
3
4 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
5 (md_show_usage): Document it.
6 (ppc_setup_opcodes): Test power6 opcode flag bits.
7 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
8
65263ce3
TS
92006-06-06 Thiemo Seufer <[email protected]>
10 Chao-ying Fu <[email protected]>
11
12 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
13 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
14 (macro_build): Update comment.
15 (mips_ip): Allow DSP64 instructions for MIPS64R2.
16 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
17 CPU_HAS_MDMX.
18 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
19 MIPS_CPU_ASE_MDMX flags for sb1.
20
a9e24354
TS
212006-06-05 Thiemo Seufer <[email protected]>
22
23 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
24 appropriate.
25 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
26 (mips_ip): Make overflowed/underflowed constant arguments in DSP
27 and MT instructions a fatal error. Use INSERT_OPERAND where
28 appropriate. Improve warnings for break and wait code overflows.
29 Use symbolic constant of OP_MASK_COPZ.
30 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
31
4cfe2c59
DJ
322006-06-05 Daniel Jacobowitz <[email protected]>
33
34 * po/Make-in (top_builddir): Define.
35
e10fad12
JM
362006-06-02 Joseph S. Myers <[email protected]>
37
38 * doc/Makefile.am (TEXI2DVI): Define.
39 * doc/Makefile.in: Regenerate.
40 * doc/c-arc.texi: Fix typo.
41
12e64c2c
AM
422006-06-01 Alan Modra <[email protected]>
43
44 * config/obj-ieee.c: Delete.
45 * config/obj-ieee.h: Delete.
46 * Makefile.am (OBJ_FORMATS): Remove ieee.
47 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
48 (obj-ieee.o): Remove rule.
49 * Makefile.in: Regenerate.
50 * configure.in (atof): Remove tahoe.
51 (OBJ_MAYBE_IEEE): Don't define.
52 * configure: Regenerate.
53 * config.in: Regenerate.
54 * doc/Makefile.in: Regenerate.
55 * po/POTFILES.in: Regenerate.
56
20e95c23
DJ
572006-05-31 Daniel Jacobowitz <[email protected]>
58
59 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
60 and LIBINTL_DEP everywhere.
61 (INTLLIBS): Remove.
62 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
63 * acinclude.m4: Include new gettext macros.
64 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
65 Remove local code for po/Makefile.
66 * Makefile.in, configure, doc/Makefile.in: Regenerated.
67
eebf07fb
NC
682006-05-30 Nick Clifton <[email protected]>
69
70 * po/es.po: Updated Spanish translation.
71
b6aee19e
DC
722006-05-06 Denis Chertykov <[email protected]>
73
74 * doc/c-avr.texi: New file.
75 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
76 * doc/all.texi: Set AVR
77 * doc/as.texinfo: Include c-avr.texi
78
f8fdc850
JZ
792006-05-28 Jie Zhang <[email protected]>
80
81 * config/bfin-parse.y (check_macfunc): Loose the condition of
82 calling check_multiply_halfregs ().
83
a3205465
JZ
842006-05-25 Jie Zhang <[email protected]>
85
86 * config/bfin-parse.y (asm_1): Better check and deal with
87 vector and scalar Multiply 16-Bit Operands instructions.
88
9b52905e
NC
892006-05-24 Nick Clifton <[email protected]>
90
91 * config/tc-hppa.c: Convert to ISO C90 format.
92 * config/tc-hppa.h: Likewise.
93
942006-05-24 Carlos O'Donell <[email protected]>
95 Randolph Chung <[email protected]>
96
97 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
98 is_tls_ieoff, is_tls_leoff): Define.
99 (fix_new_hppa): Handle TLS.
100 (cons_fix_new_hppa): Likewise.
101 (pa_ip): Likewise.
102 (md_apply_fix): Handle TLS relocs.
103 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
104
28c9d252
NC
1052006-05-24 Bjoern Haase <[email protected]>
106
107 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
108
ad3fea08
TS
1092006-05-23 Thiemo Seufer <[email protected]>
110 David Ung <[email protected]>
111 Nigel Stephens <[email protected]>
112
113 [ gas/ChangeLog ]
114 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
115 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
116 ISA_HAS_MXHC1): New macros.
117 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
118 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
119 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
120 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
121 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
122 (mips_after_parse_args): Change default handling of float register
123 size to account for 32bit code with 64bit FP. Better sanity checking
124 of ISA/ASE/ABI option combinations.
125 (s_mipsset): Support switching of GPR and FPR sizes via
126 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
127 options.
128 (mips_elf_final_processing): We should record the use of 64bit FP
129 registers in 32bit code but we don't, because ELF header flags are
130 a scarce ressource.
131 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
132 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
133 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
134 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
135 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
136 missing -march options. Document .set arch=CPU. Move .set smartmips
137 to ASE page. Use @code for .set FOO examples.
138
8b64503a
JZ
1392006-05-23 Jie Zhang <[email protected]>
140
141 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
142 if needed.
143
403022e0
JZ
1442006-05-23 Jie Zhang <[email protected]>
145
146 * config/bfin-defs.h (bfin_equals): Remove declaration.
147 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
148 * config/tc-bfin.c (bfin_name_is_register): Remove.
149 (bfin_equals): Remove.
150 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
151 (bfin_name_is_register): Remove declaration.
152
7455baf8
TS
1532006-05-19 Thiemo Seufer <[email protected]>
154 Nigel Stephens <[email protected]>
155
156 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
157 (mips_oddfpreg_ok): New function.
158 (mips_ip): Use it.
159
707bfff6
TS
1602006-05-19 Thiemo Seufer <[email protected]>
161 David Ung <[email protected]>
162
163 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
164 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
165 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
166 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
167 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
168 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
169 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
170 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
171 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
172 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
173 reg_names_o32, reg_names_n32n64): Define register classes.
174 (reg_lookup): New function, use register classes.
175 (md_begin): Reserve register names in the symbol table. Simplify
176 OBJ_ELF defines.
177 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
178 Use reg_lookup.
179 (mips16_ip): Use reg_lookup.
180 (tc_get_register): Likewise.
181 (tc_mips_regname_to_dw2regnum): New function.
182
1df69f4f
TS
1832006-05-19 Thiemo Seufer <[email protected]>
184
185 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
186 Un-constify string argument.
187 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
188 Likewise.
189 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
190 Likewise.
191 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
192 Likewise.
193 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
194 Likewise.
195 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
196 Likewise.
197 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
198 Likewise.
199
377260ba
NS
2002006-05-19 Nathan Sidwell <[email protected]>
201
202 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
203 cfloat/m68881 to correct architecture before using it.
204
cce7653b
NC
2052006-05-16 Bjoern Haase <[email protected]>
206
207 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
208 constant values.
209
b0796911
PB
2102006-05-15 Paul Brook <[email protected]>
211
212 * config/tc-arm.c (arm_adjust_symtab): Use
213 bfd_is_arm_special_symbol_name.
214
64b607e6
BW
2152006-05-15 Bob Wilson <[email protected]>
216
217 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
218 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
219 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
220 Handle errors from calls to xtensa_opcode_is_* functions.
221
9b3f89ee
TS
2222006-05-14 Thiemo Seufer <[email protected]>
223
224 * config/tc-mips.c (macro_build): Test for currently active
225 mips16 option.
226 (mips16_ip): Reject invalid opcodes.
227
370b66a1
CD
2282006-05-11 Carlos O'Donell <[email protected]>
229
230 * doc/as.texinfo: Rename "Index" to "AS Index",
231 and "ABORT" to "ABORT (COFF)".
232
b6895b4f
PB
2332006-05-11 Paul Brook <[email protected]>
234
235 * config/tc-arm.c (parse_half): New function.
236 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
237 (parse_operands): Ditto.
238 (do_mov16): Reject invalid relocations.
239 (do_t_mov16): Ditto. Use Thumb reloc numbers.
240 (insns): Replace Iffff with HALF.
241 (md_apply_fix): Add MOVW and MOVT relocs.
242 (tc_gen_reloc): Ditto.
243 * doc/c-arm.texi: Document relocation operators
244
e28387c3
PB
2452006-05-11 Paul Brook <[email protected]>
246
247 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
248
89ee2ebe
TS
2492006-05-11 Thiemo Seufer <[email protected]>
250
251 * config/tc-mips.c (append_insn): Don't check the range of j or
252 jal addresses.
253
53baae48
NC
2542006-05-11 Pedro Alves <[email protected]>
255
256 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
257 relocs against external symbols for WinCE targets.
258 (md_apply_fix): Likewise.
259
4e2a74a8
TS
2602006-05-09 David Ung <[email protected]>
261
262 * config/tc-mips.c (append_insn): Only warn about an out-of-range
263 j or jal address.
264
337ff0a5
NC
2652006-05-09 Nick Clifton <[email protected]>
266
267 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
268 against symbols which are not going to be placed into the symbol
269 table.
270
8c9f705e
BE
2712006-05-09 Ben Elliston <[email protected]>
272
273 * expr.c (operand): Remove `if (0 && ..)' statement and
274 subsequently unused target_op label. Collapse `if (1 || ..)'
275 statement.
276 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
277 separately above the switch.
278
2fd0d2ac
NC
2792006-05-08 Nick Clifton <[email protected]>
280
281 PR gas/2623
282 * config/tc-msp430.c (line_separator_character): Define as |.
283
e16bfa71
TS
2842006-05-08 Thiemo Seufer <[email protected]>
285 Nigel Stephens <[email protected]>
286 David Ung <[email protected]>
287
288 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
289 (mips_opts): Likewise.
290 (file_ase_smartmips): New variable.
291 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
292 (macro_build): Handle SmartMIPS instructions.
293 (mips_ip): Likewise.
294 (md_longopts): Add argument handling for smartmips.
295 (md_parse_options, mips_after_parse_args): Likewise.
296 (s_mipsset): Add .set smartmips support.
297 (md_show_usage): Document -msmartmips/-mno-smartmips.
298 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
299 .set smartmips.
300 * doc/c-mips.texi: Likewise.
301
32638454
AM
3022006-05-08 Alan Modra <[email protected]>
303
304 * write.c (relax_segment): Add pass count arg. Don't error on
305 negative org/space on first two passes.
306 (relax_seg_info): New struct.
307 (relax_seg, write_object_file): Adjust.
308 * write.h (relax_segment): Update prototype.
309
b7fc2769
JB
3102006-05-05 Julian Brown <[email protected]>
311
312 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
313 checking.
314 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
315 architecture version checks.
316 (insns): Allow overlapping instructions to be used in VFP mode.
317
7f841127
L
3182006-05-05 H.J. Lu <[email protected]>
319
320 PR gas/2598
321 * config/obj-elf.c (obj_elf_change_section): Allow user
322 specified SHF_ALPHA_GPREL.
323
73160847
NC
3242006-05-05 Bjoern Haase <[email protected]>
325
326 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
327 for PMEM related expressions.
328
56487c55
NC
3292006-05-05 Nick Clifton <[email protected]>
330
331 PR gas/2582
332 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
333 insertion of a directory separator character into a string at a
334 given offset. Uses heuristics to decide when to use a backslash
335 character rather than a forward-slash character.
336 (dwarf2_directive_loc): Use the macro.
337 (out_debug_info): Likewise.
338
d43b4baf
TS
3392006-05-05 Thiemo Seufer <[email protected]>
340 David Ung <[email protected]>
341
342 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
343 instruction.
344 (macro): Add new case M_CACHE_AB.
345
088fa78e
KH
3462006-05-04 Kazu Hirata <[email protected]>
347
348 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
349 (opcode_lookup): Issue a warning for opcode with
350 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
351 identical to OT_cinfix3.
352 (TxC3w, TC3w, tC3w): New.
353 (insns): Use tC3w and TC3w for comparison instructions with
354 's' suffix.
355
c9049d30
AM
3562006-05-04 Alan Modra <[email protected]>
357
358 * subsegs.h (struct frchain): Delete frch_seg.
359 (frchain_root): Delete.
360 (seg_info): Define as macro.
361 * subsegs.c (frchain_root): Delete.
362 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
363 (subsegs_begin, subseg_change): Adjust for above.
364 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
365 rather than to one big list.
366 (subseg_get): Don't special case abs, und sections.
367 (subseg_new, subseg_force_new): Don't set frchainP here.
368 (seg_info): Delete.
369 (subsegs_print_statistics): Adjust frag chain control list traversal.
370 * debug.c (dmp_frags): Likewise.
371 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
372 at frchain_root. Make use of known frchain ordering.
373 (last_frag_for_seg): Likewise.
374 (get_frag_fix): Likewise. Add seg param.
375 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
376 * write.c (chain_frchains_together_1): Adjust for struct frchain.
377 (SUB_SEGMENT_ALIGN): Likewise.
378 (subsegs_finish): Adjust frchain list traversal.
379 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
380 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
381 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
382 (xtensa_fix_b_j_loop_end_frags): Likewise.
383 (xtensa_fix_close_loop_end_frags): Likewise.
384 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
385 (retrieve_segment_info): Delete frch_seg initialisation.
386
f592407e
AM
3872006-05-03 Alan Modra <[email protected]>
388
389 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
390 * config/obj-elf.h (obj_sec_set_private_data): Delete.
391 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
392 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
393
df7849c5
JM
3942006-05-02 Joseph Myers <[email protected]>
395
396 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
397 here.
398 (md_apply_fix3): Multiply offset by 4 here for
399 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
400
2d545b82
L
4012006-05-02 H.J. Lu <[email protected]>
402 Jan Beulich <[email protected]>
403
404 * config/tc-i386.c (output_invalid_buf): Change size for
405 unsigned char.
406 * config/tc-tic30.c (output_invalid_buf): Likewise.
407
408 * config/tc-i386.c (output_invalid): Cast none-ascii char to
409 unsigned char.
410 * config/tc-tic30.c (output_invalid): Likewise.
411
38fc1cb1
DJ
4122006-05-02 Daniel Jacobowitz <[email protected]>
413
414 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
415 (TEXI2POD): Use AM_MAKEINFOFLAGS.
416 (asconfig.texi): Don't set top_srcdir.
417 * doc/as.texinfo: Don't use top_srcdir.
418 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
419
2d545b82
L
4202006-05-02 H.J. Lu <[email protected]>
421
422 * config/tc-i386.c (output_invalid_buf): Change size to 16.
423 * config/tc-tic30.c (output_invalid_buf): Likewise.
424
425 * config/tc-i386.c (output_invalid): Use snprintf instead of
426 sprintf.
427 * config/tc-ia64.c (declare_register_set): Likewise.
428 (emit_one_bundle): Likewise.
429 (check_dependencies): Likewise.
430 * config/tc-tic30.c (output_invalid): Likewise.
431
a8bc6c78
PB
4322006-05-02 Paul Brook <[email protected]>
433
434 * config/tc-arm.c (arm_optimize_expr): New function.
435 * config/tc-arm.h (md_optimize_expr): Define
436 (arm_optimize_expr): Add prototype.
437 (TC_FORCE_RELOCATION_SUB_SAME): Define.
438
58633d9a
BE
4392006-05-02 Ben Elliston <[email protected]>
440
22772e33
BE
441 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
442 field unsigned.
443
58633d9a
BE
444 * sb.h (sb_list_vector): Move to sb.c.
445 * sb.c (free_list): Use type of sb_list_vector directly.
446 (sb_build): Fix off-by-one error in assertion about `size'.
447
89cdfe57
BE
4482006-05-01 Ben Elliston <[email protected]>
449
450 * listing.c (listing_listing): Remove useless loop.
451 * macro.c (macro_expand): Remove is_positional local variable.
452 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
453 and simplify surrounding expressions, where possible.
454 (assign_symbol): Likewise.
455 (s_weakref): Likewise.
456 * symbols.c (colon): Likewise.
457
c35da140
AM
4582006-05-01 James Lemke <[email protected]>
459
460 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
461
9bcd4f99
TS
4622006-04-30 Thiemo Seufer <[email protected]>
463 David Ung <[email protected]>
464
465 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
466 (mips_immed): New table that records various handling of udi
467 instruction patterns.
468 (mips_ip): Adds udi handling.
469
001ae1a4
AM
4702006-04-28 Alan Modra <[email protected]>
471
472 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
473 of list rather than beginning.
474
136da414
JB
4752006-04-26 Julian Brown <[email protected]>
476
477 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
478 (is_quarter_float): Rename from above. Simplify slightly.
479 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
480 number.
481 (parse_neon_mov): Parse floating-point constants.
482 (neon_qfloat_bits): Fix encoding.
483 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
484 preference to integer encoding when using the F32 type.
485
dcbf9037
JB
4862006-04-26 Julian Brown <[email protected]>
487
488 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
489 zero-initialising structures containing it will lead to invalid types).
490 (arm_it): Add vectype to each operand.
491 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
492 defined field.
493 (neon_typed_alias): New structure. Extra information for typed
494 register aliases.
495 (reg_entry): Add neon type info field.
496 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
497 Break out alternative syntax for coprocessor registers, etc. into...
498 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
499 out from arm_reg_parse.
500 (parse_neon_type): Move. Return SUCCESS/FAIL.
501 (first_error): New function. Call to ensure first error which occurs is
502 reported.
503 (parse_neon_operand_type): Parse exactly one type.
504 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
505 (parse_typed_reg_or_scalar): New function. Handle core of both
506 arm_typed_reg_parse and parse_scalar.
507 (arm_typed_reg_parse): Parse a register with an optional type.
508 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
509 result.
510 (parse_scalar): Parse a Neon scalar with optional type.
511 (parse_reg_list): Use first_error.
512 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
513 (neon_alias_types_same): New function. Return true if two (alias) types
514 are the same.
515 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
516 of elements.
517 (insert_reg_alias): Return new reg_entry not void.
518 (insert_neon_reg_alias): New function. Insert type/index information as
519 well as register for alias.
520 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
521 make typed register aliases accordingly.
522 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
523 of line.
524 (s_unreq): Delete type information if present.
525 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
526 (s_arm_unwind_save_mmxwcg): Likewise.
527 (s_arm_unwind_movsp): Likewise.
528 (s_arm_unwind_setfp): Likewise.
529 (parse_shift): Likewise.
530 (parse_shifter_operand): Likewise.
531 (parse_address): Likewise.
532 (parse_tb): Likewise.
533 (tc_arm_regname_to_dw2regnum): Likewise.
534 (md_pseudo_table): Add dn, qn.
535 (parse_neon_mov): Handle typed operands.
536 (parse_operands): Likewise.
537 (neon_type_mask): Add N_SIZ.
538 (N_ALLMODS): New macro.
539 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
540 (el_type_of_type_chk): Add some safeguards.
541 (modify_types_allowed): Fix logic bug.
542 (neon_check_type): Handle operands with types.
543 (neon_three_same): Remove redundant optional arg handling.
544 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
545 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
546 (do_neon_step): Adjust accordingly.
547 (neon_cmode_for_logic_imm): Use first_error.
548 (do_neon_bitfield): Call neon_check_type.
549 (neon_dyadic): Rename to...
550 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
551 to allow modification of type of the destination.
552 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
553 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
554 (do_neon_compare): Make destination be an untyped bitfield.
555 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
556 (neon_mul_mac): Return early in case of errors.
557 (neon_move_immediate): Use first_error.
558 (neon_mac_reg_scalar_long): Fix type to include scalar.
559 (do_neon_dup): Likewise.
560 (do_neon_mov): Likewise (in several places).
561 (do_neon_tbl_tbx): Fix type.
562 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
563 (do_neon_ld_dup): Exit early in case of errors and/or use
564 first_error.
565 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
566 Handle .dn/.qn directives.
567 (REGDEF): Add zero for reg_entry neon field.
568
5287ad62
JB
5692006-04-26 Julian Brown <[email protected]>
570
571 * config/tc-arm.c (limits.h): Include.
572 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
573 (fpu_vfp_v3_or_neon_ext): Declare constants.
574 (neon_el_type): New enumeration of types for Neon vector elements.
575 (neon_type_el): New struct. Define type and size of a vector element.
576 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
577 instruction.
578 (neon_type): Define struct. The type of an instruction.
579 (arm_it): Add 'vectype' for the current instruction.
580 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
581 (vfp_sp_reg_pos): Rename to...
582 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
583 tags.
584 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
585 (Neon D or Q register).
586 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
587 register.
588 (GE_OPT_PREFIX_BIG): Define constant, for use in...
589 (my_get_expression): Allow above constant as argument to accept
590 64-bit constants with optional prefix.
591 (arm_reg_parse): Add extra argument to return the specific type of
592 register in when either a D or Q register (REG_TYPE_NDQ) is
593 requested. Can be NULL.
594 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
595 (parse_reg_list): Update for new arm_reg_parse args.
596 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
597 (parse_neon_el_struct_list): New function. Parse element/structure
598 register lists for VLD<n>/VST<n> instructions.
599 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
600 (s_arm_unwind_save_mmxwr): Likewise.
601 (s_arm_unwind_save_mmxwcg): Likewise.
602 (s_arm_unwind_movsp): Likewise.
603 (s_arm_unwind_setfp): Likewise.
604 (parse_big_immediate): New function. Parse an immediate, which may be
605 64 bits wide. Put results in inst.operands[i].
606 (parse_shift): Update for new arm_reg_parse args.
607 (parse_address): Likewise. Add parsing of alignment specifiers.
608 (parse_neon_mov): Parse the operands of a VMOV instruction.
609 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
610 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
611 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
612 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
613 (parse_operands): Handle new codes above.
614 (encode_arm_vfp_sp_reg): Rename to...
615 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
616 selected VFP version only supports D0-D15.
617 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
618 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
619 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
620 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
621 encode_arm_vfp_reg name, and allow 32 D regs.
622 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
623 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
624 regs.
625 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
626 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
627 constant-load and conversion insns introduced with VFPv3.
628 (neon_tab_entry): New struct.
629 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
630 those which are the targets of pseudo-instructions.
631 (neon_opc): Enumerate opcodes, use as indices into...
632 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
633 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
634 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
635 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
636 neon_enc_tab.
637 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
638 Neon instructions.
639 (neon_type_mask): New. Compact type representation for type checking.
640 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
641 permitted type combinations.
642 (N_IGNORE_TYPE): New macro.
643 (neon_check_shape): New function. Check an instruction shape for
644 multiple alternatives. Return the specific shape for the current
645 instruction.
646 (neon_modify_type_size): New function. Modify a vector type and size,
647 depending on the bit mask in argument 1.
648 (neon_type_promote): New function. Convert a given "key" type (of an
649 operand) into the correct type for a different operand, based on a bit
650 mask.
651 (type_chk_of_el_type): New function. Convert a type and size into the
652 compact representation used for type checking.
653 (el_type_of_type_ckh): New function. Reverse of above (only when a
654 single bit is set in the bit mask).
655 (modify_types_allowed): New function. Alter a mask of allowed types
656 based on a bit mask of modifications.
657 (neon_check_type): New function. Check the type of the current
658 instruction against the variable argument list. The "key" type of the
659 instruction is returned.
660 (neon_dp_fixup): New function. Fill in and modify instruction bits for
661 a Neon data-processing instruction depending on whether we're in ARM
662 mode or Thumb-2 mode.
663 (neon_logbits): New function.
664 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
665 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
666 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
667 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
668 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
669 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
670 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
671 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
672 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
673 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
674 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
675 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
676 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
677 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
678 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
679 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
680 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
681 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
682 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
683 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
684 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
685 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
686 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
687 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
688 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
689 helpers.
690 (parse_neon_type): New function. Parse Neon type specifier.
691 (opcode_lookup): Allow parsing of Neon type specifiers.
692 (REGNUM2, REGSETH, REGSET2): New macros.
693 (reg_names): Add new VFPv3 and Neon registers.
694 (NUF, nUF, NCE, nCE): New macros for opcode table.
695 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
696 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
697 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
698 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
699 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
700 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
701 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
702 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
703 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
704 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
705 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
706 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
707 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
708 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
709 fto[us][lh][sd].
710 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
711 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
712 (arm_option_cpu_value): Add vfp3 and neon.
713 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
714 VFPv1 attribute.
715
1946c96e
BW
7162006-04-25 Bob Wilson <[email protected]>
717
718 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
719 syntax instead of hardcoded opcodes with ".w18" suffixes.
720 (wide_branch_opcode): New.
721 (build_transition): Use it to check for wide branch opcodes with
722 either ".w18" or ".w15" suffixes.
723
5033a645
BW
7242006-04-25 Bob Wilson <[email protected]>
725
726 * config/tc-xtensa.c (xtensa_create_literal_symbol,
727 xg_assemble_literal, xg_assemble_literal_space): Do not set the
728 frag's is_literal flag.
729
395fa56f
BW
7302006-04-25 Bob Wilson <[email protected]>
731
732 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
733
708587a4
KH
7342006-04-23 Kazu Hirata <[email protected]>
735
736 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
737 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
738 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
739 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
740 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
741
8463be01
PB
7422005-04-20 Paul Brook <[email protected]>
743
744 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
745 all targets.
746 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
747
f26a5955
AM
7482006-04-19 Alan Modra <[email protected]>
749
750 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
751 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
752 Make some cpus unsupported on ELF. Run "make dep-am".
753 * Makefile.in: Regenerate.
754
241a6c40
AM
7552006-04-19 Alan Modra <[email protected]>
756
757 * configure.in (--enable-targets): Indent help message.
758 * configure: Regenerate.
759
bb8f5920
L
7602006-04-18 H.J. Lu <[email protected]>
761
762 PR gas/2533
763 * config/tc-i386.c (i386_immediate): Check illegal immediate
764 register operand.
765
23d9d9de
AM
7662006-04-18 Alan Modra <[email protected]>
767
64e74474
AM
768 * config/tc-i386.c: Formatting.
769 (output_disp, output_imm): ISO C90 params.
770
6cbe03fb
AM
771 * frags.c (frag_offset_fixed_p): Constify args.
772 * frags.h (frag_offset_fixed_p): Ditto.
773
23d9d9de
AM
774 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
775 (COFF_MAGIC): Delete.
a37d486e
AM
776
777 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
778
e7403566
DJ
7792006-04-16 Daniel Jacobowitz <[email protected]>
780
781 * po/POTFILES.in: Regenerated.
782
58ab4f3d
MM
7832006-04-16 Mark Mitchell <[email protected]>
784
785 * doc/as.texinfo: Mention that some .type syntaxes are not
786 supported on all architectures.
787
482fd9f9
BW
7882006-04-14 Sterling Augustine <[email protected]>
789
790 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
791 instructions when such transformations have been disabled.
792
05d58145
BW
7932006-04-10 Sterling Augustine <[email protected]>
794
795 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
796 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
797 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
798 decoding the loop instructions. Remove current_offset variable.
799 (xtensa_fix_short_loop_frags): Likewise.
800 (min_bytes_to_other_loop_end): Remove current_offset argument.
801
9e75b3fa
AM
8022006-04-09 Arnold Metselaar <[email protected]>
803
a37d486e 804 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
805 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
806
d727e8c2
NC
8072006-04-07 Joerg Wunsch <[email protected]>
808
809 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
810 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
811 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
812 atmega644, atmega329, atmega3290, atmega649, atmega6490,
813 atmega406, atmega640, atmega1280, atmega1281, at90can32,
814 at90can64, at90usb646, at90usb647, at90usb1286 and
815 at90usb1287.
816 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
817
d252fdde
PB
8182006-04-07 Paul Brook <[email protected]>
819
820 * config/tc-arm.c (parse_operands): Set default error message.
821
ab1eb5fe
PB
8222006-04-07 Paul Brook <[email protected]>
823
824 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
825
7ae2971b
PB
8262006-04-07 Paul Brook <[email protected]>
827
828 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
829
53365c0d
PB
8302006-04-07 Paul Brook <[email protected]>
831
832 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
833 (move_or_literal_pool): Handle Thumb-2 instructions.
834 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
835
45aa61fe
AM
8362006-04-07 Alan Modra <[email protected]>
837
838 PR 2512.
839 * config/tc-i386.c (match_template): Move 64-bit operand tests
840 inside loop.
841
108a6f8e
CD
8422006-04-06 Carlos O'Donell <[email protected]>
843
844 * po/Make-in: Add install-html target.
845 * Makefile.am: Add install-html and install-html-recursive targets.
846 * Makefile.in: Regenerate.
847 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
848 * configure: Regenerate.
849 * doc/Makefile.am: Add install-html and install-html-am targets.
850 * doc/Makefile.in: Regenerate.
851
ec651a3b
AM
8522006-04-06 Alan Modra <[email protected]>
853
854 * frags.c (frag_offset_fixed_p): Reinitialise offset before
855 second scan.
856
910600e9
RS
8572006-04-05 Richard Sandiford <[email protected]>
858 Daniel Jacobowitz <[email protected]>
859
860 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
861 (GOTT_BASE, GOTT_INDEX): New.
862 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
863 GOTT_INDEX when generating VxWorks PIC.
864 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
865 use the generic *-*-vxworks* stanza instead.
866
99630778
AM
8672006-04-04 Alan Modra <[email protected]>
868
869 PR 997
870 * frags.c (frag_offset_fixed_p): New function.
871 * frags.h (frag_offset_fixed_p): Declare.
872 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
873 (resolve_expression): Likewise.
874
a02728c8
BW
8752006-04-03 Sterling Augustine <[email protected]>
876
877 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
878 of the same length but different numbers of slots.
879
9dfde49d
AS
8802006-03-30 Andreas Schwab <[email protected]>
881
882 * configure.in: Fix help string for --enable-targets option.
883 * configure: Regenerate.
884
2da12c60
NS
8852006-03-28 Nathan Sidwell <[email protected]>
886
6d89cc8f
NS
887 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
888 (m68k_ip): ... here. Use for all chips. Protect against buffer
889 overrun and avoid excessive copying.
890
2da12c60
NS
891 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
892 m68020_control_regs, m68040_control_regs, m68060_control_regs,
893 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
894 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
895 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
896 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
897 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
898 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
899 mcf5282_ctrl, mcfv4e_ctrl): ... these.
900 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
901 (struct m68k_cpu): Change chip field to control_regs.
902 (current_chip): Remove.
903 (control_regs): New.
904 (m68k_archs, m68k_extensions): Adjust.
905 (m68k_cpus): Reorder to be in cpu number order. Adjust.
906 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
907 (find_cf_chip): Reimplement for new organization of cpu table.
908 (select_control_regs): Remove.
909 (mri_chip): Adjust.
910 (struct save_opts): Save control regs, not chip.
911 (s_save, s_restore): Adjust.
912 (m68k_lookup_cpu): Give deprecated warning when necessary.
913 (m68k_init_arch): Adjust.
914 (md_show_usage): Adjust for new cpu table organization.
915
1ac4baed
BS
9162006-03-25 Bernd Schmidt <[email protected]>
917
918 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
919 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
920 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
921 "elf/bfin.h".
922 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
923 (any_gotrel): New rule.
924 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
925 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
926 "elf/bfin.h".
927 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
928 (bfin_pic_ptr): New function.
929 (md_pseudo_table): Add it for ".picptr".
930 (OPTION_FDPIC): New macro.
931 (md_longopts): Add -mfdpic.
932 (md_parse_option): Handle it.
933 (md_begin): Set BFD flags.
934 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
935 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
936 us for GOT relocs.
937 * Makefile.am (bfin-parse.o): Update dependencies.
938 (DEPTC_bfin_elf): Likewise.
939 * Makefile.in: Regenerate.
940
a9d34880
RS
9412006-03-25 Richard Sandiford <[email protected]>
942
943 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
944 mcfemac instead of mcfmac.
945
9ca26584
AJ
9462006-03-23 Michael Matz <[email protected]>
947
948 * config/tc-i386.c (type_names): Correct placement of 'static'.
949 (reloc): Map some more relocs to their 64 bit counterpart when
950 size is 8.
951 (output_insn): Work around breakage if DEBUG386 is defined.
952 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
953 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
954 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
955 different from i386.
956 (output_imm): Ditto.
957 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
958 Imm64.
959 (md_convert_frag): Jumps can now be larger than 2GB away, error
960 out in that case.
961 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
962 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
963
0a44bf69
RS
9642006-03-22 Richard Sandiford <[email protected]>
965 Daniel Jacobowitz <[email protected]>
966 Phil Edwards <[email protected]>
967 Zack Weinberg <[email protected]>
968 Mark Mitchell <[email protected]>
969 Nathan Sidwell <[email protected]>
970
971 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
972 (md_begin): Complain about -G being used for PIC. Don't change
973 the text, data and bss alignments on VxWorks.
974 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
975 generating VxWorks PIC.
976 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
977 (macro): Likewise, but do not treat la $25 specially for
978 VxWorks PIC, and do not handle jal.
979 (OPTION_MVXWORKS_PIC): New macro.
980 (md_longopts): Add -mvxworks-pic.
981 (md_parse_option): Don't complain about using PIC and -G together here.
982 Handle OPTION_MVXWORKS_PIC.
983 (md_estimate_size_before_relax): Always use the first relaxation
984 sequence on VxWorks.
985 * config/tc-mips.h (VXWORKS_PIC): New.
986
080eb7fe
PB
9872006-03-21 Paul Brook <[email protected]>
988
989 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
990
03aaa593
BW
9912006-03-21 Sterling Augustine <[email protected]>
992
993 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
994 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
995 (get_loop_align_size): New.
996 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
997 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
998 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
999 (get_noop_aligned_address): Use get_loop_align_size.
1000 (get_aligned_diff): Likewise.
1001
3e94bf1a
PB
10022006-03-21 Paul Brook <[email protected]>
1003
1004 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1005
dfa9f0d5
PB
10062006-03-20 Paul Brook <[email protected]>
1007
1008 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1009 (do_t_branch): Encode branches inside IT blocks as unconditional.
1010 (do_t_cps): New function.
1011 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1012 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1013 (opcode_lookup): Allow conditional suffixes on all instructions in
1014 Thumb mode.
1015 (md_assemble): Advance condexec state before checking for errors.
1016 (insns): Use do_t_cps.
1017
6e1cb1a6
PB
10182006-03-20 Paul Brook <[email protected]>
1019
1020 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1021 outputting the insn.
1022
0a966e2d
JBG
10232006-03-18 Jan-Benedict Glaw <[email protected]>
1024
1025 * config/tc-vax.c: Update copyright year.
1026 * config/tc-vax.h: Likewise.
1027
a49fcc17
JBG
10282006-03-18 Jan-Benedict Glaw <[email protected]>
1029
1030 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1031 make it static.
1032 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1033
f5208ef2
PB
10342006-03-17 Paul Brook <[email protected]>
1035
1036 * config/tc-arm.c (insns): Add ldm and stm.
1037
cb4c78d6
BE
10382006-03-17 Ben Elliston <[email protected]>
1039
1040 PR gas/2446
1041 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1042
c16d2bf0
PB
10432006-03-16 Paul Brook <[email protected]>
1044
1045 * config/tc-arm.c (insns): Add "svc".
1046
80ca4e2c
BW
10472006-03-13 Bob Wilson <[email protected]>
1048
1049 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1050 flag and avoid double underscore prefixes.
1051
3a4a14e9
PB
10522006-03-10 Paul Brook <[email protected]>
1053
1054 * config/tc-arm.c (md_begin): Handle EABIv5.
1055 (arm_eabis): Add EF_ARM_EABI_VER5.
1056 * doc/c-arm.texi: Document -meabi=5.
1057
518051dc
BE
10582006-03-10 Ben Elliston <[email protected]>
1059
1060 * app.c (do_scrub_chars): Simplify string handling.
1061
00a97672
RS
10622006-03-07 Richard Sandiford <[email protected]>
1063 Daniel Jacobowitz <[email protected]>
1064 Zack Weinberg <[email protected]>
1065 Nathan Sidwell <[email protected]>
1066 Paul Brook <[email protected]>
1067 Ricardo Anguiano <[email protected]>
1068 Phil Edwards <[email protected]>
1069
1070 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1071 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1072 R_ARM_ABS12 reloc.
1073 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1074 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1075 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1076
b29757dc
BW
10772006-03-06 Bob Wilson <[email protected]>
1078
1079 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1080 even when using the text-section-literals option.
1081
0b2e31dc
NS
10822006-03-06 Nathan Sidwell <[email protected]>
1083
1084 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1085 and cf.
1086 (m68k_ip): <case 'J'> Check we have some control regs.
1087 (md_parse_option): Allow raw arch switch.
1088 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1089 whether 68881 or cfloat was meant by -mfloat.
1090 (md_show_usage): Adjust extension display.
1091 (m68k_elf_final_processing): Adjust.
1092
df406460
NC
10932006-03-03 Bjoern Haase <[email protected]>
1094
1095 * config/tc-avr.c (avr_mod_hash_value): New function.
1096 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1097 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1098 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1099 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1100 of (int).
1101 (tc_gen_reloc): Handle substractions of symbols, if possible do
1102 fixups, abort otherwise.
1103 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1104 tc_fix_adjustable): Define.
1105
53022e4a
JW
11062006-03-02 James E Wilson <[email protected]>
1107
1108 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1109 change the template, then clear md.slot[curr].end_of_insn_group.
1110
9f6f925e
JB
11112006-02-28 Jan Beulich <[email protected]>
1112
1113 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1114
0e31b3e1
JB
11152006-02-28 Jan Beulich <[email protected]>
1116
1117 PR/1070
1118 * macro.c (getstring): Don't treat parentheses special anymore.
1119 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1120 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1121 characters.
1122
10cd14b4
AM
11232006-02-28 Mat <[email protected]>
1124
1125 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1126
63752a75
JJ
11272006-02-27 Jakub Jelinek <[email protected]>
1128
1129 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1130 field.
1131 (CFI_signal_frame): Define.
1132 (cfi_pseudo_table): Add .cfi_signal_frame.
1133 (dot_cfi): Handle CFI_signal_frame.
1134 (output_cie): Handle cie->signal_frame.
1135 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1136 different. Copy signal_frame from FDE to newly created CIE.
1137 * doc/as.texinfo: Document .cfi_signal_frame.
1138
f7d9e5c3
CD
11392006-02-27 Carlos O'Donell <[email protected]>
1140
1141 * doc/Makefile.am: Add html target.
1142 * doc/Makefile.in: Regenerate.
1143 * po/Make-in: Add html target.
1144
331d2d0d
L
11452006-02-27 H.J. Lu <[email protected]>
1146
8502d882 1147 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
1148 Instructions.
1149
8502d882 1150 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
1151 (CpuUnknownFlags): Add CpuMNI.
1152
10156f83
DM
11532006-02-24 David S. Miller <[email protected]>
1154
1155 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1156 (hpriv_reg_table): New table for hyperprivileged registers.
1157 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1158 register encoding.
1159
6772dd07
DD
11602006-02-24 DJ Delorie <[email protected]>
1161
1162 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1163 (tc_gen_reloc): Don't define.
1164 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1165 (OPTION_LINKRELAX): New.
1166 (md_longopts): Add it.
1167 (m32c_relax): New.
1168 (md_parse_options): Set it.
1169 (md_assemble): Emit relaxation relocs as needed.
1170 (md_convert_frag): Emit relaxation relocs as needed.
1171 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1172 (m32c_apply_fix): New.
1173 (tc_gen_reloc): New.
1174 (m32c_force_relocation): Force out jump relocs when relaxing.
1175 (m32c_fix_adjustable): Return false if relaxing.
1176
62b3e311
PB
11772006-02-24 Paul Brook <[email protected]>
1178
1179 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1180 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1181 (struct asm_barrier_opt): Define.
1182 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1183 (parse_psr): Accept V7M psr names.
1184 (parse_barrier): New function.
1185 (enum operand_parse_code): Add OP_oBARRIER.
1186 (parse_operands): Implement OP_oBARRIER.
1187 (do_barrier): New function.
1188 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1189 (do_t_cpsi): Add V7M restrictions.
1190 (do_t_mrs, do_t_msr): Validate V7M variants.
1191 (md_assemble): Check for NULL variants.
1192 (v7m_psrs, barrier_opt_names): New tables.
1193 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1194 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1195 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1196 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1197 (struct cpu_arch_ver_table): Define.
1198 (cpu_arch_ver): New.
1199 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1200 Tag_CPU_arch_profile.
1201 * doc/c-arm.texi: Document new cpu and arch options.
1202
59cf82fe
L
12032006-02-23 H.J. Lu <[email protected]>
1204
1205 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1206
19a7219f
L
12072006-02-23 H.J. Lu <[email protected]>
1208
1209 * config/tc-ia64.c: Update copyright years.
1210
7f3dfb9c
L
12112006-02-22 H.J. Lu <[email protected]>
1212
1213 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1214 SDM 2.2.
1215
f40d1643
PB
12162005-02-22 Paul Brook <[email protected]>
1217
1218 * config/tc-arm.c (do_pld): Remove incorrect write to
1219 inst.instruction.
1220 (encode_thumb32_addr_mode): Use correct operand.
1221
216d22bc
PB
12222006-02-21 Paul Brook <[email protected]>
1223
1224 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1225
d70c5fc7
NC
12262006-02-17 Shrirang Khisti <[email protected]>
1227 Anil Paranjape <[email protected]>
1228 Shilin Shakti <[email protected]>
1229
1230 * Makefile.am: Add xc16x related entry.
1231 * Makefile.in: Regenerate.
1232 * configure.in: Added xc16x related entry.
1233 * configure: Regenerate.
1234 * config/tc-xc16x.h: New file
1235 * config/tc-xc16x.c: New file
1236 * doc/c-xc16x.texi: New file for xc16x
1237 * doc/all.texi: Entry for xc16x
1238 * doc/Makefile.texi: Added c-xc16x.texi
1239 * NEWS: Announce the support for the new target.
1240
aaa2ab3d
NH
12412006-02-16 Nick Hudson <[email protected]>
1242
1243 * configure.tgt: set emulation for mips-*-netbsd*
1244
82de001f
JJ
12452006-02-14 Jakub Jelinek <[email protected]>
1246
1247 * config.in: Rebuilt.
1248
431ad2d0
BW
12492006-02-13 Bob Wilson <[email protected]>
1250
1251 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1252 from 1, not 0, in error messages.
1253 (md_assemble): Simplify special-case check for ENTRY instructions.
1254 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1255 operand in error message.
1256
94089a50
JM
12572006-02-13 Joseph S. Myers <[email protected]>
1258
1259 * configure.tgt (arm-*-linux-gnueabi*): Change to
1260 arm-*-linux-*eabi*.
1261
52de4c06
NC
12622006-02-10 Nick Clifton <[email protected]>
1263
70e45ad9
NC
1264 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1265 32-bit value is propagated into the upper bits of a 64-bit long.
1266
52de4c06
NC
1267 * config/tc-arc.c (init_opcode_tables): Fix cast.
1268 (arc_extoper, md_operand): Likewise.
1269
21af2bbd
BW
12702006-02-09 David Heine <[email protected]>
1271
1272 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1273 each relaxation step.
1274
75a706fc
L
12752006-02-09 Eric Botcazou <[email protected]>
1276
1277 * configure.in (CHECK_DECLS): Add vsnprintf.
1278 * configure: Regenerate.
1279 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1280 include/declare here, but...
1281 * as.h: Move code detecting VARARGS idiom to the top.
1282 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1283 (vsnprintf): Declare if not already declared.
1284
0d474464
L
12852006-02-08 H.J. Lu <[email protected]>
1286
1287 * as.c (close_output_file): New.
1288 (main): Register close_output_file with xatexit before
1289 dump_statistics. Don't call output_file_close.
1290
266abb8f
NS
12912006-02-07 Nathan Sidwell <[email protected]>
1292
1293 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1294 mcf5329_control_regs): New.
1295 (not_current_architecture, selected_arch, selected_cpu): New.
1296 (m68k_archs, m68k_extensions): New.
1297 (archs): Renamed to ...
1298 (m68k_cpus): ... here. Adjust.
1299 (n_arches): Remove.
1300 (md_pseudo_table): Add arch and cpu directives.
1301 (find_cf_chip, m68k_ip): Adjust table scanning.
1302 (no_68851, no_68881): Remove.
1303 (md_assemble): Lazily initialize.
1304 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1305 (md_init_after_args): Move functionality to m68k_init_arch.
1306 (mri_chip): Adjust table scanning.
1307 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1308 options with saner parsing.
1309 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1310 m68k_init_arch): New.
1311 (s_m68k_cpu, s_m68k_arch): New.
1312 (md_show_usage): Adjust.
1313 (m68k_elf_final_processing): Set CF EF flags.
1314 * config/tc-m68k.h (m68k_init_after_args): Remove.
1315 (tc_init_after_args): Remove.
1316 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1317 (M68k-Directives): Document .arch and .cpu directives.
1318
134dcee5
AM
13192006-02-05 Arnold Metselaar <[email protected]>
1320
1321 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1322 synonyms for equ and defl.
1323 (z80_cons_fix_new): New function.
1324 (emit_byte): Disallow relative jumps to absolute locations.
1325 (emit_data): Only handle defb, prototype changed, because defb is
1326 now handled as pseudo-op rather than an instruction.
1327 (instab): Entries for defb,defw,db,dw moved from here...
1328 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1329 Add entries for def24,def32,d24,d32.
1330 (md_assemble): Improved error handling.
1331 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1332 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1333 (z80_cons_fix_new): Declare.
1334 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1335 (def24,d24,def32,d32): New pseudo-ops.
1336
a9931606
PB
13372006-02-02 Paul Brook <[email protected]>
1338
1339 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1340
ef8d22e6
PB
13412005-02-02 Paul Brook <[email protected]>
1342
1343 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1344 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1345 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1346 T2_OPCODE_RSB): Define.
1347 (thumb32_negate_data_op): New function.
1348 (md_apply_fix): Use it.
1349
e7da6241
BW
13502006-01-31 Bob Wilson <[email protected]>
1351
1352 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1353 fields.
1354 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1355 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1356 subtracted symbols.
1357 (relaxation_requirements): Add pfinish_frag argument and use it to
1358 replace setting tinsn->record_fix fields.
1359 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1360 and vinsn_to_insnbuf. Remove references to record_fix and
1361 slot_sub_symbols fields.
1362 (xtensa_mark_narrow_branches): Delete unused code.
1363 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1364 a symbol.
1365 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1366 record_fix fields.
1367 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1368 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1369 of the record_fix field. Simplify error messages for unexpected
1370 symbolic operands.
1371 (set_expr_symbol_offset_diff): Delete.
1372
79134647
PB
13732006-01-31 Paul Brook <[email protected]>
1374
1375 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1376
e74cfd16
PB
13772006-01-31 Paul Brook <[email protected]>
1378 Richard Earnshaw <[email protected]>
1379
1380 * config/tc-arm.c: Use arm_feature_set.
1381 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1382 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1383 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1384 New variables.
1385 (insns): Use them.
1386 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1387 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1388 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1389 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1390 feature flags.
1391 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1392 (arm_opts): Move old cpu/arch options from here...
1393 (arm_legacy_opts): ... to here.
1394 (md_parse_option): Search arm_legacy_opts.
1395 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1396 (arm_float_abis, arm_eabis): Make const.
1397
d47d412e
BW
13982006-01-25 Bob Wilson <[email protected]>
1399
1400 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1401
b14273fe
JZ
14022006-01-21 Jie Zhang <[email protected]>
1403
1404 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1405 in load immediate intruction.
1406
39cd1c76
JZ
14072006-01-21 Jie Zhang <[email protected]>
1408
1409 * config/bfin-parse.y (value_match): Use correct conversion
1410 specifications in template string for __FILE__ and __LINE__.
1411 (binary): Ditto.
1412 (unary): Ditto.
1413
67a4f2b7
AO
14142006-01-18 Alexandre Oliva <[email protected]>
1415
1416 Introduce TLS descriptors for i386 and x86_64.
1417 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1418 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1419 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1420 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1421 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1422 displacement bits.
1423 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1424 (lex_got): Handle @tlsdesc and @tlscall.
1425 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1426
8ad7c533
NC
14272006-01-11 Nick Clifton <[email protected]>
1428
1429 Fixes for building on 64-bit hosts:
1430 * config/tc-avr.c (mod_index): New union to allow conversion
1431 between pointers and integers.
1432 (md_begin, avr_ldi_expression): Use it.
1433 * config/tc-i370.c (md_assemble): Add cast for argument to print
1434 statement.
1435 * config/tc-tic54x.c (subsym_substitute): Likewise.
1436 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1437 opindex field of fr_cgen structure into a pointer so that it can
1438 be stored in a frag.
1439 * config/tc-mn10300.c (md_assemble): Likewise.
1440 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1441 types.
1442 * config/tc-v850.c: Replace uses of (int) casts with correct
1443 types.
1444
4dcb3903
L
14452006-01-09 H.J. Lu <[email protected]>
1446
1447 PR gas/2117
1448 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1449
e0f6ea40
HPN
14502006-01-03 Hans-Peter Nilsson <[email protected]>
1451
1452 PR gas/2101
1453 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1454 a local-label reference.
1455
e88d958a 1456For older changes see ChangeLog-2005
08d56133
NC
1457\f
1458Local Variables:
1459mode: change-log
1460left-margin: 8
1461fill-column: 74
1462version-control: never
1463End:
This page took 0.749672 seconds and 4 git commands to generate.