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c906108c SS |
1 | /* Target-machine dependent code for Motorola 88000 series, for GDB. |
2 | Copyright 1988, 1990, 1991, 1994, 1995 Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
c906108c | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
c906108c | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
c906108c | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
20 | |
21 | #include "defs.h" | |
22 | #include "frame.h" | |
23 | #include "inferior.h" | |
24 | #include "value.h" | |
25 | #include "gdbcore.h" | |
26 | #include "symtab.h" | |
27 | #include "setjmp.h" | |
28 | #include "value.h" | |
29 | ||
30 | /* Size of an instruction */ | |
31 | #define BYTES_PER_88K_INSN 4 | |
32 | ||
33 | void frame_find_saved_regs (); | |
34 | ||
35 | /* Is this target an m88110? Otherwise assume m88100. This has | |
36 | relevance for the ways in which we screw with instruction pointers. */ | |
37 | ||
38 | int target_is_m88110 = 0; | |
39 | ||
40 | /* The m88k kernel aligns all instructions on 4-byte boundaries. The | |
41 | kernel also uses the least significant two bits for its own hocus | |
42 | pocus. When gdb receives an address from the kernel, it needs to | |
43 | preserve those right-most two bits, but gdb also needs to be careful | |
44 | to realize that those two bits are not really a part of the address | |
45 | of an instruction. Shrug. */ | |
46 | ||
47 | CORE_ADDR | |
48 | m88k_addr_bits_remove (addr) | |
49 | CORE_ADDR addr; | |
50 | { | |
51 | return ((addr) & ~3); | |
52 | } | |
53 | ||
54 | ||
55 | /* Given a GDB frame, determine the address of the calling function's frame. | |
56 | This will be used to create a new GDB frame struct, and then | |
57 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
58 | ||
59 | For us, the frame address is its stack pointer value, so we look up | |
60 | the function prologue to determine the caller's sp value, and return it. */ | |
61 | ||
62 | CORE_ADDR | |
63 | frame_chain (thisframe) | |
64 | struct frame_info *thisframe; | |
65 | { | |
66 | ||
67 | frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0); | |
68 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not | |
c5aa993b JM |
69 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
70 | frame_find_saved_regs results. */ | |
c906108c SS |
71 | if (thisframe->fsr->regs[SP_REGNUM]) |
72 | return thisframe->fsr->regs[SP_REGNUM]; | |
73 | else | |
74 | return thisframe->frame; /* Leaf fn -- next frame up has same SP. */ | |
75 | } | |
76 | ||
77 | int | |
78 | frameless_function_invocation (frame) | |
79 | struct frame_info *frame; | |
80 | { | |
81 | ||
82 | frame_find_saved_regs (frame, (struct frame_saved_regs *) 0); | |
83 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not | |
c5aa993b JM |
84 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
85 | frame_find_saved_regs results. */ | |
c906108c SS |
86 | if (frame->fsr->regs[SP_REGNUM]) |
87 | return 0; /* Frameful -- return addr saved somewhere */ | |
88 | else | |
89 | return 1; /* Frameless -- no saved return address */ | |
90 | } | |
91 | ||
92 | void | |
93 | init_extra_frame_info (fromleaf, frame) | |
94 | int fromleaf; | |
95 | struct frame_info *frame; | |
96 | { | |
c5aa993b JM |
97 | frame->fsr = 0; /* Not yet allocated */ |
98 | frame->args_pointer = 0; /* Unknown */ | |
c906108c SS |
99 | frame->locals_pointer = 0; /* Unknown */ |
100 | } | |
101 | \f | |
102 | /* Examine an m88k function prologue, recording the addresses at which | |
103 | registers are saved explicitly by the prologue code, and returning | |
104 | the address of the first instruction after the prologue (but not | |
105 | after the instruction at address LIMIT, as explained below). | |
106 | ||
107 | LIMIT places an upper bound on addresses of the instructions to be | |
108 | examined. If the prologue code scan reaches LIMIT, the scan is | |
109 | aborted and LIMIT is returned. This is used, when examining the | |
110 | prologue for the current frame, to keep examine_prologue () from | |
111 | claiming that a given register has been saved when in fact the | |
112 | instruction that saves it has not yet been executed. LIMIT is used | |
113 | at other times to stop the scan when we hit code after the true | |
114 | function prologue (e.g. for the first source line) which might | |
115 | otherwise be mistaken for function prologue. | |
116 | ||
117 | The format of the function prologue matched by this routine is | |
118 | derived from examination of the source to gcc 1.95, particularly | |
119 | the routine output_prologue () in config/out-m88k.c. | |
120 | ||
c5aa993b | 121 | subu r31,r31,n # stack pointer update |
c906108c | 122 | |
c5aa993b | 123 | (st rn,r31,offset)? # save incoming regs |
c906108c SS |
124 | (st.d rn,r31,offset)? |
125 | ||
c5aa993b | 126 | (addu r30,r31,n)? # frame pointer update |
c906108c | 127 | |
c5aa993b | 128 | (pic sequence)? # PIC code prologue |
c906108c | 129 | |
c5aa993b JM |
130 | (or rn,rm,0)? # Move parameters to other regs |
131 | */ | |
c906108c SS |
132 | |
133 | /* Macros for extracting fields from instructions. */ | |
134 | ||
135 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) | |
136 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) | |
137 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
138 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) | |
139 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) | |
140 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) | |
141 | ||
142 | /* | |
143 | * prologue_insn_tbl is a table of instructions which may comprise a | |
144 | * function prologue. Associated with each table entry (corresponding | |
145 | * to a single instruction or group of instructions), is an action. | |
146 | * This action is used by examine_prologue (below) to determine | |
147 | * the state of certain machine registers and where the stack frame lives. | |
148 | */ | |
149 | ||
c5aa993b JM |
150 | enum prologue_insn_action |
151 | { | |
c906108c SS |
152 | PIA_SKIP, /* don't care what the instruction does */ |
153 | PIA_NOTE_ST, /* note register stored and where */ | |
154 | PIA_NOTE_STD, /* note pair of registers stored and where */ | |
155 | PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */ | |
156 | PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */ | |
157 | PIA_NOTE_PROLOGUE_END, /* no more prologue */ | |
158 | }; | |
159 | ||
c5aa993b JM |
160 | struct prologue_insns |
161 | { | |
c906108c SS |
162 | unsigned long insn; |
163 | unsigned long mask; | |
164 | enum prologue_insn_action action; | |
c5aa993b | 165 | }; |
c906108c | 166 | |
c5aa993b JM |
167 | struct prologue_insns prologue_insn_tbl[] = |
168 | { | |
c906108c | 169 | /* Various register move instructions */ |
c5aa993b JM |
170 | {0x58000000, 0xf800ffff, PIA_SKIP}, /* or/or.u with immed of 0 */ |
171 | {0xf4005800, 0xfc1fffe0, PIA_SKIP}, /* or rd, r0, rs */ | |
172 | {0xf4005800, 0xfc00ffff, PIA_SKIP}, /* or rd, rs, r0 */ | |
c906108c SS |
173 | |
174 | /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */ | |
c5aa993b | 175 | {0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT}, |
c906108c SS |
176 | |
177 | /* Frame pointer assignment: "addu r30, r31, n" */ | |
c5aa993b | 178 | {0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT}, |
c906108c SS |
179 | |
180 | /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */ | |
c5aa993b JM |
181 | {0x241f0000, 0xfc1f0000, PIA_NOTE_ST}, /* st rx, sp, n */ |
182 | {0x201f0000, 0xfc1f0000, PIA_NOTE_STD}, /* st.d rs, sp, n */ | |
c906108c SS |
183 | |
184 | /* Instructions needed for setting up r25 for pic code. */ | |
c5aa993b JM |
185 | {0x5f200000, 0xffff0000, PIA_SKIP}, /* or.u r25, r0, offset_high */ |
186 | {0xcc000002, 0xffffffff, PIA_SKIP}, /* bsr.n Lab */ | |
187 | {0x5b390000, 0xffff0000, PIA_SKIP}, /* or r25, r25, offset_low */ | |
188 | {0xf7396001, 0xffffffff, PIA_SKIP}, /* Lab: addu r25, r25, r1 */ | |
c906108c SS |
189 | |
190 | /* Various branch or jump instructions which have a delay slot -- these | |
191 | do not form part of the prologue, but the instruction in the delay | |
192 | slot might be a store instruction which should be noted. */ | |
c5aa993b JM |
193 | {0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END}, |
194 | /* br.n, bsr.n, bb0.n, or bb1.n */ | |
195 | {0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END}, /* bcnd.n */ | |
196 | {0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END} /* jmp.n or jsr.n */ | |
c906108c SS |
197 | |
198 | }; | |
199 | ||
200 | ||
201 | /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or | |
202 | is not the address of a valid instruction, the address of the next | |
203 | instruction beyond ADDR otherwise. *PWORD1 receives the first word | |
204 | of the instruction. */ | |
205 | ||
206 | #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \ | |
207 | (((addr) < (lim)) ? next_insn (addr, pword1) : 0) | |
208 | ||
209 | /* Read the m88k instruction at 'memaddr' and return the address of | |
210 | the next instruction after that, or 0 if 'memaddr' is not the | |
211 | address of a valid instruction. The instruction | |
212 | is stored at 'pword1'. */ | |
213 | ||
214 | CORE_ADDR | |
215 | next_insn (memaddr, pword1) | |
216 | unsigned long *pword1; | |
217 | CORE_ADDR memaddr; | |
218 | { | |
219 | *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN); | |
220 | return memaddr + BYTES_PER_88K_INSN; | |
221 | } | |
222 | ||
223 | /* Read a register from frames called by us (or from the hardware regs). */ | |
224 | ||
225 | static int | |
c5aa993b | 226 | read_next_frame_reg (frame, regno) |
c906108c SS |
227 | struct frame_info *frame; |
228 | int regno; | |
229 | { | |
c5aa993b JM |
230 | for (; frame; frame = frame->next) |
231 | { | |
c906108c SS |
232 | if (regno == SP_REGNUM) |
233 | return FRAME_FP (frame); | |
234 | else if (frame->fsr->regs[regno]) | |
c5aa993b JM |
235 | return read_memory_integer (frame->fsr->regs[regno], 4); |
236 | } | |
237 | return read_register (regno); | |
c906108c SS |
238 | } |
239 | ||
240 | /* Examine the prologue of a function. `ip' points to the first instruction. | |
241 | `limit' is the limit of the prologue (e.g. the addr of the first | |
242 | linenumber, or perhaps the program counter if we're stepping through). | |
243 | `frame_sp' is the stack pointer value in use in this frame. | |
244 | `fsr' is a pointer to a frame_saved_regs structure into which we put | |
245 | info about the registers saved by this frame. | |
246 | `fi' is a struct frame_info pointer; we fill in various fields in it | |
247 | to reflect the offsets of the arg pointer and the locals pointer. */ | |
248 | ||
249 | static CORE_ADDR | |
250 | examine_prologue (ip, limit, frame_sp, fsr, fi) | |
251 | register CORE_ADDR ip; | |
252 | register CORE_ADDR limit; | |
253 | CORE_ADDR frame_sp; | |
254 | struct frame_saved_regs *fsr; | |
255 | struct frame_info *fi; | |
256 | { | |
257 | register CORE_ADDR next_ip; | |
258 | register int src; | |
259 | unsigned int insn; | |
260 | int size, offset; | |
261 | char must_adjust[32]; /* If set, must adjust offsets in fsr */ | |
262 | int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */ | |
263 | int fp_offset = -1; /* -1 means not set */ | |
264 | CORE_ADDR frame_fp; | |
265 | CORE_ADDR prologue_end = 0; | |
266 | ||
267 | memset (must_adjust, '\0', sizeof (must_adjust)); | |
268 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); | |
269 | ||
270 | while (next_ip) | |
271 | { | |
c5aa993b | 272 | struct prologue_insns *pip; |
c906108c | 273 | |
c5aa993b JM |
274 | for (pip = prologue_insn_tbl; (insn & pip->mask) != pip->insn;) |
275 | if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl) | |
276 | goto end_of_prologue_found; /* not a prologue insn */ | |
c906108c SS |
277 | |
278 | switch (pip->action) | |
279 | { | |
c5aa993b JM |
280 | case PIA_NOTE_ST: |
281 | case PIA_NOTE_STD: | |
282 | if (sp_offset != -1) | |
283 | { | |
284 | src = ST_SRC (insn); | |
285 | offset = ST_OFFSET (insn); | |
286 | must_adjust[src] = 1; | |
287 | fsr->regs[src++] = offset; /* Will be adjusted later */ | |
288 | if (pip->action == PIA_NOTE_STD && src < 32) | |
289 | { | |
290 | offset += 4; | |
291 | must_adjust[src] = 1; | |
292 | fsr->regs[src++] = offset; | |
293 | } | |
c906108c | 294 | } |
c5aa993b JM |
295 | else |
296 | goto end_of_prologue_found; | |
297 | break; | |
298 | case PIA_NOTE_SP_ADJUSTMENT: | |
299 | if (sp_offset == -1) | |
300 | sp_offset = -SUBU_OFFSET (insn); | |
301 | else | |
302 | goto end_of_prologue_found; | |
303 | break; | |
304 | case PIA_NOTE_FP_ASSIGNMENT: | |
305 | if (fp_offset == -1) | |
306 | fp_offset = ADDU_OFFSET (insn); | |
307 | else | |
308 | goto end_of_prologue_found; | |
309 | break; | |
310 | case PIA_NOTE_PROLOGUE_END: | |
311 | if (!prologue_end) | |
312 | prologue_end = ip; | |
313 | break; | |
314 | case PIA_SKIP: | |
315 | default: | |
316 | /* Do nothing */ | |
317 | break; | |
c906108c SS |
318 | } |
319 | ||
320 | ip = next_ip; | |
321 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); | |
322 | } | |
323 | ||
324 | end_of_prologue_found: | |
325 | ||
c5aa993b JM |
326 | if (prologue_end) |
327 | ip = prologue_end; | |
c906108c SS |
328 | |
329 | /* We're done with the prologue. If we don't care about the stack | |
330 | frame itself, just return. (Note that fsr->regs has been trashed, | |
331 | but the one caller who calls with fi==0 passes a dummy there.) */ | |
332 | ||
333 | if (fi == 0) | |
334 | return ip; | |
335 | ||
336 | /* | |
337 | OK, now we have: | |
338 | ||
c5aa993b JM |
339 | sp_offset original (before any alloca calls) displacement of SP |
340 | (will be negative). | |
c906108c | 341 | |
c5aa993b JM |
342 | fp_offset displacement from original SP to the FP for this frame |
343 | or -1. | |
c906108c | 344 | |
c5aa993b JM |
345 | fsr->regs[0..31] displacement from original SP to the stack |
346 | location where reg[0..31] is stored. | |
c906108c | 347 | |
c5aa993b | 348 | must_adjust[0..31] set if corresponding offset was set. |
c906108c SS |
349 | |
350 | If alloca has been called between the function prologue and the current | |
351 | IP, then the current SP (frame_sp) will not be the original SP as set by | |
352 | the function prologue. If the current SP is not the original SP, then the | |
353 | compiler will have allocated an FP for this frame, fp_offset will be set, | |
354 | and we can use it to calculate the original SP. | |
355 | ||
356 | Then, we figure out where the arguments and locals are, and relocate the | |
357 | offsets in fsr->regs to absolute addresses. */ | |
358 | ||
c5aa993b JM |
359 | if (fp_offset != -1) |
360 | { | |
361 | /* We have a frame pointer, so get it, and base our calc's on it. */ | |
362 | frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM); | |
363 | frame_sp = frame_fp - fp_offset; | |
364 | } | |
365 | else | |
366 | { | |
367 | /* We have no frame pointer, therefore frame_sp is still the same value | |
368 | as set by prologue. But where is the frame itself? */ | |
369 | if (must_adjust[SRP_REGNUM]) | |
370 | { | |
371 | /* Function header saved SRP (r1), the return address. Frame starts | |
372 | 4 bytes down from where it was saved. */ | |
373 | frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4; | |
374 | fi->locals_pointer = frame_fp; | |
375 | } | |
376 | else | |
377 | { | |
378 | /* Function header didn't save SRP (r1), so we are in a leaf fn or | |
379 | are otherwise confused. */ | |
380 | frame_fp = -1; | |
381 | } | |
c906108c | 382 | } |
c906108c SS |
383 | |
384 | /* The locals are relative to the FP (whether it exists as an allocated | |
385 | register, or just as an assumed offset from the SP) */ | |
386 | fi->locals_pointer = frame_fp; | |
387 | ||
388 | /* The arguments are just above the SP as it was before we adjusted it | |
389 | on entry. */ | |
390 | fi->args_pointer = frame_sp - sp_offset; | |
391 | ||
392 | /* Now that we know the SP value used by the prologue, we know where | |
393 | it saved all the registers. */ | |
394 | for (src = 0; src < 32; src++) | |
395 | if (must_adjust[src]) | |
396 | fsr->regs[src] += frame_sp; | |
c5aa993b | 397 | |
c906108c SS |
398 | /* The saved value of the SP is always known. */ |
399 | /* (we hope...) */ | |
c5aa993b JM |
400 | if (fsr->regs[SP_REGNUM] != 0 |
401 | && fsr->regs[SP_REGNUM] != frame_sp - sp_offset) | |
402 | fprintf_unfiltered (gdb_stderr, "Bad saved SP value %x != %x, offset %x!\n", | |
403 | fsr->regs[SP_REGNUM], | |
404 | frame_sp - sp_offset, sp_offset); | |
c906108c SS |
405 | |
406 | fsr->regs[SP_REGNUM] = frame_sp - sp_offset; | |
407 | ||
408 | return (ip); | |
409 | } | |
410 | ||
411 | /* Given an ip value corresponding to the start of a function, | |
412 | return the ip of the first instruction after the function | |
413 | prologue. */ | |
414 | ||
415 | CORE_ADDR | |
b83266a0 | 416 | m88k_skip_prologue (ip) |
c5aa993b | 417 | CORE_ADDR (ip); |
c906108c SS |
418 | { |
419 | struct frame_saved_regs saved_regs_dummy; | |
420 | struct symtab_and_line sal; | |
421 | CORE_ADDR limit; | |
422 | ||
423 | sal = find_pc_line (ip, 0); | |
424 | limit = (sal.end) ? sal.end : 0xffffffff; | |
425 | ||
426 | return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy, | |
c5aa993b | 427 | (struct frame_info *) 0)); |
c906108c SS |
428 | } |
429 | ||
430 | /* Put here the code to store, into a struct frame_saved_regs, | |
431 | the addresses of the saved registers of frame described by FRAME_INFO. | |
432 | This includes special registers such as pc and fp saved in special | |
433 | ways in the stack frame. sp is even more special: | |
434 | the address we return for it IS the sp for the next frame. | |
435 | ||
436 | We cache the result of doing this in the frame_obstack, since it is | |
437 | fairly expensive. */ | |
438 | ||
439 | void | |
440 | frame_find_saved_regs (fi, fsr) | |
441 | struct frame_info *fi; | |
442 | struct frame_saved_regs *fsr; | |
443 | { | |
444 | register struct frame_saved_regs *cache_fsr; | |
445 | CORE_ADDR ip; | |
446 | struct symtab_and_line sal; | |
447 | CORE_ADDR limit; | |
448 | ||
449 | if (!fi->fsr) | |
450 | { | |
451 | cache_fsr = (struct frame_saved_regs *) | |
452 | frame_obstack_alloc (sizeof (struct frame_saved_regs)); | |
453 | memset (cache_fsr, '\0', sizeof (struct frame_saved_regs)); | |
454 | fi->fsr = cache_fsr; | |
455 | ||
456 | /* Find the start and end of the function prologue. If the PC | |
c5aa993b JM |
457 | is in the function prologue, we only consider the part that |
458 | has executed already. In the case where the PC is not in | |
459 | the function prologue, we set limit to two instructions beyond | |
460 | where the prologue ends in case if any of the prologue instructions | |
461 | were moved into a delay slot of a branch instruction. */ | |
462 | ||
c906108c SS |
463 | ip = get_pc_function_start (fi->pc); |
464 | sal = find_pc_line (ip, 0); | |
c5aa993b JM |
465 | limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN |
466 | : fi->pc; | |
c906108c SS |
467 | |
468 | /* This will fill in fields in *fi as well as in cache_fsr. */ | |
469 | #ifdef SIGTRAMP_FRAME_FIXUP | |
470 | if (fi->signal_handler_caller) | |
c5aa993b | 471 | SIGTRAMP_FRAME_FIXUP (fi->frame); |
c906108c SS |
472 | #endif |
473 | examine_prologue (ip, limit, fi->frame, cache_fsr, fi); | |
474 | #ifdef SIGTRAMP_SP_FIXUP | |
475 | if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM]) | |
c5aa993b | 476 | SIGTRAMP_SP_FIXUP (fi->fsr->regs[SP_REGNUM]); |
c906108c SS |
477 | #endif |
478 | } | |
479 | ||
480 | if (fsr) | |
481 | *fsr = *fi->fsr; | |
482 | } | |
483 | ||
484 | /* Return the address of the locals block for the frame | |
485 | described by FI. Returns 0 if the address is unknown. | |
486 | NOTE! Frame locals are referred to by negative offsets from the | |
487 | argument pointer, so this is the same as frame_args_address(). */ | |
488 | ||
489 | CORE_ADDR | |
490 | frame_locals_address (fi) | |
491 | struct frame_info *fi; | |
492 | { | |
493 | struct frame_saved_regs fsr; | |
494 | ||
c5aa993b | 495 | if (fi->args_pointer) /* Cached value is likely there. */ |
c906108c SS |
496 | return fi->args_pointer; |
497 | ||
498 | /* Nope, generate it. */ | |
499 | ||
500 | get_frame_saved_regs (fi, &fsr); | |
501 | ||
502 | return fi->args_pointer; | |
503 | } | |
504 | ||
505 | /* Return the address of the argument block for the frame | |
506 | described by FI. Returns 0 if the address is unknown. */ | |
507 | ||
508 | CORE_ADDR | |
509 | frame_args_address (fi) | |
510 | struct frame_info *fi; | |
511 | { | |
512 | struct frame_saved_regs fsr; | |
513 | ||
514 | if (fi->args_pointer) /* Cached value is likely there. */ | |
515 | return fi->args_pointer; | |
516 | ||
517 | /* Nope, generate it. */ | |
518 | ||
519 | get_frame_saved_regs (fi, &fsr); | |
520 | ||
521 | return fi->args_pointer; | |
522 | } | |
523 | ||
524 | /* Return the saved PC from this frame. | |
525 | ||
526 | If the frame has a memory copy of SRP_REGNUM, use that. If not, | |
527 | just use the register SRP_REGNUM itself. */ | |
528 | ||
529 | CORE_ADDR | |
530 | frame_saved_pc (frame) | |
531 | struct frame_info *frame; | |
532 | { | |
c5aa993b | 533 | return read_next_frame_reg (frame, SRP_REGNUM); |
c906108c SS |
534 | } |
535 | ||
536 | ||
537 | #define DUMMY_FRAME_SIZE 192 | |
538 | ||
539 | static void | |
540 | write_word (sp, word) | |
541 | CORE_ADDR sp; | |
542 | ULONGEST word; | |
543 | { | |
544 | register int len = REGISTER_SIZE; | |
545 | char buffer[MAX_REGISTER_RAW_SIZE]; | |
546 | ||
547 | store_unsigned_integer (buffer, len, word); | |
548 | write_memory (sp, buffer, len); | |
549 | } | |
550 | ||
551 | void | |
c5aa993b | 552 | m88k_push_dummy_frame () |
c906108c SS |
553 | { |
554 | register CORE_ADDR sp = read_register (SP_REGNUM); | |
555 | register int rn; | |
556 | int offset; | |
557 | ||
558 | sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */ | |
559 | ||
c5aa993b JM |
560 | for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset += 4) |
561 | write_word (sp + offset, read_register (rn)); | |
562 | ||
563 | write_word (sp + offset, read_register (SXIP_REGNUM)); | |
c906108c SS |
564 | offset += 4; |
565 | ||
c5aa993b | 566 | write_word (sp + offset, read_register (SNIP_REGNUM)); |
c906108c SS |
567 | offset += 4; |
568 | ||
c5aa993b | 569 | write_word (sp + offset, read_register (SFIP_REGNUM)); |
c906108c SS |
570 | offset += 4; |
571 | ||
c5aa993b | 572 | write_word (sp + offset, read_register (PSR_REGNUM)); |
c906108c SS |
573 | offset += 4; |
574 | ||
c5aa993b | 575 | write_word (sp + offset, read_register (FPSR_REGNUM)); |
c906108c SS |
576 | offset += 4; |
577 | ||
c5aa993b | 578 | write_word (sp + offset, read_register (FPCR_REGNUM)); |
c906108c SS |
579 | offset += 4; |
580 | ||
581 | write_register (SP_REGNUM, sp); | |
582 | write_register (ACTUAL_FP_REGNUM, sp); | |
583 | } | |
584 | ||
585 | void | |
586 | pop_frame () | |
587 | { | |
588 | register struct frame_info *frame = get_current_frame (); | |
589 | register CORE_ADDR fp; | |
590 | register int regnum; | |
591 | struct frame_saved_regs fsr; | |
592 | ||
593 | fp = FRAME_FP (frame); | |
594 | get_frame_saved_regs (frame, &fsr); | |
595 | ||
596 | if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), FRAME_FP (fi))) | |
597 | { | |
598 | /* FIXME: I think get_frame_saved_regs should be handling this so | |
c5aa993b JM |
599 | that we can deal with the saved registers properly (e.g. frame |
600 | 1 is a call dummy, the user types "frame 2" and then "print $ps"). */ | |
c906108c SS |
601 | register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM); |
602 | int offset; | |
603 | ||
c5aa993b JM |
604 | for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset += 4) |
605 | (void) write_register (regnum, read_memory_integer (sp + offset, 4)); | |
606 | ||
607 | write_register (SXIP_REGNUM, read_memory_integer (sp + offset, 4)); | |
c906108c SS |
608 | offset += 4; |
609 | ||
c5aa993b | 610 | write_register (SNIP_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
611 | offset += 4; |
612 | ||
c5aa993b | 613 | write_register (SFIP_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
614 | offset += 4; |
615 | ||
c5aa993b | 616 | write_register (PSR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
617 | offset += 4; |
618 | ||
c5aa993b | 619 | write_register (FPSR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
620 | offset += 4; |
621 | ||
c5aa993b | 622 | write_register (FPCR_REGNUM, read_memory_integer (sp + offset, 4)); |
c906108c SS |
623 | offset += 4; |
624 | ||
625 | } | |
c5aa993b | 626 | else |
c906108c | 627 | { |
c5aa993b JM |
628 | for (regnum = FP_REGNUM; regnum > 0; regnum--) |
629 | if (fsr.regs[regnum]) | |
630 | write_register (regnum, | |
631 | read_memory_integer (fsr.regs[regnum], 4)); | |
c906108c SS |
632 | write_pc (frame_saved_pc (frame)); |
633 | } | |
634 | reinit_frame_cache (); | |
635 | } | |
636 | ||
637 | void | |
638 | _initialize_m88k_tdep () | |
639 | { | |
640 | tm_print_insn = print_insn_m88k; | |
641 | } |