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* breakpoint.c (adjust_breakpoint_address): Don't adjust
[binutils.git] / gas / config / tc-xtensa.c
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e0001a05
NC		 1/* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright 2003 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
20
21#include <string.h>
22#include "as.h"
23#include "sb.h"
24#include "safe-ctype.h"
25#include "tc-xtensa.h"
26#include "frags.h"
27#include "subsegs.h"
28#include "xtensa-relax.h"
29#include "xtensa-istack.h"
cda2eb9e 30#include "dwarf2dbg.h"
e0001a05
NC		 31#include "struc-symbol.h"
32#include "xtensa-config.h"
33
34#ifndef uint32
35#define uint32 unsigned int
36#endif
37#ifndef int32
38#define int32 signed int
39#endif
40
41/* Notes:
42
43 There are 3 forms for instructions,
44 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
45 2) the TInsn -- handles instructions/labels and literals;
46 all operands are assumed to be expressions
47 3) the IStack -- a stack of TInsn. this allows us to
48 reason about the generated expansion instructions
49
50 Naming conventions (used somewhat inconsistently):
51 The xtensa_ functions are exported
52 The xg_ functions are internal
53
54 We also have a couple of different extensibility mechanisms.
55 1) The idiom replacement:
56 This is used when a line is first parsed to
57 replace an instruction pattern with another instruction
58 It is currently limited to replacements of instructions
59 with constant operands.
60 2) The xtensa-relax.c mechanism that has stronger instruction
61 replacement patterns. When an instruction's immediate field
62 does not fit the next instruction sequence is attempted.
63 In addition, "narrow" opcodes are supported this way. */
64
65
66/* Define characters with special meanings to GAS. */
67const char comment_chars[] = "#";
68const char line_comment_chars[] = "#";
69const char line_separator_chars[] = ";";
70const char EXP_CHARS[] = "eE";
71const char FLT_CHARS[] = "rRsSfFdDxXpP";
72
73
74/* Flag to indicate whether the hardware supports the density option.
75 If not, enabling density instructions (via directives or --density flag)
76 is illegal. */
77
78#if STATIC_LIBISA
79bfd_boolean density_supported = XCHAL_HAVE_DENSITY;
80#else
81bfd_boolean density_supported = TRUE;
82#endif
83
84#define XTENSA_FETCH_WIDTH 4
85
86/* Flags for properties of the last instruction in a segment. */
87#define FLAG_IS_A0_WRITER 0x1
88#define FLAG_IS_BAD_LOOPEND 0x2
89
90
91/* We define a special segment names ".literal" to place literals
92 into. The .fini and .init sections are special because they
93 contain code that is moved together by the linker. We give them
94 their own special .fini.literal and .init.literal sections. */
95
96#define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
97#define FINI_SECTION_NAME xtensa_section_rename (".fini")
98#define INIT_SECTION_NAME xtensa_section_rename (".init")
99#define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
100#define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
101
102
103/* This type is used for the directive_stack to keep track of the
104 state of the literal collection pools. */
105
106typedef struct lit_state_struct
107{
108 const char *lit_seg_name;
109 const char *init_lit_seg_name;
110 const char *fini_lit_seg_name;
111 segT lit_seg;
112 segT init_lit_seg;
113 segT fini_lit_seg;
114} lit_state;
115
116static lit_state default_lit_sections;
117
118
119/* We keep lists of literal segments. The seg_list type is the node
120 for such a list. The *_literal_head locals are the heads of the
121 various lists. All of these lists have a dummy node at the start. */
122
123typedef struct seg_list_struct
124{
125 struct seg_list_struct *next;
126 segT seg;
127} seg_list;
128
129static seg_list literal_head_h;
130static seg_list *literal_head = &literal_head_h;
131static seg_list init_literal_head_h;
132static seg_list *init_literal_head = &init_literal_head_h;
133static seg_list fini_literal_head_h;
134static seg_list *fini_literal_head = &fini_literal_head_h;
135
136
82e7541d
BW		 137/* Lists of symbols. We keep a list of symbols that label the current
138 instruction, so that we can adjust the symbols when inserting alignment
139 for various instructions. We also keep a list of all the symbols on
140 literals, so that we can fix up those symbols when the literals are
141 later moved into the text sections. */
142
143typedef struct sym_list_struct
144{
145 struct sym_list_struct *next;
146 symbolS *sym;
147} sym_list;
148
149static sym_list *insn_labels = NULL;
150static sym_list *free_insn_labels = NULL;
151static sym_list *saved_insn_labels = NULL;
152
153static sym_list *literal_syms;
154
155
e0001a05
NC		 156/* Global flag to indicate when we are emitting literals. */
157int generating_literals = 0;
158
159
160/* Structure for saving the current state before emitting literals. */
161typedef struct emit_state_struct
162{
163 const char *name;
164 segT now_seg;
165 subsegT now_subseg;
166 int generating_literals;
167} emit_state;
168
169
170/* Directives. */
171
172typedef enum
173{
174 directive_none = 0,
175 directive_literal,
176 directive_density,
177 directive_generics,
178 directive_relax,
179 directive_freeregs,
180 directive_longcalls,
181 directive_literal_prefix
182} directiveE;
183
184typedef struct
185{
186 const char *name;
187 bfd_boolean can_be_negated;
188} directive_infoS;
189
190const directive_infoS directive_info[] =
191{
192 {"none", FALSE},
193 {"literal", FALSE},
194 {"density", TRUE},
195 {"generics", TRUE},
196 {"relax", TRUE},
197 {"freeregs", FALSE},
198 {"longcalls", TRUE},
199 {"literal_prefix", FALSE}
200};
201
202bfd_boolean directive_state[] =
203{
204 FALSE, /* none */
205 FALSE, /* literal */
206#if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
207 FALSE, /* density */
208#else
209 TRUE, /* density */
210#endif
211 TRUE, /* generics */
212 TRUE, /* relax */
213 FALSE, /* freeregs */
214 FALSE, /* longcalls */
215 FALSE /* literal_prefix */
216};
217
218
219enum xtensa_relax_statesE
220{
221 RELAX_ALIGN_NEXT_OPCODE,
222 /* Use the first opcode of the next fragment to determine the
223 alignment requirements. This is ONLY used for LOOPS
224 currently. */
225
226 RELAX_DESIRE_ALIGN_IF_TARGET,
227 /* These are placed in front of labels. They will all be converted
228 to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
229 relaxation begins. */
230
231 RELAX_ADD_NOP_IF_A0_B_RETW,
232 /* These are placed in front of conditional branches. It will be
233 turned into a NOP (using a1) if the branch is immediately
234 followed by a RETW or RETW.N. Otherwise it will be turned into
235 an rs_fill of 0 before relaxation begins. */
236
237 RELAX_ADD_NOP_IF_PRE_LOOP_END,
238 /* These are placed after JX instructions. It will be turned into a
239 NOP if there is one instruction before a loop end label.
240 Otherwise it will be turned into an rs_fill of 0 before
241 relaxation begins. This is used to avoid a hardware TIE
242 interlock issue prior to T1040. */
243
244 RELAX_ADD_NOP_IF_SHORT_LOOP,
245 /* These are placed after LOOP instructions. It will be turned into
246 a NOP when: (1) there are less than 3 instructions in the loop;
247 we place 2 of these in a row to add up to 2 NOPS in short loops;
248 or (2) The instructions in the loop do not include a branch or
249 jump. Otherwise it will be turned into an rs_fill of 0 before
250 relaxation begins. This is used to avoid hardware bug
251 PR3830. */
252
253 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
254 /* These are placed after LOOP instructions. It will be turned into
255 a NOP if there are less than 12 bytes to the end of some other
256 loop's end. Otherwise it will be turned into an rs_fill of 0
257 before relaxation begins. This is used to avoid hardware bug
258 PR3830. */
259
260 RELAX_DESIRE_ALIGN,
261 /* The next fragment like its first instruction to NOT cross a
262 4-byte boundary. */
263
264 RELAX_LOOP_END,
265 /* This will be turned into a NOP or NOP.N if the previous
266 instruction is expanded to negate a loop. */
267
268 RELAX_LOOP_END_ADD_NOP,
269 /* When the code density option is available, this will generate a
270 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
271 fragment with a NOP in it. */
272
273 RELAX_LITERAL,
274 /* Another fragment could generate an expansion here but has not yet. */
275
276 RELAX_LITERAL_NR,
277 /* Expansion has been generated by an instruction that generates a
278 literal. However, the stretch has NOT been reported yet in this
279 fragment. */
280
281 RELAX_LITERAL_FINAL,
282 /* Expansion has been generated by an instruction that generates a
283 literal. */
284
285 RELAX_LITERAL_POOL_BEGIN,
286 RELAX_LITERAL_POOL_END,
287 /* Technically these are not relaxations at all, but mark a location
288 to store literals later. Note that fr_var stores the frchain for
289 BEGIN frags and fr_var stores now_seg for END frags. */
290
291 RELAX_NARROW,
292 /* The last instruction in this fragment (at->fr_opcode) can be
293 freely replaced with a single wider instruction if a future
294 alignment desires or needs it. */
295
296 RELAX_IMMED,
297 /* The last instruction in this fragment (at->fr_opcode) contains
298 the value defined by fr_symbol (fr_offset = 0). If the value
299 does not fit, use the specified expansion. This is similar to
300 "NARROW", except that these may not be expanded in order to align
301 code. */
302
303 RELAX_IMMED_STEP1,
304 /* The last instruction in this fragment (at->fr_opcode) contains a
305 literal. It has already been expanded at least 1 step. */
306
307 RELAX_IMMED_STEP2
308 /* The last instruction in this fragment (at->fr_opcode) contains a
309 literal. It has already been expanded at least 2 steps. */
310};
311
312/* This is used as a stopper to bound the number of steps that
313 can be taken. */
314#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
315
316
317typedef bfd_boolean (*frag_predicate) (const fragS *);
318
319
320/* Directive functions. */
321
322static bfd_boolean use_generics
323 PARAMS ((void));
324static bfd_boolean use_longcalls
325 PARAMS ((void));
326static bfd_boolean code_density_available
327 PARAMS ((void));
328static bfd_boolean can_relax
329 PARAMS ((void));
330static void directive_push
331 PARAMS ((directiveE, bfd_boolean, const void *));
332static void directive_pop
333 PARAMS ((directiveE *, bfd_boolean *, const char **,
334 unsigned int *, const void **));
335static void directive_balance
336 PARAMS ((void));
337static bfd_boolean inside_directive
338 PARAMS ((directiveE));
339static void get_directive
340 PARAMS ((directiveE *, bfd_boolean *));
341static void xtensa_begin_directive
342 PARAMS ((int));
343static void xtensa_end_directive
344 PARAMS ((int));
345static void xtensa_literal_prefix
346 PARAMS ((char const *, int));
347static void xtensa_literal_position
348 PARAMS ((int));
349static void xtensa_literal_pseudo
350 PARAMS ((int));
351
352/* Parsing and Idiom Translation Functions. */
353
354static const char *expression_end
355 PARAMS ((const char *));
356static unsigned tc_get_register
357 PARAMS ((const char *));
358static void expression_maybe_register
359 PARAMS ((xtensa_operand, expressionS *));
360static int tokenize_arguments
361 PARAMS ((char **, char *));
362static bfd_boolean parse_arguments
363 PARAMS ((TInsn *, int, char **));
364static int xg_translate_idioms
365 PARAMS ((char **, int *, char **));
366static int xg_translate_sysreg_op
367 PARAMS ((char **, int *, char **));
368static void xg_reverse_shift_count
369 PARAMS ((char **));
370static int xg_arg_is_constant
371 PARAMS ((char *, offsetT *));
372static void xg_replace_opname
373 PARAMS ((char **, char *));
374static int xg_check_num_args
375 PARAMS ((int *, int, char *, char **));
376
377/* Functions for dealing with the Xtensa ISA. */
378
379static bfd_boolean operand_is_immed
380 PARAMS ((xtensa_operand));
381static bfd_boolean operand_is_pcrel_label
382 PARAMS ((xtensa_operand));
383static int get_relaxable_immed
384 PARAMS ((xtensa_opcode));
385static xtensa_opcode get_opcode_from_buf
386 PARAMS ((const char *));
387static bfd_boolean is_direct_call_opcode
388 PARAMS ((xtensa_opcode));
389static bfd_boolean is_call_opcode
390 PARAMS ((xtensa_opcode));
391static bfd_boolean is_entry_opcode
392 PARAMS ((xtensa_opcode));
393static bfd_boolean is_loop_opcode
394 PARAMS ((xtensa_opcode));
395static bfd_boolean is_the_loop_opcode
396 PARAMS ((xtensa_opcode));
397static bfd_boolean is_jx_opcode
398 PARAMS ((xtensa_opcode));
399static bfd_boolean is_windowed_return_opcode
400 PARAMS ((xtensa_opcode));
401static bfd_boolean is_conditional_branch_opcode
402 PARAMS ((xtensa_opcode));
403static bfd_boolean is_branch_or_jump_opcode
404 PARAMS ((xtensa_opcode));
405static bfd_reloc_code_real_type opnum_to_reloc
406 PARAMS ((int));
407static int reloc_to_opnum
408 PARAMS ((bfd_reloc_code_real_type));
409static void xtensa_insnbuf_set_operand
410 PARAMS ((xtensa_insnbuf, xtensa_opcode, xtensa_operand, int32,
411 const char *, unsigned int));
412static uint32 xtensa_insnbuf_get_operand
413 PARAMS ((xtensa_insnbuf, xtensa_opcode, int));
414static void xtensa_insnbuf_set_immediate_field
415 PARAMS ((xtensa_opcode, xtensa_insnbuf, int32, const char *,
416 unsigned int));
417static bfd_boolean is_negatable_branch
418 PARAMS ((TInsn *));
419
e0001a05
NC		 420/* Various Other Internal Functions. */
421
422static bfd_boolean is_unique_insn_expansion
423 PARAMS ((TransitionRule *));
424static int xg_get_insn_size
425 PARAMS ((TInsn *));
426static int xg_get_build_instr_size
427 PARAMS ((BuildInstr *));
428static bfd_boolean xg_is_narrow_insn
429 PARAMS ((TInsn *));
430static bfd_boolean xg_is_single_relaxable_insn
431 PARAMS ((TInsn *));
432static int xg_get_max_narrow_insn_size
433 PARAMS ((xtensa_opcode));
434static int xg_get_max_insn_widen_size
435 PARAMS ((xtensa_opcode));
436static int xg_get_max_insn_widen_literal_size
437 PARAMS ((xtensa_opcode));
438static bfd_boolean xg_is_relaxable_insn
439 PARAMS ((TInsn *, int));
440static symbolS *get_special_literal_symbol
441 PARAMS ((void));
442static symbolS *get_special_label_symbol
443 PARAMS ((void));
444static bfd_boolean xg_build_to_insn
445 PARAMS ((TInsn *, TInsn *, BuildInstr *));
446static bfd_boolean xg_build_to_stack
447 PARAMS ((IStack *, TInsn *, BuildInstr *));
448static bfd_boolean xg_expand_to_stack
449 PARAMS ((IStack *, TInsn *, int));
450static bfd_boolean xg_expand_narrow
451 PARAMS ((TInsn *, TInsn *));
452static bfd_boolean xg_immeds_fit
453 PARAMS ((const TInsn *));
454static bfd_boolean xg_symbolic_immeds_fit
455 PARAMS ((const TInsn *, segT, fragS *, offsetT, long));
456static bfd_boolean xg_check_operand
457 PARAMS ((int32, xtensa_operand));
458static int is_dnrange
459 PARAMS ((fragS *, symbolS *, long));
460static int xg_assembly_relax
461 PARAMS ((IStack *, TInsn *, segT, fragS *, offsetT, int, long));
462static void xg_force_frag_space
463 PARAMS ((int));
464static void xg_finish_frag
465 PARAMS ((char *, enum xtensa_relax_statesE, int, bfd_boolean));
466static bfd_boolean is_branch_jmp_to_next
467 PARAMS ((TInsn *, fragS *));
468static void xg_add_branch_and_loop_targets
469 PARAMS ((TInsn *));
470static bfd_boolean xg_instruction_matches_rule
471 PARAMS ((TInsn *, TransitionRule *));
472static TransitionRule *xg_instruction_match
473 PARAMS ((TInsn *));
474static bfd_boolean xg_build_token_insn
475 PARAMS ((BuildInstr *, TInsn *, TInsn *));
476static bfd_boolean xg_simplify_insn
477 PARAMS ((TInsn *, TInsn *));
478static bfd_boolean xg_expand_assembly_insn
479 PARAMS ((IStack *, TInsn *));
480static symbolS *xg_assemble_literal
481 PARAMS ((TInsn *));
482static void xg_assemble_literal_space
483 PARAMS ((int));
484static symbolS *xtensa_create_literal_symbol
485 PARAMS ((segT, fragS *));
82e7541d
BW		 486static void xtensa_add_literal_sym
487 PARAMS ((symbolS *));
488static void xtensa_add_insn_label
489 PARAMS ((symbolS *));
490static void xtensa_clear_insn_labels
491 PARAMS ((void));
e0001a05
NC		 492static bfd_boolean get_is_linkonce_section
493 PARAMS ((bfd *, segT));
494static bfd_boolean xg_emit_insn
495 PARAMS ((TInsn *, bfd_boolean));
496static bfd_boolean xg_emit_insn_to_buf
497 PARAMS ((TInsn *, char *, fragS *, offsetT, bfd_boolean));
498static bfd_boolean xg_add_opcode_fix
499 PARAMS ((xtensa_opcode, int, expressionS *, fragS *, offsetT));
500static void xg_resolve_literals
501 PARAMS ((TInsn *, symbolS *));
502static void xg_resolve_labels
503 PARAMS ((TInsn *, symbolS *));
504static void xg_assemble_tokens
505 PARAMS ((TInsn *));
506static bfd_boolean is_register_writer
507 PARAMS ((const TInsn *, const char *, int));
508static bfd_boolean is_bad_loopend_opcode
509 PARAMS ((const TInsn *));
510static bfd_boolean is_unaligned_label
511 PARAMS ((symbolS *));
512static fragS *next_non_empty_frag
513 PARAMS ((const fragS *));
514static xtensa_opcode next_frag_opcode
515 PARAMS ((const fragS *));
516static void update_next_frag_nop_state
517 PARAMS ((fragS *));
518static bfd_boolean next_frag_is_branch_target
519 PARAMS ((const fragS *));
520static bfd_boolean next_frag_is_loop_target
521 PARAMS ((const fragS *));
522static addressT next_frag_pre_opcode_bytes
523 PARAMS ((const fragS *));
524static bfd_boolean is_next_frag_target
525 PARAMS ((const fragS *, const fragS *));
526static void xtensa_mark_literal_pool_location
61846f28 527 PARAMS ((void));
e0001a05 528static void xtensa_move_labels
82e7541d 529 PARAMS ((fragS *, valueT, bfd_boolean));
e0001a05
NC		 530static void assemble_nop
531 PARAMS ((size_t, char *));
532static addressT get_expanded_loop_offset
533 PARAMS ((xtensa_opcode));
534static fragS *get_literal_pool_location
535 PARAMS ((segT));
536static void set_literal_pool_location
537 PARAMS ((segT, fragS *));
538
539/* Helpers for xtensa_end(). */
540
541static void xtensa_cleanup_align_frags
542 PARAMS ((void));
543static void xtensa_fix_target_frags
544 PARAMS ((void));
545static bfd_boolean frag_can_negate_branch
546 PARAMS ((fragS *));
547static void xtensa_fix_a0_b_retw_frags
548 PARAMS ((void));
549static bfd_boolean next_instrs_are_b_retw
550 PARAMS ((fragS *));
551static void xtensa_fix_b_j_loop_end_frags
552 PARAMS ((void));
553static bfd_boolean next_instr_is_loop_end
554 PARAMS ((fragS *));
555static void xtensa_fix_close_loop_end_frags
556 PARAMS ((void));
557static size_t min_bytes_to_other_loop_end
558 PARAMS ((fragS *, fragS *, offsetT, size_t));
559static size_t unrelaxed_frag_min_size
560 PARAMS ((fragS *));
561static void xtensa_fix_short_loop_frags
562 PARAMS ((void));
563static size_t count_insns_to_loop_end
564 PARAMS ((fragS *, bfd_boolean, size_t));
565static size_t unrelaxed_frag_min_insn_count
566 PARAMS ((fragS *));
567static bfd_boolean branch_before_loop_end
568 PARAMS ((fragS *));
569static bfd_boolean unrelaxed_frag_has_b_j
570 PARAMS ((fragS *));
571static void xtensa_sanity_check
572 PARAMS ((void));
573static bfd_boolean is_empty_loop
574 PARAMS ((const TInsn *, fragS *));
575static bfd_boolean is_local_forward_loop
576 PARAMS ((const TInsn *, fragS *));
577
578/* Alignment Functions. */
579
580static size_t get_text_align_power
581 PARAMS ((int));
582static addressT get_text_align_max_fill_size
583 PARAMS ((int, bfd_boolean, bfd_boolean));
584static addressT get_text_align_fill_size
585 PARAMS ((addressT, int, int, bfd_boolean, bfd_boolean));
586static size_t get_text_align_nop_count
587 PARAMS ((size_t, bfd_boolean));
588static size_t get_text_align_nth_nop_size
589 PARAMS ((size_t, size_t, bfd_boolean));
590static addressT get_noop_aligned_address
591 PARAMS ((fragS *, addressT));
592static addressT get_widen_aligned_address
593 PARAMS ((fragS *, addressT));
594
595/* Helpers for xtensa_relax_frag(). */
596
597static long relax_frag_text_align
598 PARAMS ((fragS *, long));
599static long relax_frag_add_nop
600 PARAMS ((fragS *));
601static long relax_frag_narrow
602 PARAMS ((fragS *, long));
603static bfd_boolean future_alignment_required
604 PARAMS ((fragS *, long));
605static long relax_frag_immed
606 PARAMS ((segT, fragS *, long, int, int *));
607
608/* Helpers for md_convert_frag(). */
609
610static void convert_frag_align_next_opcode
611 PARAMS ((fragS *));
612static void convert_frag_narrow
613 PARAMS ((fragS *));
614static void convert_frag_immed
615 PARAMS ((segT, fragS *, int));
616static fixS *fix_new_exp_in_seg
617 PARAMS ((segT, subsegT, fragS *, int, int, expressionS *, int,
618 bfd_reloc_code_real_type));
619static void convert_frag_immed_finish_loop
620 PARAMS ((segT, fragS *, TInsn *));
621static offsetT get_expression_value
622 PARAMS ((segT, expressionS *));
623
624/* Flags for the Last Instruction in Each Subsegment. */
625
626static unsigned get_last_insn_flags
627 PARAMS ((segT, subsegT));
628static void set_last_insn_flags
629 PARAMS ((segT, subsegT, unsigned, bfd_boolean));
630
631/* Segment list functions. */
632
633static void xtensa_remove_section
634 PARAMS ((segT));
635static void xtensa_insert_section
636 PARAMS ((segT, segT));
637static void xtensa_move_seg_list_to_beginning
638 PARAMS ((seg_list *));
639static void xtensa_move_literals
640 PARAMS ((void));
e0001a05
NC		 641static void xtensa_reorder_seg_list
642 PARAMS ((seg_list *, segT));
643static void xtensa_reorder_segments
644 PARAMS ((void));
645static segT get_last_sec
646 PARAMS ((void));
647static void xtensa_switch_to_literal_fragment
648 PARAMS ((emit_state *));
649static void xtensa_switch_section_emit_state
650 PARAMS ((emit_state *, segT, subsegT));
651static void xtensa_restore_emit_state
652 PARAMS ((emit_state *));
653static void cache_literal_section
654 PARAMS ((seg_list *, const char *, segT *));
655static segT retrieve_literal_seg
656 PARAMS ((seg_list *, const char *));
657static segT seg_present
658 PARAMS ((const char *));
659static void add_seg_list
660 PARAMS ((seg_list *, segT));
661
662/* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
663
664static void xtensa_create_property_segments
665 PARAMS ((frag_predicate, const char *, xt_section_type));
666static segment_info_type *retrieve_segment_info
667 PARAMS ((segT));
668static segT retrieve_xtensa_section
669 PARAMS ((char *));
670static bfd_boolean section_has_property
671 PARAMS ((segT sec, frag_predicate));
672static void add_xt_block_frags
673 PARAMS ((segT, segT, xtensa_block_info **, frag_predicate));
674static bfd_boolean get_frag_is_literal
675 PARAMS ((const fragS *));
676static bfd_boolean get_frag_is_insn
677 PARAMS ((const fragS *));
678
679/* Import from elf32-xtensa.c in BFD library. */
680extern char *xtensa_get_property_section_name
b614a702 681 PARAMS ((asection *, const char *));
e0001a05
NC		 682
683/* TInsn and IStack functions. */
684static bfd_boolean tinsn_has_symbolic_operands
685 PARAMS ((const TInsn *));
686static bfd_boolean tinsn_has_invalid_symbolic_operands
687 PARAMS ((const TInsn *));
688static bfd_boolean tinsn_has_complex_operands
689 PARAMS ((const TInsn *));
690static bfd_boolean tinsn_to_insnbuf
691 PARAMS ((TInsn *, xtensa_insnbuf));
692static bfd_boolean tinsn_check_arguments
693 PARAMS ((const TInsn *));
694static void tinsn_from_chars
695 PARAMS ((TInsn *, char *));
696static void tinsn_immed_from_frag
697 PARAMS ((TInsn *, fragS *));
698static int get_num_stack_text_bytes
699 PARAMS ((IStack *));
700static int get_num_stack_literal_bytes
701 PARAMS ((IStack *));
702
703/* Expression Utilities. */
704bfd_boolean expr_is_const
705 PARAMS ((const expressionS *));
706offsetT get_expr_const
707 PARAMS ((const expressionS *));
708void set_expr_const
709 PARAMS ((expressionS *, offsetT));
710void set_expr_symbol_offset
711 PARAMS ((expressionS *, symbolS *, offsetT));
712bfd_boolean expr_is_equal
713 PARAMS ((expressionS *, expressionS *));
714static void copy_expr
715 PARAMS ((expressionS *, const expressionS *));
716
717#ifdef XTENSA_SECTION_RENAME
718static void build_section_rename
719 PARAMS ((const char *));
720static void add_section_rename
721 PARAMS ((char *, char *));
722#endif
723
e0001a05
NC		 724
725/* ISA imported from bfd. */
726extern xtensa_isa xtensa_default_isa;
727
728extern int target_big_endian;
729
730static xtensa_opcode xtensa_addi_opcode;
731static xtensa_opcode xtensa_addmi_opcode;
732static xtensa_opcode xtensa_call0_opcode;
733static xtensa_opcode xtensa_call4_opcode;
734static xtensa_opcode xtensa_call8_opcode;
735static xtensa_opcode xtensa_call12_opcode;
736static xtensa_opcode xtensa_callx0_opcode;
737static xtensa_opcode xtensa_callx4_opcode;
738static xtensa_opcode xtensa_callx8_opcode;
739static xtensa_opcode xtensa_callx12_opcode;
740static xtensa_opcode xtensa_entry_opcode;
741static xtensa_opcode xtensa_isync_opcode;
742static xtensa_opcode xtensa_j_opcode;
743static xtensa_opcode xtensa_jx_opcode;
744static xtensa_opcode xtensa_loop_opcode;
745static xtensa_opcode xtensa_loopnez_opcode;
746static xtensa_opcode xtensa_loopgtz_opcode;
747static xtensa_opcode xtensa_nop_n_opcode;
748static xtensa_opcode xtensa_or_opcode;
749static xtensa_opcode xtensa_ret_opcode;
750static xtensa_opcode xtensa_ret_n_opcode;
751static xtensa_opcode xtensa_retw_opcode;
752static xtensa_opcode xtensa_retw_n_opcode;
753static xtensa_opcode xtensa_rsr_opcode;
754static xtensa_opcode xtensa_waiti_opcode;
755
756\f
757/* Command-line Options. */
758
759bfd_boolean use_literal_section = TRUE;
760static bfd_boolean align_targets = TRUE;
761static bfd_boolean align_only_targets = FALSE;
762static bfd_boolean software_a0_b_retw_interlock = TRUE;
763static bfd_boolean has_a0_b_retw = FALSE;
764static bfd_boolean workaround_a0_b_retw = TRUE;
765
766static bfd_boolean software_avoid_b_j_loop_end = TRUE;
767static bfd_boolean workaround_b_j_loop_end = TRUE;
768static bfd_boolean maybe_has_b_j_loop_end = FALSE;
769
770static bfd_boolean software_avoid_short_loop = TRUE;
771static bfd_boolean workaround_short_loop = TRUE;
772static bfd_boolean maybe_has_short_loop = FALSE;
773
774static bfd_boolean software_avoid_close_loop_end = TRUE;
775static bfd_boolean workaround_close_loop_end = TRUE;
776static bfd_boolean maybe_has_close_loop_end = FALSE;
777
778/* When avoid_short_loops is true, all loops with early exits must
779 have at least 3 instructions. avoid_all_short_loops is a modifier
780 to the avoid_short_loop flag. In addition to the avoid_short_loop
781 actions, all straightline loopgtz and loopnez must have at least 3
782 instructions. */
783
784static bfd_boolean software_avoid_all_short_loops = TRUE;
785static bfd_boolean workaround_all_short_loops = TRUE;
786
787/* This is on a per-instruction basis. */
788static bfd_boolean specific_opcode = FALSE;
789
790enum
791{
792 option_density = OPTION_MD_BASE,
793 option_no_density,
794
795 option_relax,
796 option_no_relax,
797
798 option_generics,
799 option_no_generics,
800
801 option_text_section_literals,
802 option_no_text_section_literals,
803
804 option_align_targets,
805 option_no_align_targets,
806
807 option_align_only_targets,
808 option_no_align_only_targets,
809
810 option_longcalls,
811 option_no_longcalls,
812
813 option_workaround_a0_b_retw,
814 option_no_workaround_a0_b_retw,
815
816 option_workaround_b_j_loop_end,
817 option_no_workaround_b_j_loop_end,
818
819 option_workaround_short_loop,
820 option_no_workaround_short_loop,
821
822 option_workaround_all_short_loops,
823 option_no_workaround_all_short_loops,
824
825 option_workaround_close_loop_end,
826 option_no_workaround_close_loop_end,
827
828 option_no_workarounds,
829
830#ifdef XTENSA_SECTION_RENAME
831 option_literal_section_name,
832 option_text_section_name,
833 option_data_section_name,
834 option_bss_section_name,
835 option_rename_section_name,
836#endif
837
838 option_eb,
839 option_el
840};
841
842const char *md_shortopts = "";
843
844struct option md_longopts[] =
845{
846 {"density", no_argument, NULL, option_density},
847 {"no-density", no_argument, NULL, option_no_density},
848 /* At least as early as alameda, --[no-]relax didn't work as
849 documented, so as of albany, --[no-]relax is equivalent to
850 --[no-]generics. Both of these will be deprecated in
851 BearValley. */
852 {"relax", no_argument, NULL, option_generics},
853 {"no-relax", no_argument, NULL, option_no_generics},
854 {"generics", no_argument, NULL, option_generics},
855 {"no-generics", no_argument, NULL, option_no_generics},
856 {"text-section-literals", no_argument, NULL, option_text_section_literals},
857 {"no-text-section-literals", no_argument, NULL,
858 option_no_text_section_literals},
859 /* This option was changed from -align-target to -target-align
860 because it conflicted with the "-al" option. */
861 {"target-align", no_argument, NULL, option_align_targets},
862 {"no-target-align", no_argument, NULL,
863 option_no_align_targets},
864#if 0
865 /* This option should do a better job aligning targets because
866 it will only attempt to align targets that are the target of a
867 branch. */
868 { "target-align-only", no_argument, NULL, option_align_only_targets },
869 { "no-target-align-only", no_argument, NULL, option_no_align_only_targets },
870#endif /* 0 */
871 {"longcalls", no_argument, NULL, option_longcalls},
872 {"no-longcalls", no_argument, NULL, option_no_longcalls},
873
874 {"no-workaround-a0-b-retw", no_argument, NULL,
875 option_no_workaround_a0_b_retw},
876 {"workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw},
877
878 {"no-workaround-b-j-loop-end", no_argument, NULL,
879 option_no_workaround_b_j_loop_end},
880 {"workaround-b-j-loop-end", no_argument, NULL,
881 option_workaround_b_j_loop_end},
882
883 {"no-workaround-short-loops", no_argument, NULL,
884 option_no_workaround_short_loop},
885 {"workaround-short-loops", no_argument, NULL, option_workaround_short_loop},
886
887 {"no-workaround-all-short-loops", no_argument, NULL,
888 option_no_workaround_all_short_loops},
889 {"workaround-all-short-loop", no_argument, NULL,
890 option_workaround_all_short_loops},
891
892 {"no-workaround-close-loop-end", no_argument, NULL,
893 option_no_workaround_close_loop_end},
894 {"workaround-close-loop-end", no_argument, NULL,
895 option_workaround_close_loop_end},
896
897 {"no-workarounds", no_argument, NULL, option_no_workarounds},
898
899#ifdef XTENSA_SECTION_RENAME
900 {"literal-section-name", required_argument, NULL,
901 option_literal_section_name},
902 {"text-section-name", required_argument, NULL,
903 option_text_section_name},
904 {"data-section-name", required_argument, NULL,
905 option_data_section_name},
906 {"rename-section", required_argument, NULL,
907 option_rename_section_name},
908 {"bss-section-name", required_argument, NULL,
909 option_bss_section_name},
910#endif /* XTENSA_SECTION_RENAME */
911
912 {NULL, no_argument, NULL, 0}
913};
914
915size_t md_longopts_size = sizeof md_longopts;
916
917
918int
919md_parse_option (c, arg)
920 int c;
921 char *arg;
922{
923 switch (c)
924 {
925 case option_density:
926 if (!density_supported)
927 {
928 as_bad (_("'--density' option not supported in this Xtensa "
929 "configuration"));
930 return 0;
931 }
932 directive_state[directive_density] = TRUE;
933 return 1;
934 case option_no_density:
935 directive_state[directive_density] = FALSE;
936 return 1;
937 case option_generics:
938 directive_state[directive_generics] = TRUE;
939 return 1;
940 case option_no_generics:
941 directive_state[directive_generics] = FALSE;
942 return 1;
943 case option_longcalls:
944 directive_state[directive_longcalls] = TRUE;
945 return 1;
946 case option_no_longcalls:
947 directive_state[directive_longcalls] = FALSE;
948 return 1;
949 case option_text_section_literals:
950 use_literal_section = FALSE;
951 return 1;
952 case option_no_text_section_literals:
953 use_literal_section = TRUE;
954 return 1;
955 case option_workaround_a0_b_retw:
956 workaround_a0_b_retw = TRUE;
957 software_a0_b_retw_interlock = TRUE;
958 return 1;
959 case option_no_workaround_a0_b_retw:
960 workaround_a0_b_retw = FALSE;
961 software_a0_b_retw_interlock = FALSE;
962 return 1;
963 case option_workaround_b_j_loop_end:
964 workaround_b_j_loop_end = TRUE;
965 software_avoid_b_j_loop_end = TRUE;
966 return 1;
967 case option_no_workaround_b_j_loop_end:
968 workaround_b_j_loop_end = FALSE;
969 software_avoid_b_j_loop_end = FALSE;
970 return 1;
971
972 case option_workaround_short_loop:
973 workaround_short_loop = TRUE;
974 software_avoid_short_loop = TRUE;
975 return 1;
976 case option_no_workaround_short_loop:
977 workaround_short_loop = FALSE;
978 software_avoid_short_loop = FALSE;
979 return 1;
980
981 case option_workaround_all_short_loops:
982 workaround_all_short_loops = TRUE;
983 software_avoid_all_short_loops = TRUE;
984 return 1;
985 case option_no_workaround_all_short_loops:
986 workaround_all_short_loops = FALSE;
987 software_avoid_all_short_loops = FALSE;
988 return 1;
989
990 case option_workaround_close_loop_end:
991 workaround_close_loop_end = TRUE;
992 software_avoid_close_loop_end = TRUE;
993 return 1;
994 case option_no_workaround_close_loop_end:
995 workaround_close_loop_end = FALSE;
996 software_avoid_close_loop_end = FALSE;
997 return 1;
998
999 case option_no_workarounds:
1000 workaround_a0_b_retw = FALSE;
1001 software_a0_b_retw_interlock = FALSE;
1002 workaround_b_j_loop_end = FALSE;
1003 software_avoid_b_j_loop_end = FALSE;
1004 workaround_short_loop = FALSE;
1005 software_avoid_short_loop = FALSE;
1006 workaround_all_short_loops = FALSE;
1007 software_avoid_all_short_loops = FALSE;
1008 workaround_close_loop_end = FALSE;
1009 software_avoid_close_loop_end = FALSE;
1010 return 1;
1011
1012 case option_align_targets:
1013 align_targets = TRUE;
1014 return 1;
1015 case option_no_align_targets:
1016 align_targets = FALSE;
1017 return 1;
1018
1019 case option_align_only_targets:
1020 align_only_targets = TRUE;
1021 return 1;
1022 case option_no_align_only_targets:
1023 align_only_targets = FALSE;
1024 return 1;
1025
1026#ifdef XTENSA_SECTION_RENAME
1027 case option_literal_section_name:
1028 add_section_rename (".literal", arg);
1029 as_warn (_("'--literal-section-name' is deprecated; "
1030 "use '--rename-section .literal=NEWNAME'"));
1031 return 1;
1032
1033 case option_text_section_name:
1034 add_section_rename (".text", arg);
1035 as_warn (_("'--text-section-name' is deprecated; "
1036 "use '--rename-section .text=NEWNAME'"));
1037 return 1;
1038
1039 case option_data_section_name:
1040 add_section_rename (".data", arg);
1041 as_warn (_("'--data-section-name' is deprecated; "
1042 "use '--rename-section .data=NEWNAME'"));
1043 return 1;
1044
1045 case option_bss_section_name:
1046 add_section_rename (".bss", arg);
1047 as_warn (_("'--bss-section-name' is deprecated; "
1048 "use '--rename-section .bss=NEWNAME'"));
1049 return 1;
1050
1051 case option_rename_section_name:
1052 build_section_rename (arg);
1053 return 1;
1054#endif /* XTENSA_SECTION_RENAME */
1055
1056 case 'Q':
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 return 1;
1060
1061 default:
1062 return 0;
1063 }
1064}
1065
1066
1067void
1068md_show_usage (stream)
1069 FILE *stream;
1070{
1071 fputs ("\nXtensa options:\n"
1072 "--[no-]density [Do not] emit density instructions\n"
1073 "--[no-]relax [Do not] perform branch relaxation\n"
1074 "--[no-]generics [Do not] transform instructions\n"
1075 "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
1076 "--[no-]target-align [Do not] try to align branch targets\n"
1077 "--[no-]text-section-literals\n"
1078 " [Do not] put literals in the text section\n"
1079 "--no-workarounds Do not use any Xtensa workarounds\n"
1080#ifdef XTENSA_SECTION_RENAME
1081 "--rename-section old=new(:old1=new1)*\n"
1082 " Rename section 'old' to 'new'\n"
1083 "\nThe following Xtensa options are deprecated\n"
1084 "--literal-section-name Name of literal section (default .literal)\n"
1085 "--text-section-name Name of text section (default .text)\n"
1086 "--data-section-name Name of data section (default .data)\n"
1087 "--bss-section-name Name of bss section (default .bss)\n"
1088#endif
1089 , stream);
1090}
1091
1092\f
1093/* Directive data and functions. */
1094
1095typedef struct state_stackS_struct
1096{
1097 directiveE directive;
1098 bfd_boolean negated;
1099 bfd_boolean old_state;
1100 const char *file;
1101 unsigned int line;
1102 const void *datum;
1103 struct state_stackS_struct *prev;
1104} state_stackS;
1105
1106state_stackS *directive_state_stack;
1107
1108const pseudo_typeS md_pseudo_table[] =
1109{
1110 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
1111 {"literal_position", xtensa_literal_position, 0},
1112 {"frame", s_ignore, 0}, /* formerly used for STABS debugging */
1113 {"word", cons, 4},
1114 {"begin", xtensa_begin_directive, 0},
1115 {"end", xtensa_end_directive, 0},
e0001a05
NC		 1116 {"literal", xtensa_literal_pseudo, 0},
1117 {NULL, 0, 0},
1118};
1119
1120
1121bfd_boolean
1122use_generics ()
1123{
1124 return directive_state[directive_generics];
1125}
1126
1127
1128bfd_boolean
1129use_longcalls ()
1130{
1131 return directive_state[directive_longcalls];
1132}
1133
1134
1135bfd_boolean
1136code_density_available ()
1137{
1138 return directive_state[directive_density];
1139}
1140
1141
1142bfd_boolean
1143can_relax ()
1144{
1145 return use_generics ();
1146}
1147
1148
1149static void
1150directive_push (directive, negated, datum)
1151 directiveE directive;
1152 bfd_boolean negated;
1153 const void *datum;
1154{
1155 char *file;
1156 unsigned int line;
1157 state_stackS *stack = (state_stackS *) xmalloc (sizeof (state_stackS));
1158
1159 as_where (&file, &line);
1160
1161 stack->directive = directive;
1162 stack->negated = negated;
1163 stack->old_state = directive_state[directive];
1164 stack->file = file;
1165 stack->line = line;
1166 stack->datum = datum;
1167 stack->prev = directive_state_stack;
1168 directive_state_stack = stack;
1169
1170 directive_state[directive] = !negated;
1171}
1172
1173static void
1174directive_pop (directive, negated, file, line, datum)
1175 directiveE *directive;
1176 bfd_boolean *negated;
1177 const char **file;
1178 unsigned int *line;
1179 const void **datum;
1180{
1181 state_stackS *top = directive_state_stack;
1182
1183 if (!directive_state_stack)
1184 {
1185 as_bad (_("unmatched end directive"));
1186 *directive = directive_none;
1187 return;
1188 }
1189
1190 directive_state[directive_state_stack->directive] = top->old_state;
1191 *directive = top->directive;
1192 *negated = top->negated;
1193 *file = top->file;
1194 *line = top->line;
1195 *datum = top->datum;
1196 directive_state_stack = top->prev;
1197 free (top);
1198}
1199
1200
1201static void
1202directive_balance ()
1203{
1204 while (directive_state_stack)
1205 {
1206 directiveE directive;
1207 bfd_boolean negated;
1208 const char *file;
1209 unsigned int line;
1210 const void *datum;
1211
1212 directive_pop (&directive, &negated, &file, &line, &datum);
1213 as_warn_where ((char *) file, line,
1214 _(".begin directive with no matching .end directive"));
1215 }
1216}
1217
1218
1219static bfd_boolean
1220inside_directive (dir)
1221 directiveE dir;
1222{
1223 state_stackS *top = directive_state_stack;
1224
1225 while (top && top->directive != dir)
1226 top = top->prev;
1227
1228 return (top != NULL);
1229}
1230
1231
1232static void
1233get_directive (directive, negated)
1234 directiveE *directive;
1235 bfd_boolean *negated;
1236{
1237 int len;
1238 unsigned i;
1239
1240 if (strncmp (input_line_pointer, "no-", 3) != 0)
1241 *negated = FALSE;
1242 else
1243 {
1244 *negated = TRUE;
1245 input_line_pointer += 3;
1246 }
1247
1248 len = strspn (input_line_pointer,
1249 "abcdefghijklmnopqrstuvwxyz_/0123456789.");
1250
1251 for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i)
1252 {
1253 if (strncmp (input_line_pointer, directive_info[i].name, len) == 0)
1254 {
1255 input_line_pointer += len;
1256 *directive = (directiveE) i;
1257 if (*negated && !directive_info[i].can_be_negated)
1258 as_bad (_("directive %s can't be negated"),
1259 directive_info[i].name);
1260 return;
1261 }
1262 }
1263
1264 as_bad (_("unknown directive"));
1265 *directive = (directiveE) XTENSA_UNDEFINED;
1266}
1267
1268
1269static void
1270xtensa_begin_directive (ignore)
1271 int ignore ATTRIBUTE_UNUSED;
1272{
1273 directiveE directive;
1274 bfd_boolean negated;
1275 emit_state *state;
1276 int len;
1277 lit_state *ls;
1278
82e7541d
BW		 1279 md_flush_pending_output ();
1280
e0001a05
NC		 1281 get_directive (&directive, &negated);
1282 if (directive == (directiveE) XTENSA_UNDEFINED)
1283 {
1284 discard_rest_of_line ();
1285 return;
1286 }
1287
1288 switch (directive)
1289 {
1290 case directive_literal:
82e7541d
BW		 1291 if (!inside_directive (directive_literal))
1292 {
1293 /* Previous labels go with whatever follows this directive, not with
1294 the literal, so save them now. */
1295 saved_insn_labels = insn_labels;
1296 insn_labels = NULL;
1297 }
e0001a05
NC		 1298 state = (emit_state *) xmalloc (sizeof (emit_state));
1299 xtensa_switch_to_literal_fragment (state);
1300 directive_push (directive_literal, negated, state);
1301 break;
1302
1303 case directive_literal_prefix:
1304 /* Check to see if the current fragment is a literal
1305 fragment. If it is, then this operation is not allowed. */
1306 if (frag_now->tc_frag_data.is_literal)
1307 {
1308 as_bad (_("cannot set literal_prefix inside literal fragment"));
1309 return;
1310 }
1311
1312 /* Allocate the literal state for this section and push
1313 onto the directive stack. */
1314 ls = xmalloc (sizeof (lit_state));
1315 assert (ls);
1316
1317 *ls = default_lit_sections;
1318
1319 directive_push (directive_literal_prefix, negated, ls);
1320
1321 /* Parse the new prefix from the input_line_pointer. */
1322 SKIP_WHITESPACE ();
1323 len = strspn (input_line_pointer,
1324 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1325 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1326
1327 /* Process the new prefix. */
1328 xtensa_literal_prefix (input_line_pointer, len);
1329
1330 /* Skip the name in the input line. */
1331 input_line_pointer += len;
1332 break;
1333
1334 case directive_freeregs:
1335 /* This information is currently unused, but we'll accept the statement
1336 and just discard the rest of the line. This won't check the syntax,
1337 but it will accept every correct freeregs directive. */
1338 input_line_pointer += strcspn (input_line_pointer, "\n");
1339 directive_push (directive_freeregs, negated, 0);
1340 break;
1341
1342 case directive_density:
1343 if (!density_supported && !negated)
1344 {
1345 as_warn (_("Xtensa density option not supported; ignored"));
1346 break;
1347 }
1348 /* fall through */
1349
1350 default:
1351 directive_push (directive, negated, 0);
1352 break;
1353 }
1354
1355 demand_empty_rest_of_line ();
1356}
1357
1358
1359static void
1360xtensa_end_directive (ignore)
1361 int ignore ATTRIBUTE_UNUSED;
1362{
1363 directiveE begin_directive, end_directive;
1364 bfd_boolean begin_negated, end_negated;
1365 const char *file;
1366 unsigned int line;
1367 emit_state *state;
1368 lit_state *s;
1369
82e7541d
BW		 1370 md_flush_pending_output ();
1371
e0001a05
NC		 1372 get_directive (&end_directive, &end_negated);
1373 if (end_directive == (directiveE) XTENSA_UNDEFINED)
1374 {
1375 discard_rest_of_line ();
1376 return;
1377 }
1378
1379 if (end_directive == directive_density && !density_supported && !end_negated)
1380 {
1381 as_warn (_("Xtensa density option not supported; ignored"));
1382 demand_empty_rest_of_line ();
1383 return;
1384 }
1385
1386 directive_pop (&begin_directive, &begin_negated, &file, &line,
1387 (const void **) &state);
1388
1389 if (begin_directive != directive_none)
1390 {
1391 if (begin_directive != end_directive || begin_negated != end_negated)
1392 {
1393 as_bad (_("does not match begin %s%s at %s:%d"),
1394 begin_negated ? "no-" : "",
1395 directive_info[begin_directive].name, file, line);
1396 }
1397 else
1398 {
1399 switch (end_directive)
1400 {
1401 case directive_literal:
1402 frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL);
1403 xtensa_restore_emit_state (state);
1404 free (state);
82e7541d
BW		 1405 if (!inside_directive (directive_literal))
1406 {
1407 /* Restore the list of current labels. */
1408 xtensa_clear_insn_labels ();
1409 insn_labels = saved_insn_labels;
1410 }
e0001a05
NC		 1411 break;
1412
1413 case directive_freeregs:
1414 break;
1415
1416 case directive_literal_prefix:
1417 /* Restore the default collection sections from saved state. */
1418 s = (lit_state *) state;
1419 assert (s);
1420
1421 if (use_literal_section)
1422 default_lit_sections = *s;
1423
1424 /* free the state storage */
1425 free (s);
1426 break;
1427
1428 default:
1429 break;
1430 }
1431 }
1432 }
1433
1434 demand_empty_rest_of_line ();
1435}
1436
1437
1438/* Place an aligned literal fragment at the current location. */
1439
1440static void
1441xtensa_literal_position (ignore)
1442 int ignore ATTRIBUTE_UNUSED;
1443{
1444 if (inside_directive (directive_literal))
1445 as_warn (_(".literal_position inside literal directive; ignoring"));
1446 else if (!use_literal_section)
61846f28 1447 xtensa_mark_literal_pool_location ();
e0001a05
NC		 1448
1449 demand_empty_rest_of_line ();
82e7541d 1450 xtensa_clear_insn_labels ();
e0001a05
NC		 1451}
1452
1453
1454/* Support .literal label, value@plt + offset. */
1455
1456static void
1457xtensa_literal_pseudo (ignored)
1458 int ignored ATTRIBUTE_UNUSED;
1459{
1460 emit_state state;
1745fcba 1461 char *p, *base_name;
e0001a05 1462 char c;
e0001a05
NC		 1463 expressionS expP;
1464 segT dest_seg;
1465
82e7541d
BW		 1466 if (inside_directive (directive_literal))
1467 {
1468 as_bad (_(".literal not allowed inside .begin literal region"));
1469 ignore_rest_of_line ();
1470 return;
1471 }
1472
1473 /* Previous labels go with whatever follows this directive, not with
1474 the literal, so save them now. */
1475 saved_insn_labels = insn_labels;
1476 insn_labels = NULL;
1477
e0001a05
NC		 1478 /* If we are using text-section literals, then this is the right value... */
1479 dest_seg = now_seg;
1480
1481 base_name = input_line_pointer;
1482
1483 xtensa_switch_to_literal_fragment (&state);
1484
1485 /* ...but if we aren't using text-section-literals, then we
1486 need to put them in the section we just switched to. */
1487 if (use_literal_section)
1488 dest_seg = now_seg;
1489
1490 /* All literals are aligned to four-byte boundaries
1491 which is handled by switch to literal fragment. */
1492 /* frag_align (2, 0, 0); */
1493
1494 c = get_symbol_end ();
1495 /* Just after name is now '\0'. */
1496 p = input_line_pointer;
1497 *p = c;
1498 SKIP_WHITESPACE ();
1499
1500 if (*input_line_pointer != ',' && *input_line_pointer != ':')
1501 {
1502 as_bad (_("expected comma or colon after symbol name; "
1503 "rest of line ignored"));
1504 ignore_rest_of_line ();
1505 xtensa_restore_emit_state (&state);
1506 return;
1507 }
1508 *p = 0;
1509
e0001a05 1510 colon (base_name);
e0001a05
NC		 1511
1512 do
1513 {
1514 input_line_pointer++; /* skip ',' or ':' */
1515
1516 expr (0, &expP);
1517
e0001a05
NC		 1518 /* We only support 4-byte literals with .literal. */
1519 emit_expr (&expP, 4);
e0001a05
NC		 1520 }
1521 while (*input_line_pointer == ',');
1522
1523 *p = c;
e0001a05
NC		 1524
1525 demand_empty_rest_of_line ();
1526
1527 xtensa_restore_emit_state (&state);
82e7541d
BW		 1528
1529 /* Restore the list of current labels. */
1530 xtensa_clear_insn_labels ();
1531 insn_labels = saved_insn_labels;
e0001a05
NC		 1532}
1533
1534
1535static void
1536xtensa_literal_prefix (start, len)
1537 char const *start;
1538 int len;
1539{
1540 segT s_now; /* Storage for the current seg and subseg. */
1541 subsegT ss_now;
1542 char *name; /* Pointer to the name itself. */
1543 char *newname;
1544
1545 if (!use_literal_section)
1546 return;
1547
1548 /* Store away the current section and subsection. */
1549 s_now = now_seg;
1550 ss_now = now_subseg;
1551
1552 /* Get a null-terminated copy of the name. */
1553 name = xmalloc (len + 1);
1554 assert (name);
1555
1556 strncpy (name, start, len);
1557 name[len] = 0;
1558
1559 /* Allocate the sections (interesting note: the memory pointing to
1560 the name is actually used for the name by the new section). */
1561 newname = xmalloc (len + strlen (".literal") + 1);
1562 strcpy (newname, name);
1563 strcpy (newname + len, ".literal");
1564
1565 /* Note that retrieve_literal_seg does not create a segment if
1566 it already exists. */
1567 default_lit_sections.lit_seg = NULL; /* retrieved on demand */
1568
1569 /* Canonicalizing section names allows renaming literal
1570 sections to occur correctly. */
1571 default_lit_sections.lit_seg_name =
1572 tc_canonicalize_symbol_name (newname);
1573
1574 free (name);
1575
1576 /* Restore the current section and subsection and set the
1577 generation into the old segment. */
1578 subseg_set (s_now, ss_now);
1579}
1580
1581\f
1582/* Parsing and Idiom Translation. */
1583
1584static const char *
1585expression_end (name)
1586 const char *name;
1587{
1588 while (1)
1589 {
1590 switch (*name)
1591 {
1592 case ';':
1593 case '\0':
1594 case ',':
1595 return name;
1596 case ' ':
1597 case '\t':
1598 ++name;
1599 continue;
1600 default:
1601 return 0;
1602 }
1603 }
1604}
1605
1606
1607#define ERROR_REG_NUM ((unsigned) -1)
1608
1609static unsigned
1610tc_get_register (prefix)
1611 const char *prefix;
1612{
1613 unsigned reg;
1614 const char *next_expr;
1615 const char *old_line_pointer;
1616
1617 SKIP_WHITESPACE ();
1618 old_line_pointer = input_line_pointer;
1619
1620 if (*input_line_pointer == '$')
1621 ++input_line_pointer;
1622
1623 /* Accept "sp" as a synonym for "a1". */
1624 if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p'
1625 && expression_end (input_line_pointer + 2))
1626 {
1627 input_line_pointer += 2;
1628 return 1; /* AR[1] */
1629 }
1630
1631 while (*input_line_pointer++ == *prefix++)
1632 ;
1633 --input_line_pointer;
1634 --prefix;
1635
1636 if (*prefix)
1637 {
1638 as_bad (_("bad register name: %s"), old_line_pointer);
1639 return ERROR_REG_NUM;
1640 }
1641
1642 if (!ISDIGIT ((unsigned char) *input_line_pointer))
1643 {
1644 as_bad (_("bad register number: %s"), input_line_pointer);
1645 return ERROR_REG_NUM;
1646 }
1647
1648 reg = 0;
1649
1650 while (ISDIGIT ((int) *input_line_pointer))
1651 reg = reg * 10 + *input_line_pointer++ - '0';
1652
1653 if (!(next_expr = expression_end (input_line_pointer)))
1654 {
1655 as_bad (_("bad register name: %s"), old_line_pointer);
1656 return ERROR_REG_NUM;
1657 }
1658
1659 input_line_pointer = (char *) next_expr;
1660
1661 return reg;
1662}
1663
1664
1665#define PLT_SUFFIX "@PLT"
1666#define plt_suffix "@plt"
1667
1668static void
1669expression_maybe_register (opnd, tok)
1670 xtensa_operand opnd;
1671 expressionS *tok;
1672{
1673 char *kind = xtensa_operand_kind (opnd);
1674
1675 if ((strlen (kind) == 1)
1676 && (*kind == 'l' || *kind == 'L' || *kind == 'i' || *kind == 'r'))
1677 {
1678 segT t = expression (tok);
1679 if (t == absolute_section && operand_is_pcrel_label (opnd))
1680 {
1681 assert (tok->X_op == O_constant);
1682 tok->X_op = O_symbol;
1683 tok->X_add_symbol = &abs_symbol;
1684 }
1685 if (tok->X_op == O_symbol
1686 && (!strncmp (input_line_pointer, PLT_SUFFIX,
1687 strlen (PLT_SUFFIX) - 1)
1688 || !strncmp (input_line_pointer, plt_suffix,
1689 strlen (plt_suffix) - 1)))
1690 {
61846f28 1691 symbol_get_tc (tok->X_add_symbol)->plt = 1;
e0001a05
NC		 1692 input_line_pointer += strlen (plt_suffix);
1693 }
e0001a05
NC		 1694 }
1695 else
1696 {
1697 unsigned reg = tc_get_register (kind);
1698
1699 if (reg != ERROR_REG_NUM) /* Already errored */
1700 {
1701 uint32 buf = reg;
1702 if ((xtensa_operand_encode (opnd, &buf) != xtensa_encode_result_ok)
1703 || (reg != xtensa_operand_decode (opnd, buf)))
1704 as_bad (_("register number out of range"));
1705 }
1706
1707 tok->X_op = O_register;
1708 tok->X_add_symbol = 0;
1709 tok->X_add_number = reg;
1710 }
1711}
1712
1713
1714/* Split up the arguments for an opcode or pseudo-op. */
1715
1716static int
1717tokenize_arguments (args, str)
1718 char **args;
1719 char *str;
1720{
1721 char *old_input_line_pointer;
1722 bfd_boolean saw_comma = FALSE;
1723 bfd_boolean saw_arg = FALSE;
1724 int num_args = 0;
1725 char *arg_end, *arg;
1726 int arg_len;
1727
1728 /* Save and restore input_line_pointer around this function. */
1729 old_input_line_pointer = input_line_pointer;
1730 input_line_pointer = str;
1731
1732 while (*input_line_pointer)
1733 {
1734 SKIP_WHITESPACE ();
1735 switch (*input_line_pointer)
1736 {
1737 case '\0':
1738 goto fini;
1739
1740 case ',':
1741 input_line_pointer++;
1742 if (saw_comma || !saw_arg)
1743 goto err;
1744 saw_comma = TRUE;
1745 break;
1746
1747 default:
1748 if (!saw_comma && saw_arg)
1749 goto err;
1750
1751 arg_end = input_line_pointer + 1;
1752 while (!expression_end (arg_end))
1753 arg_end += 1;
1754
1755 arg_len = arg_end - input_line_pointer;
1756 arg = (char *) xmalloc (arg_len + 1);
1757 args[num_args] = arg;
1758
1759 strncpy (arg, input_line_pointer, arg_len);
1760 arg[arg_len] = '\0';
1761
1762 input_line_pointer = arg_end;
1763 num_args += 1;
1764 saw_comma = FALSE;
1765 saw_arg = TRUE;
1766 break;
1767 }
1768 }
1769
1770fini:
1771 if (saw_comma)
1772 goto err;
1773 input_line_pointer = old_input_line_pointer;
1774 return num_args;
1775
1776err:
1777 input_line_pointer = old_input_line_pointer;
1778 return -1;
1779}
1780
1781
1782/* Parse the arguments to an opcode. Return true on error. */
1783
1784static bfd_boolean
1785parse_arguments (insn, num_args, arg_strings)
1786 TInsn *insn;
1787 int num_args;
1788 char **arg_strings;
1789{
1790 expressionS *tok = insn->tok;
1791 xtensa_opcode opcode = insn->opcode;
1792 bfd_boolean had_error = TRUE;
1793 xtensa_isa isa = xtensa_default_isa;
1794 int n;
1795 int opcode_operand_count;
1796 int actual_operand_count = 0;
1797 xtensa_operand opnd = NULL;
1798 char *old_input_line_pointer;
1799
1800 if (insn->insn_type == ITYPE_LITERAL)
1801 opcode_operand_count = 1;
1802 else
1803 opcode_operand_count = xtensa_num_operands (isa, opcode);
1804
1805 memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS);
1806
1807 /* Save and restore input_line_pointer around this function. */
1808 old_input_line_pointer = input_line_pointer;
1809
1810 for (n = 0; n < num_args; n++)
1811 {
1812 input_line_pointer = arg_strings[n];
1813
1814 if (actual_operand_count >= opcode_operand_count)
1815 {
1816 as_warn (_("too many arguments"));
1817 goto err;
1818 }
1819 assert (actual_operand_count < MAX_INSN_ARGS);
1820
1821 opnd = xtensa_get_operand (isa, opcode, actual_operand_count);
1822 expression_maybe_register (opnd, tok);
1823
1824 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1825 goto err;
1826 actual_operand_count++;
1827 tok++;
1828 }
1829
1830 insn->ntok = tok - insn->tok;
1831 had_error = FALSE;
1832
1833 err:
1834 input_line_pointer = old_input_line_pointer;
1835 return had_error;
1836}
1837
1838
1839static void
1840xg_reverse_shift_count (cnt_argp)
1841 char **cnt_argp;
1842{
1843 char *cnt_arg, *new_arg;
1844 cnt_arg = *cnt_argp;
1845
1846 /* replace the argument with "31-(argument)" */
1847 new_arg = (char *) xmalloc (strlen (cnt_arg) + 6);
1848 sprintf (new_arg, "31-(%s)", cnt_arg);
1849
1850 free (cnt_arg);
1851 *cnt_argp = new_arg;
1852}
1853
1854
1855/* If "arg" is a constant expression, return non-zero with the value
1856 in *valp. */
1857
1858static int
1859xg_arg_is_constant (arg, valp)
1860 char *arg;
1861 offsetT *valp;
1862{
1863 expressionS exp;
1864 char *save_ptr = input_line_pointer;
1865
1866 input_line_pointer = arg;
1867 expression (&exp);
1868 input_line_pointer = save_ptr;
1869
1870 if (exp.X_op == O_constant)
1871 {
1872 *valp = exp.X_add_number;
1873 return 1;
1874 }
1875
1876 return 0;
1877}
1878
1879
1880static void
1881xg_replace_opname (popname, newop)
1882 char **popname;
1883 char *newop;
1884{
1885 free (*popname);
1886 *popname = (char *) xmalloc (strlen (newop) + 1);
1887 strcpy (*popname, newop);
1888}
1889
1890
1891static int
1892xg_check_num_args (pnum_args, expected_num, opname, arg_strings)
1893 int *pnum_args;
1894 int expected_num;
1895 char *opname;
1896 char **arg_strings;
1897{
1898 int num_args = *pnum_args;
1899
1900 if (num_args < expected_num)
1901 {
1902 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
1903 num_args, opname, expected_num);
1904 return -1;
1905 }
1906
1907 if (num_args > expected_num)
1908 {
1909 as_warn (_("too many operands (%d) for '%s'; expected %d"),
1910 num_args, opname, expected_num);
1911 while (num_args-- > expected_num)
1912 {
1913 free (arg_strings[num_args]);
1914 arg_strings[num_args] = 0;
1915 }
1916 *pnum_args = expected_num;
1917 return -1;
1918 }
1919
1920 return 0;
1921}
1922
1923
1924static int
1925xg_translate_sysreg_op (popname, pnum_args, arg_strings)
1926 char **popname;
1927 int *pnum_args;
1928 char **arg_strings;
1929{
1930 char *opname, *new_opname;
1931 offsetT val;
1932 bfd_boolean has_underbar = FALSE;
1933
1934 opname = *popname;
1935 if (*opname == '_')
1936 {
1937 has_underbar = TRUE;
1938 opname += 1;
1939 }
1940
1941 /* Opname == [rw]ur... */
1942
1943 if (opname[3] == '\0')
1944 {
1945 /* If the register is not specified as part of the opcode,
1946 then get it from the operand and move it to the opcode. */
1947
1948 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
1949 return -1;
1950
1951 if (!xg_arg_is_constant (arg_strings[1], &val))
1952 {
1953 as_bad (_("register number for `%s' is not a constant"), opname);
1954 return -1;
1955 }
1956 if ((unsigned) val > 255)
1957 {
1958 as_bad (_("register number (%ld) for `%s' is out of range"),
1959 val, opname);
1960 return -1;
1961 }
1962
1963 /* Remove the last argument, which is now part of the opcode. */
1964 free (arg_strings[1]);
1965 arg_strings[1] = 0;
1966 *pnum_args = 1;
1967
1968 /* Translate the opcode. */
1969 new_opname = (char *) xmalloc (8);
1970 sprintf (new_opname, "%s%cur%u", (has_underbar ? "_" : ""),
1971 opname[0], (unsigned) val);
1972 free (*popname);
1973 *popname = new_opname;
1974 }
1975
1976 return 0;
1977}
1978
1979
1980/* If the instruction is an idiom (i.e., a built-in macro), translate it.
1981 Returns non-zero if an error was found. */
1982
1983static int
1984xg_translate_idioms (popname, pnum_args, arg_strings)
1985 char **popname;
1986 int *pnum_args;
1987 char **arg_strings;
1988{
1989 char *opname = *popname;
1990 bfd_boolean has_underbar = FALSE;
1991
1992 if (*opname == '_')
1993 {
1994 has_underbar = TRUE;
1995 opname += 1;
1996 }
1997
1998 if (strcmp (opname, "mov") == 0)
1999 {
2000 if (!has_underbar && code_density_available ())
2001 xg_replace_opname (popname, "mov.n");
2002 else
2003 {
2004 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2005 return -1;
2006 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2007 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
2008 strcpy (arg_strings[2], arg_strings[1]);
2009 *pnum_args = 3;
2010 }
2011 return 0;
2012 }
2013
2014 if (strcmp (opname, "bbsi.l") == 0)
2015 {
2016 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
2017 return -1;
2018 xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi"));
2019 if (target_big_endian)
2020 xg_reverse_shift_count (&arg_strings[1]);
2021 return 0;
2022 }
2023
2024 if (strcmp (opname, "bbci.l") == 0)
2025 {
2026 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
2027 return -1;
2028 xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci"));
2029 if (target_big_endian)
2030 xg_reverse_shift_count (&arg_strings[1]);
2031 return 0;
2032 }
2033
2034 if (strcmp (opname, "nop") == 0)
2035 {
2036 if (!has_underbar && code_density_available ())
2037 xg_replace_opname (popname, "nop.n");
2038 else
2039 {
2040 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2041 return -1;
2042 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2043 arg_strings[0] = (char *) xmalloc (3);
2044 arg_strings[1] = (char *) xmalloc (3);
2045 arg_strings[2] = (char *) xmalloc (3);
2046 strcpy (arg_strings[0], "a1");
2047 strcpy (arg_strings[1], "a1");
2048 strcpy (arg_strings[2], "a1");
2049 *pnum_args = 3;
2050 }
2051 return 0;
2052 }
2053
2054 if ((opname[0] == 'r' || opname[0] == 'w')
2055 && opname[1] == 'u'
2056 && opname[2] == 'r')
2057 return xg_translate_sysreg_op (popname, pnum_args, arg_strings);
2058
2059
2060 /* WIDENING DENSITY OPCODES
2061
2062 questionable relaxations (widening) from old "tai" idioms:
2063
2064 ADD.N --> ADD
2065 BEQZ.N --> BEQZ
2066 RET.N --> RET
2067 RETW.N --> RETW
2068 MOVI.N --> MOVI
2069 MOV.N --> MOV
2070 NOP.N --> NOP
2071
2072 Note: this incomplete list was imported to match the "tai"
2073 behavior; other density opcodes are not handled.
2074
2075 The xtensa-relax code may know how to do these but it doesn't do
2076 anything when these density opcodes appear inside a no-density
2077 region. Somehow GAS should either print an error when that happens
2078 or do the widening. The old "tai" behavior was to do the widening.
2079 For now, I'll make it widen but print a warning.
2080
2081 FIXME: GAS needs to detect density opcodes inside no-density
2082 regions and treat them as errors. This code should be removed
2083 when that is done. */
2084
2085 if (use_generics ()
2086 && !has_underbar
2087 && density_supported
2088 && !code_density_available ())
2089 {
2090 if (strcmp (opname, "add.n") == 0)
2091 xg_replace_opname (popname, "add");
2092
2093 else if (strcmp (opname, "beqz.n") == 0)
2094 xg_replace_opname (popname, "beqz");
2095
2096 else if (strcmp (opname, "ret.n") == 0)
2097 xg_replace_opname (popname, "ret");
2098
2099 else if (strcmp (opname, "retw.n") == 0)
2100 xg_replace_opname (popname, "retw");
2101
2102 else if (strcmp (opname, "movi.n") == 0)
2103 xg_replace_opname (popname, "movi");
2104
2105 else if (strcmp (opname, "mov.n") == 0)
2106 {
2107 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2108 return -1;
2109 xg_replace_opname (popname, "or");
2110 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
2111 strcpy (arg_strings[2], arg_strings[1]);
2112 *pnum_args = 3;
2113 }
2114
2115 else if (strcmp (opname, "nop.n") == 0)
2116 {
2117 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2118 return -1;
2119 xg_replace_opname (popname, "or");
2120 arg_strings[0] = (char *) xmalloc (3);
2121 arg_strings[1] = (char *) xmalloc (3);
2122 arg_strings[2] = (char *) xmalloc (3);
2123 strcpy (arg_strings[0], "a1");
2124 strcpy (arg_strings[1], "a1");
2125 strcpy (arg_strings[2], "a1");
2126 *pnum_args = 3;
2127 }
2128 }
2129
2130 return 0;
2131}
2132
2133\f
2134/* Functions for dealing with the Xtensa ISA. */
2135
2136/* Return true if the given operand is an immed or target instruction,
2137 i.e., has a reloc associated with it. Currently, this is only true
2138 if the operand kind is "i, "l" or "L". */
2139
2140static bfd_boolean
2141operand_is_immed (opnd)
2142 xtensa_operand opnd;
2143{
2144 const char *opkind = xtensa_operand_kind (opnd);
2145 if (opkind[0] == '\0' || opkind[1] != '\0')
2146 return FALSE;
2147 switch (opkind[0])
2148 {
2149 case 'i':
2150 case 'l':
2151 case 'L':
2152 return TRUE;
2153 }
2154 return FALSE;
2155}
2156
2157
2158/* Return true if the given operand is a pc-relative label. This is
2159 true for "l", "L", and "r" operand kinds. */
2160
2161bfd_boolean
2162operand_is_pcrel_label (opnd)
2163 xtensa_operand opnd;
2164{
2165 const char *opkind = xtensa_operand_kind (opnd);
2166 if (opkind[0] == '\0' || opkind[1] != '\0')
2167 return FALSE;
2168 switch (opkind[0])
2169 {
2170 case 'r':
2171 case 'l':
2172 case 'L':
2173 return TRUE;
2174 }
2175 return FALSE;
2176}
2177
2178
2179/* Currently the assembler only allows us to use a single target per
2180 fragment. Because of this, only one operand for a given
2181 instruction may be symbolic. If there is an operand of kind "lrL",
2182 the last one is chosen. Otherwise, the result is the number of the
2183 last operand of type "i", and if there are none of those, we fail
2184 and return -1. */
2185
2186int
2187get_relaxable_immed (opcode)
2188 xtensa_opcode opcode;
2189{
2190 int last_immed = -1;
2191 int noperands, opi;
2192 xtensa_operand operand;
2193
2194 if (opcode == XTENSA_UNDEFINED)
2195 return -1;
2196
2197 noperands = xtensa_num_operands (xtensa_default_isa, opcode);
2198 for (opi = noperands - 1; opi >= 0; opi--)
2199 {
2200 operand = xtensa_get_operand (xtensa_default_isa, opcode, opi);
2201 if (operand_is_pcrel_label (operand))
2202 return opi;
2203 if (last_immed == -1 && operand_is_immed (operand))
2204 last_immed = opi;
2205 }
2206 return last_immed;
2207}
2208
2209
2210xtensa_opcode
2211get_opcode_from_buf (buf)
2212 const char *buf;
2213{
2214 static xtensa_insnbuf insnbuf = NULL;
2215 xtensa_opcode opcode;
2216 xtensa_isa isa = xtensa_default_isa;
2217 if (!insnbuf)
2218 insnbuf = xtensa_insnbuf_alloc (isa);
2219
2220 xtensa_insnbuf_from_chars (isa, insnbuf, buf);
2221 opcode = xtensa_decode_insn (isa, insnbuf);
2222 return opcode;
2223}
2224
2225
2226static bfd_boolean
2227is_direct_call_opcode (opcode)
2228 xtensa_opcode opcode;
2229{
2230 if (opcode == XTENSA_UNDEFINED)
2231 return FALSE;
2232
2233 return (opcode == xtensa_call0_opcode
2234 || opcode == xtensa_call4_opcode
2235 || opcode == xtensa_call8_opcode
2236 || opcode == xtensa_call12_opcode);
2237}
2238
2239
2240static bfd_boolean
2241is_call_opcode (opcode)
2242 xtensa_opcode opcode;
2243{
2244 if (is_direct_call_opcode (opcode))
2245 return TRUE;
2246
2247 if (opcode == XTENSA_UNDEFINED)
2248 return FALSE;
2249
2250 return (opcode == xtensa_callx0_opcode
2251 || opcode == xtensa_callx4_opcode
2252 || opcode == xtensa_callx8_opcode
2253 || opcode == xtensa_callx12_opcode);
2254}
2255
2256
2257/* Return true if the opcode is an entry opcode. This is used because
2258 "entry" adds an implicit ".align 4" and also the entry instruction
2259 has an extra check for an operand value. */
2260
2261static bfd_boolean
2262is_entry_opcode (opcode)
2263 xtensa_opcode opcode;
2264{
2265 if (opcode == XTENSA_UNDEFINED)
2266 return FALSE;
2267
2268 return (opcode == xtensa_entry_opcode);
2269}
2270
2271
2272/* Return true if it is one of the loop opcodes. Loops are special
2273 because they need automatic alignment and they have a relaxation so
2274 complex that we hard-coded it. */
2275
2276static bfd_boolean
2277is_loop_opcode (opcode)
2278 xtensa_opcode opcode;
2279{
2280 if (opcode == XTENSA_UNDEFINED)
2281 return FALSE;
2282
2283 return (opcode == xtensa_loop_opcode
2284 || opcode == xtensa_loopnez_opcode
2285 || opcode == xtensa_loopgtz_opcode);
2286}
2287
2288
2289static bfd_boolean
2290is_the_loop_opcode (opcode)
2291 xtensa_opcode opcode;
2292{
2293 if (opcode == XTENSA_UNDEFINED)
2294 return FALSE;
2295
2296 return (opcode == xtensa_loop_opcode);
2297}
2298
2299
2300static bfd_boolean
2301is_jx_opcode (opcode)
2302 xtensa_opcode opcode;
2303{
2304 if (opcode == XTENSA_UNDEFINED)
2305 return FALSE;
2306
2307 return (opcode == xtensa_jx_opcode);
2308}
2309
2310
2311/* Return true if the opcode is a retw or retw.n.
2312 Needed to add nops to avoid a hardware interlock issue. */
2313
2314static bfd_boolean
2315is_windowed_return_opcode (opcode)
2316 xtensa_opcode opcode;
2317{
2318 if (opcode == XTENSA_UNDEFINED)
2319 return FALSE;
2320
2321 return (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode);
2322}
2323
2324
2325/* Return true if the opcode type is "l" and the opcode is NOT a jump. */
2326
2327static bfd_boolean
2328is_conditional_branch_opcode (opcode)
2329 xtensa_opcode opcode;
2330{
2331 xtensa_isa isa = xtensa_default_isa;
2332 int num_ops, i;
2333
2334 if (opcode == xtensa_j_opcode && opcode != XTENSA_UNDEFINED)
2335 return FALSE;
2336
2337 num_ops = xtensa_num_operands (isa, opcode);
2338 for (i = 0; i < num_ops; i++)
2339 {
2340 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
2341 if (strcmp (xtensa_operand_kind (operand), "l") == 0)
2342 return TRUE;
2343 }
2344 return FALSE;
2345}
2346
2347
2348/* Return true if the given opcode is a conditional branch
2349 instruction, i.e., currently this is true if the instruction
2350 is a jx or has an operand with 'l' type and is not a loop. */
2351
2352bfd_boolean
2353is_branch_or_jump_opcode (opcode)
2354 xtensa_opcode opcode;
2355{
2356 int opn, op_count;
2357
2358 if (opcode == XTENSA_UNDEFINED)
2359 return FALSE;
2360
2361 if (is_loop_opcode (opcode))
2362 return FALSE;
2363
2364 if (is_jx_opcode (opcode))
2365 return TRUE;
2366
2367 op_count = xtensa_num_operands (xtensa_default_isa, opcode);
2368 for (opn = 0; opn < op_count; opn++)
2369 {
2370 xtensa_operand opnd =
2371 xtensa_get_operand (xtensa_default_isa, opcode, opn);
2372 const char *opkind = xtensa_operand_kind (opnd);
2373 if (opkind && opkind[0] == 'l' && opkind[1] == '\0')
2374 return TRUE;
2375 }
2376 return FALSE;
2377}
2378
2379
2380/* Convert from operand numbers to BFD relocation type code.
2381 Return BFD_RELOC_NONE on failure. */
2382
2383bfd_reloc_code_real_type
2384opnum_to_reloc (opnum)
2385 int opnum;
2386{
2387 switch (opnum)
2388 {
2389 case 0:
2390 return BFD_RELOC_XTENSA_OP0;
2391 case 1:
2392 return BFD_RELOC_XTENSA_OP1;
2393 case 2:
2394 return BFD_RELOC_XTENSA_OP2;
2395 default:
2396 break;
2397 }
2398 return BFD_RELOC_NONE;
2399}
2400
2401
2402/* Convert from BFD relocation type code to operand number.
2403 Return -1 on failure. */
2404
2405int
2406reloc_to_opnum (reloc)
2407 bfd_reloc_code_real_type reloc;
2408{
2409 switch (reloc)
2410 {
2411 case BFD_RELOC_XTENSA_OP0:
2412 return 0;
2413 case BFD_RELOC_XTENSA_OP1:
2414 return 1;
2415 case BFD_RELOC_XTENSA_OP2:
2416 return 2;
2417 default:
2418 break;
2419 }
2420 return -1;
2421}
2422
2423
2424static void
2425xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line)
2426 xtensa_insnbuf insnbuf;
2427 xtensa_opcode opcode;
2428 xtensa_operand operand;
2429 int32 value;
2430 const char *file;
2431 unsigned int line;
2432{
2433 xtensa_encode_result encode_result;
2434 uint32 valbuf = value;
2435
2436 encode_result = xtensa_operand_encode (operand, &valbuf);
2437
2438 switch (encode_result)
2439 {
2440 case xtensa_encode_result_ok:
2441 break;
2442 case xtensa_encode_result_align:
2443 as_bad_where ((char *) file, line,
2444 _("operand %d not properly aligned for '%s'"),
2445 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2446 break;
2447 case xtensa_encode_result_not_in_table:
2448 as_bad_where ((char *) file, line,
2449 _("operand %d not in immediate table for '%s'"),
2450 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2451 break;
2452 case xtensa_encode_result_too_high:
2453 as_bad_where ((char *) file, line,
2454 _("operand %d too large for '%s'"), value,
2455 xtensa_opcode_name (xtensa_default_isa, opcode));
2456 break;
2457 case xtensa_encode_result_too_low:
2458 as_bad_where ((char *) file, line,
2459 _("operand %d too small for '%s'"), value,
2460 xtensa_opcode_name (xtensa_default_isa, opcode));
2461 break;
2462 case xtensa_encode_result_not_ok:
2463 as_bad_where ((char *) file, line,
2464 _("operand %d is invalid for '%s'"), value,
2465 xtensa_opcode_name (xtensa_default_isa, opcode));
2466 break;
2467 default:
2468 abort ();
2469 }
2470
2471 xtensa_operand_set_field (operand, insnbuf, valbuf);
2472}
2473
2474
2475static uint32
2476xtensa_insnbuf_get_operand (insnbuf, opcode, opnum)
2477 xtensa_insnbuf insnbuf;
2478 xtensa_opcode opcode;
2479 int opnum;
2480{
2481 xtensa_operand op = xtensa_get_operand (xtensa_default_isa, opcode, opnum);
2482 return xtensa_operand_decode (op, xtensa_operand_get_field (op, insnbuf));
2483}
2484
2485
2486static void
2487xtensa_insnbuf_set_immediate_field (opcode, insnbuf, value, file, line)
2488 xtensa_opcode opcode;
2489 xtensa_insnbuf insnbuf;
2490 int32 value;
2491 const char *file;
2492 unsigned int line;
2493{
2494 xtensa_isa isa = xtensa_default_isa;
2495 int last_opnd = xtensa_num_operands (isa, opcode) - 1;
2496 xtensa_operand operand = xtensa_get_operand (isa, opcode, last_opnd);
2497 xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line);
2498}
2499
2500
2501static bfd_boolean
2502is_negatable_branch (insn)
2503 TInsn *insn;
2504{
2505 xtensa_isa isa = xtensa_default_isa;
2506 int i;
2507 int num_ops = xtensa_num_operands (isa, insn->opcode);
2508
2509 for (i = 0; i < num_ops; i++)
2510 {
2511 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
2512 char *kind = xtensa_operand_kind (opnd);
2513 if (strlen (kind) == 1 && *kind == 'l')
2514 return TRUE;
2515 }
2516 return FALSE;
2517}
2518
e0001a05
NC		 2519\f
2520/* Various Other Internal Functions. */
2521
2522static bfd_boolean
2523is_unique_insn_expansion (r)
2524 TransitionRule *r;
2525{
2526 if (!r->to_instr || r->to_instr->next != NULL)
2527 return FALSE;
2528 if (r->to_instr->typ != INSTR_INSTR)
2529 return FALSE;
2530 return TRUE;
2531}
2532
2533
2534static int
2535xg_get_insn_size (insn)
2536 TInsn *insn;
2537{
2538 assert (insn->insn_type == ITYPE_INSN);
2539 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2540}
2541
2542
2543static int
2544xg_get_build_instr_size (insn)
2545 BuildInstr *insn;
2546{
2547 assert (insn->typ == INSTR_INSTR);
2548 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2549}
2550
2551
2552bfd_boolean
2553xg_is_narrow_insn (insn)
2554 TInsn *insn;
2555{
2556 TransitionTable *table = xg_build_widen_table ();
2557 TransitionList *l;
2558 int num_match = 0;
2559 assert (insn->insn_type == ITYPE_INSN);
2560 assert (insn->opcode < table->num_opcodes);
2561
2562 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2563 {
2564 TransitionRule *rule = l->rule;
2565
2566 if (xg_instruction_matches_rule (insn, rule)
2567 && is_unique_insn_expansion (rule))
2568 {
2569 /* It only generates one instruction... */
2570 assert (insn->insn_type == ITYPE_INSN);
2571 /* ...and it is a larger instruction. */
2572 if (xg_get_insn_size (insn)
2573 < xg_get_build_instr_size (rule->to_instr))
2574 {
2575 num_match++;
2576 if (num_match > 1)
2577 return FALSE;
2578 }
2579 }
2580 }
2581 return (num_match == 1);
2582}
2583
2584
2585bfd_boolean
2586xg_is_single_relaxable_insn (insn)
2587 TInsn *insn;
2588{
2589 TransitionTable *table = xg_build_widen_table ();
2590 TransitionList *l;
2591 int num_match = 0;
2592 assert (insn->insn_type == ITYPE_INSN);
2593 assert (insn->opcode < table->num_opcodes);
2594
2595 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2596 {
2597 TransitionRule *rule = l->rule;
2598
2599 if (xg_instruction_matches_rule (insn, rule)
2600 && is_unique_insn_expansion (rule))
2601 {
2602 assert (insn->insn_type == ITYPE_INSN);
2603 /* ... and it is a larger instruction. */
2604 if (xg_get_insn_size (insn)
2605 <= xg_get_build_instr_size (rule->to_instr))
2606 {
2607 num_match++;
2608 if (num_match > 1)
2609 return FALSE;
2610 }
2611 }
2612 }
2613 return (num_match == 1);
2614}
2615
2616
2617/* Return the largest size instruction that this instruction can
2618 expand to. Currently, in all cases, this is 3 bytes. Of course we
2619 could just calculate this once and generate a table. */
2620
2621int
2622xg_get_max_narrow_insn_size (opcode)
2623 xtensa_opcode opcode;
2624{
2625 /* Go ahead and compute it, but it better be 3. */
2626 TransitionTable *table = xg_build_widen_table ();
2627 TransitionList *l;
2628 int old_size = xtensa_insn_length (xtensa_default_isa, opcode);
2629 assert (opcode < table->num_opcodes);
2630
2631 /* Actually we can do better. Check to see of Only one applies. */
2632 for (l = table->table[opcode]; l != NULL; l = l->next)
2633 {
2634 TransitionRule *rule = l->rule;
2635
2636 /* If it only generates one instruction. */
2637 if (is_unique_insn_expansion (rule))
2638 {
2639 int new_size = xtensa_insn_length (xtensa_default_isa,
2640 rule->to_instr->opcode);
2641 if (new_size > old_size)
2642 {
2643 assert (new_size == 3);
2644 return 3;
2645 }
2646 }
2647 }
2648 return old_size;
2649}
2650
2651
2652/* Return the maximum number of bytes this opcode can expand to. */
2653
2654int
2655xg_get_max_insn_widen_size (opcode)
2656 xtensa_opcode opcode;
2657{
2658 TransitionTable *table = xg_build_widen_table ();
2659 TransitionList *l;
2660 int max_size = xtensa_insn_length (xtensa_default_isa, opcode);
2661
2662 assert (opcode < table->num_opcodes);
2663
2664 for (l = table->table[opcode]; l != NULL; l = l->next)
2665 {
2666 TransitionRule *rule = l->rule;
2667 BuildInstr *build_list;
2668 int this_size = 0;
2669
2670 if (!rule)
2671 continue;
2672 build_list = rule->to_instr;
2673 if (is_unique_insn_expansion (rule))
2674 {
2675 assert (build_list->typ == INSTR_INSTR);
2676 this_size = xg_get_max_insn_widen_size (build_list->opcode);
2677 }
2678 else
2679 for (; build_list != NULL; build_list = build_list->next)
2680 {
2681 switch (build_list->typ)
2682 {
2683 case INSTR_INSTR:
2684 this_size += xtensa_insn_length (xtensa_default_isa,
2685 build_list->opcode);
2686
2687 break;
2688 case INSTR_LITERAL_DEF:
2689 case INSTR_LABEL_DEF:
2690 default:
2691 break;
2692 }
2693 }
2694 if (this_size > max_size)
2695 max_size = this_size;
2696 }
2697 return max_size;
2698}
2699
2700
2701/* Return the maximum number of literal bytes this opcode can generate. */
2702
2703int
2704xg_get_max_insn_widen_literal_size (opcode)
2705 xtensa_opcode opcode;
2706{
2707 TransitionTable *table = xg_build_widen_table ();
2708 TransitionList *l;
2709 int max_size = 0;
2710
2711 assert (opcode < table->num_opcodes);
2712
2713 for (l = table->table[opcode]; l != NULL; l = l->next)
2714 {
2715 TransitionRule *rule = l->rule;
2716 BuildInstr *build_list;
2717 int this_size = 0;
2718
2719 if (!rule)
2720 continue;
2721 build_list = rule->to_instr;
2722 if (is_unique_insn_expansion (rule))
2723 {
2724 assert (build_list->typ == INSTR_INSTR);
2725 this_size = xg_get_max_insn_widen_literal_size (build_list->opcode);
2726 }
2727 else
2728 for (; build_list != NULL; build_list = build_list->next)
2729 {
2730 switch (build_list->typ)
2731 {
2732 case INSTR_LITERAL_DEF:
2733 /* hard coded 4-byte literal. */
2734 this_size += 4;
2735 break;
2736 case INSTR_INSTR:
2737 case INSTR_LABEL_DEF:
2738 default:
2739 break;
2740 }
2741 }
2742 if (this_size > max_size)
2743 max_size = this_size;
2744 }
2745 return max_size;
2746}
2747
2748
2749bfd_boolean
2750xg_is_relaxable_insn (insn, lateral_steps)
2751 TInsn *insn;
2752 int lateral_steps;
2753{
2754 int steps_taken = 0;
2755 TransitionTable *table = xg_build_widen_table ();
2756 TransitionList *l;
2757
2758 assert (insn->insn_type == ITYPE_INSN);
2759 assert (insn->opcode < table->num_opcodes);
2760
2761 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2762 {
2763 TransitionRule *rule = l->rule;
2764
2765 if (xg_instruction_matches_rule (insn, rule))
2766 {
2767 if (steps_taken == lateral_steps)
2768 return TRUE;
2769 steps_taken++;
2770 }
2771 }
2772 return FALSE;
2773}
2774
2775
2776static symbolS *
2777get_special_literal_symbol ()
2778{
2779 static symbolS *sym = NULL;
2780
2781 if (sym == NULL)
2782 sym = symbol_find_or_make ("SPECIAL_LITERAL0\001");
2783 return sym;
2784}
2785
2786
2787static symbolS *
2788get_special_label_symbol ()
2789{
2790 static symbolS *sym = NULL;
2791
2792 if (sym == NULL)
2793 sym = symbol_find_or_make ("SPECIAL_LABEL0\001");
2794 return sym;
2795}
2796
2797
2798/* Return true on success. */
2799
2800bfd_boolean
2801xg_build_to_insn (targ, insn, bi)
2802 TInsn *targ;
2803 TInsn *insn;
2804 BuildInstr *bi;
2805{
2806 BuildOp *op;
2807 symbolS *sym;
2808
2809 memset (targ, 0, sizeof (TInsn));
2810 switch (bi->typ)
2811 {
2812 case INSTR_INSTR:
2813 op = bi->ops;
2814 targ->opcode = bi->opcode;
2815 targ->insn_type = ITYPE_INSN;
2816 targ->is_specific_opcode = FALSE;
2817
2818 for (; op != NULL; op = op->next)
2819 {
2820 int op_num = op->op_num;
2821 int op_data = op->op_data;
2822
2823 assert (op->op_num < MAX_INSN_ARGS);
2824
2825 if (targ->ntok <= op_num)
2826 targ->ntok = op_num + 1;
2827
2828 switch (op->typ)
2829 {
2830 case OP_CONSTANT:
2831 set_expr_const (&targ->tok[op_num], op_data);
2832 break;
2833 case OP_OPERAND:
2834 assert (op_data < insn->ntok);
2835 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2836 break;
2837 case OP_LITERAL:
2838 sym = get_special_literal_symbol ();
2839 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2840 break;
2841 case OP_LABEL:
2842 sym = get_special_label_symbol ();
2843 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2844 break;
2845 default:
2846 /* currently handles:
2847 OP_OPERAND_LOW8
2848 OP_OPERAND_HI24S
2849 OP_OPERAND_F32MINUS */
2850 if (xg_has_userdef_op_fn (op->typ))
2851 {
2852 assert (op_data < insn->ntok);
2853 if (expr_is_const (&insn->tok[op_data]))
2854 {
2855 long val;
2856 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2857 val = xg_apply_userdef_op_fn (op->typ,
2858 targ->tok[op_num].
2859 X_add_number);
2860 targ->tok[op_num].X_add_number = val;
2861 }
2862 else
2863 return FALSE; /* We cannot use a relocation for this. */
2864 break;
2865 }
2866 assert (0);
2867 break;
2868 }
2869 }
2870 break;
2871
2872 case INSTR_LITERAL_DEF:
2873 op = bi->ops;
2874 targ->opcode = XTENSA_UNDEFINED;
2875 targ->insn_type = ITYPE_LITERAL;
2876 targ->is_specific_opcode = FALSE;
2877 for (; op != NULL; op = op->next)
2878 {
2879 int op_num = op->op_num;
2880 int op_data = op->op_data;
2881 assert (op->op_num < MAX_INSN_ARGS);
2882
2883 if (targ->ntok <= op_num)
2884 targ->ntok = op_num + 1;
2885
2886 switch (op->typ)
2887 {
2888 case OP_OPERAND:
2889 assert (op_data < insn->ntok);
2890 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2891 break;
2892 case OP_LITERAL:
2893 case OP_CONSTANT:
2894 case OP_LABEL:
2895 default:
2896 assert (0);
2897 break;
2898 }
2899 }
2900 break;
2901
2902 case INSTR_LABEL_DEF:
2903 op = bi->ops;
2904 targ->opcode = XTENSA_UNDEFINED;
2905 targ->insn_type = ITYPE_LABEL;
2906 targ->is_specific_opcode = FALSE;
2907 /* Literal with no ops. is a label? */
2908 assert (op == NULL);
2909 break;
2910
2911 default:
2912 assert (0);
2913 }
2914
2915 return TRUE;
2916}
2917
2918
2919/* Return true on success. */
2920
2921bfd_boolean
2922xg_build_to_stack (istack, insn, bi)
2923 IStack *istack;
2924 TInsn *insn;
2925 BuildInstr *bi;
2926{
2927 for (; bi != NULL; bi = bi->next)
2928 {
2929 TInsn *next_insn = istack_push_space (istack);
2930
2931 if (!xg_build_to_insn (next_insn, insn, bi))
2932 return FALSE;
2933 }
2934 return TRUE;
2935}
2936
2937
2938/* Return true on valid expansion. */
2939
2940bfd_boolean
2941xg_expand_to_stack (istack, insn, lateral_steps)
2942 IStack *istack;
2943 TInsn *insn;
2944 int lateral_steps;
2945{
2946 int stack_size = istack->ninsn;
2947 int steps_taken = 0;
2948 TransitionTable *table = xg_build_widen_table ();
2949 TransitionList *l;
2950
2951 assert (insn->insn_type == ITYPE_INSN);
2952 assert (insn->opcode < table->num_opcodes);
2953
2954 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2955 {
2956 TransitionRule *rule = l->rule;
2957
2958 if (xg_instruction_matches_rule (insn, rule))
2959 {
2960 if (lateral_steps == steps_taken)
2961 {
2962 int i;
2963
2964 /* This is it. Expand the rule to the stack. */
2965 if (!xg_build_to_stack (istack, insn, rule->to_instr))
2966 return FALSE;
2967
2968 /* Check to see if it fits. */
2969 for (i = stack_size; i < istack->ninsn; i++)
2970 {
2971 TInsn *insn = &istack->insn[i];
2972
2973 if (insn->insn_type == ITYPE_INSN
2974 && !tinsn_has_symbolic_operands (insn)
2975 && !xg_immeds_fit (insn))
2976 {
2977 istack->ninsn = stack_size;
2978 return FALSE;
2979 }
2980 }
2981 return TRUE;
2982 }
2983 steps_taken++;
2984 }
2985 }
2986 return FALSE;
2987}
2988
2989
2990bfd_boolean
2991xg_expand_narrow (targ, insn)
2992 TInsn *targ;
2993 TInsn *insn;
2994{
2995 TransitionTable *table = xg_build_widen_table ();
2996 TransitionList *l;
2997
2998 assert (insn->insn_type == ITYPE_INSN);
2999 assert (insn->opcode < table->num_opcodes);
3000
3001 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3002 {
3003 TransitionRule *rule = l->rule;
3004 if (xg_instruction_matches_rule (insn, rule)
3005 && is_unique_insn_expansion (rule))
3006 {
3007 /* Is it a larger instruction? */
3008 if (xg_get_insn_size (insn)
3009 <= xg_get_build_instr_size (rule->to_instr))
3010 {
3011 xg_build_to_insn (targ, insn, rule->to_instr);
3012 return FALSE;
3013 }
3014 }
3015 }
3016 return TRUE;
3017}
3018
3019
3020/* Assumes: All immeds are constants. Check that all constants fit
3021 into their immeds; return false if not. */
3022
3023static bfd_boolean
3024xg_immeds_fit (insn)
3025 const TInsn *insn;
3026{
3027 int i;
3028
3029 int n = insn->ntok;
3030 assert (insn->insn_type == ITYPE_INSN);
3031 for (i = 0; i < n; ++i)
3032 {
3033 const expressionS *expr = &insn->tok[i];
3034 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3035 insn->opcode, i);
3036 if (!operand_is_immed (opnd))
3037 continue;
3038
3039 switch (expr->X_op)
3040 {
3041 case O_register:
3042 case O_constant:
3043 {
3044 if (xg_check_operand (expr->X_add_number, opnd))
3045 return FALSE;
3046 }
3047 break;
3048 default:
3049 /* The symbol should have a fixup associated with it. */
3050 assert (FALSE);
3051 break;
3052 }
3053 }
3054 return TRUE;
3055}
3056
3057
3058/* This should only be called after we have an initial
3059 estimate of the addresses. */
3060
3061static bfd_boolean
3062xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3063 const TInsn *insn;
3064 segT pc_seg;
3065 fragS *pc_frag;
3066 offsetT pc_offset;
3067 long stretch;
3068{
3069 symbolS *symbolP;
3070 offsetT target, pc, new_offset;
3071 int i;
3072 int n = insn->ntok;
3073
3074 assert (insn->insn_type == ITYPE_INSN);
3075
3076 for (i = 0; i < n; ++i)
3077 {
3078 const expressionS *expr = &insn->tok[i];
3079 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3080 insn->opcode, i);
3081 if (!operand_is_immed (opnd))
3082 continue;
3083
3084 switch (expr->X_op)
3085 {
3086 case O_register:
3087 case O_constant:
3088 if (xg_check_operand (expr->X_add_number, opnd))
3089 return FALSE;
3090 break;
3091
3092 case O_symbol:
3093 /* We only allow symbols for pc-relative stuff.
3094 If pc_frag == 0, then we don't have frag locations yet. */
3095 if (pc_frag == 0)
3096 return FALSE;
3097
3098 /* If it is PC-relative and the symbol is in the same segment as
3099 the PC.... */
3100 if (!xtensa_operand_isPCRelative (opnd)
3101 || S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
3102 return FALSE;
3103
3104 symbolP = expr->X_add_symbol;
3105 target = S_GET_VALUE (symbolP) + expr->X_add_number;
3106 pc = pc_frag->fr_address + pc_offset;
3107
3108 /* If frag has yet to be reached on this pass, assume it
3109 will move by STRETCH just as we did. If this is not so,
3110 it will be because some frag between grows, and that will
3111 force another pass. Beware zero-length frags. There
3112 should be a faster way to do this. */
3113
3114 if (stretch && is_dnrange (pc_frag, symbolP, stretch))
3115 target += stretch;
3116
3117 new_offset = xtensa_operand_do_reloc (opnd, target, pc);
3118 if (xg_check_operand (new_offset, opnd))
3119 return FALSE;
3120 break;
3121
3122 default:
3123 /* The symbol should have a fixup associated with it. */
3124 return FALSE;
3125 }
3126 }
3127
3128 return TRUE;
3129}
3130
3131
3132/* This will check to see if the value can be converted into the
3133 operand type. It will return true if it does not fit. */
3134
3135static bfd_boolean
3136xg_check_operand (value, operand)
3137 int32 value;
3138 xtensa_operand operand;
3139{
3140 uint32 valbuf = value;
3141 return (xtensa_operand_encode (operand, &valbuf) != xtensa_encode_result_ok);
3142}
3143
3144
3145/* Check if a symbol is pointing to somewhere after
3146 the start frag, given that the segment has stretched
3147 by stretch during relaxation.
3148
3149 This is more complicated than it might appear at first blush
3150 because of the stretching that goes on. Here is how the check
3151 works:
3152
3153 If the symbol and the frag are in the same segment, then
3154 the symbol could be down range. Note that this function
3155 assumes that start_frag is in now_seg.
3156
3157 If the symbol is pointing to a frag with an address greater than
3158 than the start_frag's address, then it _could_ be down range.
3159
3160 The problem comes because target_frag may or may not have had
3161 stretch bytes added to its address already, depending on if it is
3162 before or after start frag. (And if we knew that, then we wouldn't
3163 need this function.) start_frag has definitely already had stretch
3164 bytes added to its address.
3165
3166 If target_frag's address hasn't been adjusted yet, then to
3167 determine if it comes after start_frag, we need to subtract
3168 stretch from start_frag's address.
3169
3170 If target_frag's address has been adjusted, then it might have
3171 been adjusted such that it comes after start_frag's address minus
3172 stretch bytes.
3173
3174 So, in that case, we scan for it down stream to within
3175 stretch bytes. We could search to the end of the fr_chain, but
3176 that ends up taking too much time (over a minute on some gnu
3177 tests). */
3178
3179int
3180is_dnrange (start_frag, sym, stretch)
3181 fragS *start_frag;
3182 symbolS *sym;
3183 long stretch;
3184{
3185 if (S_GET_SEGMENT (sym) == now_seg)
3186 {
3187 fragS *cur_frag = symbol_get_frag (sym);
3188
3189 if (cur_frag->fr_address >= start_frag->fr_address - stretch)
3190 {
3191 int distance = stretch;
3192
3193 while (cur_frag && distance >= 0)
3194 {
3195 distance -= cur_frag->fr_fix;
3196 if (cur_frag == start_frag)
3197 return 0;
3198 cur_frag = cur_frag->fr_next;
3199 }
3200 return 1;
3201 }
3202 }
3203 return 0;
3204}
3205
3206\f
3207/* Relax the assembly instruction at least "min_steps".
3208 Return the number of steps taken. */
3209
3210int
3211xg_assembly_relax (istack, insn, pc_seg, pc_frag, pc_offset, min_steps,
3212 stretch)
3213 IStack *istack;
3214 TInsn *insn;
3215 segT pc_seg;
3216 fragS *pc_frag; /* If pc_frag == 0, then no pc-relative. */
3217 offsetT pc_offset; /* Offset in fragment. */
3218 int min_steps; /* Minimum number of conversion steps. */
3219 long stretch; /* Number of bytes stretched so far. */
3220{
3221 int steps_taken = 0;
3222
3223 /* assert (has no symbolic operands)
3224 Some of its immeds don't fit.
3225 Try to build a relaxed version.
3226 This may go through a couple of stages
3227 of single instruction transformations before
3228 we get there. */
3229
3230 TInsn single_target;
3231 TInsn current_insn;
3232 int lateral_steps = 0;
3233 int istack_size = istack->ninsn;
3234
3235 if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3236 && steps_taken >= min_steps)
3237 {
3238 istack_push (istack, insn);
3239 return steps_taken;
3240 }
3241 tinsn_copy (&current_insn, insn);
3242
3243 /* Walk through all of the single instruction expansions. */
3244 while (xg_is_single_relaxable_insn (&current_insn))
3245 {
3246 int error_val = xg_expand_narrow (&single_target, &current_insn);
3247
3248 assert (!error_val);
3249
3250 if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
3251 stretch))
3252 {
3253 steps_taken++;
3254 if (steps_taken >= min_steps)
3255 {
3256 istack_push (istack, &single_target);
3257 return steps_taken;
3258 }
3259 }
3260 tinsn_copy (&current_insn, &single_target);
3261 }
3262
3263 /* Now check for a multi-instruction expansion. */
3264 while (xg_is_relaxable_insn (&current_insn, lateral_steps))
3265 {
3266 if (xg_symbolic_immeds_fit (&current_insn, pc_seg, pc_frag, pc_offset,
3267 stretch))
3268 {
3269 if (steps_taken >= min_steps)
3270 {
3271 istack_push (istack, &current_insn);
3272 return steps_taken;
3273 }
3274 }
3275 steps_taken++;
3276 if (xg_expand_to_stack (istack, &current_insn, lateral_steps))
3277 {
3278 if (steps_taken >= min_steps)
3279 return steps_taken;
3280 }
3281 lateral_steps++;
3282 istack->ninsn = istack_size;
3283 }
3284
3285 /* It's not going to work -- use the original. */
3286 istack_push (istack, insn);
3287 return steps_taken;
3288}
3289
3290
3291static void
3292xg_force_frag_space (size)
3293 int size;
3294{
3295 /* This may have the side effect of creating a new fragment for the
3296 space to go into. I just do not like the name of the "frag"
3297 functions. */
3298 frag_grow (size);
3299}
3300
3301
3302void
3303xg_finish_frag (last_insn, state, max_growth, is_insn)
3304 char *last_insn;
3305 enum xtensa_relax_statesE state;
3306 int max_growth;
3307 bfd_boolean is_insn;
3308{
3309 /* Finish off this fragment so that it has at LEAST the desired
3310 max_growth. If it doesn't fit in this fragment, close this one
3311 and start a new one. In either case, return a pointer to the
3312 beginning of the growth area. */
3313
3314 fragS *old_frag;
3315 xg_force_frag_space (max_growth);
3316
3317 old_frag = frag_now;
3318
3319 frag_now->fr_opcode = last_insn;
3320 if (is_insn)
3321 frag_now->tc_frag_data.is_insn = TRUE;
3322
3323 frag_var (rs_machine_dependent, max_growth, max_growth,
3324 state, frag_now->fr_symbol, frag_now->fr_offset, last_insn);
3325
3326 /* Just to make sure that we did not split it up. */
3327 assert (old_frag->fr_next == frag_now);
3328}
3329
3330
3331static bfd_boolean
3332is_branch_jmp_to_next (insn, fragP)
3333 TInsn *insn;
3334 fragS *fragP;
3335{
3336 xtensa_isa isa = xtensa_default_isa;
3337 int i;
3338 int num_ops = xtensa_num_operands (isa, insn->opcode);
3339 int target_op = -1;
3340 symbolS *sym;
3341 fragS *target_frag;
3342
3343 if (is_loop_opcode (insn->opcode))
3344 return FALSE;
3345
3346 for (i = 0; i < num_ops; i++)
3347 {
3348 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3349 char *kind = xtensa_operand_kind (opnd);
3350 if (strlen (kind) == 1 && *kind == 'l')
3351 {
3352 target_op = i;
3353 break;
3354 }
3355 }
3356 if (target_op == -1)
3357 return FALSE;
3358
3359 if (insn->ntok <= target_op)
3360 return FALSE;
3361
3362 if (insn->tok[target_op].X_op != O_symbol)
3363 return FALSE;
3364
3365 sym = insn->tok[target_op].X_add_symbol;
3366 if (sym == NULL)
3367 return FALSE;
3368
3369 if (insn->tok[target_op].X_add_number != 0)
3370 return FALSE;
3371
3372 target_frag = symbol_get_frag (sym);
3373 if (target_frag == NULL)
3374 return FALSE;
3375
3376 if (is_next_frag_target (fragP->fr_next, target_frag)
3377 && S_GET_VALUE (sym) == target_frag->fr_address)
3378 return TRUE;
3379
3380 return FALSE;
3381}
3382
3383
3384static void
3385xg_add_branch_and_loop_targets (insn)
3386 TInsn *insn;
3387{
3388 xtensa_isa isa = xtensa_default_isa;
3389 int num_ops = xtensa_num_operands (isa, insn->opcode);
3390
3391 if (is_loop_opcode (insn->opcode))
3392 {
3393 int i = 1;
3394 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3395 char *kind = xtensa_operand_kind (opnd);
3396 if (strlen (kind) == 1 && *kind == 'l')
3397 if (insn->tok[i].X_op == O_symbol)
82e7541d 3398 symbol_get_tc (insn->tok[i].X_add_symbol)->is_loop_target = TRUE;
e0001a05
NC		 3399 return;
3400 }
3401
3402 /* Currently, we do not add branch targets. This is an optimization
3403 for later that tries to align only branch targets, not just any
3404 label in a text section. */
3405
3406 if (align_only_targets)
3407 {
3408 int i;
3409
3410 for (i = 0; i < insn->ntok && i < num_ops; i++)
3411 {
3412 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3413 char *kind = xtensa_operand_kind (opnd);
3414 if (strlen (kind) == 1 && *kind == 'l'
3415 && insn->tok[i].X_op == O_symbol)
82e7541d
BW		 3416 {
3417 symbolS *sym = insn->tok[i].X_add_symbol;
3418 symbol_get_tc (sym)->is_branch_target = TRUE;
3419 if (S_IS_DEFINED (sym))
3420 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
3421 }
e0001a05
NC		 3422 }
3423 }
3424}
3425
3426
3427/* Return the transition rule that matches or NULL if none matches. */
3428
3429bfd_boolean
3430xg_instruction_matches_rule (insn, rule)
3431 TInsn *insn;
3432 TransitionRule *rule;
3433{
3434 PreconditionList *condition_l;
3435
3436 if (rule->opcode != insn->opcode)
3437 return FALSE;
3438
3439 for (condition_l = rule->conditions;
3440 condition_l != NULL;
3441 condition_l = condition_l->next)
3442 {
3443 expressionS *exp1;
3444 expressionS *exp2;
3445 Precondition *cond = condition_l->precond;
3446
3447 switch (cond->typ)
3448 {
3449 case OP_CONSTANT:
3450 /* The expression must be the constant. */
3451 assert (cond->op_num < insn->ntok);
3452 exp1 = &insn->tok[cond->op_num];
3453 if (!expr_is_const (exp1))
3454 return FALSE;
3455 switch (cond->cmp)
3456 {
3457 case OP_EQUAL:
3458 if (get_expr_const (exp1) != cond->op_data)
3459 return FALSE;
3460 break;
3461 case OP_NOTEQUAL:
3462 if (get_expr_const (exp1) == cond->op_data)
3463 return FALSE;
3464 break;
3465 }
3466 break;
3467
3468 case OP_OPERAND:
3469 assert (cond->op_num < insn->ntok);
3470 assert (cond->op_data < insn->ntok);
3471 exp1 = &insn->tok[cond->op_num];
3472 exp2 = &insn->tok[cond->op_data];
3473
3474 switch (cond->cmp)
3475 {
3476 case OP_EQUAL:
3477 if (!expr_is_equal (exp1, exp2))
3478 return FALSE;
3479 break;
3480 case OP_NOTEQUAL:
3481 if (expr_is_equal (exp1, exp2))
3482 return FALSE;
3483 break;
3484 }
3485 break;
3486
3487 case OP_LITERAL:
3488 case OP_LABEL:
3489 default:
3490 return FALSE;
3491 }
3492 }
3493 return TRUE;
3494}
3495
3496
3497TransitionRule *
3498xg_instruction_match (insn)
3499 TInsn *insn;
3500{
3501 TransitionTable *table = xg_build_simplify_table ();
3502 TransitionList *l;
3503 assert (insn->opcode < table->num_opcodes);
3504
3505 /* Walk through all of the possible transitions. */
3506 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3507 {
3508 TransitionRule *rule = l->rule;
3509 if (xg_instruction_matches_rule (insn, rule))
3510 return rule;
3511 }
3512 return NULL;
3513}
3514
3515
3516/* Return false if no error. */
3517
3518bfd_boolean
3519xg_build_token_insn (instr_spec, old_insn, new_insn)
3520 BuildInstr *instr_spec;
3521 TInsn *old_insn;
3522 TInsn *new_insn;
3523{
3524 int num_ops = 0;
3525 BuildOp *b_op;
3526
3527 switch (instr_spec->typ)
3528 {
3529 case INSTR_INSTR:
3530 new_insn->insn_type = ITYPE_INSN;
3531 new_insn->opcode = instr_spec->opcode;
3532 new_insn->is_specific_opcode = FALSE;
3533 break;
3534 case INSTR_LITERAL_DEF:
3535 new_insn->insn_type = ITYPE_LITERAL;
3536 new_insn->opcode = XTENSA_UNDEFINED;
3537 new_insn->is_specific_opcode = FALSE;
3538 break;
3539 case INSTR_LABEL_DEF:
3540 as_bad (_("INSTR_LABEL_DEF not supported yet"));
3541 break;
3542 }
3543
3544 for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next)
3545 {
3546 expressionS *exp;
3547 const expressionS *src_exp;
3548
3549 num_ops++;
3550 switch (b_op->typ)
3551 {
3552 case OP_CONSTANT:
3553 /* The expression must be the constant. */
3554 assert (b_op->op_num < MAX_INSN_ARGS);
3555 exp = &new_insn->tok[b_op->op_num];
3556 set_expr_const (exp, b_op->op_data);
3557 break;
3558
3559 case OP_OPERAND:
3560 assert (b_op->op_num < MAX_INSN_ARGS);
3561 assert (b_op->op_data < (unsigned) old_insn->ntok);
3562 src_exp = &old_insn->tok[b_op->op_data];
3563 exp = &new_insn->tok[b_op->op_num];
3564 copy_expr (exp, src_exp);
3565 break;
3566
3567 case OP_LITERAL:
3568 case OP_LABEL:
3569 as_bad (_("can't handle generation of literal/labels yet"));
3570 assert (0);
3571
3572 default:
3573 as_bad (_("can't handle undefined OP TYPE"));
3574 assert (0);
3575 }
3576 }
3577
3578 new_insn->ntok = num_ops;
3579 return FALSE;
3580}
3581
3582
3583/* Return true if it was simplified. */
3584
3585bfd_boolean
3586xg_simplify_insn (old_insn, new_insn)
3587 TInsn *old_insn;
3588 TInsn *new_insn;
3589{
3590 TransitionRule *rule = xg_instruction_match (old_insn);
3591 BuildInstr *insn_spec;
3592 if (rule == NULL)
3593 return FALSE;
3594
3595 insn_spec = rule->to_instr;
3596 /* There should only be one. */
3597 assert (insn_spec != NULL);
3598 assert (insn_spec->next == NULL);
3599 if (insn_spec->next != NULL)
3600 return FALSE;
3601
3602 xg_build_token_insn (insn_spec, old_insn, new_insn);
3603
3604 return TRUE;
3605}
3606
3607
3608/* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3609 l32i.n. (2) Check the number of operands. (3) Place the instruction
3610 tokens into the stack or if we can relax it at assembly time, place
3611 multiple instructions/literals onto the stack. Return false if no
3612 error. */
3613
3614static bfd_boolean
3615xg_expand_assembly_insn (istack, orig_insn)
3616 IStack *istack;
3617 TInsn *orig_insn;
3618{
3619 int noperands;
3620 TInsn new_insn;
3621 memset (&new_insn, 0, sizeof (TInsn));
3622
3623 /* On return, we will be using the "use_tokens" with "use_ntok".
3624 This will reduce things like addi to addi.n. */
3625 if (code_density_available () && !orig_insn->is_specific_opcode)
3626 {
3627 if (xg_simplify_insn (orig_insn, &new_insn))
3628 orig_insn = &new_insn;
3629 }
3630
3631 noperands = xtensa_num_operands (xtensa_default_isa, orig_insn->opcode);
3632 if (orig_insn->ntok < noperands)
3633 {
3634 as_bad (_("found %d operands for '%s': Expected %d"),
3635 orig_insn->ntok,
3636 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3637 noperands);
3638 return TRUE;
3639 }
3640 if (orig_insn->ntok > noperands)
3641 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
3642 orig_insn->ntok,
3643 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3644 noperands);
3645
3646 /* If there are not enough operands, we will assert above. If there
3647 are too many, just cut out the extras here. */
3648
3649 orig_insn->ntok = noperands;
3650
3651 /* Cases:
3652
3653 Instructions with all constant immeds:
3654 Assemble them and relax the instruction if possible.
3655 Give error if not possible; no fixup needed.
3656
3657 Instructions with symbolic immeds:
3658 Assemble them with a Fix up (that may cause instruction expansion).
3659 Also close out the fragment if the fixup may cause instruction expansion.
3660
3661 There are some other special cases where we need alignment.
3662 1) before certain instructions with required alignment (OPCODE_ALIGN)
3663 2) before labels that have jumps (LABEL_ALIGN)
3664 3) after call instructions (RETURN_ALIGN)
3665 Multiple of these may be possible on the same fragment.
3666 If so, make sure to satisfy the required alignment.
3667 Then try to get the desired alignment. */
3668
3669 if (tinsn_has_invalid_symbolic_operands (orig_insn))
3670 return TRUE;
3671
3672 if (orig_insn->is_specific_opcode || !can_relax ())
3673 {
3674 istack_push (istack, orig_insn);
3675 return FALSE;
3676 }
3677
3678 if (tinsn_has_symbolic_operands (orig_insn))
3679 {
3680 if (tinsn_has_complex_operands (orig_insn))
3681 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3682 else
3683 istack_push (istack, orig_insn);
3684 }
3685 else
3686 {
3687 if (xg_immeds_fit (orig_insn))
3688 istack_push (istack, orig_insn);
3689 else
3690 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3691 }
3692
3693#if 0
3694 for (i = 0; i < istack->ninsn; i++)
3695 {
3696 if (xg_simplify_insn (&new_insn, &istack->insn[i]))
3697 istack->insn[i] = new_insn;
3698 }
3699#endif
3700
3701 return FALSE;
3702}
3703
3704
3705/* Currently all literals that are generated here are 32-bit L32R targets. */
3706
3707symbolS *
3708xg_assemble_literal (insn)
3709 /* const */ TInsn *insn;
3710{
3711 emit_state state;
3712 symbolS *lit_sym = NULL;
3713
3714 /* size = 4 for L32R. It could easily be larger when we move to
3715 larger constants. Add a parameter later. */
3716 offsetT litsize = 4;
3717 offsetT litalign = 2; /* 2^2 = 4 */
3718 expressionS saved_loc;
3719 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3720
3721 assert (insn->insn_type == ITYPE_LITERAL);
3722 assert (insn->ntok = 1); /* must be only one token here */
3723
3724 xtensa_switch_to_literal_fragment (&state);
3725
3726 /* Force a 4-byte align here. Note that this opens a new frag, so all
3727 literals done with this function have a frag to themselves. That's
3728 important for the way text section literals work. */
3729 frag_align (litalign, 0, 0);
3730
3731 emit_expr (&insn->tok[0], litsize);
3732
3733 assert (frag_now->tc_frag_data.literal_frag == NULL);
3734 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3735 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3736 lit_sym = frag_now->fr_symbol;
3737 frag_now->tc_frag_data.is_literal = TRUE;
3738
3739 /* Go back. */
3740 xtensa_restore_emit_state (&state);
3741 return lit_sym;
3742}
3743
3744
3745static void
3746xg_assemble_literal_space (size)
3747 /* const */ int size;
3748{
3749 emit_state state;
3750 /* We might have to do something about this alignment. It only
3751 takes effect if something is placed here. */
3752 offsetT litalign = 2; /* 2^2 = 4 */
3753 fragS *lit_saved_frag;
3754
3755 expressionS saved_loc;
3756
3757 assert (size % 4 == 0);
3758 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3759
3760 xtensa_switch_to_literal_fragment (&state);
3761
3762 /* Force a 4-byte align here. */
3763 frag_align (litalign, 0, 0);
3764
3765 xg_force_frag_space (size);
3766
3767 lit_saved_frag = frag_now;
3768 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3769 frag_now->tc_frag_data.is_literal = TRUE;
3770 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3771 xg_finish_frag (0, RELAX_LITERAL, size, FALSE);
3772
3773 /* Go back. */
3774 xtensa_restore_emit_state (&state);
3775 frag_now->tc_frag_data.literal_frag = lit_saved_frag;
3776}
3777
3778
3779symbolS *
3780xtensa_create_literal_symbol (sec, frag)
3781 segT sec;
3782 fragS *frag;
3783{
3784 static int lit_num = 0;
3785 static char name[256];
61846f28 3786 symbolS *symbolP;
e0001a05
NC		 3787
3788 sprintf (name, ".L_lit_sym%d", lit_num);
e0001a05 3789
61846f28
BW		 3790 /* Create a local symbol. If it is in a linkonce section, we have to
3791 be careful to make sure that if it is used in a relocation that the
3792 symbol will be in the output file. */
3793 if (get_is_linkonce_section (stdoutput, sec))
e0001a05 3794 {
61846f28 3795 symbolP = symbol_new (name, sec, 0, frag);
e0001a05
NC		 3796 S_CLEAR_EXTERNAL (symbolP);
3797 /* symbolP->local = 1; */
3798 }
3799 else
61846f28 3800 symbolP = symbol_new (name, sec, 0, frag);
e0001a05 3801
82e7541d
BW		 3802 xtensa_add_literal_sym (symbolP);
3803
61846f28
BW		 3804 frag->tc_frag_data.is_literal = TRUE;
3805 lit_num++;
e0001a05
NC		 3806 return symbolP;
3807}
3808
3809
82e7541d
BW		 3810static void
3811xtensa_add_literal_sym (sym)
3812 symbolS *sym;
3813{
3814 sym_list *l;
3815
3816 l = (sym_list *) xmalloc (sizeof (sym_list));
3817 l->sym = sym;
3818 l->next = literal_syms;
3819 literal_syms = l;
3820}
3821
3822
3823static void
3824xtensa_add_insn_label (sym)
3825 symbolS *sym;
3826{
3827 sym_list *l;
3828
3829 if (!free_insn_labels)
3830 l = (sym_list *) xmalloc (sizeof (sym_list));
3831 else
3832 {
3833 l = free_insn_labels;
3834 free_insn_labels = l->next;
3835 }
3836
3837 l->sym = sym;
3838 l->next = insn_labels;
3839 insn_labels = l;
3840}
3841
3842
3843static void
3844xtensa_clear_insn_labels (void)
3845{
3846 sym_list **pl;
3847
3848 for (pl = &free_insn_labels; *pl != NULL; pl = &(*pl)->next)
3849 ;
3850 *pl = insn_labels;
3851 insn_labels = NULL;
3852}
3853
3854
e0001a05
NC		 3855/* Return true if the section flags are marked linkonce
3856 or the name is .gnu.linkonce*. */
3857
3858bfd_boolean
3859get_is_linkonce_section (abfd, sec)
3860 bfd *abfd ATTRIBUTE_UNUSED;
3861 segT sec;
3862{
3863 flagword flags, link_once_flags;
3864
3865 flags = bfd_get_section_flags (abfd, sec);
3866 link_once_flags = (flags & SEC_LINK_ONCE);
3867
3868 /* Flags might not be set yet. */
3869 if (!link_once_flags)
3870 {
3871 static size_t len = sizeof ".gnu.linkonce.t.";
3872
3873 if (strncmp (segment_name (sec), ".gnu.linkonce.t.", len - 1) == 0)
3874 link_once_flags = SEC_LINK_ONCE;
3875 }
3876 return (link_once_flags != 0);
3877}
3878
3879
3880/* Emit an instruction to the current fragment. If record_fix is true,
3881 then this instruction will not change and we can go ahead and record
3882 the fixup. If record_fix is false, then the instruction may change
3883 and we are going to close out this fragment. Go ahead and set the
3884 fr_symbol and fr_offset instead of adding a fixup. */
3885
3886static bfd_boolean
3887xg_emit_insn (t_insn, record_fix)
3888 TInsn *t_insn;
3889 bfd_boolean record_fix;
3890{
3891 bfd_boolean ok = TRUE;
3892 xtensa_isa isa = xtensa_default_isa;
3893 xtensa_opcode opcode = t_insn->opcode;
3894 bfd_boolean has_fixup = FALSE;
3895 int noperands;
3896 int i, byte_count;
3897 fragS *oldfrag;
3898 size_t old_size;
3899 char *f;
3900 static xtensa_insnbuf insnbuf = NULL;
3901
3902 /* Use a static pointer to the insn buffer so we don't have to call
3903 malloc each time through. */
3904 if (!insnbuf)
3905 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
3906
3907 has_fixup = tinsn_to_insnbuf (t_insn, insnbuf);
3908
3909 noperands = xtensa_num_operands (isa, opcode);
3910 assert (noperands == t_insn->ntok);
3911
3912 byte_count = xtensa_insn_length (isa, opcode);
3913 oldfrag = frag_now;
3914 /* This should NEVER cause us to jump into a new frag;
3915 we've already reserved space. */
3916 old_size = frag_now_fix ();
3917 f = frag_more (byte_count);
3918 assert (oldfrag == frag_now);
3919
3920 /* This needs to generate a record that lists the parts that are
3921 instructions. */
3922 if (!frag_now->tc_frag_data.is_insn)
3923 {
3924 /* If we are at the beginning of a fragment, switch this
3925 fragment to an instruction fragment. */
3926 if (now_seg != absolute_section && old_size != 0)
3927 as_warn (_("instruction fragment may contain data"));
3928 frag_now->tc_frag_data.is_insn = TRUE;
3929 }
3930
3931 xtensa_insnbuf_to_chars (isa, insnbuf, f);
3932
cda2eb9e
BW		 3933 dwarf2_emit_insn (byte_count);
3934
e0001a05
NC		 3935 /* Now spit out the opcode fixup.... */
3936 if (!has_fixup)
3937 return !ok;
3938
3939 for (i = 0; i < noperands; ++i)
3940 {
3941 expressionS *expr = &t_insn->tok[i];
3942 switch (expr->X_op)
3943 {
3944 case O_symbol:
3945 if (get_relaxable_immed (opcode) == i)
3946 {
3947 if (record_fix)
3948 {
3949 if (!xg_add_opcode_fix (opcode, i, expr, frag_now,
3950 f - frag_now->fr_literal))
3951 ok = FALSE;
3952 }
3953 else
3954 {
3955 /* Write it to the fr_offset, fr_symbol. */
3956 frag_now->fr_symbol = expr->X_add_symbol;
3957 frag_now->fr_offset = expr->X_add_number;
3958 }
3959 }
3960 else
3961 {
3962 as_bad (_("invalid operand %d on '%s'"),
3963 i, xtensa_opcode_name (isa, opcode));
3964 ok = FALSE;
3965 }
3966 break;
3967
3968 case O_constant:
3969 case O_register:
3970 break;
3971
3972 default:
3973 as_bad (_("invalid expression for operand %d on '%s'"),
3974 i, xtensa_opcode_name (isa, opcode));
3975 ok = FALSE;
3976 break;
3977 }
3978 }
3979
3980 return !ok;
3981}
3982
3983
3984static bfd_boolean
3985xg_emit_insn_to_buf (t_insn, buf, fragP, offset, build_fix)
3986 TInsn *t_insn;
3987 char *buf;
3988 fragS *fragP;
3989 offsetT offset;
3990 bfd_boolean build_fix;
3991{
3992 static xtensa_insnbuf insnbuf = NULL;
3993 bfd_boolean has_symbolic_immed = FALSE;
3994 bfd_boolean ok = TRUE;
3995 if (!insnbuf)
3996 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
3997
3998 has_symbolic_immed = tinsn_to_insnbuf (t_insn, insnbuf);
3999 if (has_symbolic_immed && build_fix)
4000 {
4001 /* Add a fixup. */
4002 int opnum = get_relaxable_immed (t_insn->opcode);
4003 expressionS *exp = &t_insn->tok[opnum];
4004
4005 if (!xg_add_opcode_fix (t_insn->opcode,
4006 opnum, exp, fragP, offset))
4007 ok = FALSE;
4008 }
4009 fragP->tc_frag_data.is_insn = TRUE;
4010 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4011 return ok;
4012}
4013
4014
4015/* Put in a fixup record based on the opcode.
4016 Return true on success. */
4017
4018bfd_boolean
4019xg_add_opcode_fix (opcode, opnum, expr, fragP, offset)
4020 xtensa_opcode opcode;
4021 int opnum;
4022 expressionS *expr;
4023 fragS *fragP;
4024 offsetT offset;
4025{
4026 bfd_reloc_code_real_type reloc;
4027 reloc_howto_type *howto;
4028 int insn_length;
4029 fixS *the_fix;
4030
4031 reloc = opnum_to_reloc (opnum);
4032 if (reloc == BFD_RELOC_NONE)
4033 {
4034 as_bad (_("invalid relocation operand %i on '%s'"),
4035 opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
4036 return FALSE;
4037 }
4038
4039 howto = bfd_reloc_type_lookup (stdoutput, reloc);
4040
4041 if (!howto)
4042 {
4043 as_bad (_("undefined symbol for opcode \"%s\"."),
4044 xtensa_opcode_name (xtensa_default_isa, opcode));
4045 return FALSE;
4046 }
4047
4048 insn_length = xtensa_insn_length (xtensa_default_isa, opcode);
4049 the_fix = fix_new_exp (fragP, offset, insn_length, expr,
4050 howto->pc_relative, reloc);
4051
4052 if (expr->X_add_symbol &&
4053 (S_IS_EXTERNAL (expr->X_add_symbol) || S_IS_WEAK (expr->X_add_symbol)))
4054 the_fix->fx_plt = TRUE;
4055
4056 return TRUE;
4057}
4058
4059
4060void
4061xg_resolve_literals (insn, lit_sym)
4062 TInsn *insn;
4063 symbolS *lit_sym;
4064{
4065 symbolS *sym = get_special_literal_symbol ();
4066 int i;
4067 if (lit_sym == 0)
4068 return;
4069 assert (insn->insn_type == ITYPE_INSN);
4070 for (i = 0; i < insn->ntok; i++)
4071 if (insn->tok[i].X_add_symbol == sym)
4072 insn->tok[i].X_add_symbol = lit_sym;
4073
4074}
4075
4076
4077void
4078xg_resolve_labels (insn, label_sym)
4079 TInsn *insn;
4080 symbolS *label_sym;
4081{
4082 symbolS *sym = get_special_label_symbol ();
4083 int i;
4084 /* assert(!insn->is_literal); */
4085 for (i = 0; i < insn->ntok; i++)
4086 if (insn->tok[i].X_add_symbol == sym)
4087 insn->tok[i].X_add_symbol = label_sym;
4088
4089}
4090
4091
4092static void
4093xg_assemble_tokens (insn)
4094 /*const */ TInsn *insn;
4095{
4096 /* By the time we get here, there's not too much left to do.
4097 1) Check our assumptions.
4098 2) Check if the current instruction is "narrow".
4099 If so, then finish the frag, create another one.
4100 We could also go back to change some previous
4101 "narrow" frags into no-change ones if we have more than
4102 MAX_NARROW_ALIGNMENT of them without alignment restrictions
4103 between them.
4104
4105 Cases:
4106 1) It has constant operands and doesn't fit.
4107 Go ahead and assemble it so it will fail.
4108 2) It has constant operands that fit.
4109 If narrow and !is_specific_opcode,
4110 assemble it and put in a relocation
4111 else
4112 assemble it.
4113 3) It has a symbolic immediate operand
4114 a) Find the worst-case relaxation required
4115 b) Find the worst-case literal pool space required.
4116 Insert appropriate alignment & space in the literal.
4117 Assemble it.
4118 Add the relocation. */
4119
4120 assert (insn->insn_type == ITYPE_INSN);
4121
4122 if (!tinsn_has_symbolic_operands (insn))
4123 {
4124 if (xg_is_narrow_insn (insn) && !insn->is_specific_opcode)
4125 {
4126 /* assemble it but add max required space */
4127 int max_size = xg_get_max_narrow_insn_size (insn->opcode);
4128 int min_size = xg_get_insn_size (insn);
4129 char *last_insn;
4130 assert (max_size == 3);
4131 /* make sure we have enough space to widen it */
4132 xg_force_frag_space (max_size);
4133 /* Output the instruction. It may cause an error if some
4134 operands do not fit. */
4135 last_insn = frag_more (0);
4136 if (xg_emit_insn (insn, TRUE))
4137 as_warn (_("instruction with constant operands does not fit"));
4138 xg_finish_frag (last_insn, RELAX_NARROW, max_size - min_size, TRUE);
4139 }
4140 else
4141 {
4142 /* Assemble it. No relocation needed. */
4143 int max_size = xg_get_insn_size (insn);
4144 xg_force_frag_space (max_size);
4145 if (xg_emit_insn (insn, FALSE))
4146 as_warn (_("instruction with constant operands does not "
4147 "fit without widening"));
4148 /* frag_more (max_size); */
4149
4150 /* Special case for jx. If the jx is the next to last
4151 instruction in a loop, we will add a NOP after it. This
4152 avoids a hardware issue that could occur if the jx jumped
4153 to the next instruction. */
4154 if (software_avoid_b_j_loop_end
4155 && is_jx_opcode (insn->opcode))
4156 {
4157 maybe_has_b_j_loop_end = TRUE;
4158 /* add 2 of these */
4159 frag_now->tc_frag_data.is_insn = TRUE;
4160 frag_var (rs_machine_dependent, 4, 4,
4161 RELAX_ADD_NOP_IF_PRE_LOOP_END,
4162 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4163 }
4164 }
4165 }
4166 else
4167 {
4168 /* Need to assemble it with space for the relocation. */
4169 if (!insn->is_specific_opcode)
4170 {
4171 /* Assemble it but add max required space. */
4172 char *last_insn;
4173 int min_size = xg_get_insn_size (insn);
4174 int max_size = xg_get_max_insn_widen_size (insn->opcode);
4175 int max_literal_size =
4176 xg_get_max_insn_widen_literal_size (insn->opcode);
4177
4178#if 0
4179 symbolS *immed_sym = xg_get_insn_immed_symbol (insn);
4180 set_frag_segment (frag_now, now_seg);
4181#endif /* 0 */
4182
4183 /* Make sure we have enough space to widen the instruction.
4184 This may open a new fragment. */
4185 xg_force_frag_space (max_size);
4186 if (max_literal_size != 0)
4187 xg_assemble_literal_space (max_literal_size);
4188
4189 /* Output the instruction. It may cause an error if some
4190 operands do not fit. Emit the incomplete instruction. */
4191 last_insn = frag_more (0);
4192 xg_emit_insn (insn, FALSE);
4193
4194 xg_finish_frag (last_insn, RELAX_IMMED, max_size - min_size, TRUE);
4195
4196 /* Special cases for loops:
4197 close_loop_end should be inserted AFTER short_loop.
4198 Make sure that CLOSE loops are processed BEFORE short_loops
4199 when converting them. */
4200
4201 /* "short_loop": add a NOP if the loop is < 4 bytes. */
4202 if (software_avoid_short_loop
4203 && is_loop_opcode (insn->opcode))
4204 {
4205 maybe_has_short_loop = TRUE;
4206 frag_now->tc_frag_data.is_insn = TRUE;
4207 frag_var (rs_machine_dependent, 4, 4,
4208 RELAX_ADD_NOP_IF_SHORT_LOOP,
4209 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4210 frag_now->tc_frag_data.is_insn = TRUE;
4211 frag_var (rs_machine_dependent, 4, 4,
4212 RELAX_ADD_NOP_IF_SHORT_LOOP,
4213 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4214 }
4215
4216 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
4217 loop at least 12 bytes away from another loop's loop
4218 end. */
4219 if (software_avoid_close_loop_end
4220 && is_loop_opcode (insn->opcode))
4221 {
4222 maybe_has_close_loop_end = TRUE;
4223 frag_now->tc_frag_data.is_insn = TRUE;
4224 frag_var (rs_machine_dependent, 12, 12,
4225 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
4226 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4227 }
4228 }
4229 else
4230 {
4231 /* Assemble it in place. No expansion will be required,
4232 but we'll still need a relocation record. */
4233 int max_size = xg_get_insn_size (insn);
4234 xg_force_frag_space (max_size);
4235 if (xg_emit_insn (insn, TRUE))
4236 as_warn (_("instruction's constant operands do not fit"));
4237 }
4238 }
4239}
4240
4241
4242/* Return true if the instruction can write to the specified
4243 integer register. */
4244
4245static bfd_boolean
4246is_register_writer (insn, regset, regnum)
4247 const TInsn *insn;
4248 const char *regset;
4249 int regnum;
4250{
4251 int i;
4252 int num_ops;
4253 xtensa_isa isa = xtensa_default_isa;
4254
4255 num_ops = xtensa_num_operands (isa, insn->opcode);
4256
4257 for (i = 0; i < num_ops; i++)
4258 {
4259 xtensa_operand operand = xtensa_get_operand (isa, insn->opcode, i);
4260 char inout = xtensa_operand_inout (operand);
4261
4262 if (inout == '>' || inout == '=')
4263 {
4264 if (strcmp (xtensa_operand_kind (operand), regset) == 0)
4265 {
4266 if ((insn->tok[i].X_op == O_register)
4267 && (insn->tok[i].X_add_number == regnum))
4268 return TRUE;
4269 }
4270 }
4271 }
4272 return FALSE;
4273}
4274
4275
4276static bfd_boolean
4277is_bad_loopend_opcode (tinsn)
4278 const TInsn * tinsn;
4279{
4280 xtensa_opcode opcode = tinsn->opcode;
4281
4282 if (opcode == XTENSA_UNDEFINED)
4283 return FALSE;
4284
4285 if (opcode == xtensa_call0_opcode
4286 || opcode == xtensa_callx0_opcode
4287 || opcode == xtensa_call4_opcode
4288 || opcode == xtensa_callx4_opcode
4289 || opcode == xtensa_call8_opcode
4290 || opcode == xtensa_callx8_opcode
4291 || opcode == xtensa_call12_opcode
4292 || opcode == xtensa_callx12_opcode
4293 || opcode == xtensa_isync_opcode
4294 || opcode == xtensa_ret_opcode
4295 || opcode == xtensa_ret_n_opcode
4296 || opcode == xtensa_retw_opcode
4297 || opcode == xtensa_retw_n_opcode
4298 || opcode == xtensa_waiti_opcode)
4299 return TRUE;
4300
4301 /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
4302 if (opcode == xtensa_rsr_opcode
4303 && tinsn->ntok >= 2
4304 && tinsn->tok[1].X_op == O_constant
4305 && tinsn->tok[1].X_add_number == 2)
4306 return TRUE;
4307
4308 return FALSE;
4309}
4310
4311
4312/* Labels that begin with ".Ln" or ".LM" are unaligned.
4313 This allows the debugger to add unaligned labels.
4314 Also, the assembler generates stabs labels that need
4315 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4316
4317bfd_boolean
4318is_unaligned_label (sym)
4319 symbolS *sym;
4320{
4321 const char *name = S_GET_NAME (sym);
4322 static size_t fake_size = 0;
4323
4324 if (name
4325 && name[0] == '.'
4326 && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M'))
4327 return TRUE;
4328
4329 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4330 if (fake_size == 0)
4331 fake_size = strlen (FAKE_LABEL_NAME);
4332
4333 if (name
4334 && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0
4335 && (name[fake_size] == 'F'
4336 || name[fake_size] == 'L'
4337 || (name[fake_size] == 'e'
4338 && strncmp ("endfunc", name+fake_size, 7) == 0)))
4339 return TRUE;
4340
4341 return FALSE;
4342}
4343
4344
4345fragS *
4346next_non_empty_frag (fragP)
4347 const fragS *fragP;
4348{
4349 fragS *next_fragP = fragP->fr_next;
4350
4351 /* Sometimes an empty will end up here due storage allocation issues.
4352 So we have to skip until we find something legit. */
4353 while (next_fragP && next_fragP->fr_fix == 0)
4354 next_fragP = next_fragP->fr_next;
4355
4356 if (next_fragP == NULL || next_fragP->fr_fix == 0)
4357 return NULL;
4358
4359 return next_fragP;
4360}
4361
4362
4363xtensa_opcode
4364next_frag_opcode (fragP)
4365 const fragS * fragP;
4366{
4367 const fragS *next_fragP = next_non_empty_frag (fragP);
4368 static xtensa_insnbuf insnbuf = NULL;
4369 xtensa_isa isa = xtensa_default_isa;
4370
4371 if (!insnbuf)
4372 insnbuf = xtensa_insnbuf_alloc (isa);
4373
4374 if (next_fragP == NULL)
4375 return XTENSA_UNDEFINED;
4376
4377 xtensa_insnbuf_from_chars (isa, insnbuf, next_fragP->fr_literal);
4378 return xtensa_decode_insn (isa, insnbuf);
4379}
4380
4381
4382/* Return true if the target frag is one of the next non-empty frags. */
4383
4384bfd_boolean
4385is_next_frag_target (fragP, target)
4386 const fragS *fragP;
4387 const fragS *target;
4388{
4389 if (fragP == NULL)
4390 return FALSE;
4391
4392 for (; fragP; fragP = fragP->fr_next)
4393 {
4394 if (fragP == target)
4395 return TRUE;
4396 if (fragP->fr_fix != 0)
4397 return FALSE;
4398 if (fragP->fr_type == rs_fill && fragP->fr_offset != 0)
4399 return FALSE;
4400 if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
4401 && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0))
4402 return FALSE;
4403 if (fragP->fr_type == rs_space)
4404 return FALSE;
4405 }
4406 return FALSE;
4407}
4408
4409
4410/* If the next legit fragment is an end-of-loop marker,
4411 switch its state so it will instantiate a NOP. */
4412
4413static void
4414update_next_frag_nop_state (fragP)
4415 fragS *fragP;
4416{
4417 fragS *next_fragP = fragP->fr_next;
4418
4419 while (next_fragP && next_fragP->fr_fix == 0)
4420 {
4421 if (next_fragP->fr_type == rs_machine_dependent
4422 && next_fragP->fr_subtype == RELAX_LOOP_END)
4423 {
4424 next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP;
4425 return;
4426 }
4427 next_fragP = next_fragP->fr_next;
4428 }
4429}
4430
4431
4432static bfd_boolean
4433next_frag_is_branch_target (fragP)
4434 const fragS *fragP;
4435{
4436 /* Sometimes an empty will end up here due storage allocation issues,
4437 so we have to skip until we find something legit. */
4438 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4439 {
4440 if (fragP->tc_frag_data.is_branch_target)
4441 return TRUE;
4442 if (fragP->fr_fix != 0)
4443 break;
4444 }
4445 return FALSE;
4446}
4447
4448
4449static bfd_boolean
4450next_frag_is_loop_target (fragP)
4451 const fragS *fragP;
4452{
4453 /* Sometimes an empty will end up here due storage allocation issues.
4454 So we have to skip until we find something legit. */
4455 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4456 {
4457 if (fragP->tc_frag_data.is_loop_target)
4458 return TRUE;
4459 if (fragP->fr_fix != 0)
4460 break;
4461 }
4462 return FALSE;
4463}
4464
4465
4466static addressT
4467next_frag_pre_opcode_bytes (fragp)
4468 const fragS *fragp;
4469{
4470 const fragS *next_fragp = fragp->fr_next;
4471
4472 xtensa_opcode next_opcode = next_frag_opcode (fragp);
4473 if (!is_loop_opcode (next_opcode))
4474 return 0;
4475
4476 /* Sometimes an empty will end up here due storage allocation issues.
4477 So we have to skip until we find something legit. */
4478 while (next_fragp->fr_fix == 0)
4479 next_fragp = next_fragp->fr_next;
4480
4481 if (next_fragp->fr_type != rs_machine_dependent)
4482 return 0;
4483
4484 /* There is some implicit knowledge encoded in here.
4485 The LOOP instructions that are NOT RELAX_IMMED have
4486 been relaxed. */
4487 if (next_fragp->fr_subtype > RELAX_IMMED)
4488 return get_expanded_loop_offset (next_opcode);
4489
4490 return 0;
4491}
4492
4493
4494/* Mark a location where we can later insert literal frags. Update
4495 the section's literal_pool_loc, so subsequent literals can be
4496 placed nearest to their use. */
4497
4498static void
61846f28 4499xtensa_mark_literal_pool_location ()
e0001a05
NC		 4500{
4501 /* Any labels pointing to the current location need
4502 to be adjusted to after the literal pool. */
4503 emit_state s;
e0001a05 4504 fragS *pool_location;
e0001a05
NC		 4505
4506 frag_align (2, 0, 0);
4507
4508 /* We stash info in the fr_var of these frags
4509 so we can later move the literal's fixes into this
4510 frchain's fix list. We can use fr_var because fr_var's
4511 interpretation depends solely on the fr_type and subtype. */
4512 pool_location = frag_now;
4513 frag_variant (rs_machine_dependent, 0, (int) frchain_now,
4514 RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
4515 frag_variant (rs_machine_dependent, 0, (int) now_seg,
4516 RELAX_LITERAL_POOL_END, NULL, 0, NULL);
4517
4518 /* Now put a frag into the literal pool that points to this location. */
4519 set_literal_pool_location (now_seg, pool_location);
4520 xtensa_switch_to_literal_fragment (&s);
4521
4522 /* Close whatever frag is there. */
4523 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4524 frag_now->tc_frag_data.literal_frag = pool_location;
4525 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4526 xtensa_restore_emit_state (&s);
e0001a05
NC		 4527}
4528
4529
82e7541d
BW		 4530/* The "loops_ok" argument is provided to allow ignoring labels that
4531 define loop ends. This fixes a bug where the NOPs to align a
4532 loop opcode were included in a previous zero-cost loop:
4533
4534 loop a0, loopend
4535 <loop1 body>
4536 loopend:
4537
4538 loop a2, loopend2
4539 <loop2 body>
4540
4541 would become:
4542
4543 loop a0, loopend
4544 <loop1 body>
4545 nop.n <===== bad!
4546 loopend:
4547
4548 loop a2, loopend2
4549 <loop2 body>
4550
4551 This argument is used to prevent moving the NOP to before the
4552 loop-end label, which is what you want in this special case. */
4553
e0001a05 4554static void
82e7541d
BW		 4555xtensa_move_labels (new_frag, new_offset, loops_ok)
4556 fragS *new_frag;
e0001a05 4557 valueT new_offset;
82e7541d 4558 bfd_boolean loops_ok;
e0001a05 4559{
82e7541d 4560 sym_list *lit;
e0001a05 4561
82e7541d 4562 for (lit = insn_labels; lit; lit = lit->next)
e0001a05 4563 {
82e7541d
BW		 4564 symbolS *lit_sym = lit->sym;
4565 if (loops_ok || symbol_get_tc (lit_sym)->is_loop_target == 0)
4566 {
4567 S_SET_VALUE (lit_sym, new_offset);
4568 symbol_set_frag (lit_sym, new_frag);
4569 }
e0001a05
NC		 4570 }
4571}
4572
4573
4574/* Assemble a NOP of the requested size in the buffer. User must have
4575 allocated "buf" with at least "size" bytes. */
4576
4577void
4578assemble_nop (size, buf)
4579 size_t size;
4580 char *buf;
4581{
4582 static xtensa_insnbuf insnbuf = NULL;
4583 TInsn t_insn;
4584 if (!insnbuf)
4585 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4586
4587 tinsn_init (&t_insn);
4588 switch (size)
4589 {
4590 case 2:
4591 t_insn.opcode = xtensa_nop_n_opcode;
4592 t_insn.ntok = 0;
4593 if (t_insn.opcode == XTENSA_UNDEFINED)
4594 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4595 tinsn_to_insnbuf (&t_insn, insnbuf);
4596 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4597 break;
4598
4599 case 3:
4600 t_insn.opcode = xtensa_or_opcode;
4601 assert (t_insn.opcode != XTENSA_UNDEFINED);
4602 if (t_insn.opcode == XTENSA_UNDEFINED)
4603 as_fatal (_("opcode 'OR' unavailable in this configuration"));
4604 set_expr_const (&t_insn.tok[0], 1);
4605 set_expr_const (&t_insn.tok[1], 1);
4606 set_expr_const (&t_insn.tok[2], 1);
4607 t_insn.ntok = 3;
4608 tinsn_to_insnbuf (&t_insn, insnbuf);
4609 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4610 break;
4611
4612 default:
4613 as_fatal (_("invalid %d-byte NOP requested"), size);
4614 }
4615}
4616
4617
4618/* Return the number of bytes for the offset of the expanded loop
4619 instruction. This should be incorporated into the relaxation
4620 specification but is hard-coded here. This is used to auto-align
4621 the loop instruction. It is invalid to call this function if the
4622 configuration does not have loops or if the opcode is not a loop
4623 opcode. */
4624
4625static addressT
4626get_expanded_loop_offset (opcode)
4627 xtensa_opcode opcode;
4628{
4629 /* This is the OFFSET of the loop instruction in the expanded loop.
4630 This MUST correspond directly to the specification of the loop
4631 expansion. It will be validated on fragment conversion. */
4632 if (opcode == XTENSA_UNDEFINED)
4633 as_fatal (_("get_expanded_loop_offset: undefined opcode"));
4634 if (opcode == xtensa_loop_opcode)
4635 return 0;
4636 if (opcode == xtensa_loopnez_opcode)
4637 return 3;
4638 if (opcode == xtensa_loopgtz_opcode)
4639 return 6;
4640 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4641 return 0;
4642}
4643
4644
4645fragS *
4646get_literal_pool_location (seg)
4647 segT seg;
4648{
4649 return seg_info (seg)->tc_segment_info_data.literal_pool_loc;
4650}
4651
4652
4653static void
4654set_literal_pool_location (seg, literal_pool_loc)
4655 segT seg;
4656 fragS *literal_pool_loc;
4657{
4658 seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc;
4659}
4660
4661\f
4662/* External Functions and Other GAS Hooks. */
4663
4664const char *
4665xtensa_target_format ()
4666{
4667 return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le");
4668}
4669
4670
4671void
4672xtensa_file_arch_init (abfd)
4673 bfd *abfd;
4674{
4675 bfd_set_private_flags (abfd, 0x100 | 0x200);
4676}
4677
4678
4679void
4680md_number_to_chars (buf, val, n)
4681 char *buf;
4682 valueT val;
4683 int n;
4684{
4685 if (target_big_endian)
4686 number_to_chars_bigendian (buf, val, n);
4687 else
4688 number_to_chars_littleendian (buf, val, n);
4689}
4690
4691
4692/* This function is called once, at assembler startup time. It should
4693 set up all the tables, etc. that the MD part of the assembler will
4694 need. */
4695
4696void
4697md_begin ()
4698{
4699 segT current_section = now_seg;
4700 int current_subsec = now_subseg;
4701 xtensa_isa isa;
4702
4703#if STATIC_LIBISA
4704 isa = xtensa_isa_init ();
4705#else
4706 /* ISA was already initialized by xtensa_init(). */
4707 isa = xtensa_default_isa;
4708#endif
4709
4710 /* Set up the .literal, .fini.literal and .init.literal sections. */
4711 memset (&default_lit_sections, 0, sizeof (default_lit_sections));
4712 default_lit_sections.init_lit_seg_name = INIT_LITERAL_SECTION_NAME;
4713 default_lit_sections.fini_lit_seg_name = FINI_LITERAL_SECTION_NAME;
4714 default_lit_sections.lit_seg_name = LITERAL_SECTION_NAME;
4715
4716 subseg_set (current_section, current_subsec);
4717
4718 xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi");
4719 xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi");
4720 xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0");
4721 xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4");
4722 xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8");
4723 xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12");
4724 xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0");
4725 xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4");
4726 xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8");
4727 xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12");
4728 xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry");
4729 xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync");
4730 xtensa_j_opcode = xtensa_opcode_lookup (isa, "j");
4731 xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx");
4732 xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop");
4733 xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez");
4734 xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz");
4735 xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n");
4736 xtensa_or_opcode = xtensa_opcode_lookup (isa, "or");
4737 xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret");
4738 xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n");
4739 xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw");
4740 xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n");
4741 xtensa_rsr_opcode = xtensa_opcode_lookup (isa, "rsr");
4742 xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti");
4743}
4744
4745
4746/* tc_frob_label hook */
4747
4748void
4749xtensa_frob_label (sym)
4750 symbolS *sym;
4751{
82e7541d
BW		 4752 if (generating_literals)
4753 xtensa_add_literal_sym (sym);
4754 else
4755 xtensa_add_insn_label (sym);
4756
4757 if (symbol_get_tc (sym)->is_loop_target
e0001a05
NC		 4758 && (get_last_insn_flags (now_seg, now_subseg)
4759 & FLAG_IS_BAD_LOOPEND) != 0)
4760 as_bad (_("invalid last instruction for a zero-overhead loop"));
4761
4762 /* No target aligning in the absolute section. */
61846f28
BW		 4763 if (now_seg != absolute_section
4764 && align_targets
4765 && !is_unaligned_label (sym)
4766 && !frag_now->tc_frag_data.is_literal)
e0001a05 4767 {
e0001a05
NC		 4768 /* frag_now->tc_frag_data.is_insn = TRUE; */
4769 frag_var (rs_machine_dependent, 4, 4,
4770 RELAX_DESIRE_ALIGN_IF_TARGET,
4771 frag_now->fr_symbol, frag_now->fr_offset, NULL);
82e7541d
BW		 4772 xtensa_move_labels (frag_now, 0, TRUE);
4773
4774 /* If the label is already known to be a branch target, i.e., a
4775 forward branch, mark the frag accordingly. Backward branches
4776 are handled by xg_add_branch_and_loop_targets. */
4777 if (symbol_get_tc (sym)->is_branch_target)
4778 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
4779
4780 /* Loops only go forward, so they can be identified here. */
4781 if (symbol_get_tc (sym)->is_loop_target)
4782 symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
e0001a05
NC		 4783 }
4784}
4785
4786
4787/* md_flush_pending_output hook */
4788
4789void
4790xtensa_flush_pending_output ()
4791{
4792 /* If there is a non-zero instruction fragment, close it. */
4793 if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn)
4794 {
4795 frag_wane (frag_now);
4796 frag_new (0);
4797 }
4798 frag_now->tc_frag_data.is_insn = FALSE;
82e7541d
BW		 4799
4800 xtensa_clear_insn_labels ();
e0001a05
NC		 4801}
4802
4803
4804void
4805md_assemble (str)
4806 char *str;
4807{
4808 xtensa_isa isa = xtensa_default_isa;
4809 char *opname;
4810 unsigned opnamelen;
4811 bfd_boolean has_underbar = FALSE;
4812 char *arg_strings[MAX_INSN_ARGS];
4813 int num_args;
4814 IStack istack; /* Put instructions into here. */
4815 TInsn orig_insn; /* Original instruction from the input. */
4816 int i;
4817 symbolS *lit_sym = NULL;
4818
4819 if (frag_now->tc_frag_data.is_literal)
4820 {
4821 static bfd_boolean reported = 0;
4822 if (reported < 4)
4823 as_bad (_("cannot assemble '%s' into a literal fragment"), str);
4824 if (reported == 3)
4825 as_bad (_("..."));
4826 reported++;
4827 return;
4828 }
4829
4830 istack_init (&istack);
4831 tinsn_init (&orig_insn);
4832
4833 /* Split off the opcode. */
4834 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
4835 opname = xmalloc (opnamelen + 1);
4836 memcpy (opname, str, opnamelen);
4837 opname[opnamelen] = '\0';
4838
4839 num_args = tokenize_arguments (arg_strings, str + opnamelen);
4840 if (num_args == -1)
4841 {
4842 as_bad (_("syntax error"));
4843 return;
4844 }
4845
4846 if (xg_translate_idioms (&opname, &num_args, arg_strings))
4847 return;
4848
4849 /* Check for an underbar prefix. */
4850 if (*opname == '_')
4851 {
4852 has_underbar = TRUE;
4853 opname += 1;
4854 }
4855
4856 orig_insn.insn_type = ITYPE_INSN;
4857 orig_insn.ntok = 0;
4858 orig_insn.is_specific_opcode = (has_underbar || !use_generics ());
4859 specific_opcode = orig_insn.is_specific_opcode;
4860
4861 orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
4862 if (orig_insn.opcode == XTENSA_UNDEFINED)
4863 {
4864 as_bad (_("unknown opcode %s"), opname);
4865 return;
4866 }
4867
4868 if (frag_now_fix () != 0 && !frag_now->tc_frag_data.is_insn)
4869 {
4870 frag_wane (frag_now);
4871 frag_new (0);
4872 }
4873
4874 if (software_a0_b_retw_interlock)
4875 {
4876 if ((get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0
4877 && is_conditional_branch_opcode (orig_insn.opcode))
4878 {
4879 has_a0_b_retw = TRUE;
4880
4881 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
4882 After the first assembly pass we will check all of them and
4883 add a nop if needed. */
4884 frag_now->tc_frag_data.is_insn = TRUE;
4885 frag_var (rs_machine_dependent, 4, 4,
4886 RELAX_ADD_NOP_IF_A0_B_RETW,
4887 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4888 frag_now->tc_frag_data.is_insn = TRUE;
4889 frag_var (rs_machine_dependent, 4, 4,
4890 RELAX_ADD_NOP_IF_A0_B_RETW,
4891 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4892 }
4893 }
4894
4895 /* Special case: The call instructions should be marked "specific opcode"
4896 to keep them from expanding. */
4897 if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode))
4898 orig_insn.is_specific_opcode = TRUE;
4899
4900 /* Parse the arguments. */
4901 if (parse_arguments (&orig_insn, num_args, arg_strings))
4902 {
4903 as_bad (_("syntax error"));
4904 return;
4905 }
4906
4907 /* Free the opcode and argument strings, now that they've been parsed. */
4908 free (has_underbar ? opname - 1 : opname);
4909 opname = 0;
4910 while (num_args-- > 0)
4911 free (arg_strings[num_args]);
4912
4913 /* Check for the right number and type of arguments. */
4914 if (tinsn_check_arguments (&orig_insn))
4915 return;
4916
4917 /* See if the instruction implies an aligned section. */
4918 if (is_entry_opcode (orig_insn.opcode) || is_loop_opcode (orig_insn.opcode))
4919 record_alignment (now_seg, 2);
4920
4921 xg_add_branch_and_loop_targets (&orig_insn);
4922
4923 /* Special cases for instructions that force an alignment... */
4924 if (!orig_insn.is_specific_opcode && is_loop_opcode (orig_insn.opcode))
4925 {
e0001a05
NC		 4926 size_t max_fill;
4927
4928 frag_now->tc_frag_data.is_insn = TRUE;
4929 frag_now->tc_frag_data.is_no_density = !code_density_available ();
4930 max_fill = get_text_align_max_fill_size
4931 (get_text_align_power (XTENSA_FETCH_WIDTH),
4932 TRUE, frag_now->tc_frag_data.is_no_density);
4933 frag_var (rs_machine_dependent, max_fill, max_fill,
4934 RELAX_ALIGN_NEXT_OPCODE, frag_now->fr_symbol,
4935 frag_now->fr_offset, NULL);
4936
82e7541d 4937 xtensa_move_labels (frag_now, 0, FALSE);
e0001a05
NC		 4938 }
4939
61846f28 4940 /* Special-case for "entry" instruction. */
e0001a05
NC		 4941 if (is_entry_opcode (orig_insn.opcode))
4942 {
4943 /* Check that the second opcode (#1) is >= 16. */
4944 if (orig_insn.ntok >= 2)
4945 {
4946 expressionS *exp = &orig_insn.tok[1];
4947 switch (exp->X_op)
4948 {
4949 case O_constant:
4950 if (exp->X_add_number < 16)
4951 as_warn (_("entry instruction with stack decrement < 16"));
4952 break;
4953
4954 default:
4955 as_warn (_("entry instruction with non-constant decrement"));
4956 }
4957 }
e0001a05 4958
61846f28
BW		 4959 if (!orig_insn.is_specific_opcode)
4960 {
61846f28 4961 xtensa_mark_literal_pool_location ();
e0001a05 4962
61846f28 4963 /* Automatically align ENTRY instructions. */
82e7541d 4964 xtensa_move_labels (frag_now, 0, TRUE);
61846f28
BW		 4965 frag_align (2, 0, 0);
4966 }
e0001a05
NC		 4967 }
4968
82e7541d
BW		 4969 /* Any extra alignment frags have been inserted now, and we're about to
4970 emit a new instruction so clear the list of labels. */
4971 xtensa_clear_insn_labels ();
4972
e0001a05
NC		 4973 if (software_a0_b_retw_interlock)
4974 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER,
4975 is_register_writer (&orig_insn, "a", 0));
4976
4977 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND,
4978 is_bad_loopend_opcode (&orig_insn));
4979
4980 /* Finish it off:
4981 assemble_tokens (opcode, tok, ntok);
4982 expand the tokens from the orig_insn into the
4983 stack of instructions that will not expand
4984 unless required at relaxation time. */
4985 if (xg_expand_assembly_insn (&istack, &orig_insn))
4986 return;
4987
4988 for (i = 0; i < istack.ninsn; i++)
4989 {
4990 TInsn *insn = &istack.insn[i];
4991 if (insn->insn_type == ITYPE_LITERAL)
4992 {
4993 assert (lit_sym == NULL);
4994 lit_sym = xg_assemble_literal (insn);
4995 }
4996 else
4997 {
4998 if (lit_sym)
4999 xg_resolve_literals (insn, lit_sym);
5000 xg_assemble_tokens (insn);
5001 }
5002 }
5003
5004 /* Now, if the original opcode was a call... */
5005 if (align_targets && is_call_opcode (orig_insn.opcode))
5006 {
5007 frag_now->tc_frag_data.is_insn = TRUE;
5008 frag_var (rs_machine_dependent, 4, 4,
5009 RELAX_DESIRE_ALIGN,
5010 frag_now->fr_symbol,
5011 frag_now->fr_offset,
5012 NULL);
5013 }
5014}
5015
5016
5017/* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
5018 If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
5019 is the same as the standard code in read.c. */
5020
5021void
5022xtensa_cons_fix_new (frag, where, size, exp)
5023 fragS *frag;
5024 int where;
5025 int size;
5026 expressionS *exp;
5027{
5028 bfd_reloc_code_real_type r;
5029 bfd_boolean plt = FALSE;
5030
5031 if (*input_line_pointer == '@')
5032 {
5033 if (!strncmp (input_line_pointer, PLT_SUFFIX, strlen (PLT_SUFFIX) - 1)
5034 && !strncmp (input_line_pointer, plt_suffix,
5035 strlen (plt_suffix) - 1))
5036 {
5037 as_bad (_("undefined @ suffix '%s', expected '%s'"),
5038 input_line_pointer, plt_suffix);
5039 ignore_rest_of_line ();
5040 return;
5041 }
5042
5043 input_line_pointer += strlen (plt_suffix);
5044 plt = TRUE;
5045 }
5046
5047 switch (size)
5048 {
5049 case 1:
5050 r = BFD_RELOC_8;
5051 break;
5052 case 2:
5053 r = BFD_RELOC_16;
5054 break;
5055 case 4:
5056 r = plt ? BFD_RELOC_XTENSA_PLT : BFD_RELOC_32;
5057 break;
5058 case 8:
5059 r = BFD_RELOC_64;
5060 break;
5061 default:
5062 as_bad (_("unsupported BFD relocation size %u"), size);
5063 r = BFD_RELOC_32;
5064 break;
5065 }
5066 fix_new_exp (frag, where, size, exp, 0, r);
5067}
5068
5069
5070/* TC_FRAG_INIT hook */
5071
5072void
5073xtensa_frag_init (frag)
5074 fragS *frag;
5075{
5076 frag->tc_frag_data.is_no_density = !code_density_available ();
5077}
5078
5079
5080symbolS *
5081md_undefined_symbol (name)
5082 char *name ATTRIBUTE_UNUSED;
5083{
5084 return NULL;
5085}
5086
5087
5088/* Round up a section size to the appropriate boundary. */
5089
5090valueT
5091md_section_align (segment, size)
5092 segT segment ATTRIBUTE_UNUSED;
5093 valueT size;
5094{
5095 return size; /* Byte alignment is fine. */
5096}
5097
5098
5099long
5100md_pcrel_from (fixP)
5101 fixS *fixP;
5102{
5103 char *insn_p;
5104 static xtensa_insnbuf insnbuf = NULL;
5105 int opnum;
5106 xtensa_operand operand;
5107 xtensa_opcode opcode;
5108 xtensa_isa isa = xtensa_default_isa;
5109 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5110
5111 if (fixP->fx_done)
5112 return addr;
5113
5114 if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND)
5115 return addr;
5116
5117 if (!insnbuf)
5118 insnbuf = xtensa_insnbuf_alloc (isa);
5119
5120 insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
5121 xtensa_insnbuf_from_chars (isa, insnbuf, insn_p);
5122 opcode = xtensa_decode_insn (isa, insnbuf);
5123
5124 opnum = reloc_to_opnum (fixP->fx_r_type);
5125
5126 if (opnum < 0)
5127 as_fatal (_("invalid operand relocation for '%s' instruction"),
5128 xtensa_opcode_name (isa, opcode));
5129 if (opnum >= xtensa_num_operands (isa, opcode))
5130 as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
5131 opnum, xtensa_opcode_name (isa, opcode));
5132 operand = xtensa_get_operand (isa, opcode, opnum);
5133 if (!operand)
5134 {
5135 as_warn_where (fixP->fx_file,
5136 fixP->fx_line,
5137 _("invalid relocation type %d for %s instruction"),
5138 fixP->fx_r_type, xtensa_opcode_name (isa, opcode));
5139 return addr;
5140 }
5141
5142 if (!operand_is_pcrel_label (operand))
5143 {
5144 as_bad_where (fixP->fx_file,
5145 fixP->fx_line,
5146 _("invalid relocation for operand %d of '%s'"),
5147 opnum, xtensa_opcode_name (isa, opcode));
5148 return addr;
5149 }
5150 if (!xtensa_operand_isPCRelative (operand))
5151 {
5152 as_warn_where (fixP->fx_file,
5153 fixP->fx_line,
5154 _("non-PCREL relocation operand %d for '%s': %s"),
5155 opnum, xtensa_opcode_name (isa, opcode),
5156 bfd_get_reloc_code_name (fixP->fx_r_type));
5157 return addr;
5158 }
5159
5160 return 0 - xtensa_operand_do_reloc (operand, 0, addr);
5161}
5162
5163
5164/* tc_symbol_new_hook */
5165
5166void
5167xtensa_symbol_new_hook (symbolP)
5168 symbolS *symbolP;
5169{
61846f28 5170 symbol_get_tc (symbolP)->plt = 0;
e0001a05
NC		 5171}
5172
5173
5174/* tc_fix_adjustable hook */
5175
5176bfd_boolean
5177xtensa_fix_adjustable (fixP)
5178 fixS *fixP;
5179{
5180 /* We need the symbol name for the VTABLE entries. */
5181 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
5182 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
5183 return 0;
5184
5185 return 1;
5186}
5187
5188
5189void
5190md_apply_fix3 (fixP, valP, seg)
5191 fixS *fixP;
5192 valueT *valP;
5193 segT seg ATTRIBUTE_UNUSED;
5194{
5195 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5196 {
5197 /* This happens when the relocation is within the current section.
5198 It seems this implies a PCREL operation. We'll catch it and error
5199 if not. */
5200
5201 char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5202 static xtensa_insnbuf insnbuf = NULL;
5203 xtensa_opcode opcode;
5204 xtensa_isa isa;
5205
5206 switch (fixP->fx_r_type)
5207 {
5208 case BFD_RELOC_XTENSA_ASM_EXPAND:
5209 fixP->fx_done = 1;
5210 break;
5211
5212 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5213 as_bad (_("unhandled local relocation fix %s"),
5214 bfd_get_reloc_code_name (fixP->fx_r_type));
5215 break;
5216
5217 case BFD_RELOC_32:
5218 case BFD_RELOC_16:
5219 case BFD_RELOC_8:
5220 /* The only one we support that isn't an instruction field. */
5221 md_number_to_chars (fixpos, *valP, fixP->fx_size);
5222 fixP->fx_done = 1;
5223 break;
5224
5225 case BFD_RELOC_XTENSA_OP0:
5226 case BFD_RELOC_XTENSA_OP1:
5227 case BFD_RELOC_XTENSA_OP2:
5228 isa = xtensa_default_isa;
5229 if (!insnbuf)
5230 insnbuf = xtensa_insnbuf_alloc (isa);
5231
5232 xtensa_insnbuf_from_chars (isa, insnbuf, fixpos);
5233 opcode = xtensa_decode_insn (isa, insnbuf);
5234 if (opcode == XTENSA_UNDEFINED)
5235 as_fatal (_("undecodable FIX"));
5236
5237 xtensa_insnbuf_set_immediate_field (opcode, insnbuf, *valP,
5238 fixP->fx_file, fixP->fx_line);
5239
5240 fixP->fx_frag->tc_frag_data.is_insn = TRUE;
5241 xtensa_insnbuf_to_chars (isa, insnbuf, fixpos);
5242 fixP->fx_done = 1;
5243 break;
5244
5245 case BFD_RELOC_VTABLE_INHERIT:
5246 case BFD_RELOC_VTABLE_ENTRY:
5247 fixP->fx_done = 0;
5248 break;
5249
5250 default:
5251 as_bad (_("unhandled local relocation fix %s"),
5252 bfd_get_reloc_code_name (fixP->fx_r_type));
5253 }
5254 }
5255}
5256
5257
5258char *
5259md_atof (type, litP, sizeP)
5260 int type;
5261 char *litP;
5262 int *sizeP;
5263{
5264 int prec;
5265 LITTLENUM_TYPE words[4];
5266 char *t;
5267 int i;
5268
5269 switch (type)
5270 {
5271 case 'f':
5272 prec = 2;
5273 break;
5274
5275 case 'd':
5276 prec = 4;
5277 break;
5278
5279 default:
5280 *sizeP = 0;
5281 return "bad call to md_atof";
5282 }
5283
5284 t = atof_ieee (input_line_pointer, type, words);
5285 if (t)
5286 input_line_pointer = t;
5287
5288 *sizeP = prec * 2;
5289
5290 for (i = prec - 1; i >= 0; i--)
5291 {
5292 int idx = i;
5293 if (target_big_endian)
5294 idx = (prec - 1 - i);
5295
5296 md_number_to_chars (litP, (valueT) words[idx], 2);
5297 litP += 2;
5298 }
5299
5300 return NULL;
5301}
5302
5303
5304int
5305md_estimate_size_before_relax (fragP, seg)
5306 fragS *fragP;
5307 segT seg ATTRIBUTE_UNUSED;
5308{
5309 return fragP->tc_frag_data.text_expansion;
5310}
5311
5312
5313/* Translate internal representation of relocation info to BFD target
5314 format. */
5315
5316arelent *
5317tc_gen_reloc (section, fixp)
5318 asection *section ATTRIBUTE_UNUSED;
5319 fixS *fixp;
5320{
5321 arelent *reloc;
5322
5323 reloc = (arelent *) xmalloc (sizeof (arelent));
5324 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5325 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
5326 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5327
5328 /* Make sure none of our internal relocations make it this far.
5329 They'd better have been fully resolved by this point. */
5330 assert ((int) fixp->fx_r_type > 0);
5331
5332 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5333 if (reloc->howto == NULL)
5334 {
5335 as_bad_where (fixp->fx_file, fixp->fx_line,
5336 _("cannot represent `%s' relocation in object file"),
5337 bfd_get_reloc_code_name (fixp->fx_r_type));
5338 return NULL;
5339 }
5340
5341 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
5342 {
5343 as_fatal (_("internal error? cannot generate `%s' relocation"),
5344 bfd_get_reloc_code_name (fixp->fx_r_type));
5345 }
5346 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
5347
5348 reloc->addend = fixp->fx_offset;
5349
5350 switch (fixp->fx_r_type)
5351 {
5352 case BFD_RELOC_XTENSA_OP0:
5353 case BFD_RELOC_XTENSA_OP1:
5354 case BFD_RELOC_XTENSA_OP2:
5355 case BFD_RELOC_XTENSA_ASM_EXPAND:
5356 case BFD_RELOC_32:
5357 case BFD_RELOC_XTENSA_PLT:
5358 case BFD_RELOC_VTABLE_INHERIT:
5359 case BFD_RELOC_VTABLE_ENTRY:
5360 break;
5361
5362 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5363 as_warn (_("emitting simplification relocation"));
5364 break;
5365
5366 default:
5367 as_warn (_("emitting unknown relocation"));
5368 }
5369
5370 return reloc;
5371}
5372
5373\f
5374void
5375xtensa_end ()
5376{
5377 directive_balance ();
5378 xtensa_move_literals ();
5379
5380 xtensa_reorder_segments ();
e0001a05
NC		 5381 xtensa_cleanup_align_frags ();
5382 xtensa_fix_target_frags ();
5383 if (software_a0_b_retw_interlock && has_a0_b_retw)
5384 xtensa_fix_a0_b_retw_frags ();
5385 if (software_avoid_b_j_loop_end && maybe_has_b_j_loop_end)
5386 xtensa_fix_b_j_loop_end_frags ();
5387
5388 /* "close_loop_end" should be processed BEFORE "short_loop". */
5389 if (software_avoid_close_loop_end && maybe_has_close_loop_end)
5390 xtensa_fix_close_loop_end_frags ();
5391
5392 if (software_avoid_short_loop && maybe_has_short_loop)
5393 xtensa_fix_short_loop_frags ();
5394
5395 xtensa_sanity_check ();
5396}
5397
5398
5399static void
5400xtensa_cleanup_align_frags ()
5401{
5402 frchainS *frchP;
5403
5404 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5405 {
5406 fragS *fragP;
5407
5408 /* Walk over all of the fragments in a subsection. */
5409 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5410 {
5411 if ((fragP->fr_type == rs_align
5412 || fragP->fr_type == rs_align_code
5413 || (fragP->fr_type == rs_machine_dependent
5414 && (fragP->fr_subtype == RELAX_DESIRE_ALIGN
5415 || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)))
5416 && fragP->fr_fix == 0)
5417 {
5418 fragS * next = fragP->fr_next;
5419
5420 while (next
5421 && next->fr_type == rs_machine_dependent
5422 && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5423 {
5424 frag_wane (next);
5425 next = next->fr_next;
5426 }
5427 }
5428 }
5429 }
5430}
5431
5432
5433/* Re-process all of the fragments looking to convert all of the
5434 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
5435 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
5436 If the next fragment starts with a loop target, AND the previous
5437 fragment can be expanded to negate the branch, convert this to a
5438 RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
5439
5440static void
5441xtensa_fix_target_frags ()
5442{
5443 frchainS *frchP;
5444
5445 /* When this routine is called, all of the subsections are still intact
5446 so we walk over subsections instead of sections. */
5447 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5448 {
5449 bfd_boolean prev_frag_can_negate_branch = FALSE;
5450 fragS *fragP;
5451
5452 /* Walk over all of the fragments in a subsection. */
5453 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5454 {
5455 if (fragP->fr_type == rs_machine_dependent
5456 && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5457 {
5458 if (next_frag_is_loop_target (fragP))
5459 {
5460 if (prev_frag_can_negate_branch)
5461 fragP->fr_subtype = RELAX_LOOP_END;
5462 else
5463 {
5464 if (!align_only_targets ||
5465 next_frag_is_branch_target (fragP))
5466 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5467 else
5468 frag_wane (fragP);
5469 }
5470 }
5471 else if (!align_only_targets
5472 || next_frag_is_branch_target (fragP))
5473 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5474 else
5475 frag_wane (fragP);
5476 }
5477 if (fragP->fr_fix != 0)
5478 prev_frag_can_negate_branch = FALSE;
5479 if (frag_can_negate_branch (fragP))
5480 prev_frag_can_negate_branch = TRUE;
5481 }
5482 }
5483}
5484
5485
5486static bfd_boolean
5487frag_can_negate_branch (fragP)
5488 fragS *fragP;
5489{
5490 if (fragP->fr_type == rs_machine_dependent
5491 && fragP->fr_subtype == RELAX_IMMED)
5492 {
5493 TInsn t_insn;
5494 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5495 if (is_negatable_branch (&t_insn))
5496 return TRUE;
5497 }
5498 return FALSE;
5499}
5500
5501
5502/* Re-process all of the fragments looking to convert all of the
5503 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
5504 conditional branch or a retw/retw.n, convert this frag to one that
5505 will generate a NOP. In any case close it off with a .fill 0. */
5506
5507static void
5508xtensa_fix_a0_b_retw_frags ()
5509{
5510 frchainS *frchP;
5511
5512 /* When this routine is called, all of the subsections are still intact
5513 so we walk over subsections instead of sections. */
5514 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5515 {
5516 fragS *fragP;
5517
5518 /* Walk over all of the fragments in a subsection. */
5519 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5520 {
5521 if (fragP->fr_type == rs_machine_dependent
5522 && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW)
5523 {
5524 if (next_instrs_are_b_retw (fragP))
5525 relax_frag_add_nop (fragP);
5526 else
5527 frag_wane (fragP);
5528 }
5529 }
5530 }
5531}
5532
5533
5534bfd_boolean
5535next_instrs_are_b_retw (fragP)
5536 fragS * fragP;
5537{
5538 xtensa_opcode opcode;
5539 const fragS *next_fragP = next_non_empty_frag (fragP);
5540 static xtensa_insnbuf insnbuf = NULL;
5541 xtensa_isa isa = xtensa_default_isa;
5542 int offset = 0;
5543
5544 if (!insnbuf)
5545 insnbuf = xtensa_insnbuf_alloc (isa);
5546
5547 if (next_fragP == NULL)
5548 return FALSE;
5549
5550 /* Check for the conditional branch. */
5551 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5552 opcode = xtensa_decode_insn (isa, insnbuf);
5553
5554 if (!is_conditional_branch_opcode (opcode))
5555 return FALSE;
5556
5557 offset += xtensa_insn_length (isa, opcode);
5558 if (offset == next_fragP->fr_fix)
5559 {
5560 next_fragP = next_non_empty_frag (next_fragP);
5561 offset = 0;
5562 }
5563 if (next_fragP == NULL)
5564 return FALSE;
5565
5566 /* Check for the retw/retw.n. */
5567 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5568 opcode = xtensa_decode_insn (isa, insnbuf);
5569
5570 if (is_windowed_return_opcode (opcode))
5571 return TRUE;
5572 return FALSE;
5573}
5574
5575
5576/* Re-process all of the fragments looking to convert all of the
5577 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
5578 loop end label, convert this frag to one that will generate a NOP.
5579 In any case close it off with a .fill 0. */
5580
5581static void
5582xtensa_fix_b_j_loop_end_frags ()
5583{
5584 frchainS *frchP;
5585
5586 /* When this routine is called, all of the subsections are still intact
5587 so we walk over subsections instead of sections. */
5588 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5589 {
5590 fragS *fragP;
5591
5592 /* Walk over all of the fragments in a subsection. */
5593 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5594 {
5595 if (fragP->fr_type == rs_machine_dependent
5596 && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END)
5597 {
5598 if (next_instr_is_loop_end (fragP))
5599 relax_frag_add_nop (fragP);
5600 else
5601 frag_wane (fragP);
5602 }
5603 }
5604 }
5605}
5606
5607
5608bfd_boolean
5609next_instr_is_loop_end (fragP)
5610 fragS * fragP;
5611{
5612 const fragS *next_fragP;
5613
5614 if (next_frag_is_loop_target (fragP))
5615 return FALSE;
5616
5617 next_fragP = next_non_empty_frag (fragP);
5618 if (next_fragP == NULL)
5619 return FALSE;
5620
5621 if (!next_frag_is_loop_target (next_fragP))
5622 return FALSE;
5623
5624 /* If the size is >= 3 then there is more than one instruction here.
5625 The hardware bug will not fire. */
5626 if (next_fragP->fr_fix > 3)
5627 return FALSE;
5628
5629 return TRUE;
5630}
5631
5632
5633/* Re-process all of the fragments looking to convert all of the
5634 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
5635 not MY loop's loop end within 12 bytes, add enough nops here to
5636 make it at least 12 bytes away. In any case close it off with a
5637 .fill 0. */
5638
5639static void
5640xtensa_fix_close_loop_end_frags ()
5641{
5642 frchainS *frchP;
5643
5644 /* When this routine is called, all of the subsections are still intact
5645 so we walk over subsections instead of sections. */
5646 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5647 {
5648 fragS *fragP;
5649
5650 fragS *current_target = NULL;
5651 offsetT current_offset = 0;
5652
5653 /* Walk over all of the fragments in a subsection. */
5654 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5655 {
5656 if (fragP->fr_type == rs_machine_dependent
5657 && fragP->fr_subtype == RELAX_IMMED)
5658 {
5659 /* Read it. If the instruction is a loop, get the target. */
5660 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5661 if (is_loop_opcode (opcode))
5662 {
5663 TInsn t_insn;
5664
5665 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5666 tinsn_immed_from_frag (&t_insn, fragP);
5667
5668 /* Get the current fragment target. */
5669 if (fragP->fr_symbol)
5670 {
5671 current_target = symbol_get_frag (fragP->fr_symbol);
5672 current_offset = fragP->fr_offset;
5673 }
5674 }
5675 }
5676
5677 if (current_target
5678 && fragP->fr_type == rs_machine_dependent
5679 && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
5680 {
5681 size_t min_bytes;
5682 size_t bytes_added = 0;
5683
5684#define REQUIRED_LOOP_DIVIDING_BYTES 12
5685 /* Max out at 12. */
5686 min_bytes = min_bytes_to_other_loop_end
5687 (fragP->fr_next, current_target, current_offset,
5688 REQUIRED_LOOP_DIVIDING_BYTES);
5689
5690 if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
5691 {
5692 while (min_bytes + bytes_added
5693 < REQUIRED_LOOP_DIVIDING_BYTES)
5694 {
5695 int length = 3;
5696
5697 if (fragP->fr_var < length)
5698 as_warn (_("fr_var %lu < length %d; ignoring"),
5699 fragP->fr_var, length);
5700 else
5701 {
5702 assemble_nop (length,
5703 fragP->fr_literal + fragP->fr_fix);
5704 fragP->fr_fix += length;
5705 fragP->fr_var -= length;
5706 }
5707 bytes_added += length;
5708 }
5709 }
5710 frag_wane (fragP);
5711 }
5712 }
5713 }
5714}
5715
5716
5717size_t
5718min_bytes_to_other_loop_end (fragP, current_target, current_offset, max_size)
5719 fragS *fragP;
5720 fragS *current_target;
5721 offsetT current_offset;
5722 size_t max_size;
5723{
5724 size_t offset = 0;
5725 fragS *current_fragP;
5726
5727 for (current_fragP = fragP;
5728 current_fragP;
5729 current_fragP = current_fragP->fr_next)
5730 {
5731 if (current_fragP->tc_frag_data.is_loop_target
5732 && current_fragP != current_target)
5733 return offset + current_offset;
5734
5735 offset += unrelaxed_frag_min_size (current_fragP);
5736
5737 if (offset + current_offset >= max_size)
5738 return max_size;
5739 }
5740 return max_size;
5741}
5742
5743
5744size_t
5745unrelaxed_frag_min_size (fragP)
5746 fragS * fragP;
5747{
5748 size_t size = fragP->fr_fix;
5749
5750 /* add fill size */
5751 if (fragP->fr_type == rs_fill)
5752 size += fragP->fr_offset;
5753
5754 return size;
5755}
5756
5757
5758/* Re-process all of the fragments looking to convert all
5759 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
5760
5761 A)
5762 1) the instruction size count to the loop end label
5763 is too short (<= 2 instructions),
5764 2) loop has a jump or branch in it
5765
5766 or B)
5767 1) software_avoid_all_short_loops is true
5768 2) The generating loop was a 'loopgtz' or 'loopnez'
5769 3) the instruction size count to the loop end label is too short
5770 (<= 2 instructions)
5771 then convert this frag (and maybe the next one) to generate a NOP.
5772 In any case close it off with a .fill 0. */
5773
5774static void
5775xtensa_fix_short_loop_frags ()
5776{
5777 frchainS *frchP;
5778
5779 /* When this routine is called, all of the subsections are still intact
5780 so we walk over subsections instead of sections. */
5781 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5782 {
5783 fragS *fragP;
5784 fragS *current_target = NULL;
5785 offsetT current_offset = 0;
5786 xtensa_opcode current_opcode = XTENSA_UNDEFINED;
5787
5788 /* Walk over all of the fragments in a subsection. */
5789 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5790 {
5791 /* check on the current loop */
5792 if (fragP->fr_type == rs_machine_dependent
5793 && fragP->fr_subtype == RELAX_IMMED)
5794 {
5795 /* Read it. If the instruction is a loop, get the target. */
5796 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5797 if (is_loop_opcode (opcode))
5798 {
5799 TInsn t_insn;
5800
5801 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5802 tinsn_immed_from_frag (&t_insn, fragP);
5803
5804 /* Get the current fragment target. */
5805 if (fragP->fr_symbol)
5806 {
5807 current_target = symbol_get_frag (fragP->fr_symbol);
5808 current_offset = fragP->fr_offset;
5809 current_opcode = opcode;
5810 }
5811 }
5812 }
5813
5814 if (fragP->fr_type == rs_machine_dependent
5815 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5816 {
5817 size_t insn_count =
5818 count_insns_to_loop_end (fragP->fr_next, TRUE, 3);
5819 if (insn_count < 3
5820 && (branch_before_loop_end (fragP->fr_next)
5821 || (software_avoid_all_short_loops
5822 && current_opcode != XTENSA_UNDEFINED
5823 && !is_the_loop_opcode (current_opcode))))
5824 relax_frag_add_nop (fragP);
5825 else
5826 frag_wane (fragP);
5827 }
5828 }
5829 }
5830}
5831
5832
5833size_t
5834count_insns_to_loop_end (base_fragP, count_relax_add, max_count)
5835 fragS *base_fragP;
5836 bfd_boolean count_relax_add;
5837 size_t max_count;
5838{
5839 fragS *fragP = NULL;
5840 size_t insn_count = 0;
5841
5842 fragP = base_fragP;
5843
5844 for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next)
5845 {
5846 insn_count += unrelaxed_frag_min_insn_count (fragP);
5847 if (insn_count >= max_count)
5848 return max_count;
5849
5850 if (count_relax_add)
5851 {
5852 if (fragP->fr_type == rs_machine_dependent
5853 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5854 {
5855 /* In order to add the appropriate number of
5856 NOPs, we count an instruction for downstream
5857 occurrences. */
5858 insn_count++;
5859 if (insn_count >= max_count)
5860 return max_count;
5861 }
5862 }
5863 }
5864 return insn_count;
5865}
5866
5867
5868size_t
5869unrelaxed_frag_min_insn_count (fragP)
5870 fragS *fragP;
5871{
5872 size_t insn_count = 0;
5873 int offset = 0;
5874
5875 if (!fragP->tc_frag_data.is_insn)
5876 return insn_count;
5877
5878 /* Decode the fixed instructions. */
5879 while (offset < fragP->fr_fix)
5880 {
5881 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5882 if (opcode == XTENSA_UNDEFINED)
5883 {
5884 as_fatal (_("undecodable instruction in instruction frag"));
5885 return insn_count;
5886 }
5887 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5888 insn_count++;
5889 }
5890
5891 return insn_count;
5892}
5893
5894
5895bfd_boolean
5896branch_before_loop_end (base_fragP)
5897 fragS *base_fragP;
5898{
5899 fragS *fragP;
5900
5901 for (fragP = base_fragP;
5902 fragP && !fragP->tc_frag_data.is_loop_target;
5903 fragP = fragP->fr_next)
5904 {
5905 if (unrelaxed_frag_has_b_j (fragP))
5906 return TRUE;
5907 }
5908 return FALSE;
5909}
5910
5911
5912bfd_boolean
5913unrelaxed_frag_has_b_j (fragP)
5914 fragS *fragP;
5915{
5916 size_t insn_count = 0;
5917 int offset = 0;
5918
5919 if (!fragP->tc_frag_data.is_insn)
5920 return FALSE;
5921
5922 /* Decode the fixed instructions. */
5923 while (offset < fragP->fr_fix)
5924 {
5925 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5926 if (opcode == XTENSA_UNDEFINED)
5927 {
5928 as_fatal (_("undecodable instruction in instruction frag"));
5929 return insn_count;
5930 }
5931 if (is_branch_or_jump_opcode (opcode))
5932 return TRUE;
5933 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5934 }
5935 return FALSE;
5936}
5937
5938
5939/* Checks to be made after initial assembly but before relaxation. */
5940
5941static void
5942xtensa_sanity_check ()
5943{
5944 char *file_name;
5945 int line;
5946
5947 frchainS *frchP;
5948
5949 as_where (&file_name, &line);
5950 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5951 {
5952 fragS *fragP;
5953
5954 /* Walk over all of the fragments in a subsection. */
5955 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5956 {
5957 /* Currently we only check for empty loops here. */
5958 if (fragP->fr_type == rs_machine_dependent
5959 && fragP->fr_subtype == RELAX_IMMED)
5960 {
5961 static xtensa_insnbuf insnbuf = NULL;
5962 TInsn t_insn;
5963
5964 if (fragP->fr_opcode != NULL)
5965 {
5966 if (!insnbuf)
5967 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
5968 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5969 tinsn_immed_from_frag (&t_insn, fragP);
5970
5971 if (is_loop_opcode (t_insn.opcode))
5972 {
5973 if (is_empty_loop (&t_insn, fragP))
5974 {
5975 new_logical_line (fragP->fr_file, fragP->fr_line);
5976 as_bad (_("invalid empty loop"));
5977 }
5978 if (!is_local_forward_loop (&t_insn, fragP))
5979 {
5980 new_logical_line (fragP->fr_file, fragP->fr_line);
5981 as_bad (_("loop target does not follow "
5982 "loop instruction in section"));
5983 }
5984 }
5985 }
5986 }
5987 }
5988 }
5989 new_logical_line (file_name, line);
5990}
5991
5992
5993#define LOOP_IMMED_OPN 1
5994
5995/* Return true if the loop target is the next non-zero fragment. */
5996
5997bfd_boolean
5998is_empty_loop (insn, fragP)
5999 const TInsn *insn;
6000 fragS *fragP;
6001{
6002 const expressionS *expr;
6003 symbolS *symbolP;
6004 fragS *next_fragP;
6005
6006 if (insn->insn_type != ITYPE_INSN)
6007 return FALSE;
6008
6009 if (!is_loop_opcode (insn->opcode))
6010 return FALSE;
6011
6012 if (insn->ntok <= LOOP_IMMED_OPN)
6013 return FALSE;
6014
6015 expr = &insn->tok[LOOP_IMMED_OPN];
6016
6017 if (expr->X_op != O_symbol)
6018 return FALSE;
6019
6020 symbolP = expr->X_add_symbol;
6021 if (!symbolP)
6022 return FALSE;
6023
6024 if (symbol_get_frag (symbolP) == NULL)
6025 return FALSE;
6026
6027 if (S_GET_VALUE (symbolP) != 0)
6028 return FALSE;
6029
6030 /* Walk through the zero-size fragments from this one. If we find
6031 the target fragment, then this is a zero-size loop. */
6032 for (next_fragP = fragP->fr_next;
6033 next_fragP != NULL;
6034 next_fragP = next_fragP->fr_next)
6035 {
6036 if (next_fragP == symbol_get_frag (symbolP))
6037 return TRUE;
6038 if (next_fragP->fr_fix != 0)
6039 return FALSE;
6040 }
6041 return FALSE;
6042}
6043
6044
6045bfd_boolean
6046is_local_forward_loop (insn, fragP)
6047 const TInsn *insn;
6048 fragS *fragP;
6049{
6050 const expressionS *expr;
6051 symbolS *symbolP;
6052 fragS *next_fragP;
6053
6054 if (insn->insn_type != ITYPE_INSN)
6055 return FALSE;
6056
6057 if (!is_loop_opcode (insn->opcode))
6058 return FALSE;
6059
6060 if (insn->ntok <= LOOP_IMMED_OPN)
6061 return FALSE;
6062
6063 expr = &insn->tok[LOOP_IMMED_OPN];
6064
6065 if (expr->X_op != O_symbol)
6066 return FALSE;
6067
6068 symbolP = expr->X_add_symbol;
6069 if (!symbolP)
6070 return FALSE;
6071
6072 if (symbol_get_frag (symbolP) == NULL)
6073 return FALSE;
6074
6075 /* Walk through fragments until we find the target.
6076 If we do not find the target, then this is an invalid loop. */
6077 for (next_fragP = fragP->fr_next;
6078 next_fragP != NULL;
6079 next_fragP = next_fragP->fr_next)
6080 if (next_fragP == symbol_get_frag (symbolP))
6081 return TRUE;
6082
6083 return FALSE;
6084}
6085
6086\f
6087/* Alignment Functions. */
6088
6089size_t
6090get_text_align_power (target_size)
6091 int target_size;
6092{
6093 size_t i = 0;
6094 for (i = 0; i < sizeof (size_t); i++)
6095 {
6096 if (target_size <= (1 << i))
6097 return i;
6098 }
6099 as_fatal (_("get_text_align_power: argument too large"));
6100 return 0;
6101}
6102
6103
6104addressT
6105get_text_align_max_fill_size (align_pow, use_nops, use_no_density)
6106 int align_pow;
6107 bfd_boolean use_nops;
6108 bfd_boolean use_no_density;
6109{
6110 if (!use_nops)
6111 return (1 << align_pow);
6112 if (use_no_density)
6113 return 3 * (1 << align_pow);
6114
6115 return 1 + (1 << align_pow);
6116}
6117
6118
6119/* get_text_align_fill_size ()
6120
6121 Desired alignments:
6122 give the address
6123 target_size = size of next instruction
6124 align_pow = get_text_align_power (target_size).
6125 use_nops = 0
6126 use_no_density = 0;
6127 Loop alignments:
6128 address = current address + loop instruction size;
6129 target_size = 3 (for 2 or 3 byte target)
6130 = 8 (for 8 byte target)
6131 align_pow = get_text_align_power (target_size);
6132 use_nops = 1
6133 use_no_density = set appropriately
6134 Text alignments:
6135 address = current address + loop instruction size;
6136 target_size = 0
6137 align_pow = get_text_align_power (target_size);
6138 use_nops = 0
6139 use_no_density = 0. */
6140
6141addressT
6142get_text_align_fill_size (address, align_pow, target_size,
6143 use_nops, use_no_density)
6144 addressT address;
6145 int align_pow;
6146 int target_size;
6147 bfd_boolean use_nops;
6148 bfd_boolean use_no_density;
6149{
6150 /* Input arguments:
6151
6152 align_pow: log2 (required alignment).
6153
6154 target_size: alignment must allow the new_address and
6155 new_address+target_size-1.
6156
6157 use_nops: if true, then we can only use 2 or 3 byte nops.
6158
6159 use_no_density: if use_nops and use_no_density, we can only use
6160 3-byte nops.
6161
6162 Usually, for non-zero target_size, the align_pow is the power of 2
6163 that is greater than or equal to the target_size. This handles the
6164 2-byte, 3-byte and 8-byte instructions. */
6165
6166 size_t alignment = (1 << align_pow);
6167 if (!use_nops)
6168 {
6169 /* This is the easy case. */
6170 size_t mod;
6171 mod = address % alignment;
6172 if (mod != 0)
6173 mod = alignment - mod;
6174 assert ((address + mod) % alignment == 0);
6175 return mod;
6176 }
6177
6178 /* This is the slightly harder case. */
6179 assert ((int) alignment >= target_size);
6180 assert (target_size > 0);
6181 if (!use_no_density)
6182 {
6183 size_t i;
6184 for (i = 0; i < alignment * 2; i++)
6185 {
6186 if (i == 1)
6187 continue;
6188 if ((address + i) >> align_pow ==
6189 (address + i + target_size - 1) >> align_pow)
6190 return i;
6191 }
6192 }
6193 else
6194 {
6195 size_t i;
6196
6197 /* Can only fill multiples of 3. */
6198 for (i = 0; i <= alignment * 3; i += 3)
6199 {
6200 if ((address + i) >> align_pow ==
6201 (address + i + target_size - 1) >> align_pow)
6202 return i;
6203 }
6204 }
6205 assert (0);
6206 return 0;
6207}
6208
6209
6210/* This will assert if it is not possible. */
6211
6212size_t
6213get_text_align_nop_count (fill_size, use_no_density)
6214 size_t fill_size;
6215 bfd_boolean use_no_density;
6216{
6217 size_t count = 0;
6218 if (use_no_density)
6219 {
6220 assert (fill_size % 3 == 0);
6221 return (fill_size / 3);
6222 }
6223
6224 assert (fill_size != 1); /* Bad argument. */
6225
6226 while (fill_size > 1)
6227 {
6228 size_t insn_size = 3;
6229 if (fill_size == 2 || fill_size == 4)
6230 insn_size = 2;
6231 fill_size -= insn_size;
6232 count++;
6233 }
6234 assert (fill_size != 1); /* Bad algorithm. */
6235 return count;
6236}
6237
6238
6239size_t
6240get_text_align_nth_nop_size (fill_size, n, use_no_density)
6241 size_t fill_size;
6242 size_t n;
6243 bfd_boolean use_no_density;
6244{
6245 size_t count = 0;
6246
6247 assert (get_text_align_nop_count (fill_size, use_no_density) > n);
6248
6249 if (use_no_density)
6250 return 3;
6251
6252 while (fill_size > 1)
6253 {
6254 size_t insn_size = 3;
6255 if (fill_size == 2 || fill_size == 4)
6256 insn_size = 2;
6257 fill_size -= insn_size;
6258 count++;
6259 if (n + 1 == count)
6260 return insn_size;
6261 }
6262 assert (0);
6263 return 0;
6264}
6265
6266
6267/* For the given fragment, find the appropriate address
6268 for it to begin at if we are using NOPs to align it. */
6269
6270static addressT
6271get_noop_aligned_address (fragP, address)
6272 fragS *fragP;
6273 addressT address;
6274{
6275 static xtensa_insnbuf insnbuf = NULL;
6276 size_t fill_size = 0;
6277
6278 if (!insnbuf)
6279 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6280
6281 switch (fragP->fr_type)
6282 {
6283 case rs_machine_dependent:
6284 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6285 {
6286 /* The rule is: get next fragment's FIRST instruction. Find
6287 the smallest number of bytes that need to be added to
6288 ensure that the next fragment's FIRST instruction will fit
6289 in a single word.
6290
6291 E.G., 2 bytes : 0, 1, 2 mod 4
6292 3 bytes: 0, 1 mod 4
6293
6294 If the FIRST instruction MIGHT be relaxed,
6295 assume that it will become a 3 byte instruction. */
6296
6297 int target_insn_size;
6298 xtensa_opcode opcode = next_frag_opcode (fragP);
6299 addressT pre_opcode_bytes;
6300
6301 if (opcode == XTENSA_UNDEFINED)
6302 {
6303 as_bad_where (fragP->fr_file, fragP->fr_line,
6304 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6305 as_fatal (_("cannot continue"));
6306 }
6307
6308 target_insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6309
6310 pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP);
6311
6312 if (is_loop_opcode (opcode))
6313 {
6314 /* next_fragP should be the loop. */
6315 const fragS *next_fragP = next_non_empty_frag (fragP);
6316 xtensa_opcode next_opcode = next_frag_opcode (next_fragP);
6317 size_t alignment;
6318
6319 pre_opcode_bytes += target_insn_size;
6320
6321 /* For loops, the alignment depends on the size of the
6322 instruction following the loop, not the loop instruction. */
6323 if (next_opcode == XTENSA_UNDEFINED)
6324 target_insn_size = 3;
6325 else
6326 {
6327 target_insn_size =
6328 xtensa_insn_length (xtensa_default_isa, next_opcode);
6329
6330 if (target_insn_size == 2)
6331 target_insn_size = 3; /* ISA specifies this. */
6332 }
6333
6334 /* If it was 8, then we'll need a larger alignment
6335 for the section. */
6336 alignment = get_text_align_power (target_insn_size);
6337
6338 /* Is Now_seg valid */
6339 record_alignment (now_seg, alignment);
6340 }
6341 else
6342 as_fatal (_("expected loop opcode in relax align next target"));
6343
6344 fill_size = get_text_align_fill_size
6345 (address + pre_opcode_bytes,
6346 get_text_align_power (target_insn_size),
6347 target_insn_size, TRUE, fragP->tc_frag_data.is_no_density);
6348 }
6349 break;
6350#if 0
6351 case rs_align:
6352 case rs_align_code:
6353 fill_size = get_text_align_fill_size
6354 (address, fragP->fr_offset, 1, TRUE,
6355 fragP->tc_frag_data.is_no_density);
6356 break;
6357#endif
6358 default:
6359 as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
6360 }
6361
6362 return address + fill_size;
6363}
6364
6365
6366/* 3 mechanisms for relaxing an alignment:
6367
6368 Align to a power of 2.
6369 Align so the next fragment's instruction does not cross a word boundary.
6370 Align the current instruction so that if the next instruction
6371 were 3 bytes, it would not cross a word boundary.
6372
6373 We can align with:
6374
6375 zeros - This is easy; always insert zeros.
6376 nops - 3 and 2 byte instructions
6377 2 - 2 byte nop
6378 3 - 3 byte nop
6379 4 - 2, 2-byte nops
6380 >=5 : 3 byte instruction + fn(n-3)
6381 widening - widen previous instructions. */
6382
6383static addressT
6384get_widen_aligned_address (fragP, address)
6385 fragS *fragP;
6386 addressT address;
6387{
6388 addressT align_pow, new_address, loop_insn_offset;
6389 fragS *next_frag;
6390 int insn_size;
6391 xtensa_opcode opcode, next_opcode;
6392 static xtensa_insnbuf insnbuf = NULL;
6393
6394 if (!insnbuf)
6395 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6396
6397 if (fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
6398 {
6399 align_pow = fragP->fr_offset;
6400 new_address = ((address + ((1 << align_pow) - 1))
6401 << align_pow) >> align_pow;
6402 return new_address;
6403 }
6404
6405 if (fragP->fr_type == rs_machine_dependent)
6406 {
6407 switch (fragP->fr_subtype)
6408 {
6409 case RELAX_DESIRE_ALIGN:
6410
6411 /* The rule is: get the next fragment's FIRST instruction.
6412 Find the smallest number of bytes needed to be added
6413 in order to ensure that the next fragment is FIRST
6414 instruction will fit in a single word.
6415 i.e. 2 bytes : 0, 1, 2. mod 4
6416 3 bytes: 0, 1 mod 4
6417 If the FIRST instruction MIGHT be relaxed,
6418 assume that it will become a 3-byte instruction. */
6419
6420 insn_size = 3;
6421 /* Check to see if it might be 2 bytes. */
6422 next_opcode = next_frag_opcode (fragP);
6423 if (next_opcode != XTENSA_UNDEFINED
6424 && xtensa_insn_length (xtensa_default_isa, next_opcode) == 2)
6425 insn_size = 2;
6426
6427 assert (insn_size <= 4);
6428 for (new_address = address; new_address < address + 4; new_address++)
6429 {
6430 if (new_address >> 2 == (new_address + insn_size - 1) >> 2)
6431 return new_address;
6432 }
6433 as_bad (_("internal error aligning"));
6434 return address;
6435
6436 case RELAX_ALIGN_NEXT_OPCODE:
6437 /* The rule is: get next fragment's FIRST instruction.
6438 Find the smallest number of bytes needed to be added
6439 in order to ensure that the next fragment's FIRST
6440 instruction will fit in a single word.
6441 i.e. 2 bytes : 0, 1, 2. mod 4
6442 3 bytes: 0, 1 mod 4
6443 If the FIRST instruction MIGHT be relaxed,
6444 assume that it will become a 3 byte instruction. */
6445
6446 opcode = next_frag_opcode (fragP);
6447 if (opcode == XTENSA_UNDEFINED)
6448 {
6449 as_bad_where (fragP->fr_file, fragP->fr_line,
6450 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6451 as_fatal (_("cannot continue"));
6452 }
6453 insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6454 assert (insn_size <= 4);
6455 assert (is_loop_opcode (opcode));
6456
6457 loop_insn_offset = 0;
6458 next_frag = next_non_empty_frag (fragP);
6459
6460 /* If the loop has been expanded then the loop
6461 instruction could be at an offset from this fragment. */
6462 if (next_frag->fr_subtype != RELAX_IMMED)
6463 loop_insn_offset = get_expanded_loop_offset (opcode);
6464
6465 for (new_address = address; new_address < address + 4; new_address++)
6466 {
6467 if ((new_address + loop_insn_offset + insn_size) >> 2 ==
6468 (new_address + loop_insn_offset + insn_size + 2) >> 2)
6469 return new_address;
6470 }
6471 as_bad (_("internal error aligning"));
6472 return address;
6473
6474 default:
6475 as_bad (_("internal error aligning"));
6476 return address;
6477 }
6478 }
6479 as_bad (_("internal error aligning"));
6480 return address;
6481}
6482
6483\f
6484/* md_relax_frag Hook and Helper Functions. */
6485
6486/* Return the number of bytes added to this fragment, given that the
6487 input has been stretched already by "stretch". */
6488
6489long
6490xtensa_relax_frag (fragP, stretch, stretched_p)
6491 fragS *fragP;
6492 long stretch;
6493 int *stretched_p;
6494{
6495 int unreported = fragP->tc_frag_data.unreported_expansion;
6496 long new_stretch = 0;
6497 char *file_name;
6498 int line, lit_size;
6499
6500 as_where (&file_name, &line);
6501 new_logical_line (fragP->fr_file, fragP->fr_line);
6502
6503 fragP->tc_frag_data.unreported_expansion = 0;
6504
6505 switch (fragP->fr_subtype)
6506 {
6507 case RELAX_ALIGN_NEXT_OPCODE:
6508 /* Always convert. */
6509 new_stretch = relax_frag_text_align (fragP, stretch);
6510 break;
6511
6512 case RELAX_LOOP_END:
6513 /* Do nothing. */
6514 break;
6515
6516 case RELAX_LOOP_END_ADD_NOP:
6517 /* Add a NOP and switch to .fill 0. */
6518 new_stretch = relax_frag_add_nop (fragP);
6519 break;
6520
6521 case RELAX_DESIRE_ALIGN:
6522 /* We REALLY want to change the relaxation order here. This
6523 should do NOTHING. The narrowing before it will either align
6524 it or not. */
6525 break;
6526
6527 case RELAX_LITERAL:
6528 case RELAX_LITERAL_FINAL:
6529 return 0;
6530
6531 case RELAX_LITERAL_NR:
6532 lit_size = 4;
6533 fragP->fr_subtype = RELAX_LITERAL_FINAL;
6534 assert (unreported == lit_size);
6535 memset (&fragP->fr_literal[fragP->fr_fix], 0, 4);
6536 fragP->fr_var -= lit_size;
6537 fragP->fr_fix += lit_size;
6538 new_stretch = 4;
6539 break;
6540
6541 case RELAX_NARROW:
6542 new_stretch = relax_frag_narrow (fragP, stretch);
6543 break;
6544
6545 case RELAX_IMMED:
6546 case RELAX_IMMED_STEP1:
6547 case RELAX_IMMED_STEP2:
6548 /* Place the immediate. */
6549 new_stretch = relax_frag_immed (now_seg, fragP, stretch,
6550 fragP->fr_subtype - RELAX_IMMED,
6551 stretched_p);
6552 break;
6553
6554 case RELAX_LITERAL_POOL_BEGIN:
6555 case RELAX_LITERAL_POOL_END:
6556 /* No relaxation required. */
6557 break;
6558
6559 default:
6560 as_bad (_("bad relaxation state"));
6561 }
6562
6563 new_logical_line (file_name, line);
6564 return new_stretch;
6565}
6566
6567
6568static long
6569relax_frag_text_align (fragP, stretch)
6570 fragS *fragP;
6571 long stretch;
6572{
6573 addressT old_address, old_next_address, old_size;
6574 addressT new_address, new_next_address, new_size;
6575 addressT growth;
6576
6577 /* Overview of the relaxation procedure for alignment
6578 inside an executable section:
6579
6580 The old size is stored in the tc_frag_data.text_expansion field.
6581
6582 Calculate the new address, fix up the text_expansion and
6583 return the growth. */
6584
6585 /* Calculate the old address of this fragment and the next fragment. */
6586 old_address = fragP->fr_address - stretch;
6587 old_next_address = (fragP->fr_address - stretch + fragP->fr_fix +
6588 fragP->tc_frag_data.text_expansion);
6589 old_size = old_next_address - old_address;
6590
6591 /* Calculate the new address of this fragment and the next fragment. */
6592 new_address = fragP->fr_address;
6593 new_next_address =
6594 get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix);
6595 new_size = new_next_address - new_address;
6596
6597 growth = new_size - old_size;
6598
6599 /* Fix up the text_expansion field and return the new growth. */
6600 fragP->tc_frag_data.text_expansion += growth;
6601 return growth;
6602}
6603
6604
6605/* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
6606 don't know about the availability of density yet. TODO: When the
6607 flags are stored per fragment, use NOP.N when possible. */
6608
6609static long
6610relax_frag_add_nop (fragP)
6611 fragS *fragP;
6612{
6613 static xtensa_insnbuf insnbuf = NULL;
6614 TInsn t_insn;
6615 char *nop_buf = fragP->fr_literal + fragP->fr_fix;
6616 int length;
6617 if (!insnbuf)
6618 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6619
6620 tinsn_init (&t_insn);
6621 t_insn.opcode = xtensa_or_opcode;
6622 assert (t_insn.opcode != XTENSA_UNDEFINED);
6623
6624 t_insn.ntok = 3;
6625 set_expr_const (&t_insn.tok[0], 1);
6626 set_expr_const (&t_insn.tok[1], 1);
6627 set_expr_const (&t_insn.tok[2], 1);
6628
6629 tinsn_to_insnbuf (&t_insn, insnbuf);
6630 fragP->tc_frag_data.is_insn = TRUE;
6631 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, nop_buf);
6632
6633 length = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6634 if (fragP->fr_var < length)
6635 {
6636 as_warn (_("fr_var (%ld) < length (%d); ignoring"),
6637 fragP->fr_var, length);
6638 frag_wane (fragP);
6639 return 0;
6640 }
6641
6642 fragP->fr_fix += length;
6643 fragP->fr_var -= length;
6644 frag_wane (fragP);
6645 return length;
6646}
6647
6648
6649static long
6650relax_frag_narrow (fragP, stretch)
6651 fragS *fragP;
6652 long stretch;
6653{
6654 /* Overview of the relaxation procedure for alignment inside an
6655 executable section: Find the number of widenings required and the
6656 number of nop bytes required. Store the number of bytes ALREADY
6657 widened. If there are enough instructions to widen (must go back
6658 ONLY through NARROW fragments), mark each of the fragments as TO BE
6659 widened, recalculate the fragment addresses. */
6660
6661 assert (fragP->fr_type == rs_machine_dependent
6662 && fragP->fr_subtype == RELAX_NARROW);
6663
6664 if (!future_alignment_required (fragP, 0))
6665 {
6666 /* If already expanded but no longer needed because of a prior
6667 stretch, it is SAFE to unexpand because the next fragment will
6668 NEVER start at an address > the previous time through the
6669 relaxation. */
6670 if (fragP->tc_frag_data.text_expansion)
6671 {
6672 if (stretch > 0)
6673 {
6674 fragP->tc_frag_data.text_expansion = 0;
6675 return -1;
6676 }
6677 /* Otherwise we have to live with this bad choice. */
6678 return 0;
6679 }
6680 return 0;
6681 }
6682
6683 if (fragP->tc_frag_data.text_expansion == 0)
6684 {
6685 fragP->tc_frag_data.text_expansion = 1;
6686 return 1;
6687 }
6688
6689 return 0;
6690}
6691
6692
6693static bfd_boolean
6694future_alignment_required (fragP, stretch)
6695 fragS *fragP;
6696 long stretch;
6697{
6698 long address = fragP->fr_address + stretch;
6699 int num_widens = 0;
6700 addressT aligned_address;
6701 offsetT desired_diff;
6702
6703 while (fragP)
6704 {
6705 /* Limit this to a small search. */
6706 if (num_widens > 8)
6707 return FALSE;
6708 address += fragP->fr_fix;
6709
6710 switch (fragP->fr_type)
6711 {
6712 case rs_fill:
6713 address += fragP->fr_offset * fragP->fr_var;
6714 break;
6715
6716 case rs_machine_dependent:
6717 switch (fragP->fr_subtype)
6718 {
6719 case RELAX_NARROW:
6720 /* address += fragP->fr_fix; */
6721 num_widens++;
6722 break;
6723
6724 case RELAX_IMMED:
6725 address += (/* fragP->fr_fix + */
6726 fragP->tc_frag_data.text_expansion);
6727 break;
6728
6729 case RELAX_ALIGN_NEXT_OPCODE:
6730 case RELAX_DESIRE_ALIGN:
6731 /* address += fragP->fr_fix; */
6732 aligned_address = get_widen_aligned_address (fragP, address);
6733 desired_diff = aligned_address - address;
6734 assert (desired_diff >= 0);
6735 /* If there are enough wideners in between do it. */
6736 /* return (num_widens == desired_diff); */
6737 if (num_widens == desired_diff)
6738 return TRUE;
6739 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6740 return FALSE;
6741 break;
6742
6743 default:
6744 return FALSE;
6745 }
6746 break;
6747
6748 default:
6749 return FALSE;
6750 }
6751 fragP = fragP->fr_next;
6752 }
6753
6754 return FALSE;
6755}
6756
6757
6758static long
6759relax_frag_immed (segP, fragP, stretch, min_steps, stretched_p)
6760 segT segP;
6761 fragS *fragP;
6762 long stretch;
6763 int min_steps;
6764 int *stretched_p;
6765{
6766 static xtensa_insnbuf insnbuf = NULL;
6767 TInsn t_insn;
6768 int old_size;
6769 bfd_boolean negatable_branch = FALSE;
6770 bfd_boolean branch_jmp_to_next = FALSE;
6771 IStack istack;
6772 offsetT frag_offset;
6773 int num_steps;
6774 fragS *lit_fragP;
6775 int num_text_bytes, num_literal_bytes;
6776 int literal_diff, text_diff;
6777
6778 assert (fragP->fr_opcode != NULL);
6779
6780 if (!insnbuf)
6781 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6782
6783 tinsn_from_chars (&t_insn, fragP->fr_opcode);
6784 tinsn_immed_from_frag (&t_insn, fragP);
6785
6786 negatable_branch = is_negatable_branch (&t_insn);
6787
6788 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6789
6790 if (software_avoid_b_j_loop_end)
6791 branch_jmp_to_next = is_branch_jmp_to_next (&t_insn, fragP);
6792
6793 /* Special case: replace a branch to the next instruction with a NOP.
6794 This is required to work around a hardware bug in T1040.0 and also
6795 serves as an optimization. */
6796
6797 if (branch_jmp_to_next
6798 && ((old_size == 2) || (old_size == 3))
6799 && !next_frag_is_loop_target (fragP))
6800 return 0;
6801
6802 /* Here is the fun stuff: Get the immediate field from this
6803 instruction. If it fits, we are done. If not, find the next
6804 instruction sequence that fits. */
6805
6806 frag_offset = fragP->fr_opcode - fragP->fr_literal;
6807 istack_init (&istack);
6808 num_steps = xg_assembly_relax (&istack, &t_insn, segP, fragP, frag_offset,
6809 min_steps, stretch);
6810 if (num_steps < min_steps)
6811 {
6812 as_fatal (_("internal error: relaxation failed"));
6813 return 0;
6814 }
6815
6816 if (num_steps > RELAX_IMMED_MAXSTEPS)
6817 {
6818 as_fatal (_("internal error: relaxation requires too many steps"));
6819 return 0;
6820 }
6821
6822 fragP->fr_subtype = (int) RELAX_IMMED + num_steps;
6823
6824 /* Figure out the number of bytes needed. */
6825 lit_fragP = 0;
6826 num_text_bytes = get_num_stack_text_bytes (&istack) - old_size;
6827 num_literal_bytes = get_num_stack_literal_bytes (&istack);
6828 literal_diff = num_literal_bytes - fragP->tc_frag_data.literal_expansion;
6829 text_diff = num_text_bytes - fragP->tc_frag_data.text_expansion;
6830
6831 /* It MUST get larger. If not, we could get an infinite loop. */
6832 know (num_text_bytes >= 0);
6833 know (literal_diff >= 0 && text_diff >= 0);
6834
6835 fragP->tc_frag_data.text_expansion = num_text_bytes;
6836 fragP->tc_frag_data.literal_expansion = num_literal_bytes;
6837
6838 /* Find the associated expandable literal for this. */
6839 if (literal_diff != 0)
6840 {
6841 lit_fragP = fragP->tc_frag_data.literal_frag;
6842 if (lit_fragP)
6843 {
6844 assert (literal_diff == 4);
6845 lit_fragP->tc_frag_data.unreported_expansion += literal_diff;
6846
6847 /* We expect that the literal section state has NOT been
6848 modified yet. */
6849 assert (lit_fragP->fr_type == rs_machine_dependent
6850 && lit_fragP->fr_subtype == RELAX_LITERAL);
6851 lit_fragP->fr_subtype = RELAX_LITERAL_NR;
6852
6853 /* We need to mark this section for another iteration
6854 of relaxation. */
6855 (*stretched_p)++;
6856 }
6857 }
6858
6859 /* This implicitly uses the assumption that a branch is negated
6860 when the size of the output increases by at least 2 bytes. */
6861
6862 if (negatable_branch && num_text_bytes >= 2)
6863 {
6864 /* If next frag is a loop end, then switch it to add a NOP. */
6865 update_next_frag_nop_state (fragP);
6866 }
6867
6868 return text_diff;
6869}
6870
6871\f
6872/* md_convert_frag Hook and Helper Functions. */
6873
6874void
6875md_convert_frag (abfd, sec, fragp)
6876 bfd *abfd ATTRIBUTE_UNUSED;
6877 segT sec;
6878 fragS *fragp;
6879{
6880 char *file_name;
6881 int line;
6882
6883 as_where (&file_name, &line);
6884 new_logical_line (fragp->fr_file, fragp->fr_line);
6885
6886 switch (fragp->fr_subtype)
6887 {
6888 case RELAX_ALIGN_NEXT_OPCODE:
6889 /* Always convert. */
6890 convert_frag_align_next_opcode (fragp);
6891 break;
6892
6893 case RELAX_DESIRE_ALIGN:
6894 /* Do nothing. If not aligned already, too bad. */
6895 break;
6896
6897 case RELAX_LITERAL:
6898 case RELAX_LITERAL_FINAL:
6899 break;
6900
6901 case RELAX_NARROW:
6902 /* No conversion. */
6903 convert_frag_narrow (fragp);
6904 break;
6905
6906 case RELAX_IMMED:
6907 case RELAX_IMMED_STEP1:
6908 case RELAX_IMMED_STEP2:
6909 /* Place the immediate. */
6910 convert_frag_immed (sec, fragp, fragp->fr_subtype - RELAX_IMMED);
6911 break;
6912
6913 case RELAX_LITERAL_NR:
6914 if (use_literal_section)
6915 {
6916 /* This should have been handled during relaxation. When
6917 relaxing a code segment, literals sometimes need to be
6918 added to the corresponding literal segment. If that
6919 literal segment has already been relaxed, then we end up
6920 in this situation. Marking the literal segments as data
6921 would make this happen less often (since GAS always relaxes
6922 code before data), but we could still get into trouble if
6923 there are instructions in a segment that is not marked as
6924 containing code. Until we can implement a better solution,
6925 cheat and adjust the addresses of all the following frags.
6926 This could break subsequent alignments, but the linker's
6927 literal coalescing will do that anyway. */
6928
6929 fragS *f;
6930 fragp->fr_subtype = RELAX_LITERAL_FINAL;
6931 assert (fragp->tc_frag_data.unreported_expansion == 4);
6932 memset (&fragp->fr_literal[fragp->fr_fix], 0, 4);
6933 fragp->fr_var -= 4;
6934 fragp->fr_fix += 4;
6935 for (f = fragp->fr_next; f; f = f->fr_next)
6936 f->fr_address += 4;
6937 }
6938 else
6939 as_bad (_("invalid relaxation fragment result"));
6940 break;
6941 }
6942
6943 fragp->fr_var = 0;
6944 new_logical_line (file_name, line);
6945}
6946
6947
6948void
6949convert_frag_align_next_opcode (fragp)
6950 fragS *fragp;
6951{
6952 char *nop_buf; /* Location for Writing. */
6953 size_t i;
6954
6955 bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
6956 addressT aligned_address;
6957 size_t fill_size, nop_count;
6958
6959 aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
6960 fragp->fr_fix);
6961 fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix);
6962 nop_count = get_text_align_nop_count (fill_size, use_no_density);
6963 nop_buf = fragp->fr_literal + fragp->fr_fix;
6964
6965 for (i = 0; i < nop_count; i++)
6966 {
6967 size_t nop_size;
6968 nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density);
6969
6970 assemble_nop (nop_size, nop_buf);
6971 nop_buf += nop_size;
6972 }
6973
6974 fragp->fr_fix += fill_size;
6975 fragp->fr_var -= fill_size;
6976}
6977
6978
6979static void
6980convert_frag_narrow (fragP)
6981 fragS *fragP;
6982{
6983 static xtensa_insnbuf insnbuf = NULL;
6984 TInsn t_insn, single_target;
6985 int size, old_size, diff, error_val;
6986 offsetT frag_offset;
6987
6988 if (fragP->tc_frag_data.text_expansion == 0)
6989 {
6990 /* No conversion. */
6991 fragP->fr_var = 0;
6992 return;
6993 }
6994
6995 assert (fragP->fr_opcode != NULL);
6996
6997 if (!insnbuf)
6998 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6999
7000 tinsn_from_chars (&t_insn, fragP->fr_opcode);
7001 tinsn_immed_from_frag (&t_insn, fragP);
7002
7003 /* Just convert it to a wide form.... */
7004 size = 0;
7005 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
7006
7007 tinsn_init (&single_target);
7008 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7009
7010 error_val = xg_expand_narrow (&single_target, &t_insn);
7011 if (error_val)
7012 as_bad (_("unable to widen instruction"));
7013
7014 size = xtensa_insn_length (xtensa_default_isa, single_target.opcode);
7015 xg_emit_insn_to_buf (&single_target, fragP->fr_opcode,
7016 fragP, frag_offset, TRUE);
7017
7018 diff = size - old_size;
7019 assert (diff >= 0);
7020 assert (diff <= fragP->fr_var);
7021 fragP->fr_var -= diff;
7022 fragP->fr_fix += diff;
7023
7024 /* clean it up */
7025 fragP->fr_var = 0;
7026}
7027
7028
7029static void
7030convert_frag_immed (segP, fragP, min_steps)
7031 segT segP;
7032 fragS *fragP;
7033 int min_steps;
7034{
7035 char *immed_instr = fragP->fr_opcode;
7036 static xtensa_insnbuf insnbuf = NULL;
7037 TInsn orig_t_insn;
7038 bfd_boolean expanded = FALSE;
7039 char *fr_opcode = fragP->fr_opcode;
7040 bfd_boolean branch_jmp_to_next = FALSE;
7041 int size;
7042
7043 assert (fragP->fr_opcode != NULL);
7044
7045 if (!insnbuf)
7046 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7047
7048 tinsn_from_chars (&orig_t_insn, fragP->fr_opcode);
7049 tinsn_immed_from_frag (&orig_t_insn, fragP);
7050
7051 /* Here is the fun stuff: Get the immediate field from this
7052 instruction. If it fits, we're done. If not, find the next
7053 instruction sequence that fits. */
7054
7055 if (software_avoid_b_j_loop_end)
7056 branch_jmp_to_next = is_branch_jmp_to_next (&orig_t_insn, fragP);
7057
7058 if (branch_jmp_to_next && !next_frag_is_loop_target (fragP))
7059 {
7060 /* Conversion just inserts a NOP and marks the fix as completed. */
7061 size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7062 assemble_nop (size, fragP->fr_opcode);
7063 fragP->fr_var = 0;
7064 }
7065 else
7066 {
7067 IStack istack;
7068 int i;
7069 symbolS *lit_sym = NULL;
7070 int total_size = 0;
7071 int old_size;
7072 int diff;
7073 symbolS *gen_label = NULL;
7074 offsetT frag_offset;
7075
7076 /* It does not fit. Find something that does and
7077 convert immediately. */
7078 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7079 istack_init (&istack);
7080 xg_assembly_relax (&istack, &orig_t_insn,
7081 segP, fragP, frag_offset, min_steps, 0);
7082
7083 old_size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7084
7085 /* Assemble this right inline. */
7086
7087 /* First, create the mapping from a label name to the REAL label. */
7088 total_size = 0;
7089 for (i = 0; i < istack.ninsn; i++)
7090 {
7091 TInsn *t_insn = &istack.insn[i];
7092 int size = 0;
7093 fragS *lit_frag;
7094
7095 switch (t_insn->insn_type)
7096 {
7097 case ITYPE_LITERAL:
7098 if (lit_sym != NULL)
7099 as_bad (_("multiple literals in expansion"));
7100 /* First find the appropriate space in the literal pool. */
7101 lit_frag = fragP->tc_frag_data.literal_frag;
7102 if (lit_frag == NULL)
7103 as_bad (_("no registered fragment for literal"));
7104 if (t_insn->ntok != 1)
7105 as_bad (_("number of literal tokens != 1"));
7106
7107 /* Set the literal symbol and add a fixup. */
7108 lit_sym = lit_frag->fr_symbol;
7109 break;
7110
7111 case ITYPE_LABEL:
7112 assert (gen_label == NULL);
7113 gen_label = symbol_new (FAKE_LABEL_NAME, now_seg,
7114 fragP->fr_opcode - fragP->fr_literal +
7115 total_size, fragP);
7116 break;
7117
7118 case ITYPE_INSN:
7119 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7120 total_size += size;
7121 break;
7122 }
7123 }
7124
7125 total_size = 0;
7126 for (i = 0; i < istack.ninsn; i++)
7127 {
7128 TInsn *t_insn = &istack.insn[i];
7129 fragS *lit_frag;
7130 int size;
7131 segT target_seg;
7132
7133 switch (t_insn->insn_type)
7134 {
7135 case ITYPE_LITERAL:
7136 lit_frag = fragP->tc_frag_data.literal_frag;
7137 /* already checked */
7138 assert (lit_frag != NULL);
7139 assert (lit_sym != NULL);
7140 assert (t_insn->ntok == 1);
7141 /* add a fixup */
7142 target_seg = S_GET_SEGMENT (lit_sym);
7143 assert (target_seg);
7144 fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4,
7145 &t_insn->tok[0], FALSE, BFD_RELOC_32);
7146 break;
7147
7148 case ITYPE_LABEL:
7149 break;
7150
7151 case ITYPE_INSN:
7152 xg_resolve_labels (t_insn, gen_label);
7153 xg_resolve_literals (t_insn, lit_sym);
7154 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7155 total_size += size;
7156 xg_emit_insn_to_buf (t_insn, immed_instr, fragP,
7157 immed_instr - fragP->fr_literal, TRUE);
7158 immed_instr += size;
7159 break;
7160 }
7161 }
7162
7163 diff = total_size - old_size;
7164 assert (diff >= 0);
7165 if (diff != 0)
7166 expanded = TRUE;
7167 assert (diff <= fragP->fr_var);
7168 fragP->fr_var -= diff;
7169 fragP->fr_fix += diff;
7170 }
7171
7172 /* Clean it up. */
7173 fragP->fr_var = 0;
7174
7175 /* Check for undefined immediates in LOOP instructions. */
7176 if (is_loop_opcode (orig_t_insn.opcode))
7177 {
7178 symbolS *sym;
7179 sym = orig_t_insn.tok[1].X_add_symbol;
7180 if (sym != NULL && !S_IS_DEFINED (sym))
7181 {
7182 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7183 return;
7184 }
7185 sym = orig_t_insn.tok[1].X_op_symbol;
7186 if (sym != NULL && !S_IS_DEFINED (sym))
7187 {
7188 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7189 return;
7190 }
7191 }
7192
7193 if (expanded && is_loop_opcode (orig_t_insn.opcode))
7194 convert_frag_immed_finish_loop (segP, fragP, &orig_t_insn);
7195
7196 if (expanded && is_direct_call_opcode (orig_t_insn.opcode))
7197 {
7198 /* Add an expansion note on the expanded instruction. */
7199 fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4,
7200 &orig_t_insn.tok[0], TRUE,
7201 BFD_RELOC_XTENSA_ASM_EXPAND);
7202
7203 }
7204}
7205
7206
7207/* Add a new fix expression into the desired segment. We have to
7208 switch to that segment to do this. */
7209
7210static fixS *
7211fix_new_exp_in_seg (new_seg, new_subseg,
7212 frag, where, size, exp, pcrel, r_type)
7213 segT new_seg;
7214 subsegT new_subseg;
7215 fragS *frag;
7216 int where;
7217 int size;
7218 expressionS *exp;
7219 int pcrel;
7220 bfd_reloc_code_real_type r_type;
7221{
7222 fixS *new_fix;
7223 segT seg = now_seg;
7224 subsegT subseg = now_subseg;
7225 assert (new_seg != 0);
7226 subseg_set (new_seg, new_subseg);
7227
7228 if (r_type == BFD_RELOC_32
7229 && exp->X_add_symbol
61846f28 7230 && symbol_get_tc (exp->X_add_symbol)->plt == 1)
e0001a05
NC		 7231 {
7232 r_type = BFD_RELOC_XTENSA_PLT;
7233 }
7234
7235 new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
7236 subseg_set (seg, subseg);
7237 return new_fix;
7238}
7239
7240
7241/* Relax a loop instruction so that it can span loop >256 bytes. */
7242/*
7243 loop as, .L1
7244 .L0:
7245 rsr as, LEND
7246 wsr as, LBEG
7247 addi as, as, lo8(label-.L1)
7248 addmi as, as, mid8(label-.L1)
7249 wsr as, LEND
7250 isync
7251 rsr as, LCOUNT
7252 addi as, as, 1
7253 .L1:
7254 <<body>>
7255 label: */
7256
7257static void
7258convert_frag_immed_finish_loop (segP, fragP, t_insn)
7259 segT segP;
7260 fragS *fragP;
7261 TInsn *t_insn;
7262{
7263 TInsn loop_insn;
7264 TInsn addi_insn;
7265 TInsn addmi_insn;
7266 unsigned long target;
7267 static xtensa_insnbuf insnbuf = NULL;
7268 unsigned int loop_length, loop_length_hi, loop_length_lo;
7269 xtensa_isa isa = xtensa_default_isa;
7270 addressT loop_offset;
7271 addressT addi_offset = 9;
7272 addressT addmi_offset = 12;
7273
7274 if (!insnbuf)
7275 insnbuf = xtensa_insnbuf_alloc (isa);
7276
7277 /* Get the loop offset. */
7278 loop_offset = get_expanded_loop_offset (t_insn->opcode);
7279 /* Validate that there really is a LOOP at the loop_offset. */
7280 tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset);
7281
7282 if (!is_loop_opcode (loop_insn.opcode))
7283 {
7284 as_bad_where (fragP->fr_file, fragP->fr_line,
7285 _("loop relaxation specification does not correspond"));
7286 assert (0);
7287 }
7288 addi_offset += loop_offset;
7289 addmi_offset += loop_offset;
7290
7291 assert (t_insn->ntok == 2);
7292 target = get_expression_value (segP, &t_insn->tok[1]);
7293
7294 know (symbolP);
7295 know (symbolP->sy_frag);
7296 know (!(S_GET_SEGMENT (symbolP) == absolute_section)
7297 || symbol_get_frag (symbolP) == &zero_address_frag);
7298
7299 loop_length = target - (fragP->fr_address + fragP->fr_fix);
7300 loop_length_hi = loop_length & ~0x0ff;
7301 loop_length_lo = loop_length & 0x0ff;
7302 if (loop_length_lo >= 128)
7303 {
7304 loop_length_lo -= 256;
7305 loop_length_hi += 256;
7306 }
7307
7308 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
7309 32512. If the loop is larger than that, then we just fail. */
7310 if (loop_length_hi > 32512)
7311 as_bad_where (fragP->fr_file, fragP->fr_line,
7312 _("loop too long for LOOP instruction"));
7313
7314 tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset);
7315 assert (addi_insn.opcode == xtensa_addi_opcode);
7316
7317 tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset);
7318 assert (addmi_insn.opcode == xtensa_addmi_opcode);
7319
7320 set_expr_const (&addi_insn.tok[2], loop_length_lo);
7321 tinsn_to_insnbuf (&addi_insn, insnbuf);
7322
7323 fragP->tc_frag_data.is_insn = TRUE;
7324 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset);
7325
7326 set_expr_const (&addmi_insn.tok[2], loop_length_hi);
7327 tinsn_to_insnbuf (&addmi_insn, insnbuf);
7328 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset);
7329}
7330
7331
7332static offsetT
7333get_expression_value (segP, exp)
7334 segT segP;
7335 expressionS *exp;
7336{
7337 if (exp->X_op == O_constant)
7338 return exp->X_add_number;
7339 if (exp->X_op == O_symbol)
7340 {
7341 /* Find the fragment. */
7342 symbolS *sym = exp->X_add_symbol;
7343
7344 assert (S_GET_SEGMENT (sym) == segP
7345 || S_GET_SEGMENT (sym) == absolute_section);
7346
7347 return (S_GET_VALUE (sym) + exp->X_add_number);
7348 }
7349 as_bad (_("invalid expression evaluation type %d"), exp->X_op);
7350 return 0;
7351}
7352
7353\f
7354/* A map that keeps information on a per-subsegment basis. This is
7355 maintained during initial assembly, but is invalid once the
7356 subsegments are smashed together. I.E., it cannot be used during
7357 the relaxation. */
7358
7359typedef struct subseg_map_struct
7360{
7361 /* the key */
7362 segT seg;
7363 subsegT subseg;
7364
7365 /* the data */
7366 unsigned flags;
7367
7368 struct subseg_map_struct *next;
7369} subseg_map;
7370
7371static subseg_map *sseg_map = NULL;
7372
7373
7374static unsigned
7375get_last_insn_flags (seg, subseg)
7376 segT seg;
7377 subsegT subseg;
7378{
7379 subseg_map *subseg_e;
7380
7381 for (subseg_e = sseg_map; subseg_e != NULL; subseg_e = subseg_e->next)
7382 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7383 return subseg_e->flags;
7384
7385 return 0;
7386}
7387
7388
7389static void
7390set_last_insn_flags (seg, subseg, fl, val)
7391 segT seg;
7392 subsegT subseg;
7393 unsigned fl;
7394 bfd_boolean val;
7395{
7396 subseg_map *subseg_e;
7397
7398 for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next)
7399 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7400 break;
7401
7402 if (!subseg_e)
7403 {
7404 subseg_e = (subseg_map *) xmalloc (sizeof (subseg_map));
7405 memset (subseg_e, 0, sizeof (subseg_map));
7406 subseg_e->seg = seg;
7407 subseg_e->subseg = subseg;
7408 subseg_e->flags = 0;
7409 subseg_e->next = sseg_map;
7410 sseg_map = subseg_e;
7411 }
7412
7413 if (val)
7414 subseg_e->flags |= fl;
7415 else
7416 subseg_e->flags &= ~fl;
7417}
7418
7419\f
7420/* Segment Lists and emit_state Stuff. */
7421
7422/* Remove the segment from the global sections list. */
7423
7424static void
7425xtensa_remove_section (sec)
7426 segT sec;
7427{
7428 /* Handle brain-dead bfd_section_list_remove macro, which
7429 expect the address of the prior section's "next" field, not
7430 just the address of the section to remove. */
7431
7432 segT *ps_next_ptr = &stdoutput->sections;
7433 while (*ps_next_ptr != sec && *ps_next_ptr != NULL)
7434 ps_next_ptr = &(*ps_next_ptr)->next;
7435
7436 assert (*ps_next_ptr != NULL);
7437
7438 bfd_section_list_remove (stdoutput, ps_next_ptr);
7439}
7440
7441
7442static void
7443xtensa_insert_section (after_sec, sec)
7444 segT after_sec;
7445 segT sec;
7446{
7447 segT *after_sec_next;
7448 if (after_sec == NULL)
7449 after_sec_next = &stdoutput->sections;
7450 else
7451 after_sec_next = &after_sec->next;
7452
7453 bfd_section_list_insert (stdoutput, after_sec_next, sec);
7454}
7455
7456
7457static void
7458xtensa_move_seg_list_to_beginning (head)
7459 seg_list *head;
7460{
7461 head = head->next;
7462 while (head)
7463 {
7464 segT literal_section = head->seg;
7465
7466 /* Move the literal section to the front of the section list. */
7467 assert (literal_section);
7468 xtensa_remove_section (literal_section);
7469 xtensa_insert_section (NULL, literal_section);
7470
7471 head = head->next;
7472 }
7473}
7474
7475
7476void
7477xtensa_move_literals ()
7478{
7479 seg_list *segment;
7480 frchainS *frchain_from, *frchain_to;
7481 fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after;
7482 fragS **frag_splice;
7483 emit_state state;
7484 segT dest_seg;
7485 fixS *fix, *next_fix, **fix_splice;
82e7541d 7486 sym_list *lit;
e0001a05
NC		 7487
7488 /* As clunky as this is, we can't rely on frag_var
7489 and frag_variant to get called in all situations. */
7490
7491 segment = literal_head->next;
7492 while (segment)
7493 {
7494 frchain_from = seg_info (segment->seg)->frchainP;
7495 search_frag = frchain_from->frch_root;
7496 while (search_frag)
7497 {
7498 search_frag->tc_frag_data.is_literal = TRUE;
7499 search_frag = search_frag->fr_next;
7500 }
7501 segment = segment->next;
7502 }
7503
7504 if (use_literal_section)
7505 return;
7506
7507 segment = literal_head->next;
7508 while (segment)
7509 {
7510 frchain_from = seg_info (segment->seg)->frchainP;
7511 search_frag = frchain_from->frch_root;
7512 literal_pool = NULL;
7513 frchain_to = NULL;
7514 frag_splice = &(frchain_from->frch_root);
7515
7516 while (!search_frag->tc_frag_data.literal_frag)
7517 {
7518 assert (search_frag->fr_fix == 0
7519 || search_frag->fr_type == rs_align);
7520 search_frag = search_frag->fr_next;
7521 }
7522
7523 assert (search_frag->tc_frag_data.literal_frag->fr_subtype
7524 == RELAX_LITERAL_POOL_BEGIN);
7525 xtensa_switch_section_emit_state (&state, segment->seg, 0);
7526
7527 /* Make sure that all the frags in this series are closed, and
7528 that there is at least one left over of zero-size. This
7529 prevents us from making a segment with an frchain without any
7530 frags in it. */
7531 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7532 last_frag = frag_now;
7533 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7534
7535 while (search_frag != frag_now)
7536 {
7537 next_frag = search_frag->fr_next;
7538
7539 /* First, move the frag out of the literal section and
7540 to the appropriate place. */
7541 if (search_frag->tc_frag_data.literal_frag)
7542 {
7543 literal_pool = search_frag->tc_frag_data.literal_frag;
7544 assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
7545 /* Note that we set this fr_var to be a fix
7546 chain when we created the literal pool location
7547 as RELAX_LITERAL_POOL_BEGIN. */
7548 frchain_to = (frchainS *) literal_pool->fr_var;
7549 }
7550 insert_after = literal_pool;
7551
7552 while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
7553 insert_after = insert_after->fr_next;
7554
7555 dest_seg = (segT) insert_after->fr_next->fr_var;
7556
7557 *frag_splice = next_frag;
7558 search_frag->fr_next = insert_after->fr_next;
7559 insert_after->fr_next = search_frag;
7560 search_frag->tc_frag_data.lit_seg = dest_seg;
7561
7562 /* Now move any fixups associated with this frag to the
7563 right section. */
7564 fix = frchain_from->fix_root;
7565 fix_splice = &(frchain_from->fix_root);
7566 while (fix)
7567 {
7568 next_fix = fix->fx_next;
7569 if (fix->fx_frag == search_frag)
7570 {
7571 *fix_splice = next_fix;
7572 fix->fx_next = frchain_to->fix_root;
7573 frchain_to->fix_root = fix;
7574 if (frchain_to->fix_tail == NULL)
7575 frchain_to->fix_tail = fix;
7576 }
7577 else
7578 fix_splice = &(fix->fx_next);
7579 fix = next_fix;
7580 }
7581 search_frag = next_frag;
7582 }
7583
7584 if (frchain_from->fix_root != NULL)
7585 {
7586 frchain_from = seg_info (segment->seg)->frchainP;
7587 as_warn (_("fixes not all moved from %s"), segment->seg->name);
7588
7589 assert (frchain_from->fix_root == NULL);
7590 }
7591 frchain_from->fix_tail = NULL;
7592 xtensa_restore_emit_state (&state);
7593 segment = segment->next;
7594 }
7595
82e7541d
BW		 7596 /* Now fix up the SEGMENT value for all the literal symbols. */
7597 for (lit = literal_syms; lit; lit = lit->next)
7598 {
7599 symbolS *lit_sym = lit->sym;
7600 segT dest_seg = symbol_get_frag (lit_sym)->tc_frag_data.lit_seg;
7601 S_SET_SEGMENT (lit_sym, dest_seg);
7602 }
e0001a05
NC		 7603}
7604
7605
7606static void
7607xtensa_reorder_seg_list (head, after)
7608 seg_list *head;
7609 segT after;
7610{
7611 /* Move all of the sections in the section list to come
7612 after "after" in the gnu segment list. */
7613
7614 head = head->next;
7615 while (head)
7616 {
7617 segT literal_section = head->seg;
7618
7619 /* Move the literal section after "after". */
7620 assert (literal_section);
7621 if (literal_section != after)
7622 {
7623 xtensa_remove_section (literal_section);
7624 xtensa_insert_section (after, literal_section);
7625 }
7626
7627 head = head->next;
7628 }
7629}
7630
7631
7632/* Push all the literal segments to the end of the gnu list. */
7633
7634void
7635xtensa_reorder_segments ()
7636{
7637 segT sec;
7638 segT last_sec;
7639 int old_count = 0;
7640 int new_count = 0;
7641
7642 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7643 old_count++;
7644
7645 /* Now that we have the last section, push all the literal
7646 sections to the end. */
7647 last_sec = get_last_sec ();
7648 xtensa_reorder_seg_list (literal_head, last_sec);
7649 xtensa_reorder_seg_list (init_literal_head, last_sec);
7650 xtensa_reorder_seg_list (fini_literal_head, last_sec);
7651
7652 /* Now perform the final error check. */
7653 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7654 new_count++;
7655 assert (new_count == old_count);
7656}
7657
7658
7659segT
7660get_last_sec ()
7661{
7662 segT last_sec = stdoutput->sections;
7663 while (last_sec->next != NULL)
7664 last_sec = last_sec->next;
7665
7666 return last_sec;
7667}
7668
7669
7670/* Change the emit state (seg, subseg, and frag related stuff) to the
7671 correct location. Return a emit_state which can be passed to
7672 xtensa_restore_emit_state to return to current fragment. */
7673
7674void
7675xtensa_switch_to_literal_fragment (result)
7676 emit_state *result;
7677{
7678 /* When we mark a literal pool location, we want to put a frag in
7679 the literal pool that points to it. But to do that, we want to
7680 switch_to_literal_fragment. But literal sections don't have
7681 literal pools, so their location is always null, so we would
7682 recurse forever. This is kind of hacky, but it works. */
7683
7684 static bfd_boolean recursive = FALSE;
7685 fragS *pool_location = get_literal_pool_location (now_seg);
7686 bfd_boolean is_init =
7687 (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
7688
7689 bfd_boolean is_fini =
7690 (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
7691
7692
7693 if (pool_location == NULL
7694 && !use_literal_section
7695 && !recursive
7696 && !is_init && ! is_fini)
7697 {
7698 as_warn (_("inlining literal pool; "
7699 "specify location with .literal_position."));
7700 recursive = TRUE;
61846f28 7701 xtensa_mark_literal_pool_location ();
e0001a05
NC		 7702 recursive = FALSE;
7703 }
7704
7705 /* Special case: If we are in the ".fini" or ".init" section, then
7706 we will ALWAYS be generating to the ".fini.literal" and
7707 ".init.literal" sections. */
7708
7709 if (is_init)
7710 {
7711 cache_literal_section (init_literal_head,
7712 default_lit_sections.init_lit_seg_name,
7713 &default_lit_sections.init_lit_seg);
7714 xtensa_switch_section_emit_state (result,
7715 default_lit_sections.init_lit_seg, 0);
7716 }
7717 else if (is_fini)
7718 {
7719 cache_literal_section (fini_literal_head,
7720 default_lit_sections.fini_lit_seg_name,
7721 &default_lit_sections.fini_lit_seg);
7722 xtensa_switch_section_emit_state (result,
7723 default_lit_sections.fini_lit_seg, 0);
7724 }
7725 else
7726 {
7727 cache_literal_section (literal_head,
7728 default_lit_sections.lit_seg_name,
7729 &default_lit_sections.lit_seg);
7730 xtensa_switch_section_emit_state (result,
7731 default_lit_sections.lit_seg, 0);
7732 }
7733
7734 if (!use_literal_section &&
7735 !is_init && !is_fini &&
7736 get_literal_pool_location (now_seg) != pool_location)
7737 {
7738 /* Close whatever frag is there. */
7739 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7740 frag_now->tc_frag_data.literal_frag = pool_location;
7741 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7742 }
7743
7744 /* Do a 4 byte align here. */
7745 frag_align (2, 0, 0);
7746}
7747
7748
7749/* Call this function before emitting data into the literal section.
7750 This is a helper function for xtensa_switch_to_literal_fragment.
7751 This is similar to a .section new_now_seg subseg. */
7752
7753void
7754xtensa_switch_section_emit_state (state, new_now_seg, new_now_subseg)
7755 emit_state *state;
7756 segT new_now_seg;
7757 subsegT new_now_subseg;
7758{
7759 state->name = now_seg->name;
7760 state->now_seg = now_seg;
7761 state->now_subseg = now_subseg;
7762 state->generating_literals = generating_literals;
7763 generating_literals++;
7764 subseg_new (segment_name (new_now_seg), new_now_subseg);
7765}
7766
7767
7768/* Use to restore the emitting into the normal place. */
7769
7770void
7771xtensa_restore_emit_state (state)
7772 emit_state *state;
7773{
7774 generating_literals = state->generating_literals;
7775 subseg_new (state->name, state->now_subseg);
7776}
7777
7778
7779/* Get a segment of a given name. If the segment is already
7780 present, return it; otherwise, create a new one. */
7781
7782static void
7783cache_literal_section (head, name, seg)
7784 seg_list *head;
7785 const char *name;
7786 segT *seg;
7787{
7788 segT current_section = now_seg;
7789 int current_subsec = now_subseg;
7790
7791 if (*seg != 0)
7792 return;
7793 *seg = retrieve_literal_seg (head, name);
7794 subseg_set (current_section, current_subsec);
7795}
7796
7797
7798/* Get a segment of a given name. If the segment is already
7799 present, return it; otherwise, create a new one. */
7800
7801static segT
7802retrieve_literal_seg (head, name)
7803 seg_list *head;
7804 const char *name;
7805{
7806 segT ret = 0;
7807
7808 assert (head);
7809
7810 ret = seg_present (name);
7811 if (!ret)
7812 {
7813 ret = subseg_new (name, (subsegT) 0);
7814 add_seg_list (head, ret);
7815 bfd_set_section_flags (stdoutput, ret, SEC_HAS_CONTENTS |
7816 SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_CODE);
7817 bfd_set_section_alignment (stdoutput, ret, 2);
7818 }
7819
7820 return ret;
7821}
7822
7823
7824/* Return a segment of a given name if it is present. */
7825
7826static segT
7827seg_present (name)
7828 const char *name;
7829{
7830 segT seg;
7831 seg = stdoutput->sections;
7832
7833 while (seg)
7834 {
7835 if (!strcmp (segment_name (seg), name))
7836 return seg;
7837 seg = seg->next;
7838 }
7839
7840 return 0;
7841}
7842
7843
7844/* Add a segment to a segment list. */
7845
7846static void
7847add_seg_list (head, seg)
7848 seg_list *head;
7849 segT seg;
7850{
7851 seg_list *n;
7852 n = (seg_list *) xmalloc (sizeof (seg_list));
7853 assert (n);
7854
7855 n->seg = seg;
7856 n->next = head->next;
7857 head->next = n;
7858}
7859
7860\f
7861/* Set up Property Tables after Relaxation. */
7862
7863#define XTENSA_INSN_SEC_NAME ".xt.insn"
7864#define XTENSA_LIT_SEC_NAME ".xt.lit"
7865
7866void
7867xtensa_post_relax_hook ()
7868{
7869 xtensa_move_seg_list_to_beginning (literal_head);
7870 xtensa_move_seg_list_to_beginning (init_literal_head);
7871 xtensa_move_seg_list_to_beginning (fini_literal_head);
7872
7873 xtensa_create_property_segments (get_frag_is_insn,
7874 XTENSA_INSN_SEC_NAME,
7875 xt_literal_sec);
7876 if (use_literal_section)
7877 xtensa_create_property_segments (get_frag_is_literal,
7878 XTENSA_LIT_SEC_NAME,
7879 xt_insn_sec);
7880}
7881
7882
7883static bfd_boolean
7884get_frag_is_literal (fragP)
7885 const fragS *fragP;
7886{
7887 assert (fragP != NULL);
7888 return (fragP->tc_frag_data.is_literal);
7889}
7890
7891
7892static bfd_boolean
7893get_frag_is_insn (fragP)
7894 const fragS *fragP;
7895{
7896 assert (fragP != NULL);
7897 return (fragP->tc_frag_data.is_insn);
7898}
7899
7900
7901static void
7902xtensa_create_property_segments (property_function, section_name_base,
7903 sec_type)
7904 frag_predicate property_function;
7905 const char * section_name_base;
7906 xt_section_type sec_type;
7907{
7908 segT *seclist;
7909
7910 /* Walk over all of the current segments.
7911 Walk over each fragment
7912 For each fragment that has instructions
7913 Build an instruction record (append where possible). */
7914
7915 for (seclist = &stdoutput->sections;
7916 seclist && *seclist;
7917 seclist = &(*seclist)->next)
7918 {
7919 segT sec = *seclist;
7920 if (section_has_property (sec, property_function))
7921 {
b614a702
BW		 7922 char *property_section_name =
7923 xtensa_get_property_section_name (sec, section_name_base);
e0001a05
NC		 7924 segT insn_sec = retrieve_xtensa_section (property_section_name);
7925 segment_info_type *xt_seg_info = retrieve_segment_info (insn_sec);
b614a702 7926 xtensa_block_info **xt_blocks =
e0001a05
NC		 7927 &xt_seg_info->tc_segment_info_data.blocks[sec_type];
7928 /* Walk over all of the frchains here and add new sections. */
7929 add_xt_block_frags (sec, insn_sec, xt_blocks, property_function);
7930 }
7931 }
7932
7933 /* Now we fill them out.... */
7934
7935 for (seclist = &stdoutput->sections;
7936 seclist && *seclist;
7937 seclist = &(*seclist)->next)
7938 {
7939 segment_info_type *seginfo;
7940 xtensa_block_info *block;
7941 segT sec = *seclist;
7942 seginfo = seg_info (sec);
7943 block = seginfo->tc_segment_info_data.blocks[sec_type];
7944
7945 if (block)
7946 {
7947 xtensa_block_info *cur_block;
7948 /* This is a section with some data. */
7949 size_t num_recs = 0;
7950 size_t rec_size;
7951
7952 for (cur_block = block; cur_block; cur_block = cur_block->next)
7953 num_recs++;
7954
7955 rec_size = num_recs * 8;
7956 bfd_set_section_size (stdoutput, sec, rec_size);
7957
7958 /* In order to make this work with the assembler, we have to
7959 build some frags and then build the "fixups" for it. It
7960 would be easier to just set the contents then set the
7961 arlents. */
7962
7963 if (num_recs)
7964 {
7965 /* Allocate a fragment and leak it. */
7966 fragS *fragP;
7967 size_t frag_size;
7968 fixS *fixes;
7969 frchainS *frchainP;
7970 size_t i;
7971 char *frag_data;
7972
7973 frag_size = sizeof (fragS) + rec_size;
7974 fragP = (fragS *) xmalloc (frag_size);
7975
7976 memset (fragP, 0, frag_size);
7977 fragP->fr_address = 0;
7978 fragP->fr_next = NULL;
7979 fragP->fr_fix = rec_size;
7980 fragP->fr_var = 0;
7981 fragP->fr_type = rs_fill;
7982 /* the rest are zeros */
7983
7984 frchainP = seginfo->frchainP;
7985 frchainP->frch_root = fragP;
7986 frchainP->frch_last = fragP;
7987
7988 fixes = (fixS *) xmalloc (sizeof (fixS) * num_recs);
7989 memset (fixes, 0, sizeof (fixS) * num_recs);
7990
7991 seginfo->fix_root = fixes;
7992 seginfo->fix_tail = &fixes[num_recs - 1];
7993 cur_block = block;
7994 frag_data = &fragP->fr_literal[0];
7995 for (i = 0; i < num_recs; i++)
7996 {
7997 fixS *fix = &fixes[i];
7998 assert (cur_block);
7999
8000 /* Write the fixup. */
8001 if (i != num_recs - 1)
8002 fix->fx_next = &fixes[i + 1];
8003 else
8004 fix->fx_next = NULL;
8005 fix->fx_size = 4;
8006 fix->fx_done = 0;
8007 fix->fx_frag = fragP;
8008 fix->fx_where = i * 8;
8009 fix->fx_addsy = section_symbol (cur_block->sec);
8010 fix->fx_offset = cur_block->offset;
8011 fix->fx_r_type = BFD_RELOC_32;
8012 fix->fx_file = "Internal Assembly";
8013 fix->fx_line = 0;
8014
8015 /* Write the length. */
8016 md_number_to_chars (&frag_data[4 + 8 * i],
8017 cur_block->size, 4);
8018 cur_block = cur_block->next;
8019 }
8020 }
8021 }
8022 }
8023}
8024
8025
8026segment_info_type *
8027retrieve_segment_info (seg)
8028 segT seg;
8029{
8030 segment_info_type *seginfo;
8031 seginfo = (segment_info_type *) bfd_get_section_userdata (stdoutput, seg);
8032 if (!seginfo)
8033 {
8034 frchainS *frchainP;
8035
8036 seginfo = (segment_info_type *) xmalloc (sizeof (*seginfo));
8037 memset ((PTR) seginfo, 0, sizeof (*seginfo));
8038 seginfo->fix_root = NULL;
8039 seginfo->fix_tail = NULL;
8040 seginfo->bfd_section = seg;
8041 seginfo->sym = 0;
8042 /* We will not be dealing with these, only our special ones. */
8043#if 0
8044 if (seg == bfd_abs_section_ptr)
8045 abs_seg_info = seginfo;
8046 else if (seg == bfd_und_section_ptr)
8047 und_seg_info = seginfo;
8048 else
8049#endif
8050 bfd_set_section_userdata (stdoutput, seg, (PTR) seginfo);
8051#if 0
8052 seg_fix_rootP = &segment_info[seg].fix_root;
8053 seg_fix_tailP = &segment_info[seg].fix_tail;
8054#endif
8055
8056 frchainP = (frchainS *) xmalloc (sizeof (frchainS));
8057 frchainP->frch_root = NULL;
8058 frchainP->frch_last = NULL;
8059 frchainP->frch_next = NULL;
8060 frchainP->frch_seg = seg;
8061 frchainP->frch_subseg = 0;
8062 frchainP->fix_root = NULL;
8063 frchainP->fix_tail = NULL;
8064 /* Do not init the objstack. */
8065 /* obstack_begin (&frchainP->frch_obstack, chunksize); */
8066 /* frchainP->frch_frag_now = fragP; */
8067 frchainP->frch_frag_now = NULL;
8068
8069 seginfo->frchainP = frchainP;
8070 }
8071
8072 return seginfo;
8073}
8074
8075
8076segT
8077retrieve_xtensa_section (sec_name)
8078 char *sec_name;
8079{
8080 bfd *abfd = stdoutput;
8081 flagword flags, out_flags, link_once_flags;
8082 segT s;
8083
8084 flags = bfd_get_section_flags (abfd, now_seg);
8085 link_once_flags = (flags & SEC_LINK_ONCE);
8086 if (link_once_flags)
8087 link_once_flags |= (flags & SEC_LINK_DUPLICATES);
8088 out_flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY | link_once_flags);
8089
8090 s = bfd_make_section_old_way (abfd, sec_name);
8091 if (s == NULL)
8092 as_bad (_("could not create section %s"), sec_name);
8093 if (!bfd_set_section_flags (abfd, s, out_flags))
8094 as_bad (_("invalid flag combination on section %s"), sec_name);
8095
8096 return s;
8097}
8098
8099
8100bfd_boolean
8101section_has_property (sec, property_function)
8102 segT sec;
8103 frag_predicate property_function;
8104{
8105 segment_info_type *seginfo = seg_info (sec);
8106 fragS *fragP;
8107
8108 if (seginfo && seginfo->frchainP)
8109 {
8110 for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
8111 {
8112 if (property_function (fragP)
8113 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8114 return TRUE;
8115 }
8116 }
8117 return FALSE;
8118}
8119
8120
8121/* Two types of block sections exist right now: literal and insns. */
8122
8123void
8124add_xt_block_frags (sec, xt_block_sec, xt_block, property_function)
8125 segT sec;
8126 segT xt_block_sec;
8127 xtensa_block_info **xt_block;
8128 frag_predicate property_function;
8129{
8130 segment_info_type *seg_info;
8131 segment_info_type *xt_seg_info;
8132 bfd_vma seg_offset;
8133 fragS *fragP;
8134
8135 xt_seg_info = retrieve_segment_info (xt_block_sec);
8136 seg_info = retrieve_segment_info (sec);
8137
8138 /* Build it if needed. */
8139 while (*xt_block != NULL)
8140 xt_block = &(*xt_block)->next;
8141 /* We are either at NULL at the beginning or at the end. */
8142
8143 /* Walk through the frags. */
8144 seg_offset = 0;
8145
8146 if (seg_info->frchainP)
8147 {
8148 for (fragP = seg_info->frchainP->frch_root;
8149 fragP;
8150 fragP = fragP->fr_next)
8151 {
8152 if (property_function (fragP)
8153 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8154 {
8155 if (*xt_block != NULL)
8156 {
8157 if ((*xt_block)->offset + (*xt_block)->size
8158 == fragP->fr_address)
8159 (*xt_block)->size += fragP->fr_fix;
8160 else
8161 xt_block = &((*xt_block)->next);
8162 }
8163 if (*xt_block == NULL)
8164 {
8165 xtensa_block_info *new_block = (xtensa_block_info *)
8166 xmalloc (sizeof (xtensa_block_info));
8167 new_block->sec = sec;
8168 new_block->offset = fragP->fr_address;
8169 new_block->size = fragP->fr_fix;
8170 new_block->next = NULL;
8171 *xt_block = new_block;
8172 }
8173 }
8174 }
8175 }
8176}
8177
8178\f
8179/* Instruction Stack Functions (from "xtensa-istack.h"). */
8180
8181void
8182istack_init (stack)
8183 IStack *stack;
8184{
8185 memset (stack, 0, sizeof (IStack));
8186 stack->ninsn = 0;
8187}
8188
8189
8190bfd_boolean
8191istack_empty (stack)
8192 IStack *stack;
8193{
8194 return (stack->ninsn == 0);
8195}
8196
8197
8198bfd_boolean
8199istack_full (stack)
8200 IStack *stack;
8201{
8202 return (stack->ninsn == MAX_ISTACK);
8203}
8204
8205
8206/* Return a pointer to the top IStack entry.
8207 It is an error to call this if istack_empty () is true. */
8208
8209TInsn *
8210istack_top (stack)
8211 IStack *stack;
8212{
8213 int rec = stack->ninsn - 1;
8214 assert (!istack_empty (stack));
8215 return &stack->insn[rec];
8216}
8217
8218
8219/* Add a new TInsn to an IStack.
8220 It is an error to call this if istack_full () is true. */
8221
8222void
8223istack_push (stack, insn)
8224 IStack *stack;
8225 TInsn *insn;
8226{
8227 int rec = stack->ninsn;
8228 assert (!istack_full (stack));
8229 tinsn_copy (&stack->insn[rec], insn);
8230 stack->ninsn++;
8231}
8232
8233
8234/* Clear space for the next TInsn on the IStack and return a pointer
8235 to it. It is an error to call this if istack_full () is true. */
8236
8237TInsn *
8238istack_push_space (stack)
8239 IStack *stack;
8240{
8241 int rec = stack->ninsn;
8242 TInsn *insn;
8243 assert (!istack_full (stack));
8244 insn = &stack->insn[rec];
8245 memset (insn, 0, sizeof (TInsn));
8246 stack->ninsn++;
8247 return insn;
8248}
8249
8250
8251/* Remove the last pushed instruction. It is an error to call this if
8252 istack_empty () returns true. */
8253
8254void
8255istack_pop (stack)
8256 IStack *stack;
8257{
8258 int rec = stack->ninsn - 1;
8259 assert (!istack_empty (stack));
8260 stack->ninsn--;
8261 memset (&stack->insn[rec], 0, sizeof (TInsn));
8262}
8263
8264\f
8265/* TInsn functions. */
8266
8267void
8268tinsn_init (dst)
8269 TInsn *dst;
8270{
8271 memset (dst, 0, sizeof (TInsn));
8272}
8273
8274
8275void
8276tinsn_copy (dst, src)
8277 TInsn *dst;
8278 const TInsn *src;
8279{
8280 tinsn_init (dst);
8281 memcpy (dst, src, sizeof (TInsn));
8282}
8283
8284
8285/* Get the ``num''th token of the TInsn.
8286 It is illegal to call this if num > insn->ntoks. */
8287
8288expressionS *
8289tinsn_get_tok (insn, num)
8290 TInsn *insn;
8291 int num;
8292{
8293 assert (num < insn->ntok);
8294 return &insn->tok[num];
8295}
8296
8297
8298/* Return true if ANY of the operands in the insn are symbolic. */
8299
8300static bfd_boolean
8301tinsn_has_symbolic_operands (insn)
8302 const TInsn *insn;
8303{
8304 int i;
8305 int n = insn->ntok;
8306
8307 assert (insn->insn_type == ITYPE_INSN);
8308
8309 for (i = 0; i < n; ++i)
8310 {
8311 switch (insn->tok[i].X_op)
8312 {
8313 case O_register:
8314 case O_constant:
8315 break;
8316 default:
8317 return TRUE;
8318 }
8319 }
8320 return FALSE;
8321}
8322
8323
8324bfd_boolean
8325tinsn_has_invalid_symbolic_operands (insn)
8326 const TInsn *insn;
8327{
8328 int i;
8329 int n = insn->ntok;
8330
8331 assert (insn->insn_type == ITYPE_INSN);
8332
8333 for (i = 0; i < n; ++i)
8334 {
8335 switch (insn->tok[i].X_op)
8336 {
8337 case O_register:
8338 case O_constant:
8339 break;
8340 default:
8341 if (i == get_relaxable_immed (insn->opcode))
8342 break;
8343 as_bad (_("invalid symbolic operand %d on '%s'"),
8344 i, xtensa_opcode_name (xtensa_default_isa, insn->opcode));
8345 return TRUE;
8346 }
8347 }
8348 return FALSE;
8349}
8350
8351
8352/* For assembly code with complex expressions (e.g. subtraction),
8353 we have to build them in the literal pool so that
8354 their results are calculated correctly after relaxation.
8355 The relaxation only handles expressions that
8356 boil down to SYMBOL + OFFSET. */
8357
8358static bfd_boolean
8359tinsn_has_complex_operands (insn)
8360 const TInsn *insn;
8361{
8362 int i;
8363 int n = insn->ntok;
8364 assert (insn->insn_type == ITYPE_INSN);
8365 for (i = 0; i < n; ++i)
8366 {
8367 switch (insn->tok[i].X_op)
8368 {
8369 case O_register:
8370 case O_constant:
8371 case O_symbol:
8372 break;
8373 default:
8374 return TRUE;
8375 }
8376 }
8377 return FALSE;
8378}
8379
8380
8381/* Convert the constant operands in the t_insn to insnbuf.
8382 Return true if there is a symbol in the immediate field.
8383
8384 Before this is called,
8385 1) the number of operands are correct
8386 2) the t_insn is a ITYPE_INSN
8387 3) ONLY the relaxable_ is built
8388 4) All operands are O_constant, O_symbol. All constants fit
8389 The return value tells whether there are any remaining O_symbols. */
8390
8391static bfd_boolean
8392tinsn_to_insnbuf (t_insn, insnbuf)
8393 TInsn *t_insn;
8394 xtensa_insnbuf insnbuf;
8395{
8396 xtensa_isa isa = xtensa_default_isa;
8397 xtensa_opcode opcode = t_insn->opcode;
8398 bfd_boolean has_fixup = FALSE;
8399 int noperands = xtensa_num_operands (isa, opcode);
8400 int i;
8401 uint32 opnd_value;
8402 char *file_name;
8403 int line;
8404
8405 assert (t_insn->insn_type == ITYPE_INSN);
8406 if (noperands != t_insn->ntok)
8407 as_fatal (_("operand number mismatch"));
8408
8409 xtensa_encode_insn (isa, opcode, insnbuf);
8410
8411 for (i = 0; i < noperands; ++i)
8412 {
8413 expressionS *expr = &t_insn->tok[i];
8414 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
8415 switch (expr->X_op)
8416 {
8417 case O_register:
8418 /* The register number has already been checked in
8419 expression_maybe_register, so we don't need to check here. */
8420 opnd_value = expr->X_add_number;
8421 (void) xtensa_operand_encode (operand, &opnd_value);
8422 xtensa_operand_set_field (operand, insnbuf, opnd_value);
8423 break;
8424
8425 case O_constant:
8426 as_where (&file_name, &line);
8427 /* It is a constant and we called this function,
8428 then we have to try to fit it. */
8429 xtensa_insnbuf_set_operand (insnbuf, opcode, operand,
8430 expr->X_add_number, file_name, line);
8431 break;
8432
8433 case O_symbol:
8434 default:
8435 has_fixup = TRUE;
8436 break;
8437 }
8438 }
8439 return has_fixup;
8440}
8441
8442
8443/* Check the instruction arguments. Return true on failure. */
8444
8445bfd_boolean
8446tinsn_check_arguments (insn)
8447 const TInsn *insn;
8448{
8449 xtensa_isa isa = xtensa_default_isa;
8450 xtensa_opcode opcode = insn->opcode;
8451
8452 if (opcode == XTENSA_UNDEFINED)
8453 {
8454 as_bad (_("invalid opcode"));
8455 return TRUE;
8456 }
8457
8458 if (xtensa_num_operands (isa, opcode) > insn->ntok)
8459 {
8460 as_bad (_("too few operands"));
8461 return TRUE;
8462 }
8463
8464 if (xtensa_num_operands (isa, opcode) < insn->ntok)
8465 {
8466 as_bad (_("too many operands"));
8467 return TRUE;
8468 }
8469 return FALSE;
8470}
8471
8472
8473/* Load an instruction from its encoded form. */
8474
8475static void
8476tinsn_from_chars (t_insn, f)
8477 TInsn *t_insn;
8478 char *f;
8479{
8480 static xtensa_insnbuf insnbuf = NULL;
8481 int i;
8482 xtensa_opcode opcode;
8483 xtensa_isa isa = xtensa_default_isa;
8484
8485 if (!insnbuf)
8486 insnbuf = xtensa_insnbuf_alloc (isa);
8487
8488 xtensa_insnbuf_from_chars (isa, insnbuf, f);
8489 opcode = xtensa_decode_insn (isa, insnbuf);
8490
8491 /* Find the immed. */
8492 tinsn_init (t_insn);
8493 t_insn->insn_type = ITYPE_INSN;
8494 t_insn->is_specific_opcode = FALSE; /* Must not be specific. */
8495 t_insn->opcode = opcode;
8496 t_insn->ntok = xtensa_num_operands (isa, opcode);
8497 for (i = 0; i < t_insn->ntok; i++)
8498 {
8499 set_expr_const (&t_insn->tok[i],
8500 xtensa_insnbuf_get_operand (insnbuf, opcode, i));
8501 }
8502}
8503
8504
8505/* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
8506
8507static void
8508tinsn_immed_from_frag (t_insn, fragP)
8509 TInsn *t_insn;
8510 fragS *fragP;
8511{
8512 xtensa_opcode opcode = t_insn->opcode;
8513 int opnum;
8514
8515 if (fragP->fr_symbol)
8516 {
8517 opnum = get_relaxable_immed (opcode);
8518 set_expr_symbol_offset (&t_insn->tok[opnum],
8519 fragP->fr_symbol, fragP->fr_offset);
8520 }
8521}
8522
8523
8524static int
8525get_num_stack_text_bytes (istack)
8526 IStack *istack;
8527{
8528 int i;
8529 int text_bytes = 0;
8530
8531 for (i = 0; i < istack->ninsn; i++)
8532 {
8533 TInsn *t_insn = &istack->insn[i];
8534 if (t_insn->insn_type == ITYPE_INSN)
8535 text_bytes += xg_get_insn_size (t_insn);
8536 }
8537 return text_bytes;
8538}
8539
8540
8541static int
8542get_num_stack_literal_bytes (istack)
8543 IStack *istack;
8544{
8545 int i;
8546 int lit_bytes = 0;
8547
8548 for (i = 0; i < istack->ninsn; i++)
8549 {
8550 TInsn *t_insn = &istack->insn[i];
8551
8552 if (t_insn->insn_type == ITYPE_LITERAL && t_insn->ntok == 1)
8553 lit_bytes += 4;
8554 }
8555 return lit_bytes;
8556}
8557
8558\f
8559/* Expression utilities. */
8560
8561/* Return true if the expression is an integer constant. */
8562
8563bfd_boolean
8564expr_is_const (s)
8565 const expressionS *s;
8566{
8567 return (s->X_op == O_constant);
8568}
8569
8570
8571/* Get the expression constant.
8572 Calling this is illegal if expr_is_const () returns true. */
8573
8574offsetT
8575get_expr_const (s)
8576 const expressionS *s;
8577{
8578 assert (expr_is_const (s));
8579 return s->X_add_number;
8580}
8581
8582
8583/* Set the expression to a constant value. */
8584
8585void
8586set_expr_const (s, val)
8587 expressionS *s;
8588 offsetT val;
8589{
8590 s->X_op = O_constant;
8591 s->X_add_number = val;
8592 s->X_add_symbol = NULL;
8593 s->X_op_symbol = NULL;
8594}
8595
8596
8597/* Set the expression to a symbol + constant offset. */
8598
8599void
8600set_expr_symbol_offset (s, sym, offset)
8601 expressionS *s;
8602 symbolS *sym;
8603 offsetT offset;
8604{
8605 s->X_op = O_symbol;
8606 s->X_add_symbol = sym;
8607 s->X_op_symbol = NULL; /* unused */
8608 s->X_add_number = offset;
8609}
8610
8611
8612bfd_boolean
8613expr_is_equal (s1, s2)
8614 expressionS *s1;
8615 expressionS *s2;
8616{
8617 if (s1->X_op != s2->X_op)
8618 return FALSE;
8619 if (s1->X_add_symbol != s2->X_add_symbol)
8620 return FALSE;
8621 if (s1->X_op_symbol != s2->X_op_symbol)
8622 return FALSE;
8623 if (s1->X_add_number != s2->X_add_number)
8624 return FALSE;
8625 return TRUE;
8626}
8627
8628
8629static void
8630copy_expr (dst, src)
8631 expressionS *dst;
8632 const expressionS *src;
8633{
8634 memcpy (dst, src, sizeof (expressionS));
8635}
8636
8637\f
8638/* Support for Tensilica's "--rename-section" option. */
8639
8640#ifdef XTENSA_SECTION_RENAME
8641
8642struct rename_section_struct
8643{
8644 char *old_name;
8645 char *new_name;
8646 struct rename_section_struct *next;
8647};
8648
8649static struct rename_section_struct *section_rename;
8650
8651
8652/* Parse the string oldname=new_name:oldname2=new_name2
8653 and call add_section_rename. */
8654
8655void
8656build_section_rename (arg)
8657 const char *arg;
8658{
8659 char *this_arg = NULL;
8660 char *next_arg = NULL;
8661
8662 for (this_arg = strdup (arg); this_arg != NULL; this_arg = next_arg)
8663 {
8664 if (this_arg)
8665 {
8666 next_arg = strchr (this_arg, ':');
8667 if (next_arg)
8668 {
8669 *next_arg = '\0';
8670 next_arg++;
8671 }
8672 }
8673 {
8674 char *old_name = this_arg;
8675 char *new_name = strchr (this_arg, '=');
8676
8677 if (*old_name == '\0')
8678 {
8679 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
8680 continue;
8681 }
8682 if (!new_name || new_name[1] == '\0')
8683 {
8684 as_warn (_("ignoring invalid '-rename-section' "
8685 "specification: '%s'"), old_name);
8686 continue;
8687 }
8688 *new_name = '\0';
8689 new_name++;
8690 add_section_rename (old_name, new_name);
8691 }
8692 }
8693}
8694
8695
8696static void
8697add_section_rename (old_name, new_name)
8698 char *old_name;
8699 char *new_name;
8700{
8701 struct rename_section_struct *r = section_rename;
8702
8703 /* Check for invalid section renaming. */
8704 for (r = section_rename; r != NULL; r = r->next)
8705 {
8706 if (strcmp (r->old_name, old_name) == 0)
8707 as_bad (_("section %s renamed multiple times"), old_name);
8708 if (strcmp (r->new_name, new_name) == 0)
8709 as_bad (_("multiple sections remapped to output section %s"),
8710 new_name);
8711 }
8712
8713 /* Now add it. */
8714 r = (struct rename_section_struct *)
8715 xmalloc (sizeof (struct rename_section_struct));
8716 r->old_name = strdup (old_name);
8717 r->new_name = strdup (new_name);
8718 r->next = section_rename;
8719 section_rename = r;
8720}
8721
8722
8723const char *
8724xtensa_section_rename (name)
8725 const char *name;
8726{
8727 struct rename_section_struct *r = section_rename;
8728
8729 for (r = section_rename; r != NULL; r = r->next)
8730 if (strcmp (r->old_name, name) == 0)
8731 return r->new_name;
8732
8733 return name;
8734}
8735
8736#endif /* XTENSA_SECTION_RENAME */
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