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ed9a39eb | 1 | /* GNU/Linux on ARM native support. |
34e8f22d | 2 | Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
ed9a39eb JM |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "defs.h" | |
22 | #include "inferior.h" | |
23 | #include "gdbcore.h" | |
24 | #include "gdb_string.h" | |
4e052eda | 25 | #include "regcache.h" |
ed9a39eb | 26 | |
aeb98c60 RE |
27 | #include "arm-tdep.h" |
28 | ||
ed9a39eb JM |
29 | #include <sys/user.h> |
30 | #include <sys/ptrace.h> | |
31 | #include <sys/utsname.h> | |
41c49b06 | 32 | #include <sys/procfs.h> |
ed9a39eb | 33 | |
c60c0f5f MS |
34 | /* Prototypes for supply_gregset etc. */ |
35 | #include "gregset.h" | |
36 | ||
ed9a39eb JM |
37 | extern int arm_apcs_32; |
38 | ||
39 | #define typeNone 0x00 | |
40 | #define typeSingle 0x01 | |
41 | #define typeDouble 0x02 | |
42 | #define typeExtended 0x03 | |
43 | #define FPWORDS 28 | |
34e8f22d | 44 | #define ARM_CPSR_REGNUM 16 |
ed9a39eb JM |
45 | |
46 | typedef union tagFPREG | |
47 | { | |
48 | unsigned int fSingle; | |
49 | unsigned int fDouble[2]; | |
50 | unsigned int fExtended[3]; | |
51 | } | |
52 | FPREG; | |
53 | ||
54 | typedef struct tagFPA11 | |
55 | { | |
56 | FPREG fpreg[8]; /* 8 floating point registers */ | |
57 | unsigned int fpsr; /* floating point status register */ | |
58 | unsigned int fpcr; /* floating point control register */ | |
59 | unsigned char fType[8]; /* type of floating point value held in | |
60 | floating point registers. */ | |
61 | int initflag; /* NWFPE initialization flag. */ | |
62 | } | |
63 | FPA11; | |
64 | ||
65 | /* The following variables are used to determine the version of the | |
fdf39c9a | 66 | underlying GNU/Linux operating system. Examples: |
ed9a39eb | 67 | |
fdf39c9a | 68 | GNU/Linux 2.0.35 GNU/Linux 2.2.12 |
ed9a39eb JM |
69 | os_version = 0x00020023 os_version = 0x0002020c |
70 | os_major = 2 os_major = 2 | |
71 | os_minor = 0 os_minor = 2 | |
72 | os_release = 35 os_release = 12 | |
73 | ||
74 | Note: os_version = (os_major << 16) | (os_minor << 8) | os_release | |
75 | ||
76 | These are initialized using get_linux_version() from | |
77 | _initialize_arm_linux_nat(). */ | |
78 | ||
79 | static unsigned int os_version, os_major, os_minor, os_release; | |
80 | ||
fdf39c9a | 81 | /* On GNU/Linux, threads are implemented as pseudo-processes, in which |
41c49b06 | 82 | case we may be tracing more than one process at a time. In that |
39f77062 | 83 | case, inferior_ptid will contain the main process ID and the |
fdf39c9a RE |
84 | individual thread (process) ID. get_thread_id () is used to get |
85 | the thread id if it's available, and the process id otherwise. */ | |
41c49b06 SB |
86 | |
87 | int | |
39f77062 | 88 | get_thread_id (ptid_t ptid) |
41c49b06 | 89 | { |
39f77062 KB |
90 | int tid = TIDGET (ptid); |
91 | if (0 == tid) | |
92 | tid = PIDGET (ptid); | |
41c49b06 SB |
93 | return tid; |
94 | } | |
39f77062 | 95 | #define GET_THREAD_ID(PTID) get_thread_id ((PTID)); |
41c49b06 | 96 | |
ed9a39eb | 97 | static void |
56624b0a | 98 | fetch_nwfpe_single (unsigned int fn, FPA11 * fpa11) |
ed9a39eb JM |
99 | { |
100 | unsigned int mem[3]; | |
101 | ||
102 | mem[0] = fpa11->fpreg[fn].fSingle; | |
103 | mem[1] = 0; | |
104 | mem[2] = 0; | |
23a6d369 | 105 | regcache_raw_supply (current_regcache, ARM_F0_REGNUM + fn, (char *) &mem[0]); |
ed9a39eb JM |
106 | } |
107 | ||
108 | static void | |
56624b0a | 109 | fetch_nwfpe_double (unsigned int fn, FPA11 * fpa11) |
ed9a39eb JM |
110 | { |
111 | unsigned int mem[3]; | |
112 | ||
113 | mem[0] = fpa11->fpreg[fn].fDouble[1]; | |
114 | mem[1] = fpa11->fpreg[fn].fDouble[0]; | |
115 | mem[2] = 0; | |
23a6d369 | 116 | regcache_raw_supply (current_regcache, ARM_F0_REGNUM + fn, (char *) &mem[0]); |
ed9a39eb JM |
117 | } |
118 | ||
119 | static void | |
56624b0a | 120 | fetch_nwfpe_none (unsigned int fn) |
ed9a39eb JM |
121 | { |
122 | unsigned int mem[3] = | |
123 | {0, 0, 0}; | |
124 | ||
23a6d369 | 125 | regcache_raw_supply (current_regcache, ARM_F0_REGNUM + fn, (char *) &mem[0]); |
ed9a39eb JM |
126 | } |
127 | ||
128 | static void | |
56624b0a | 129 | fetch_nwfpe_extended (unsigned int fn, FPA11 * fpa11) |
ed9a39eb JM |
130 | { |
131 | unsigned int mem[3]; | |
132 | ||
133 | mem[0] = fpa11->fpreg[fn].fExtended[0]; /* sign & exponent */ | |
134 | mem[1] = fpa11->fpreg[fn].fExtended[2]; /* ls bits */ | |
135 | mem[2] = fpa11->fpreg[fn].fExtended[1]; /* ms bits */ | |
23a6d369 | 136 | regcache_raw_supply (current_regcache, ARM_F0_REGNUM + fn, (char *) &mem[0]); |
ed9a39eb JM |
137 | } |
138 | ||
41c49b06 SB |
139 | static void |
140 | fetch_nwfpe_register (int regno, FPA11 * fpa11) | |
141 | { | |
34e8f22d | 142 | int fn = regno - ARM_F0_REGNUM; |
41c49b06 SB |
143 | |
144 | switch (fpa11->fType[fn]) | |
145 | { | |
146 | case typeSingle: | |
147 | fetch_nwfpe_single (fn, fpa11); | |
148 | break; | |
149 | ||
150 | case typeDouble: | |
151 | fetch_nwfpe_double (fn, fpa11); | |
152 | break; | |
153 | ||
154 | case typeExtended: | |
155 | fetch_nwfpe_extended (fn, fpa11); | |
156 | break; | |
157 | ||
158 | default: | |
159 | fetch_nwfpe_none (fn); | |
160 | } | |
161 | } | |
162 | ||
ed9a39eb | 163 | static void |
85ae890c | 164 | store_nwfpe_single (unsigned int fn, FPA11 *fpa11) |
ed9a39eb JM |
165 | { |
166 | unsigned int mem[3]; | |
167 | ||
822c9732 AC |
168 | regcache_raw_collect (current_regcache, ARM_F0_REGNUM + fn, |
169 | (char *) &mem[0]); | |
ed9a39eb JM |
170 | fpa11->fpreg[fn].fSingle = mem[0]; |
171 | fpa11->fType[fn] = typeSingle; | |
172 | } | |
173 | ||
174 | static void | |
85ae890c | 175 | store_nwfpe_double (unsigned int fn, FPA11 *fpa11) |
ed9a39eb JM |
176 | { |
177 | unsigned int mem[3]; | |
178 | ||
822c9732 AC |
179 | regcache_raw_collect (current_regcache, ARM_F0_REGNUM + fn, |
180 | (char *) &mem[0]); | |
ed9a39eb JM |
181 | fpa11->fpreg[fn].fDouble[1] = mem[0]; |
182 | fpa11->fpreg[fn].fDouble[0] = mem[1]; | |
183 | fpa11->fType[fn] = typeDouble; | |
184 | } | |
185 | ||
186 | void | |
85ae890c | 187 | store_nwfpe_extended (unsigned int fn, FPA11 *fpa11) |
ed9a39eb JM |
188 | { |
189 | unsigned int mem[3]; | |
190 | ||
822c9732 AC |
191 | regcache_raw_collect (current_regcache, ARM_F0_REGNUM + fn, |
192 | (char *) &mem[0]); | |
ed9a39eb JM |
193 | fpa11->fpreg[fn].fExtended[0] = mem[0]; /* sign & exponent */ |
194 | fpa11->fpreg[fn].fExtended[2] = mem[1]; /* ls bits */ | |
195 | fpa11->fpreg[fn].fExtended[1] = mem[2]; /* ms bits */ | |
196 | fpa11->fType[fn] = typeDouble; | |
197 | } | |
198 | ||
41c49b06 SB |
199 | void |
200 | store_nwfpe_register (int regno, FPA11 * fpa11) | |
201 | { | |
c6b92abd | 202 | if (register_cached (regno)) |
41c49b06 | 203 | { |
34e8f22d | 204 | unsigned int fn = regno - ARM_F0_REGNUM; |
41c49b06 SB |
205 | switch (fpa11->fType[fn]) |
206 | { | |
207 | case typeSingle: | |
208 | store_nwfpe_single (fn, fpa11); | |
209 | break; | |
210 | ||
211 | case typeDouble: | |
212 | store_nwfpe_double (fn, fpa11); | |
213 | break; | |
214 | ||
215 | case typeExtended: | |
216 | store_nwfpe_extended (fn, fpa11); | |
217 | break; | |
218 | } | |
219 | } | |
220 | } | |
221 | ||
222 | ||
223 | /* Get the value of a particular register from the floating point | |
c6b92abd | 224 | state of the process and store it into regcache. */ |
41c49b06 SB |
225 | |
226 | static void | |
227 | fetch_fpregister (int regno) | |
228 | { | |
229 | int ret, tid; | |
230 | FPA11 fp; | |
231 | ||
232 | /* Get the thread id for the ptrace call. */ | |
39f77062 | 233 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
234 | |
235 | /* Read the floating point state. */ | |
236 | ret = ptrace (PT_GETFPREGS, tid, 0, &fp); | |
237 | if (ret < 0) | |
238 | { | |
edefbb7c | 239 | warning (_("Unable to fetch floating point register.")); |
41c49b06 SB |
240 | return; |
241 | } | |
242 | ||
243 | /* Fetch fpsr. */ | |
34e8f22d | 244 | if (ARM_FPS_REGNUM == regno) |
23a6d369 | 245 | regcache_raw_supply (current_regcache, ARM_FPS_REGNUM, (char *) &fp.fpsr); |
41c49b06 SB |
246 | |
247 | /* Fetch the floating point register. */ | |
34e8f22d | 248 | if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM) |
41c49b06 | 249 | { |
34e8f22d | 250 | int fn = regno - ARM_F0_REGNUM; |
41c49b06 SB |
251 | |
252 | switch (fp.fType[fn]) | |
253 | { | |
254 | case typeSingle: | |
255 | fetch_nwfpe_single (fn, &fp); | |
256 | break; | |
257 | ||
258 | case typeDouble: | |
259 | fetch_nwfpe_double (fn, &fp); | |
260 | break; | |
261 | ||
262 | case typeExtended: | |
263 | fetch_nwfpe_extended (fn, &fp); | |
264 | break; | |
265 | ||
266 | default: | |
267 | fetch_nwfpe_none (fn); | |
268 | } | |
269 | } | |
270 | } | |
271 | ||
272 | /* Get the whole floating point state of the process and store it | |
c6b92abd | 273 | into regcache. */ |
ed9a39eb JM |
274 | |
275 | static void | |
276 | fetch_fpregs (void) | |
277 | { | |
41c49b06 | 278 | int ret, regno, tid; |
ed9a39eb JM |
279 | FPA11 fp; |
280 | ||
41c49b06 | 281 | /* Get the thread id for the ptrace call. */ |
39f77062 | 282 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 | 283 | |
ed9a39eb | 284 | /* Read the floating point state. */ |
41c49b06 | 285 | ret = ptrace (PT_GETFPREGS, tid, 0, &fp); |
ed9a39eb JM |
286 | if (ret < 0) |
287 | { | |
edefbb7c | 288 | warning (_("Unable to fetch the floating point registers.")); |
ed9a39eb JM |
289 | return; |
290 | } | |
291 | ||
292 | /* Fetch fpsr. */ | |
23a6d369 | 293 | regcache_raw_supply (current_regcache, ARM_FPS_REGNUM, (char *) &fp.fpsr); |
ed9a39eb JM |
294 | |
295 | /* Fetch the floating point registers. */ | |
34e8f22d | 296 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
ed9a39eb | 297 | { |
34e8f22d | 298 | int fn = regno - ARM_F0_REGNUM; |
ed9a39eb JM |
299 | |
300 | switch (fp.fType[fn]) | |
301 | { | |
302 | case typeSingle: | |
56624b0a | 303 | fetch_nwfpe_single (fn, &fp); |
ed9a39eb JM |
304 | break; |
305 | ||
306 | case typeDouble: | |
56624b0a | 307 | fetch_nwfpe_double (fn, &fp); |
ed9a39eb JM |
308 | break; |
309 | ||
310 | case typeExtended: | |
56624b0a | 311 | fetch_nwfpe_extended (fn, &fp); |
ed9a39eb JM |
312 | break; |
313 | ||
314 | default: | |
56624b0a | 315 | fetch_nwfpe_none (fn); |
ed9a39eb JM |
316 | } |
317 | } | |
318 | } | |
319 | ||
41c49b06 | 320 | /* Save a particular register into the floating point state of the |
c6b92abd | 321 | process using the contents from regcache. */ |
41c49b06 SB |
322 | |
323 | static void | |
324 | store_fpregister (int regno) | |
325 | { | |
326 | int ret, tid; | |
327 | FPA11 fp; | |
328 | ||
329 | /* Get the thread id for the ptrace call. */ | |
39f77062 | 330 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
331 | |
332 | /* Read the floating point state. */ | |
333 | ret = ptrace (PT_GETFPREGS, tid, 0, &fp); | |
334 | if (ret < 0) | |
335 | { | |
edefbb7c | 336 | warning (_("Unable to fetch the floating point registers.")); |
41c49b06 SB |
337 | return; |
338 | } | |
339 | ||
340 | /* Store fpsr. */ | |
34e8f22d | 341 | if (ARM_FPS_REGNUM == regno && register_cached (ARM_FPS_REGNUM)) |
822c9732 | 342 | regcache_raw_collect (current_regcache, ARM_FPS_REGNUM, (char *) &fp.fpsr); |
41c49b06 SB |
343 | |
344 | /* Store the floating point register. */ | |
34e8f22d | 345 | if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM) |
41c49b06 SB |
346 | { |
347 | store_nwfpe_register (regno, &fp); | |
348 | } | |
349 | ||
350 | ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp); | |
351 | if (ret < 0) | |
352 | { | |
edefbb7c | 353 | warning (_("Unable to store floating point register.")); |
41c49b06 SB |
354 | return; |
355 | } | |
356 | } | |
357 | ||
ed9a39eb | 358 | /* Save the whole floating point state of the process using |
c6b92abd | 359 | the contents from regcache. */ |
ed9a39eb JM |
360 | |
361 | static void | |
362 | store_fpregs (void) | |
363 | { | |
41c49b06 | 364 | int ret, regno, tid; |
ed9a39eb JM |
365 | FPA11 fp; |
366 | ||
41c49b06 | 367 | /* Get the thread id for the ptrace call. */ |
39f77062 | 368 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
369 | |
370 | /* Read the floating point state. */ | |
371 | ret = ptrace (PT_GETFPREGS, tid, 0, &fp); | |
372 | if (ret < 0) | |
373 | { | |
edefbb7c | 374 | warning (_("Unable to fetch the floating point registers.")); |
41c49b06 SB |
375 | return; |
376 | } | |
377 | ||
ed9a39eb | 378 | /* Store fpsr. */ |
34e8f22d | 379 | if (register_cached (ARM_FPS_REGNUM)) |
822c9732 | 380 | regcache_raw_collect (current_regcache, ARM_FPS_REGNUM, (char *) &fp.fpsr); |
ed9a39eb JM |
381 | |
382 | /* Store the floating point registers. */ | |
34e8f22d | 383 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
ed9a39eb | 384 | { |
41c49b06 | 385 | fetch_nwfpe_register (regno, &fp); |
ed9a39eb JM |
386 | } |
387 | ||
41c49b06 | 388 | ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp); |
ed9a39eb JM |
389 | if (ret < 0) |
390 | { | |
edefbb7c | 391 | warning (_("Unable to store floating point registers.")); |
ed9a39eb JM |
392 | return; |
393 | } | |
394 | } | |
395 | ||
41c49b06 | 396 | /* Fetch a general register of the process and store into |
c6b92abd | 397 | regcache. */ |
41c49b06 SB |
398 | |
399 | static void | |
400 | fetch_register (int regno) | |
401 | { | |
402 | int ret, tid; | |
c2152441 | 403 | elf_gregset_t regs; |
41c49b06 SB |
404 | |
405 | /* Get the thread id for the ptrace call. */ | |
39f77062 | 406 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
407 | |
408 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); | |
409 | if (ret < 0) | |
410 | { | |
edefbb7c | 411 | warning (_("Unable to fetch general register.")); |
41c49b06 SB |
412 | return; |
413 | } | |
414 | ||
34e8f22d | 415 | if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM) |
23a6d369 | 416 | regcache_raw_supply (current_regcache, regno, (char *) ®s[regno]); |
41c49b06 | 417 | |
34e8f22d | 418 | if (ARM_PS_REGNUM == regno) |
41c49b06 SB |
419 | { |
420 | if (arm_apcs_32) | |
23a6d369 AC |
421 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
422 | (char *) ®s[ARM_CPSR_REGNUM]); | |
41c49b06 | 423 | else |
23a6d369 AC |
424 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
425 | (char *) ®s[ARM_PC_REGNUM]); | |
41c49b06 SB |
426 | } |
427 | ||
34e8f22d | 428 | if (ARM_PC_REGNUM == regno) |
41c49b06 | 429 | { |
34e8f22d | 430 | regs[ARM_PC_REGNUM] = ADDR_BITS_REMOVE (regs[ARM_PC_REGNUM]); |
23a6d369 AC |
431 | regcache_raw_supply (current_regcache, ARM_PC_REGNUM, |
432 | (char *) ®s[ARM_PC_REGNUM]); | |
41c49b06 SB |
433 | } |
434 | } | |
435 | ||
ed9a39eb | 436 | /* Fetch all general registers of the process and store into |
c6b92abd | 437 | regcache. */ |
ed9a39eb JM |
438 | |
439 | static void | |
440 | fetch_regs (void) | |
441 | { | |
41c49b06 | 442 | int ret, regno, tid; |
c2152441 | 443 | elf_gregset_t regs; |
ed9a39eb | 444 | |
41c49b06 | 445 | /* Get the thread id for the ptrace call. */ |
39f77062 | 446 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
447 | |
448 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); | |
ed9a39eb JM |
449 | if (ret < 0) |
450 | { | |
edefbb7c | 451 | warning (_("Unable to fetch general registers.")); |
ed9a39eb JM |
452 | return; |
453 | } | |
454 | ||
34e8f22d | 455 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) |
23a6d369 | 456 | regcache_raw_supply (current_regcache, regno, (char *) ®s[regno]); |
ed9a39eb JM |
457 | |
458 | if (arm_apcs_32) | |
23a6d369 AC |
459 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
460 | (char *) ®s[ARM_CPSR_REGNUM]); | |
ed9a39eb | 461 | else |
23a6d369 AC |
462 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
463 | (char *) ®s[ARM_PC_REGNUM]); | |
ed9a39eb | 464 | |
34e8f22d | 465 | regs[ARM_PC_REGNUM] = ADDR_BITS_REMOVE (regs[ARM_PC_REGNUM]); |
23a6d369 AC |
466 | regcache_raw_supply (current_regcache, ARM_PC_REGNUM, |
467 | (char *) ®s[ARM_PC_REGNUM]); | |
ed9a39eb JM |
468 | } |
469 | ||
470 | /* Store all general registers of the process from the values in | |
c6b92abd | 471 | regcache. */ |
ed9a39eb | 472 | |
41c49b06 SB |
473 | static void |
474 | store_register (int regno) | |
475 | { | |
476 | int ret, tid; | |
c2152441 | 477 | elf_gregset_t regs; |
41c49b06 | 478 | |
c6b92abd | 479 | if (!register_cached (regno)) |
41c49b06 SB |
480 | return; |
481 | ||
482 | /* Get the thread id for the ptrace call. */ | |
39f77062 | 483 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
484 | |
485 | /* Get the general registers from the process. */ | |
486 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); | |
487 | if (ret < 0) | |
488 | { | |
edefbb7c | 489 | warning (_("Unable to fetch general registers.")); |
41c49b06 SB |
490 | return; |
491 | } | |
492 | ||
34e8f22d | 493 | if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM) |
822c9732 | 494 | regcache_raw_collect (current_regcache, regno, (char *) ®s[regno]); |
adb8a87c DJ |
495 | else if (arm_apcs_32 && regno == ARM_PS_REGNUM) |
496 | regcache_raw_collect (current_regcache, regno, | |
497 | (char *) ®s[ARM_CPSR_REGNUM]); | |
498 | else if (!arm_apcs_32 && regno == ARM_PS_REGNUM) | |
499 | regcache_raw_collect (current_regcache, ARM_PC_REGNUM, | |
500 | (char *) ®s[ARM_PC_REGNUM]); | |
41c49b06 SB |
501 | |
502 | ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); | |
503 | if (ret < 0) | |
504 | { | |
edefbb7c | 505 | warning (_("Unable to store general register.")); |
41c49b06 SB |
506 | return; |
507 | } | |
508 | } | |
509 | ||
ed9a39eb JM |
510 | static void |
511 | store_regs (void) | |
512 | { | |
41c49b06 | 513 | int ret, regno, tid; |
c2152441 | 514 | elf_gregset_t regs; |
ed9a39eb | 515 | |
41c49b06 | 516 | /* Get the thread id for the ptrace call. */ |
39f77062 | 517 | tid = GET_THREAD_ID (inferior_ptid); |
41c49b06 SB |
518 | |
519 | /* Fetch the general registers. */ | |
520 | ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); | |
ed9a39eb JM |
521 | if (ret < 0) |
522 | { | |
edefbb7c | 523 | warning (_("Unable to fetch general registers.")); |
ed9a39eb JM |
524 | return; |
525 | } | |
526 | ||
34e8f22d | 527 | for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++) |
ed9a39eb | 528 | { |
c6b92abd | 529 | if (register_cached (regno)) |
822c9732 | 530 | regcache_raw_collect (current_regcache, regno, (char *) ®s[regno]); |
ed9a39eb JM |
531 | } |
532 | ||
adb8a87c DJ |
533 | if (arm_apcs_32 && register_cached (ARM_PS_REGNUM)) |
534 | regcache_raw_collect (current_regcache, ARM_PS_REGNUM, | |
535 | (char *) ®s[ARM_CPSR_REGNUM]); | |
536 | ||
41c49b06 | 537 | ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); |
ed9a39eb JM |
538 | |
539 | if (ret < 0) | |
540 | { | |
edefbb7c | 541 | warning (_("Unable to store general registers.")); |
ed9a39eb JM |
542 | return; |
543 | } | |
544 | } | |
545 | ||
546 | /* Fetch registers from the child process. Fetch all registers if | |
547 | regno == -1, otherwise fetch all general registers or all floating | |
548 | point registers depending upon the value of regno. */ | |
549 | ||
550 | void | |
551 | fetch_inferior_registers (int regno) | |
552 | { | |
41c49b06 SB |
553 | if (-1 == regno) |
554 | { | |
555 | fetch_regs (); | |
556 | fetch_fpregs (); | |
557 | } | |
558 | else | |
559 | { | |
34e8f22d | 560 | if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM) |
41c49b06 | 561 | fetch_register (regno); |
ed9a39eb | 562 | |
34e8f22d | 563 | if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM) |
41c49b06 SB |
564 | fetch_fpregister (regno); |
565 | } | |
ed9a39eb JM |
566 | } |
567 | ||
568 | /* Store registers back into the inferior. Store all registers if | |
569 | regno == -1, otherwise store all general registers or all floating | |
570 | point registers depending upon the value of regno. */ | |
571 | ||
572 | void | |
573 | store_inferior_registers (int regno) | |
574 | { | |
41c49b06 SB |
575 | if (-1 == regno) |
576 | { | |
577 | store_regs (); | |
578 | store_fpregs (); | |
579 | } | |
580 | else | |
581 | { | |
34e8f22d | 582 | if ((regno < ARM_F0_REGNUM) || (regno > ARM_FPS_REGNUM)) |
41c49b06 | 583 | store_register (regno); |
ed9a39eb | 584 | |
34e8f22d | 585 | if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM)) |
41c49b06 SB |
586 | store_fpregister (regno); |
587 | } | |
ed9a39eb JM |
588 | } |
589 | ||
41c49b06 SB |
590 | /* Fill register regno (if it is a general-purpose register) in |
591 | *gregsetp with the appropriate value from GDB's register array. | |
592 | If regno is -1, do this for all registers. */ | |
593 | ||
594 | void | |
713f0374 | 595 | fill_gregset (gdb_gregset_t *gregsetp, int regno) |
41c49b06 SB |
596 | { |
597 | if (-1 == regno) | |
598 | { | |
599 | int regnum; | |
34e8f22d | 600 | for (regnum = ARM_A1_REGNUM; regnum <= ARM_PC_REGNUM; regnum++) |
822c9732 AC |
601 | regcache_raw_collect (current_regcache, regnum, |
602 | (char *) &(*gregsetp)[regnum]); | |
41c49b06 | 603 | } |
34e8f22d | 604 | else if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM) |
822c9732 AC |
605 | regcache_raw_collect (current_regcache, regno, |
606 | (char *) &(*gregsetp)[regno]); | |
41c49b06 | 607 | |
34e8f22d | 608 | if (ARM_PS_REGNUM == regno || -1 == regno) |
41c49b06 | 609 | { |
17fd1ad9 | 610 | if (arm_apcs_32) |
822c9732 AC |
611 | regcache_raw_collect (current_regcache, ARM_PS_REGNUM, |
612 | (char *) &(*gregsetp)[ARM_CPSR_REGNUM]); | |
17fd1ad9 | 613 | else |
822c9732 AC |
614 | regcache_raw_collect (current_regcache, ARM_PC_REGNUM, |
615 | (char *) &(*gregsetp)[ARM_PC_REGNUM]); | |
41c49b06 | 616 | } |
41c49b06 SB |
617 | } |
618 | ||
619 | /* Fill GDB's register array with the general-purpose register values | |
620 | in *gregsetp. */ | |
621 | ||
622 | void | |
713f0374 | 623 | supply_gregset (gdb_gregset_t *gregsetp) |
41c49b06 SB |
624 | { |
625 | int regno, reg_pc; | |
626 | ||
34e8f22d | 627 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) |
23a6d369 AC |
628 | regcache_raw_supply (current_regcache, regno, |
629 | (char *) &(*gregsetp)[regno]); | |
41c49b06 SB |
630 | |
631 | if (arm_apcs_32) | |
23a6d369 AC |
632 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
633 | (char *) &(*gregsetp)[ARM_CPSR_REGNUM]); | |
41c49b06 | 634 | else |
23a6d369 AC |
635 | regcache_raw_supply (current_regcache, ARM_PS_REGNUM, |
636 | (char *) &(*gregsetp)[ARM_PC_REGNUM]); | |
41c49b06 | 637 | |
34e8f22d | 638 | reg_pc = ADDR_BITS_REMOVE ((CORE_ADDR)(*gregsetp)[ARM_PC_REGNUM]); |
23a6d369 | 639 | regcache_raw_supply (current_regcache, ARM_PC_REGNUM, (char *) ®_pc); |
41c49b06 SB |
640 | } |
641 | ||
642 | /* Fill register regno (if it is a floating-point register) in | |
643 | *fpregsetp with the appropriate value from GDB's register array. | |
644 | If regno is -1, do this for all registers. */ | |
645 | ||
646 | void | |
713f0374 | 647 | fill_fpregset (gdb_fpregset_t *fpregsetp, int regno) |
41c49b06 SB |
648 | { |
649 | FPA11 *fp = (FPA11 *) fpregsetp; | |
650 | ||
651 | if (-1 == regno) | |
652 | { | |
653 | int regnum; | |
34e8f22d | 654 | for (regnum = ARM_F0_REGNUM; regnum <= ARM_F7_REGNUM; regnum++) |
41c49b06 SB |
655 | store_nwfpe_register (regnum, fp); |
656 | } | |
34e8f22d | 657 | else if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM) |
41c49b06 SB |
658 | { |
659 | store_nwfpe_register (regno, fp); | |
660 | return; | |
661 | } | |
662 | ||
663 | /* Store fpsr. */ | |
34e8f22d | 664 | if (ARM_FPS_REGNUM == regno || -1 == regno) |
822c9732 AC |
665 | regcache_raw_collect (current_regcache, ARM_FPS_REGNUM, |
666 | (char *) &fp->fpsr); | |
41c49b06 SB |
667 | } |
668 | ||
669 | /* Fill GDB's register array with the floating-point register values | |
670 | in *fpregsetp. */ | |
671 | ||
672 | void | |
713f0374 | 673 | supply_fpregset (gdb_fpregset_t *fpregsetp) |
ed9a39eb | 674 | { |
41c49b06 SB |
675 | int regno; |
676 | FPA11 *fp = (FPA11 *) fpregsetp; | |
677 | ||
678 | /* Fetch fpsr. */ | |
23a6d369 | 679 | regcache_raw_supply (current_regcache, ARM_FPS_REGNUM, (char *) &fp->fpsr); |
41c49b06 SB |
680 | |
681 | /* Fetch the floating point registers. */ | |
34e8f22d | 682 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
41c49b06 SB |
683 | { |
684 | fetch_nwfpe_register (regno, fp); | |
685 | } | |
ed9a39eb JM |
686 | } |
687 | ||
688 | int | |
689 | arm_linux_kernel_u_size (void) | |
690 | { | |
691 | return (sizeof (struct user)); | |
692 | } | |
693 | ||
ed9a39eb JM |
694 | static unsigned int |
695 | get_linux_version (unsigned int *vmajor, | |
696 | unsigned int *vminor, | |
697 | unsigned int *vrelease) | |
698 | { | |
699 | struct utsname info; | |
700 | char *pmajor, *pminor, *prelease, *tail; | |
701 | ||
702 | if (-1 == uname (&info)) | |
703 | { | |
edefbb7c | 704 | warning (_("Unable to determine GNU/Linux version.")); |
ed9a39eb JM |
705 | return -1; |
706 | } | |
707 | ||
708 | pmajor = strtok (info.release, "."); | |
709 | pminor = strtok (NULL, "."); | |
710 | prelease = strtok (NULL, "."); | |
711 | ||
712 | *vmajor = (unsigned int) strtoul (pmajor, &tail, 0); | |
713 | *vminor = (unsigned int) strtoul (pminor, &tail, 0); | |
714 | *vrelease = (unsigned int) strtoul (prelease, &tail, 0); | |
715 | ||
716 | return ((*vmajor << 16) | (*vminor << 8) | *vrelease); | |
717 | } | |
718 | ||
719 | void | |
720 | _initialize_arm_linux_nat (void) | |
721 | { | |
722 | os_version = get_linux_version (&os_major, &os_minor, &os_release); | |
723 | } |