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c906108c SS |
1 | /* Simulator instruction semantics for i960base. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #ifdef DEFINE_LABELS | |
26 | ||
27 | /* The labels have the case they have because the enum of insn types | |
28 | is all uppercase and in the non-stdc case the insn symbol is built | |
29 | into the enum name. */ | |
30 | ||
31 | static struct { | |
32 | int index; | |
33 | void *label; | |
34 | } labels[] = { | |
35 | { I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
36 | { I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
37 | { I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
38 | { I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
39 | { I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
40 | { I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
41 | { I960BASE_INSN_MULO, && case_sem_INSN_MULO }, | |
42 | { I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 }, | |
43 | { I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 }, | |
44 | { I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 }, | |
45 | { I960BASE_INSN_REMO, && case_sem_INSN_REMO }, | |
46 | { I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 }, | |
47 | { I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 }, | |
48 | { I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 }, | |
49 | { I960BASE_INSN_DIVO, && case_sem_INSN_DIVO }, | |
50 | { I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 }, | |
51 | { I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 }, | |
52 | { I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 }, | |
53 | { I960BASE_INSN_REMI, && case_sem_INSN_REMI }, | |
54 | { I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 }, | |
55 | { I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 }, | |
56 | { I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 }, | |
57 | { I960BASE_INSN_DIVI, && case_sem_INSN_DIVI }, | |
58 | { I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 }, | |
59 | { I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 }, | |
60 | { I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 }, | |
61 | { I960BASE_INSN_ADDO, && case_sem_INSN_ADDO }, | |
62 | { I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 }, | |
63 | { I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 }, | |
64 | { I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 }, | |
65 | { I960BASE_INSN_SUBO, && case_sem_INSN_SUBO }, | |
66 | { I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 }, | |
67 | { I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 }, | |
68 | { I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 }, | |
69 | { I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT }, | |
70 | { I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 }, | |
71 | { I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 }, | |
72 | { I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 }, | |
73 | { I960BASE_INSN_AND, && case_sem_INSN_AND }, | |
74 | { I960BASE_INSN_AND1, && case_sem_INSN_AND1 }, | |
75 | { I960BASE_INSN_AND2, && case_sem_INSN_AND2 }, | |
76 | { I960BASE_INSN_AND3, && case_sem_INSN_AND3 }, | |
77 | { I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT }, | |
78 | { I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 }, | |
79 | { I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 }, | |
80 | { I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 }, | |
81 | { I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT }, | |
82 | { I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 }, | |
83 | { I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 }, | |
84 | { I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 }, | |
85 | { I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND }, | |
86 | { I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 }, | |
87 | { I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 }, | |
88 | { I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 }, | |
89 | { I960BASE_INSN_XOR, && case_sem_INSN_XOR }, | |
90 | { I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 }, | |
91 | { I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 }, | |
92 | { I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 }, | |
93 | { I960BASE_INSN_OR, && case_sem_INSN_OR }, | |
94 | { I960BASE_INSN_OR1, && case_sem_INSN_OR1 }, | |
95 | { I960BASE_INSN_OR2, && case_sem_INSN_OR2 }, | |
96 | { I960BASE_INSN_OR3, && case_sem_INSN_OR3 }, | |
97 | { I960BASE_INSN_NOR, && case_sem_INSN_NOR }, | |
98 | { I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 }, | |
99 | { I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 }, | |
100 | { I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 }, | |
7a292a7a SS |
101 | { I960BASE_INSN_XNOR, && case_sem_INSN_XNOR }, |
102 | { I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 }, | |
103 | { I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 }, | |
104 | { I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 }, | |
c906108c SS |
105 | { I960BASE_INSN_NOT, && case_sem_INSN_NOT }, |
106 | { I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 }, | |
107 | { I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 }, | |
108 | { I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 }, | |
7a292a7a SS |
109 | { I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT }, |
110 | { I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 }, | |
111 | { I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 }, | |
112 | { I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 }, | |
c906108c SS |
113 | { I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT }, |
114 | { I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 }, | |
115 | { I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 }, | |
116 | { I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 }, | |
117 | { I960BASE_INSN_SHLO, && case_sem_INSN_SHLO }, | |
118 | { I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 }, | |
119 | { I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 }, | |
120 | { I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 }, | |
121 | { I960BASE_INSN_SHRO, && case_sem_INSN_SHRO }, | |
122 | { I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 }, | |
123 | { I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 }, | |
124 | { I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 }, | |
125 | { I960BASE_INSN_SHLI, && case_sem_INSN_SHLI }, | |
126 | { I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 }, | |
127 | { I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 }, | |
128 | { I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 }, | |
129 | { I960BASE_INSN_SHRI, && case_sem_INSN_SHRI }, | |
130 | { I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 }, | |
131 | { I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 }, | |
132 | { I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 }, | |
133 | { I960BASE_INSN_EMUL, && case_sem_INSN_EMUL }, | |
134 | { I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 }, | |
135 | { I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 }, | |
136 | { I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 }, | |
137 | { I960BASE_INSN_MOV, && case_sem_INSN_MOV }, | |
138 | { I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 }, | |
139 | { I960BASE_INSN_MOVL, && case_sem_INSN_MOVL }, | |
140 | { I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 }, | |
141 | { I960BASE_INSN_MOVT, && case_sem_INSN_MOVT }, | |
142 | { I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 }, | |
143 | { I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ }, | |
144 | { I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 }, | |
145 | { I960BASE_INSN_MODPC, && case_sem_INSN_MODPC }, | |
146 | { I960BASE_INSN_MODAC, && case_sem_INSN_MODAC }, | |
147 | { I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET }, | |
148 | { I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET }, | |
149 | { I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT }, | |
150 | { I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX }, | |
151 | { I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP }, | |
152 | { I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP }, | |
153 | { I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP }, | |
154 | { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP }, | |
155 | { I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET }, | |
156 | { I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET }, | |
157 | { I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT }, | |
158 | { I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX }, | |
159 | { I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP }, | |
160 | { I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP }, | |
161 | { I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP }, | |
162 | { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP }, | |
163 | { I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET }, | |
164 | { I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET }, | |
165 | { I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT }, | |
166 | { I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX }, | |
167 | { I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP }, | |
168 | { I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP }, | |
169 | { I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP }, | |
170 | { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP }, | |
171 | { I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET }, | |
172 | { I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET }, | |
173 | { I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT }, | |
174 | { I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX }, | |
175 | { I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP }, | |
176 | { I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP }, | |
177 | { I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP }, | |
178 | { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP }, | |
179 | { I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET }, | |
180 | { I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET }, | |
181 | { I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT }, | |
182 | { I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX }, | |
183 | { I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP }, | |
184 | { I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP }, | |
185 | { I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP }, | |
186 | { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP }, | |
187 | { I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET }, | |
188 | { I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET }, | |
189 | { I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT }, | |
190 | { I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX }, | |
191 | { I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP }, | |
192 | { I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP }, | |
193 | { I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP }, | |
194 | { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP }, | |
195 | { I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET }, | |
196 | { I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET }, | |
197 | { I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT }, | |
198 | { I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX }, | |
199 | { I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP }, | |
200 | { I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP }, | |
201 | { I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP }, | |
202 | { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP }, | |
203 | { I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET }, | |
204 | { I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET }, | |
205 | { I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT }, | |
206 | { I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX }, | |
207 | { I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP }, | |
208 | { I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP }, | |
209 | { I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP }, | |
210 | { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP }, | |
211 | { I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET }, | |
212 | { I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET }, | |
213 | { I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT }, | |
214 | { I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX }, | |
215 | { I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP }, | |
216 | { I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP }, | |
217 | { I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP }, | |
218 | { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP }, | |
219 | { I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET }, | |
220 | { I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET }, | |
221 | { I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT }, | |
222 | { I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX }, | |
223 | { I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP }, | |
224 | { I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP }, | |
225 | { I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP }, | |
226 | { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP }, | |
227 | { I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET }, | |
228 | { I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET }, | |
229 | { I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT }, | |
230 | { I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX }, | |
231 | { I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP }, | |
232 | { I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP }, | |
233 | { I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP }, | |
234 | { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP }, | |
235 | { I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET }, | |
236 | { I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET }, | |
237 | { I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT }, | |
238 | { I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX }, | |
239 | { I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP }, | |
240 | { I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP }, | |
241 | { I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP }, | |
242 | { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP }, | |
243 | { I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET }, | |
244 | { I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET }, | |
245 | { I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT }, | |
246 | { I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX }, | |
247 | { I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP }, | |
248 | { I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP }, | |
249 | { I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP }, | |
250 | { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP }, | |
251 | { I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET }, | |
252 | { I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET }, | |
253 | { I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT }, | |
254 | { I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX }, | |
255 | { I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP }, | |
256 | { I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP }, | |
257 | { I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP }, | |
258 | { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP }, | |
259 | { I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET }, | |
260 | { I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET }, | |
261 | { I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT }, | |
262 | { I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX }, | |
263 | { I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP }, | |
264 | { I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP }, | |
265 | { I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP }, | |
266 | { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP }, | |
267 | { I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG }, | |
268 | { I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT }, | |
269 | { I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG }, | |
270 | { I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT }, | |
271 | { I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG }, | |
272 | { I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT }, | |
273 | { I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG }, | |
274 | { I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT }, | |
275 | { I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG }, | |
276 | { I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT }, | |
277 | { I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG }, | |
278 | { I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT }, | |
279 | { I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG }, | |
280 | { I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT }, | |
281 | { I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG }, | |
282 | { I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT }, | |
283 | { I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG }, | |
284 | { I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT }, | |
285 | { I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG }, | |
286 | { I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT }, | |
287 | { I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG }, | |
288 | { I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT }, | |
289 | { I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG }, | |
290 | { I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT }, | |
291 | { I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG }, | |
292 | { I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT }, | |
293 | { I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG }, | |
294 | { I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT }, | |
295 | { I960BASE_INSN_CMPI, && case_sem_INSN_CMPI }, | |
296 | { I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 }, | |
297 | { I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 }, | |
298 | { I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 }, | |
299 | { I960BASE_INSN_CMPO, && case_sem_INSN_CMPO }, | |
300 | { I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 }, | |
301 | { I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 }, | |
302 | { I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 }, | |
303 | { I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG }, | |
304 | { I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG }, | |
305 | { I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG }, | |
306 | { I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG }, | |
307 | { I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG }, | |
308 | { I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG }, | |
309 | { I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG }, | |
310 | { I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG }, | |
311 | { I960BASE_INSN_BNO, && case_sem_INSN_BNO }, | |
312 | { I960BASE_INSN_BG, && case_sem_INSN_BG }, | |
313 | { I960BASE_INSN_BE, && case_sem_INSN_BE }, | |
314 | { I960BASE_INSN_BGE, && case_sem_INSN_BGE }, | |
315 | { I960BASE_INSN_BL, && case_sem_INSN_BL }, | |
316 | { I960BASE_INSN_BNE, && case_sem_INSN_BNE }, | |
317 | { I960BASE_INSN_BLE, && case_sem_INSN_BLE }, | |
318 | { I960BASE_INSN_BO, && case_sem_INSN_BO }, | |
319 | { I960BASE_INSN_B, && case_sem_INSN_B }, | |
320 | { I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET }, | |
321 | { I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT }, | |
322 | { I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX }, | |
323 | { I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP }, | |
324 | { I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP }, | |
325 | { I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP }, | |
326 | { I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT }, | |
327 | { I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET }, | |
328 | { I960BASE_INSN_RET, && case_sem_INSN_RET }, | |
329 | { I960BASE_INSN_CALLS, && case_sem_INSN_CALLS }, | |
330 | { I960BASE_INSN_FMARK, && case_sem_INSN_FMARK }, | |
331 | { I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG }, | |
332 | { 0, 0 } | |
333 | }; | |
334 | int i; | |
335 | ||
336 | for (i = 0; labels[i].label != 0; ++i) | |
337 | #if FAST_P | |
338 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; | |
339 | #else | |
340 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; | |
341 | #endif | |
342 | ||
343 | #undef DEFINE_LABELS | |
344 | #endif /* DEFINE_LABELS */ | |
345 | ||
346 | #ifdef DEFINE_SWITCH | |
347 | ||
348 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
349 | off frills like tracing and profiling. */ | |
350 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
351 | that can cause it to be optimized out. Another way would be to emit | |
352 | special handlers into the instruction "stream". */ | |
353 | ||
354 | #if FAST_P | |
355 | #undef TRACE_RESULT | |
356 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
357 | #endif | |
358 | ||
359 | #undef GET_ATTR | |
360 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
361 | ||
362 | { | |
363 | ||
364 | #if WITH_SCACHE_PBB | |
365 | ||
366 | /* Branch to next handler without going around main loop. */ | |
367 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
368 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
369 | ||
370 | #else /* ! WITH_SCACHE_PBB */ | |
371 | ||
372 | #define NEXT(vpc) BREAK (sem) | |
373 | #ifdef __GNUC__ | |
374 | #if FAST_P | |
375 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
376 | #else | |
377 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
378 | #endif | |
379 | #else | |
380 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
381 | #endif | |
382 | ||
383 | #endif /* ! WITH_SCACHE_PBB */ | |
384 | ||
385 | { | |
386 | ||
387 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
388 | { | |
389 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
390 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
391 | #define FLD(f) abuf->fields.fmt_empty.f | |
392 | int UNUSED written = 0; | |
393 | IADDR UNUSED pc = abuf->addr; | |
394 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
395 | ||
396 | { | |
397 | #if WITH_SCACHE | |
398 | /* Update the recorded pc in the cpu state struct. */ | |
399 | SET_H_PC (pc); | |
400 | #endif | |
401 | sim_engine_invalid_insn (current_cpu, pc); | |
402 | sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n"); | |
403 | /* NOTREACHED */ | |
404 | } | |
405 | ||
406 | #undef FLD | |
407 | } | |
408 | NEXT (vpc); | |
409 | ||
410 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
411 | { | |
412 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
413 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
414 | #define FLD(f) abuf->fields.fmt_empty.f | |
415 | int UNUSED written = 0; | |
416 | IADDR UNUSED pc = abuf->addr; | |
417 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
418 | ||
419 | { | |
420 | #if WITH_SCACHE_PBB_I960BASE | |
421 | i960base_pbb_after (current_cpu, sem_arg); | |
422 | #endif | |
423 | } | |
424 | ||
425 | #undef FLD | |
426 | } | |
427 | NEXT (vpc); | |
428 | ||
429 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
430 | { | |
431 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
432 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
433 | #define FLD(f) abuf->fields.fmt_empty.f | |
434 | int UNUSED written = 0; | |
435 | IADDR UNUSED pc = abuf->addr; | |
436 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
437 | ||
438 | { | |
439 | #if WITH_SCACHE_PBB_I960BASE | |
440 | i960base_pbb_before (current_cpu, sem_arg); | |
441 | #endif | |
442 | } | |
443 | ||
444 | #undef FLD | |
445 | } | |
446 | NEXT (vpc); | |
447 | ||
448 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
449 | { | |
450 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
451 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
452 | #define FLD(f) abuf->fields.fmt_empty.f | |
453 | int UNUSED written = 0; | |
454 | IADDR UNUSED pc = abuf->addr; | |
455 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
456 | ||
457 | { | |
458 | #if WITH_SCACHE_PBB_I960BASE | |
459 | #ifdef DEFINE_SWITCH | |
460 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
461 | pbb_br_npc_ptr, pbb_br_npc); | |
462 | BREAK (sem); | |
463 | #else | |
464 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
465 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
466 | CPU_PBB_BR_NPC_PTR (current_cpu), | |
467 | CPU_PBB_BR_NPC (current_cpu)); | |
468 | #endif | |
469 | #endif | |
470 | } | |
471 | ||
472 | #undef FLD | |
473 | } | |
474 | NEXT (vpc); | |
475 | ||
476 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
477 | { | |
478 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
479 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
480 | #define FLD(f) abuf->fields.fmt_empty.f | |
481 | int UNUSED written = 0; | |
482 | IADDR UNUSED pc = abuf->addr; | |
483 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
484 | ||
485 | { | |
486 | #if WITH_SCACHE_PBB_I960BASE | |
487 | vpc = i960base_pbb_chain (current_cpu, sem_arg); | |
488 | #ifdef DEFINE_SWITCH | |
489 | BREAK (sem); | |
490 | #endif | |
491 | #endif | |
492 | } | |
493 | ||
494 | #undef FLD | |
495 | } | |
496 | NEXT (vpc); | |
497 | ||
498 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
499 | { | |
500 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
501 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
502 | #define FLD(f) abuf->fields.fmt_empty.f | |
503 | int UNUSED written = 0; | |
504 | IADDR UNUSED pc = abuf->addr; | |
505 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
506 | ||
507 | { | |
508 | #if WITH_SCACHE_PBB_I960BASE | |
509 | #ifdef DEFINE_SWITCH | |
510 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
511 | in any called inline functions. */ | |
512 | vpc = i960base_pbb_begin (current_cpu, FAST_P); | |
513 | #else | |
514 | vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
515 | #endif | |
516 | #endif | |
517 | } | |
518 | ||
519 | #undef FLD | |
520 | } | |
521 | NEXT (vpc); | |
522 | ||
523 | CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */ | |
524 | { | |
525 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
526 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
527 | #define FLD(f) abuf->fields.fmt_mulo.f | |
528 | int UNUSED written = 0; | |
529 | IADDR UNUSED pc = abuf->addr; | |
530 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
531 | ||
532 | { | |
533 | SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); | |
534 | * FLD (i_dst) = opval; | |
535 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
536 | } | |
537 | ||
538 | #undef FLD | |
539 | } | |
540 | NEXT (vpc); | |
541 | ||
542 | CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */ | |
543 | { | |
544 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
545 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
546 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
547 | int UNUSED written = 0; | |
548 | IADDR UNUSED pc = abuf->addr; | |
549 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
550 | ||
551 | { | |
552 | SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); | |
553 | * FLD (i_dst) = opval; | |
554 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
555 | } | |
556 | ||
557 | #undef FLD | |
558 | } | |
559 | NEXT (vpc); | |
560 | ||
561 | CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */ | |
562 | { | |
563 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
564 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
565 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
566 | int UNUSED written = 0; | |
567 | IADDR UNUSED pc = abuf->addr; | |
568 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
569 | ||
570 | { | |
571 | SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); | |
572 | * FLD (i_dst) = opval; | |
573 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
574 | } | |
575 | ||
576 | #undef FLD | |
577 | } | |
578 | NEXT (vpc); | |
579 | ||
580 | CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */ | |
581 | { | |
582 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
583 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
584 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
585 | int UNUSED written = 0; | |
586 | IADDR UNUSED pc = abuf->addr; | |
587 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
588 | ||
589 | { | |
590 | SI opval = MULSI (FLD (f_src1), FLD (f_src2)); | |
591 | * FLD (i_dst) = opval; | |
592 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
593 | } | |
594 | ||
595 | #undef FLD | |
596 | } | |
597 | NEXT (vpc); | |
598 | ||
599 | CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */ | |
600 | { | |
601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
603 | #define FLD(f) abuf->fields.fmt_mulo.f | |
604 | int UNUSED written = 0; | |
605 | IADDR UNUSED pc = abuf->addr; | |
606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
607 | ||
608 | { | |
609 | SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); | |
610 | * FLD (i_dst) = opval; | |
611 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
612 | } | |
613 | ||
614 | #undef FLD | |
615 | } | |
616 | NEXT (vpc); | |
617 | ||
618 | CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */ | |
619 | { | |
620 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
621 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
622 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
623 | int UNUSED written = 0; | |
624 | IADDR UNUSED pc = abuf->addr; | |
625 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
626 | ||
627 | { | |
628 | SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); | |
629 | * FLD (i_dst) = opval; | |
630 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
631 | } | |
632 | ||
633 | #undef FLD | |
634 | } | |
635 | NEXT (vpc); | |
636 | ||
637 | CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */ | |
638 | { | |
639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
641 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
642 | int UNUSED written = 0; | |
643 | IADDR UNUSED pc = abuf->addr; | |
644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
645 | ||
646 | { | |
647 | SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); | |
648 | * FLD (i_dst) = opval; | |
649 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
650 | } | |
651 | ||
652 | #undef FLD | |
653 | } | |
654 | NEXT (vpc); | |
655 | ||
656 | CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */ | |
657 | { | |
658 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
659 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
660 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
661 | int UNUSED written = 0; | |
662 | IADDR UNUSED pc = abuf->addr; | |
663 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
664 | ||
665 | { | |
666 | SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); | |
667 | * FLD (i_dst) = opval; | |
668 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
669 | } | |
670 | ||
671 | #undef FLD | |
672 | } | |
673 | NEXT (vpc); | |
674 | ||
675 | CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */ | |
676 | { | |
677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
679 | #define FLD(f) abuf->fields.fmt_mulo.f | |
680 | int UNUSED written = 0; | |
681 | IADDR UNUSED pc = abuf->addr; | |
682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
683 | ||
684 | { | |
685 | SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); | |
686 | * FLD (i_dst) = opval; | |
687 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
688 | } | |
689 | ||
690 | #undef FLD | |
691 | } | |
692 | NEXT (vpc); | |
693 | ||
694 | CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */ | |
695 | { | |
696 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
698 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
699 | int UNUSED written = 0; | |
700 | IADDR UNUSED pc = abuf->addr; | |
701 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
702 | ||
703 | { | |
704 | SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); | |
705 | * FLD (i_dst) = opval; | |
706 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
707 | } | |
708 | ||
709 | #undef FLD | |
710 | } | |
711 | NEXT (vpc); | |
712 | ||
713 | CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */ | |
714 | { | |
715 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
716 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
717 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
718 | int UNUSED written = 0; | |
719 | IADDR UNUSED pc = abuf->addr; | |
720 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
721 | ||
722 | { | |
723 | SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); | |
724 | * FLD (i_dst) = opval; | |
725 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
726 | } | |
727 | ||
728 | #undef FLD | |
729 | } | |
730 | NEXT (vpc); | |
731 | ||
732 | CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */ | |
733 | { | |
734 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
735 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
736 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
737 | int UNUSED written = 0; | |
738 | IADDR UNUSED pc = abuf->addr; | |
739 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
740 | ||
741 | { | |
742 | SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); | |
743 | * FLD (i_dst) = opval; | |
744 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
745 | } | |
746 | ||
747 | #undef FLD | |
748 | } | |
749 | NEXT (vpc); | |
750 | ||
751 | CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */ | |
752 | { | |
753 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
754 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
755 | #define FLD(f) abuf->fields.fmt_mulo.f | |
756 | int UNUSED written = 0; | |
757 | IADDR UNUSED pc = abuf->addr; | |
758 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
759 | ||
760 | { | |
761 | SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); | |
762 | * FLD (i_dst) = opval; | |
763 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
764 | } | |
765 | ||
766 | #undef FLD | |
767 | } | |
768 | NEXT (vpc); | |
769 | ||
770 | CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */ | |
771 | { | |
772 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
773 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
774 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
775 | int UNUSED written = 0; | |
776 | IADDR UNUSED pc = abuf->addr; | |
777 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
778 | ||
779 | { | |
780 | SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); | |
781 | * FLD (i_dst) = opval; | |
782 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
783 | } | |
784 | ||
785 | #undef FLD | |
786 | } | |
787 | NEXT (vpc); | |
788 | ||
789 | CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */ | |
790 | { | |
791 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
792 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
793 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
794 | int UNUSED written = 0; | |
795 | IADDR UNUSED pc = abuf->addr; | |
796 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
797 | ||
798 | { | |
799 | SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); | |
800 | * FLD (i_dst) = opval; | |
801 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
802 | } | |
803 | ||
804 | #undef FLD | |
805 | } | |
806 | NEXT (vpc); | |
807 | ||
808 | CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */ | |
809 | { | |
810 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
811 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
812 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
813 | int UNUSED written = 0; | |
814 | IADDR UNUSED pc = abuf->addr; | |
815 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
816 | ||
817 | { | |
818 | SI opval = MODSI (FLD (f_src2), FLD (f_src1)); | |
819 | * FLD (i_dst) = opval; | |
820 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
821 | } | |
822 | ||
823 | #undef FLD | |
824 | } | |
825 | NEXT (vpc); | |
826 | ||
827 | CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */ | |
828 | { | |
829 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
831 | #define FLD(f) abuf->fields.fmt_mulo.f | |
832 | int UNUSED written = 0; | |
833 | IADDR UNUSED pc = abuf->addr; | |
834 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
835 | ||
836 | { | |
837 | SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); | |
838 | * FLD (i_dst) = opval; | |
839 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
840 | } | |
841 | ||
842 | #undef FLD | |
843 | } | |
844 | NEXT (vpc); | |
845 | ||
846 | CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */ | |
847 | { | |
848 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
849 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
850 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
851 | int UNUSED written = 0; | |
852 | IADDR UNUSED pc = abuf->addr; | |
853 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
854 | ||
855 | { | |
856 | SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); | |
857 | * FLD (i_dst) = opval; | |
858 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
859 | } | |
860 | ||
861 | #undef FLD | |
862 | } | |
863 | NEXT (vpc); | |
864 | ||
865 | CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */ | |
866 | { | |
867 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
868 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
869 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
870 | int UNUSED written = 0; | |
871 | IADDR UNUSED pc = abuf->addr; | |
872 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
873 | ||
874 | { | |
875 | SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); | |
876 | * FLD (i_dst) = opval; | |
877 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
878 | } | |
879 | ||
880 | #undef FLD | |
881 | } | |
882 | NEXT (vpc); | |
883 | ||
884 | CASE (sem, INSN_DIVI3) : /* divi $lit1, $lit2, $dst */ | |
885 | { | |
886 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
887 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
888 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
889 | int UNUSED written = 0; | |
890 | IADDR UNUSED pc = abuf->addr; | |
891 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
892 | ||
893 | { | |
894 | SI opval = DIVSI (FLD (f_src2), FLD (f_src1)); | |
895 | * FLD (i_dst) = opval; | |
896 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
897 | } | |
898 | ||
899 | #undef FLD | |
900 | } | |
901 | NEXT (vpc); | |
902 | ||
903 | CASE (sem, INSN_ADDO) : /* addo $src1, $src2, $dst */ | |
904 | { | |
905 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
906 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
907 | #define FLD(f) abuf->fields.fmt_mulo.f | |
908 | int UNUSED written = 0; | |
909 | IADDR UNUSED pc = abuf->addr; | |
910 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
911 | ||
912 | { | |
913 | SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2)); | |
914 | * FLD (i_dst) = opval; | |
915 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
916 | } | |
917 | ||
918 | #undef FLD | |
919 | } | |
920 | NEXT (vpc); | |
921 | ||
922 | CASE (sem, INSN_ADDO1) : /* addo $lit1, $src2, $dst */ | |
923 | { | |
924 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
925 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
926 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
927 | int UNUSED written = 0; | |
928 | IADDR UNUSED pc = abuf->addr; | |
929 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
930 | ||
931 | { | |
932 | SI opval = ADDSI (FLD (f_src1), * FLD (i_src2)); | |
933 | * FLD (i_dst) = opval; | |
934 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
935 | } | |
936 | ||
937 | #undef FLD | |
938 | } | |
939 | NEXT (vpc); | |
940 | ||
941 | CASE (sem, INSN_ADDO2) : /* addo $src1, $lit2, $dst */ | |
942 | { | |
943 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
944 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
945 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
946 | int UNUSED written = 0; | |
947 | IADDR UNUSED pc = abuf->addr; | |
948 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
949 | ||
950 | { | |
951 | SI opval = ADDSI (* FLD (i_src1), FLD (f_src2)); | |
952 | * FLD (i_dst) = opval; | |
953 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
954 | } | |
955 | ||
956 | #undef FLD | |
957 | } | |
958 | NEXT (vpc); | |
959 | ||
960 | CASE (sem, INSN_ADDO3) : /* addo $lit1, $lit2, $dst */ | |
961 | { | |
962 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
963 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
964 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
965 | int UNUSED written = 0; | |
966 | IADDR UNUSED pc = abuf->addr; | |
967 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
968 | ||
969 | { | |
970 | SI opval = ADDSI (FLD (f_src1), FLD (f_src2)); | |
971 | * FLD (i_dst) = opval; | |
972 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
973 | } | |
974 | ||
975 | #undef FLD | |
976 | } | |
977 | NEXT (vpc); | |
978 | ||
979 | CASE (sem, INSN_SUBO) : /* subo $src1, $src2, $dst */ | |
980 | { | |
981 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
982 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
983 | #define FLD(f) abuf->fields.fmt_mulo.f | |
984 | int UNUSED written = 0; | |
985 | IADDR UNUSED pc = abuf->addr; | |
986 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
987 | ||
988 | { | |
989 | SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1)); | |
990 | * FLD (i_dst) = opval; | |
991 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
992 | } | |
993 | ||
994 | #undef FLD | |
995 | } | |
996 | NEXT (vpc); | |
997 | ||
998 | CASE (sem, INSN_SUBO1) : /* subo $lit1, $src2, $dst */ | |
999 | { | |
1000 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1001 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1002 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1003 | int UNUSED written = 0; | |
1004 | IADDR UNUSED pc = abuf->addr; | |
1005 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1006 | ||
1007 | { | |
1008 | SI opval = SUBSI (* FLD (i_src2), FLD (f_src1)); | |
1009 | * FLD (i_dst) = opval; | |
1010 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1011 | } | |
1012 | ||
1013 | #undef FLD | |
1014 | } | |
1015 | NEXT (vpc); | |
1016 | ||
1017 | CASE (sem, INSN_SUBO2) : /* subo $src1, $lit2, $dst */ | |
1018 | { | |
1019 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1020 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1021 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1022 | int UNUSED written = 0; | |
1023 | IADDR UNUSED pc = abuf->addr; | |
1024 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1025 | ||
1026 | { | |
1027 | SI opval = SUBSI (FLD (f_src2), * FLD (i_src1)); | |
1028 | * FLD (i_dst) = opval; | |
1029 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1030 | } | |
1031 | ||
1032 | #undef FLD | |
1033 | } | |
1034 | NEXT (vpc); | |
1035 | ||
1036 | CASE (sem, INSN_SUBO3) : /* subo $lit1, $lit2, $dst */ | |
1037 | { | |
1038 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1039 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1040 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1041 | int UNUSED written = 0; | |
1042 | IADDR UNUSED pc = abuf->addr; | |
1043 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1044 | ||
1045 | { | |
1046 | SI opval = SUBSI (FLD (f_src2), FLD (f_src1)); | |
1047 | * FLD (i_dst) = opval; | |
1048 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1049 | } | |
1050 | ||
1051 | #undef FLD | |
1052 | } | |
1053 | NEXT (vpc); | |
1054 | ||
1055 | CASE (sem, INSN_NOTBIT) : /* notbit $src1, $src2, $dst */ | |
1056 | { | |
1057 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1058 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1059 | #define FLD(f) abuf->fields.fmt_notbit.f | |
1060 | int UNUSED written = 0; | |
1061 | IADDR UNUSED pc = abuf->addr; | |
1062 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1063 | ||
1064 | { | |
1065 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1066 | * FLD (i_dst) = opval; | |
1067 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1068 | } | |
1069 | ||
1070 | #undef FLD | |
1071 | } | |
1072 | NEXT (vpc); | |
1073 | ||
1074 | CASE (sem, INSN_NOTBIT1) : /* notbit $lit1, $src2, $dst */ | |
1075 | { | |
1076 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1077 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1078 | #define FLD(f) abuf->fields.fmt_notbit1.f | |
1079 | int UNUSED written = 0; | |
1080 | IADDR UNUSED pc = abuf->addr; | |
1081 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1082 | ||
1083 | { | |
1084 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1085 | * FLD (i_dst) = opval; | |
1086 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1087 | } | |
1088 | ||
1089 | #undef FLD | |
1090 | } | |
1091 | NEXT (vpc); | |
1092 | ||
1093 | CASE (sem, INSN_NOTBIT2) : /* notbit $src1, $lit2, $dst */ | |
1094 | { | |
1095 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1096 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1097 | #define FLD(f) abuf->fields.fmt_notbit2.f | |
1098 | int UNUSED written = 0; | |
1099 | IADDR UNUSED pc = abuf->addr; | |
1100 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1101 | ||
1102 | { | |
1103 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1104 | * FLD (i_dst) = opval; | |
1105 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1106 | } | |
1107 | ||
1108 | #undef FLD | |
1109 | } | |
1110 | NEXT (vpc); | |
1111 | ||
1112 | CASE (sem, INSN_NOTBIT3) : /* notbit $lit1, $lit2, $dst */ | |
1113 | { | |
1114 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1115 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1116 | #define FLD(f) abuf->fields.fmt_notbit3.f | |
1117 | int UNUSED written = 0; | |
1118 | IADDR UNUSED pc = abuf->addr; | |
1119 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1120 | ||
1121 | { | |
1122 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1123 | * FLD (i_dst) = opval; | |
1124 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1125 | } | |
1126 | ||
1127 | #undef FLD | |
1128 | } | |
1129 | NEXT (vpc); | |
1130 | ||
1131 | CASE (sem, INSN_AND) : /* and $src1, $src2, $dst */ | |
1132 | { | |
1133 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1134 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1135 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1136 | int UNUSED written = 0; | |
1137 | IADDR UNUSED pc = abuf->addr; | |
1138 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1139 | ||
1140 | { | |
1141 | SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2)); | |
1142 | * FLD (i_dst) = opval; | |
1143 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1144 | } | |
1145 | ||
1146 | #undef FLD | |
1147 | } | |
1148 | NEXT (vpc); | |
1149 | ||
1150 | CASE (sem, INSN_AND1) : /* and $lit1, $src2, $dst */ | |
1151 | { | |
1152 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1153 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1154 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1155 | int UNUSED written = 0; | |
1156 | IADDR UNUSED pc = abuf->addr; | |
1157 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1158 | ||
1159 | { | |
1160 | SI opval = ANDSI (FLD (f_src1), * FLD (i_src2)); | |
1161 | * FLD (i_dst) = opval; | |
1162 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1163 | } | |
1164 | ||
1165 | #undef FLD | |
1166 | } | |
1167 | NEXT (vpc); | |
1168 | ||
1169 | CASE (sem, INSN_AND2) : /* and $src1, $lit2, $dst */ | |
1170 | { | |
1171 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1172 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1173 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1174 | int UNUSED written = 0; | |
1175 | IADDR UNUSED pc = abuf->addr; | |
1176 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1177 | ||
1178 | { | |
1179 | SI opval = ANDSI (* FLD (i_src1), FLD (f_src2)); | |
1180 | * FLD (i_dst) = opval; | |
1181 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1182 | } | |
1183 | ||
1184 | #undef FLD | |
1185 | } | |
1186 | NEXT (vpc); | |
1187 | ||
1188 | CASE (sem, INSN_AND3) : /* and $lit1, $lit2, $dst */ | |
1189 | { | |
1190 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1191 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1192 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1193 | int UNUSED written = 0; | |
1194 | IADDR UNUSED pc = abuf->addr; | |
1195 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1196 | ||
1197 | { | |
1198 | SI opval = ANDSI (FLD (f_src1), FLD (f_src2)); | |
1199 | * FLD (i_dst) = opval; | |
1200 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1201 | } | |
1202 | ||
1203 | #undef FLD | |
1204 | } | |
1205 | NEXT (vpc); | |
1206 | ||
1207 | CASE (sem, INSN_ANDNOT) : /* andnot $src1, $src2, $dst */ | |
1208 | { | |
1209 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1210 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1211 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1212 | int UNUSED written = 0; | |
1213 | IADDR UNUSED pc = abuf->addr; | |
1214 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1215 | ||
1216 | { | |
1217 | SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1218 | * FLD (i_dst) = opval; | |
1219 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1220 | } | |
1221 | ||
1222 | #undef FLD | |
1223 | } | |
1224 | NEXT (vpc); | |
1225 | ||
1226 | CASE (sem, INSN_ANDNOT1) : /* andnot $lit1, $src2, $dst */ | |
1227 | { | |
1228 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1229 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1230 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1231 | int UNUSED written = 0; | |
1232 | IADDR UNUSED pc = abuf->addr; | |
1233 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1234 | ||
1235 | { | |
1236 | SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1237 | * FLD (i_dst) = opval; | |
1238 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1239 | } | |
1240 | ||
1241 | #undef FLD | |
1242 | } | |
1243 | NEXT (vpc); | |
1244 | ||
1245 | CASE (sem, INSN_ANDNOT2) : /* andnot $src1, $lit2, $dst */ | |
1246 | { | |
1247 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1248 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1249 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1250 | int UNUSED written = 0; | |
1251 | IADDR UNUSED pc = abuf->addr; | |
1252 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1253 | ||
1254 | { | |
1255 | SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1256 | * FLD (i_dst) = opval; | |
1257 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1258 | } | |
1259 | ||
1260 | #undef FLD | |
1261 | } | |
1262 | NEXT (vpc); | |
1263 | ||
1264 | CASE (sem, INSN_ANDNOT3) : /* andnot $lit1, $lit2, $dst */ | |
1265 | { | |
1266 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1267 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1268 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1269 | int UNUSED written = 0; | |
1270 | IADDR UNUSED pc = abuf->addr; | |
1271 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1272 | ||
1273 | { | |
1274 | SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1275 | * FLD (i_dst) = opval; | |
1276 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1277 | } | |
1278 | ||
1279 | #undef FLD | |
1280 | } | |
1281 | NEXT (vpc); | |
1282 | ||
1283 | CASE (sem, INSN_SETBIT) : /* setbit $src1, $src2, $dst */ | |
1284 | { | |
1285 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1286 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1287 | #define FLD(f) abuf->fields.fmt_notbit.f | |
1288 | int UNUSED written = 0; | |
1289 | IADDR UNUSED pc = abuf->addr; | |
1290 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1291 | ||
1292 | { | |
1293 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1294 | * FLD (i_dst) = opval; | |
1295 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1296 | } | |
1297 | ||
1298 | #undef FLD | |
1299 | } | |
1300 | NEXT (vpc); | |
1301 | ||
1302 | CASE (sem, INSN_SETBIT1) : /* setbit $lit1, $src2, $dst */ | |
1303 | { | |
1304 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1305 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1306 | #define FLD(f) abuf->fields.fmt_notbit1.f | |
1307 | int UNUSED written = 0; | |
1308 | IADDR UNUSED pc = abuf->addr; | |
1309 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1310 | ||
1311 | { | |
1312 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1313 | * FLD (i_dst) = opval; | |
1314 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1315 | } | |
1316 | ||
1317 | #undef FLD | |
1318 | } | |
1319 | NEXT (vpc); | |
1320 | ||
1321 | CASE (sem, INSN_SETBIT2) : /* setbit $src1, $lit2, $dst */ | |
1322 | { | |
1323 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1324 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1325 | #define FLD(f) abuf->fields.fmt_notbit2.f | |
1326 | int UNUSED written = 0; | |
1327 | IADDR UNUSED pc = abuf->addr; | |
1328 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1329 | ||
1330 | { | |
1331 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1332 | * FLD (i_dst) = opval; | |
1333 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1334 | } | |
1335 | ||
1336 | #undef FLD | |
1337 | } | |
1338 | NEXT (vpc); | |
1339 | ||
1340 | CASE (sem, INSN_SETBIT3) : /* setbit $lit1, $lit2, $dst */ | |
1341 | { | |
1342 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1343 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1344 | #define FLD(f) abuf->fields.fmt_notbit3.f | |
1345 | int UNUSED written = 0; | |
1346 | IADDR UNUSED pc = abuf->addr; | |
1347 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1348 | ||
1349 | { | |
1350 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1351 | * FLD (i_dst) = opval; | |
1352 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1353 | } | |
1354 | ||
1355 | #undef FLD | |
1356 | } | |
1357 | NEXT (vpc); | |
1358 | ||
1359 | CASE (sem, INSN_NOTAND) : /* notand $src1, $src2, $dst */ | |
1360 | { | |
1361 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1362 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1363 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1364 | int UNUSED written = 0; | |
1365 | IADDR UNUSED pc = abuf->addr; | |
1366 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1367 | ||
1368 | { | |
1369 | SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1)); | |
1370 | * FLD (i_dst) = opval; | |
1371 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1372 | } | |
1373 | ||
1374 | #undef FLD | |
1375 | } | |
1376 | NEXT (vpc); | |
1377 | ||
1378 | CASE (sem, INSN_NOTAND1) : /* notand $lit1, $src2, $dst */ | |
1379 | { | |
1380 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1381 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1382 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1383 | int UNUSED written = 0; | |
1384 | IADDR UNUSED pc = abuf->addr; | |
1385 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1386 | ||
1387 | { | |
1388 | SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1)); | |
1389 | * FLD (i_dst) = opval; | |
1390 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1391 | } | |
1392 | ||
1393 | #undef FLD | |
1394 | } | |
1395 | NEXT (vpc); | |
1396 | ||
1397 | CASE (sem, INSN_NOTAND2) : /* notand $src1, $lit2, $dst */ | |
1398 | { | |
1399 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1400 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1401 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1402 | int UNUSED written = 0; | |
1403 | IADDR UNUSED pc = abuf->addr; | |
1404 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1405 | ||
1406 | { | |
1407 | SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1)); | |
1408 | * FLD (i_dst) = opval; | |
1409 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1410 | } | |
1411 | ||
1412 | #undef FLD | |
1413 | } | |
1414 | NEXT (vpc); | |
1415 | ||
1416 | CASE (sem, INSN_NOTAND3) : /* notand $lit1, $lit2, $dst */ | |
1417 | { | |
1418 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1419 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1420 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1421 | int UNUSED written = 0; | |
1422 | IADDR UNUSED pc = abuf->addr; | |
1423 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1424 | ||
1425 | { | |
1426 | SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1)); | |
1427 | * FLD (i_dst) = opval; | |
1428 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1429 | } | |
1430 | ||
1431 | #undef FLD | |
1432 | } | |
1433 | NEXT (vpc); | |
1434 | ||
1435 | CASE (sem, INSN_XOR) : /* xor $src1, $src2, $dst */ | |
1436 | { | |
1437 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1438 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1439 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1440 | int UNUSED written = 0; | |
1441 | IADDR UNUSED pc = abuf->addr; | |
1442 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1443 | ||
1444 | { | |
1445 | SI opval = XORSI (* FLD (i_src1), * FLD (i_src2)); | |
1446 | * FLD (i_dst) = opval; | |
1447 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1448 | } | |
1449 | ||
1450 | #undef FLD | |
1451 | } | |
1452 | NEXT (vpc); | |
1453 | ||
1454 | CASE (sem, INSN_XOR1) : /* xor $lit1, $src2, $dst */ | |
1455 | { | |
1456 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1457 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1458 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1459 | int UNUSED written = 0; | |
1460 | IADDR UNUSED pc = abuf->addr; | |
1461 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1462 | ||
1463 | { | |
1464 | SI opval = XORSI (FLD (f_src1), * FLD (i_src2)); | |
1465 | * FLD (i_dst) = opval; | |
1466 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1467 | } | |
1468 | ||
1469 | #undef FLD | |
1470 | } | |
1471 | NEXT (vpc); | |
1472 | ||
1473 | CASE (sem, INSN_XOR2) : /* xor $src1, $lit2, $dst */ | |
1474 | { | |
1475 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1476 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1477 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1478 | int UNUSED written = 0; | |
1479 | IADDR UNUSED pc = abuf->addr; | |
1480 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1481 | ||
1482 | { | |
1483 | SI opval = XORSI (* FLD (i_src1), FLD (f_src2)); | |
1484 | * FLD (i_dst) = opval; | |
1485 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1486 | } | |
1487 | ||
1488 | #undef FLD | |
1489 | } | |
1490 | NEXT (vpc); | |
1491 | ||
1492 | CASE (sem, INSN_XOR3) : /* xor $lit1, $lit2, $dst */ | |
1493 | { | |
1494 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1495 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1496 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1497 | int UNUSED written = 0; | |
1498 | IADDR UNUSED pc = abuf->addr; | |
1499 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1500 | ||
1501 | { | |
1502 | SI opval = XORSI (FLD (f_src1), FLD (f_src2)); | |
1503 | * FLD (i_dst) = opval; | |
1504 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1505 | } | |
1506 | ||
1507 | #undef FLD | |
1508 | } | |
1509 | NEXT (vpc); | |
1510 | ||
1511 | CASE (sem, INSN_OR) : /* or $src1, $src2, $dst */ | |
1512 | { | |
1513 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1514 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1515 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1516 | int UNUSED written = 0; | |
1517 | IADDR UNUSED pc = abuf->addr; | |
1518 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1519 | ||
1520 | { | |
1521 | SI opval = ORSI (* FLD (i_src1), * FLD (i_src2)); | |
1522 | * FLD (i_dst) = opval; | |
1523 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1524 | } | |
1525 | ||
1526 | #undef FLD | |
1527 | } | |
1528 | NEXT (vpc); | |
1529 | ||
1530 | CASE (sem, INSN_OR1) : /* or $lit1, $src2, $dst */ | |
1531 | { | |
1532 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1533 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1534 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1535 | int UNUSED written = 0; | |
1536 | IADDR UNUSED pc = abuf->addr; | |
1537 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1538 | ||
1539 | { | |
1540 | SI opval = ORSI (FLD (f_src1), * FLD (i_src2)); | |
1541 | * FLD (i_dst) = opval; | |
1542 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1543 | } | |
1544 | ||
1545 | #undef FLD | |
1546 | } | |
1547 | NEXT (vpc); | |
1548 | ||
1549 | CASE (sem, INSN_OR2) : /* or $src1, $lit2, $dst */ | |
1550 | { | |
1551 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1552 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1553 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1554 | int UNUSED written = 0; | |
1555 | IADDR UNUSED pc = abuf->addr; | |
1556 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1557 | ||
1558 | { | |
1559 | SI opval = ORSI (* FLD (i_src1), FLD (f_src2)); | |
1560 | * FLD (i_dst) = opval; | |
1561 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1562 | } | |
1563 | ||
1564 | #undef FLD | |
1565 | } | |
1566 | NEXT (vpc); | |
1567 | ||
1568 | CASE (sem, INSN_OR3) : /* or $lit1, $lit2, $dst */ | |
1569 | { | |
1570 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1571 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1572 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1573 | int UNUSED written = 0; | |
1574 | IADDR UNUSED pc = abuf->addr; | |
1575 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1576 | ||
1577 | { | |
1578 | SI opval = ORSI (FLD (f_src1), FLD (f_src2)); | |
1579 | * FLD (i_dst) = opval; | |
1580 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1581 | } | |
1582 | ||
1583 | #undef FLD | |
1584 | } | |
1585 | NEXT (vpc); | |
1586 | ||
1587 | CASE (sem, INSN_NOR) : /* nor $src1, $src2, $dst */ | |
1588 | { | |
1589 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1590 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1591 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1592 | int UNUSED written = 0; | |
1593 | IADDR UNUSED pc = abuf->addr; | |
1594 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1595 | ||
1596 | { | |
1597 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1))); | |
1598 | * FLD (i_dst) = opval; | |
1599 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1600 | } | |
1601 | ||
1602 | #undef FLD | |
1603 | } | |
1604 | NEXT (vpc); | |
1605 | ||
1606 | CASE (sem, INSN_NOR1) : /* nor $lit1, $src2, $dst */ | |
1607 | { | |
1608 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1609 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1610 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1611 | int UNUSED written = 0; | |
1612 | IADDR UNUSED pc = abuf->addr; | |
1613 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1614 | ||
1615 | { | |
1616 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1))); | |
1617 | * FLD (i_dst) = opval; | |
1618 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1619 | } | |
1620 | ||
1621 | #undef FLD | |
1622 | } | |
1623 | NEXT (vpc); | |
1624 | ||
1625 | CASE (sem, INSN_NOR2) : /* nor $src1, $lit2, $dst */ | |
1626 | { | |
1627 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1628 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1629 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1630 | int UNUSED written = 0; | |
1631 | IADDR UNUSED pc = abuf->addr; | |
1632 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1633 | ||
1634 | { | |
1635 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1))); | |
1636 | * FLD (i_dst) = opval; | |
1637 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1638 | } | |
1639 | ||
1640 | #undef FLD | |
1641 | } | |
1642 | NEXT (vpc); | |
1643 | ||
1644 | CASE (sem, INSN_NOR3) : /* nor $lit1, $lit2, $dst */ | |
1645 | { | |
1646 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1647 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1648 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1649 | int UNUSED written = 0; | |
1650 | IADDR UNUSED pc = abuf->addr; | |
1651 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1652 | ||
1653 | { | |
1654 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1))); | |
1655 | * FLD (i_dst) = opval; | |
1656 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1657 | } | |
1658 | ||
7a292a7a SS |
1659 | #undef FLD |
1660 | } | |
1661 | NEXT (vpc); | |
1662 | ||
1663 | CASE (sem, INSN_XNOR) : /* xnor $src1, $src2, $dst */ | |
1664 | { | |
1665 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1666 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1667 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1668 | int UNUSED written = 0; | |
1669 | IADDR UNUSED pc = abuf->addr; | |
1670 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1671 | ||
1672 | { | |
1673 | SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2))); | |
1674 | * FLD (i_dst) = opval; | |
1675 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1676 | } | |
1677 | ||
1678 | #undef FLD | |
1679 | } | |
1680 | NEXT (vpc); | |
1681 | ||
1682 | CASE (sem, INSN_XNOR1) : /* xnor $lit1, $src2, $dst */ | |
1683 | { | |
1684 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1685 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1686 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1687 | int UNUSED written = 0; | |
1688 | IADDR UNUSED pc = abuf->addr; | |
1689 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1690 | ||
1691 | { | |
1692 | SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2))); | |
1693 | * FLD (i_dst) = opval; | |
1694 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1695 | } | |
1696 | ||
1697 | #undef FLD | |
1698 | } | |
1699 | NEXT (vpc); | |
1700 | ||
1701 | CASE (sem, INSN_XNOR2) : /* xnor $src1, $lit2, $dst */ | |
1702 | { | |
1703 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1704 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1705 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1706 | int UNUSED written = 0; | |
1707 | IADDR UNUSED pc = abuf->addr; | |
1708 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1709 | ||
1710 | { | |
1711 | SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2))); | |
1712 | * FLD (i_dst) = opval; | |
1713 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1714 | } | |
1715 | ||
1716 | #undef FLD | |
1717 | } | |
1718 | NEXT (vpc); | |
1719 | ||
1720 | CASE (sem, INSN_XNOR3) : /* xnor $lit1, $lit2, $dst */ | |
1721 | { | |
1722 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1723 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1724 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1725 | int UNUSED written = 0; | |
1726 | IADDR UNUSED pc = abuf->addr; | |
1727 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1728 | ||
1729 | { | |
1730 | SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2))); | |
1731 | * FLD (i_dst) = opval; | |
1732 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1733 | } | |
1734 | ||
c906108c SS |
1735 | #undef FLD |
1736 | } | |
1737 | NEXT (vpc); | |
1738 | ||
1739 | CASE (sem, INSN_NOT) : /* not $src1, $src2, $dst */ | |
1740 | { | |
1741 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1742 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1743 | #define FLD(f) abuf->fields.fmt_not.f | |
1744 | int UNUSED written = 0; | |
1745 | IADDR UNUSED pc = abuf->addr; | |
1746 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1747 | ||
1748 | { | |
1749 | SI opval = INVSI (* FLD (i_src1)); | |
1750 | * FLD (i_dst) = opval; | |
1751 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1752 | } | |
1753 | ||
1754 | #undef FLD | |
1755 | } | |
1756 | NEXT (vpc); | |
1757 | ||
1758 | CASE (sem, INSN_NOT1) : /* not $lit1, $src2, $dst */ | |
1759 | { | |
1760 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1761 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1762 | #define FLD(f) abuf->fields.fmt_not1.f | |
1763 | int UNUSED written = 0; | |
1764 | IADDR UNUSED pc = abuf->addr; | |
1765 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1766 | ||
1767 | { | |
1768 | SI opval = INVSI (FLD (f_src1)); | |
1769 | * FLD (i_dst) = opval; | |
1770 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1771 | } | |
1772 | ||
1773 | #undef FLD | |
1774 | } | |
1775 | NEXT (vpc); | |
1776 | ||
1777 | CASE (sem, INSN_NOT2) : /* not $src1, $lit2, $dst */ | |
1778 | { | |
1779 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1780 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1781 | #define FLD(f) abuf->fields.fmt_not2.f | |
1782 | int UNUSED written = 0; | |
1783 | IADDR UNUSED pc = abuf->addr; | |
1784 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1785 | ||
1786 | { | |
1787 | SI opval = INVSI (* FLD (i_src1)); | |
1788 | * FLD (i_dst) = opval; | |
1789 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1790 | } | |
1791 | ||
1792 | #undef FLD | |
1793 | } | |
1794 | NEXT (vpc); | |
1795 | ||
1796 | CASE (sem, INSN_NOT3) : /* not $lit1, $lit2, $dst */ | |
1797 | { | |
1798 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1799 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1800 | #define FLD(f) abuf->fields.fmt_not3.f | |
1801 | int UNUSED written = 0; | |
1802 | IADDR UNUSED pc = abuf->addr; | |
1803 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1804 | ||
1805 | { | |
1806 | SI opval = INVSI (FLD (f_src1)); | |
1807 | * FLD (i_dst) = opval; | |
1808 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1809 | } | |
1810 | ||
7a292a7a SS |
1811 | #undef FLD |
1812 | } | |
1813 | NEXT (vpc); | |
1814 | ||
1815 | CASE (sem, INSN_ORNOT) : /* ornot $src1, $src2, $dst */ | |
1816 | { | |
1817 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1818 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1819 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1820 | int UNUSED written = 0; | |
1821 | IADDR UNUSED pc = abuf->addr; | |
1822 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1823 | ||
1824 | { | |
1825 | SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1826 | * FLD (i_dst) = opval; | |
1827 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1828 | } | |
1829 | ||
1830 | #undef FLD | |
1831 | } | |
1832 | NEXT (vpc); | |
1833 | ||
1834 | CASE (sem, INSN_ORNOT1) : /* ornot $lit1, $src2, $dst */ | |
1835 | { | |
1836 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1837 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1838 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1839 | int UNUSED written = 0; | |
1840 | IADDR UNUSED pc = abuf->addr; | |
1841 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1842 | ||
1843 | { | |
1844 | SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1845 | * FLD (i_dst) = opval; | |
1846 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1847 | } | |
1848 | ||
1849 | #undef FLD | |
1850 | } | |
1851 | NEXT (vpc); | |
1852 | ||
1853 | CASE (sem, INSN_ORNOT2) : /* ornot $src1, $lit2, $dst */ | |
1854 | { | |
1855 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1856 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1857 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1858 | int UNUSED written = 0; | |
1859 | IADDR UNUSED pc = abuf->addr; | |
1860 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1861 | ||
1862 | { | |
1863 | SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1864 | * FLD (i_dst) = opval; | |
1865 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1866 | } | |
1867 | ||
1868 | #undef FLD | |
1869 | } | |
1870 | NEXT (vpc); | |
1871 | ||
1872 | CASE (sem, INSN_ORNOT3) : /* ornot $lit1, $lit2, $dst */ | |
1873 | { | |
1874 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1875 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1876 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1877 | int UNUSED written = 0; | |
1878 | IADDR UNUSED pc = abuf->addr; | |
1879 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1880 | ||
1881 | { | |
1882 | SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1883 | * FLD (i_dst) = opval; | |
1884 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1885 | } | |
1886 | ||
c906108c SS |
1887 | #undef FLD |
1888 | } | |
1889 | NEXT (vpc); | |
1890 | ||
1891 | CASE (sem, INSN_CLRBIT) : /* clrbit $src1, $src2, $dst */ | |
1892 | { | |
1893 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1894 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1895 | #define FLD(f) abuf->fields.fmt_notbit.f | |
1896 | int UNUSED written = 0; | |
1897 | IADDR UNUSED pc = abuf->addr; | |
1898 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1899 | ||
1900 | { | |
1901 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2)); | |
1902 | * FLD (i_dst) = opval; | |
1903 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1904 | } | |
1905 | ||
1906 | #undef FLD | |
1907 | } | |
1908 | NEXT (vpc); | |
1909 | ||
1910 | CASE (sem, INSN_CLRBIT1) : /* clrbit $lit1, $src2, $dst */ | |
1911 | { | |
1912 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1913 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1914 | #define FLD(f) abuf->fields.fmt_notbit1.f | |
1915 | int UNUSED written = 0; | |
1916 | IADDR UNUSED pc = abuf->addr; | |
1917 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1918 | ||
1919 | { | |
1920 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2)); | |
1921 | * FLD (i_dst) = opval; | |
1922 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1923 | } | |
1924 | ||
1925 | #undef FLD | |
1926 | } | |
1927 | NEXT (vpc); | |
1928 | ||
1929 | CASE (sem, INSN_CLRBIT2) : /* clrbit $src1, $lit2, $dst */ | |
1930 | { | |
1931 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1932 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1933 | #define FLD(f) abuf->fields.fmt_notbit2.f | |
1934 | int UNUSED written = 0; | |
1935 | IADDR UNUSED pc = abuf->addr; | |
1936 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1937 | ||
1938 | { | |
1939 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2)); | |
1940 | * FLD (i_dst) = opval; | |
1941 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1942 | } | |
1943 | ||
1944 | #undef FLD | |
1945 | } | |
1946 | NEXT (vpc); | |
1947 | ||
1948 | CASE (sem, INSN_CLRBIT3) : /* clrbit $lit1, $lit2, $dst */ | |
1949 | { | |
1950 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1951 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1952 | #define FLD(f) abuf->fields.fmt_notbit3.f | |
1953 | int UNUSED written = 0; | |
1954 | IADDR UNUSED pc = abuf->addr; | |
1955 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1956 | ||
1957 | { | |
1958 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2)); | |
1959 | * FLD (i_dst) = opval; | |
1960 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1961 | } | |
1962 | ||
1963 | #undef FLD | |
1964 | } | |
1965 | NEXT (vpc); | |
1966 | ||
1967 | CASE (sem, INSN_SHLO) : /* shlo $src1, $src2, $dst */ | |
1968 | { | |
1969 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1970 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 1971 | #define FLD(f) abuf->fields.fmt_shlo.f |
c906108c SS |
1972 | int UNUSED written = 0; |
1973 | IADDR UNUSED pc = abuf->addr; | |
1974 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1975 | ||
1976 | { | |
7a292a7a | 1977 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
1978 | * FLD (i_dst) = opval; |
1979 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1980 | } | |
1981 | ||
1982 | #undef FLD | |
1983 | } | |
1984 | NEXT (vpc); | |
1985 | ||
1986 | CASE (sem, INSN_SHLO1) : /* shlo $lit1, $src2, $dst */ | |
1987 | { | |
1988 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1989 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 1990 | #define FLD(f) abuf->fields.fmt_shlo1.f |
c906108c SS |
1991 | int UNUSED written = 0; |
1992 | IADDR UNUSED pc = abuf->addr; | |
1993 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1994 | ||
1995 | { | |
7a292a7a | 1996 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
1997 | * FLD (i_dst) = opval; |
1998 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1999 | } | |
2000 | ||
2001 | #undef FLD | |
2002 | } | |
2003 | NEXT (vpc); | |
2004 | ||
2005 | CASE (sem, INSN_SHLO2) : /* shlo $src1, $lit2, $dst */ | |
2006 | { | |
2007 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2008 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2009 | #define FLD(f) abuf->fields.fmt_shlo2.f |
c906108c SS |
2010 | int UNUSED written = 0; |
2011 | IADDR UNUSED pc = abuf->addr; | |
2012 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2013 | ||
2014 | { | |
7a292a7a | 2015 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2016 | * FLD (i_dst) = opval; |
2017 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2018 | } | |
2019 | ||
2020 | #undef FLD | |
2021 | } | |
2022 | NEXT (vpc); | |
2023 | ||
2024 | CASE (sem, INSN_SHLO3) : /* shlo $lit1, $lit2, $dst */ | |
2025 | { | |
2026 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2027 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2028 | #define FLD(f) abuf->fields.fmt_shlo3.f |
c906108c SS |
2029 | int UNUSED written = 0; |
2030 | IADDR UNUSED pc = abuf->addr; | |
2031 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2032 | ||
2033 | { | |
7a292a7a | 2034 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2035 | * FLD (i_dst) = opval; |
2036 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2037 | } | |
2038 | ||
2039 | #undef FLD | |
2040 | } | |
2041 | NEXT (vpc); | |
2042 | ||
2043 | CASE (sem, INSN_SHRO) : /* shro $src1, $src2, $dst */ | |
2044 | { | |
2045 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2046 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2047 | #define FLD(f) abuf->fields.fmt_shlo.f |
c906108c SS |
2048 | int UNUSED written = 0; |
2049 | IADDR UNUSED pc = abuf->addr; | |
2050 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2051 | ||
2052 | { | |
7a292a7a | 2053 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2054 | * FLD (i_dst) = opval; |
2055 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2056 | } | |
2057 | ||
2058 | #undef FLD | |
2059 | } | |
2060 | NEXT (vpc); | |
2061 | ||
2062 | CASE (sem, INSN_SHRO1) : /* shro $lit1, $src2, $dst */ | |
2063 | { | |
2064 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2065 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2066 | #define FLD(f) abuf->fields.fmt_shlo1.f |
c906108c SS |
2067 | int UNUSED written = 0; |
2068 | IADDR UNUSED pc = abuf->addr; | |
2069 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2070 | ||
2071 | { | |
7a292a7a | 2072 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2073 | * FLD (i_dst) = opval; |
2074 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2075 | } | |
2076 | ||
2077 | #undef FLD | |
2078 | } | |
2079 | NEXT (vpc); | |
2080 | ||
2081 | CASE (sem, INSN_SHRO2) : /* shro $src1, $lit2, $dst */ | |
2082 | { | |
2083 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2084 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2085 | #define FLD(f) abuf->fields.fmt_shlo2.f |
c906108c SS |
2086 | int UNUSED written = 0; |
2087 | IADDR UNUSED pc = abuf->addr; | |
2088 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2089 | ||
2090 | { | |
7a292a7a | 2091 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2092 | * FLD (i_dst) = opval; |
2093 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2094 | } | |
2095 | ||
2096 | #undef FLD | |
2097 | } | |
2098 | NEXT (vpc); | |
2099 | ||
2100 | CASE (sem, INSN_SHRO3) : /* shro $lit1, $lit2, $dst */ | |
2101 | { | |
2102 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2103 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2104 | #define FLD(f) abuf->fields.fmt_shlo3.f |
c906108c SS |
2105 | int UNUSED written = 0; |
2106 | IADDR UNUSED pc = abuf->addr; | |
2107 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2108 | ||
2109 | { | |
7a292a7a | 2110 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2111 | * FLD (i_dst) = opval; |
2112 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2113 | } | |
2114 | ||
2115 | #undef FLD | |
2116 | } | |
2117 | NEXT (vpc); | |
2118 | ||
2119 | CASE (sem, INSN_SHLI) : /* shli $src1, $src2, $dst */ | |
2120 | { | |
2121 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2122 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2123 | #define FLD(f) abuf->fields.fmt_shlo.f |
c906108c SS |
2124 | int UNUSED written = 0; |
2125 | IADDR UNUSED pc = abuf->addr; | |
2126 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2127 | ||
2128 | { | |
7a292a7a | 2129 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2130 | * FLD (i_dst) = opval; |
2131 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2132 | } | |
2133 | ||
2134 | #undef FLD | |
2135 | } | |
2136 | NEXT (vpc); | |
2137 | ||
2138 | CASE (sem, INSN_SHLI1) : /* shli $lit1, $src2, $dst */ | |
2139 | { | |
2140 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2141 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2142 | #define FLD(f) abuf->fields.fmt_shlo1.f |
c906108c SS |
2143 | int UNUSED written = 0; |
2144 | IADDR UNUSED pc = abuf->addr; | |
2145 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2146 | ||
2147 | { | |
7a292a7a | 2148 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2149 | * FLD (i_dst) = opval; |
2150 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2151 | } | |
2152 | ||
2153 | #undef FLD | |
2154 | } | |
2155 | NEXT (vpc); | |
2156 | ||
2157 | CASE (sem, INSN_SHLI2) : /* shli $src1, $lit2, $dst */ | |
2158 | { | |
2159 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2160 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2161 | #define FLD(f) abuf->fields.fmt_shlo2.f |
c906108c SS |
2162 | int UNUSED written = 0; |
2163 | IADDR UNUSED pc = abuf->addr; | |
2164 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2165 | ||
2166 | { | |
7a292a7a | 2167 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2168 | * FLD (i_dst) = opval; |
2169 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2170 | } | |
2171 | ||
2172 | #undef FLD | |
2173 | } | |
2174 | NEXT (vpc); | |
2175 | ||
2176 | CASE (sem, INSN_SHLI3) : /* shli $lit1, $lit2, $dst */ | |
2177 | { | |
2178 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2179 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2180 | #define FLD(f) abuf->fields.fmt_shlo3.f |
c906108c SS |
2181 | int UNUSED written = 0; |
2182 | IADDR UNUSED pc = abuf->addr; | |
2183 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2184 | ||
2185 | { | |
7a292a7a | 2186 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2187 | * FLD (i_dst) = opval; |
2188 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2189 | } | |
2190 | ||
2191 | #undef FLD | |
2192 | } | |
2193 | NEXT (vpc); | |
2194 | ||
2195 | CASE (sem, INSN_SHRI) : /* shri $src1, $src2, $dst */ | |
2196 | { | |
2197 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2198 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2199 | #define FLD(f) abuf->fields.fmt_shlo.f |
c906108c SS |
2200 | int UNUSED written = 0; |
2201 | IADDR UNUSED pc = abuf->addr; | |
2202 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2203 | ||
2204 | { | |
7a292a7a | 2205 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2206 | * FLD (i_dst) = opval; |
2207 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2208 | } | |
2209 | ||
2210 | #undef FLD | |
2211 | } | |
2212 | NEXT (vpc); | |
2213 | ||
2214 | CASE (sem, INSN_SHRI1) : /* shri $lit1, $src2, $dst */ | |
2215 | { | |
2216 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2217 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2218 | #define FLD(f) abuf->fields.fmt_shlo1.f |
c906108c SS |
2219 | int UNUSED written = 0; |
2220 | IADDR UNUSED pc = abuf->addr; | |
2221 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2222 | ||
2223 | { | |
7a292a7a | 2224 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2225 | * FLD (i_dst) = opval; |
2226 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2227 | } | |
2228 | ||
2229 | #undef FLD | |
2230 | } | |
2231 | NEXT (vpc); | |
2232 | ||
2233 | CASE (sem, INSN_SHRI2) : /* shri $src1, $lit2, $dst */ | |
2234 | { | |
2235 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2236 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2237 | #define FLD(f) abuf->fields.fmt_shlo2.f |
c906108c SS |
2238 | int UNUSED written = 0; |
2239 | IADDR UNUSED pc = abuf->addr; | |
2240 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2241 | ||
2242 | { | |
7a292a7a | 2243 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2244 | * FLD (i_dst) = opval; |
2245 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2246 | } | |
2247 | ||
2248 | #undef FLD | |
2249 | } | |
2250 | NEXT (vpc); | |
2251 | ||
2252 | CASE (sem, INSN_SHRI3) : /* shri $lit1, $lit2, $dst */ | |
2253 | { | |
2254 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2255 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7a292a7a | 2256 | #define FLD(f) abuf->fields.fmt_shlo3.f |
c906108c SS |
2257 | int UNUSED written = 0; |
2258 | IADDR UNUSED pc = abuf->addr; | |
2259 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2260 | ||
2261 | { | |
7a292a7a | 2262 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2263 | * FLD (i_dst) = opval; |
2264 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2265 | } | |
2266 | ||
2267 | #undef FLD | |
2268 | } | |
2269 | NEXT (vpc); | |
2270 | ||
2271 | CASE (sem, INSN_EMUL) : /* emul $src1, $src2, $dst */ | |
2272 | { | |
2273 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2274 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2275 | #define FLD(f) abuf->fields.fmt_emul.f | |
2276 | int UNUSED written = 0; | |
2277 | IADDR UNUSED pc = abuf->addr; | |
2278 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2279 | ||
7a292a7a | 2280 | { |
c906108c | 2281 | DI tmp_temp; |
7a292a7a | 2282 | SI tmp_dregno; |
c906108c SS |
2283 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2))); |
2284 | tmp_dregno = FLD (f_srcdst); | |
2285 | { | |
2286 | SI opval = TRUNCDISI (tmp_temp); | |
2287 | * FLD (i_dst) = opval; | |
2288 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2289 | } | |
2290 | { | |
2291 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2292 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2293 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2294 | } |
7a292a7a | 2295 | } |
c906108c SS |
2296 | |
2297 | #undef FLD | |
2298 | } | |
2299 | NEXT (vpc); | |
2300 | ||
2301 | CASE (sem, INSN_EMUL1) : /* emul $lit1, $src2, $dst */ | |
2302 | { | |
2303 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2304 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2305 | #define FLD(f) abuf->fields.fmt_emul1.f | |
2306 | int UNUSED written = 0; | |
2307 | IADDR UNUSED pc = abuf->addr; | |
2308 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2309 | ||
7a292a7a | 2310 | { |
c906108c | 2311 | DI tmp_temp; |
7a292a7a | 2312 | SI tmp_dregno; |
c906108c SS |
2313 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2))); |
2314 | tmp_dregno = FLD (f_srcdst); | |
2315 | { | |
2316 | SI opval = TRUNCDISI (tmp_temp); | |
2317 | * FLD (i_dst) = opval; | |
2318 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2319 | } | |
2320 | { | |
2321 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2322 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2323 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2324 | } |
7a292a7a | 2325 | } |
c906108c SS |
2326 | |
2327 | #undef FLD | |
2328 | } | |
2329 | NEXT (vpc); | |
2330 | ||
2331 | CASE (sem, INSN_EMUL2) : /* emul $src1, $lit2, $dst */ | |
2332 | { | |
2333 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2334 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2335 | #define FLD(f) abuf->fields.fmt_emul2.f | |
2336 | int UNUSED written = 0; | |
2337 | IADDR UNUSED pc = abuf->addr; | |
2338 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2339 | ||
7a292a7a | 2340 | { |
c906108c | 2341 | DI tmp_temp; |
7a292a7a | 2342 | SI tmp_dregno; |
c906108c SS |
2343 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2))); |
2344 | tmp_dregno = FLD (f_srcdst); | |
2345 | { | |
2346 | SI opval = TRUNCDISI (tmp_temp); | |
2347 | * FLD (i_dst) = opval; | |
2348 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2349 | } | |
2350 | { | |
2351 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2352 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2353 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2354 | } |
7a292a7a | 2355 | } |
c906108c SS |
2356 | |
2357 | #undef FLD | |
2358 | } | |
2359 | NEXT (vpc); | |
2360 | ||
2361 | CASE (sem, INSN_EMUL3) : /* emul $lit1, $lit2, $dst */ | |
2362 | { | |
2363 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2364 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2365 | #define FLD(f) abuf->fields.fmt_emul3.f | |
2366 | int UNUSED written = 0; | |
2367 | IADDR UNUSED pc = abuf->addr; | |
2368 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2369 | ||
7a292a7a | 2370 | { |
c906108c | 2371 | DI tmp_temp; |
7a292a7a | 2372 | SI tmp_dregno; |
c906108c SS |
2373 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2))); |
2374 | tmp_dregno = FLD (f_srcdst); | |
2375 | { | |
2376 | SI opval = TRUNCDISI (tmp_temp); | |
2377 | * FLD (i_dst) = opval; | |
2378 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2379 | } | |
2380 | { | |
2381 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2382 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2383 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2384 | } |
7a292a7a | 2385 | } |
c906108c SS |
2386 | |
2387 | #undef FLD | |
2388 | } | |
2389 | NEXT (vpc); | |
2390 | ||
2391 | CASE (sem, INSN_MOV) : /* mov $src1, $dst */ | |
2392 | { | |
2393 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2394 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2395 | #define FLD(f) abuf->fields.fmt_not2.f | |
2396 | int UNUSED written = 0; | |
2397 | IADDR UNUSED pc = abuf->addr; | |
2398 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2399 | ||
2400 | { | |
2401 | SI opval = * FLD (i_src1); | |
2402 | * FLD (i_dst) = opval; | |
2403 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2404 | } | |
2405 | ||
2406 | #undef FLD | |
2407 | } | |
2408 | NEXT (vpc); | |
2409 | ||
2410 | CASE (sem, INSN_MOV1) : /* mov $lit1, $dst */ | |
2411 | { | |
2412 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2413 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2414 | #define FLD(f) abuf->fields.fmt_not3.f | |
2415 | int UNUSED written = 0; | |
2416 | IADDR UNUSED pc = abuf->addr; | |
2417 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2418 | ||
2419 | { | |
2420 | SI opval = FLD (f_src1); | |
2421 | * FLD (i_dst) = opval; | |
2422 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2423 | } | |
2424 | ||
2425 | #undef FLD | |
2426 | } | |
2427 | NEXT (vpc); | |
2428 | ||
2429 | CASE (sem, INSN_MOVL) : /* movl $src1, $dst */ | |
2430 | { | |
2431 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2432 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2433 | #define FLD(f) abuf->fields.fmt_movl.f | |
2434 | int UNUSED written = 0; | |
2435 | IADDR UNUSED pc = abuf->addr; | |
2436 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2437 | ||
7a292a7a | 2438 | { |
c906108c | 2439 | SI tmp_dregno; |
7a292a7a | 2440 | SI tmp_sregno; |
c906108c SS |
2441 | tmp_dregno = FLD (f_srcdst); |
2442 | tmp_sregno = FLD (f_src1); | |
2443 | { | |
2444 | SI opval = * FLD (i_src1); | |
2445 | * FLD (i_dst) = opval; | |
2446 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2447 | } | |
2448 | { | |
2449 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2450 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2451 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2452 | } |
7a292a7a | 2453 | } |
c906108c SS |
2454 | |
2455 | #undef FLD | |
2456 | } | |
2457 | NEXT (vpc); | |
2458 | ||
2459 | CASE (sem, INSN_MOVL1) : /* movl $lit1, $dst */ | |
2460 | { | |
2461 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2462 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2463 | #define FLD(f) abuf->fields.fmt_movl1.f | |
2464 | int UNUSED written = 0; | |
2465 | IADDR UNUSED pc = abuf->addr; | |
2466 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2467 | ||
7a292a7a | 2468 | { |
c906108c SS |
2469 | SI tmp_dregno; |
2470 | tmp_dregno = FLD (f_srcdst); | |
2471 | { | |
2472 | SI opval = FLD (f_src1); | |
2473 | * FLD (i_dst) = opval; | |
2474 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2475 | } | |
2476 | { | |
2477 | SI opval = 0; | |
2478 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2479 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2480 | } |
7a292a7a | 2481 | } |
c906108c SS |
2482 | |
2483 | #undef FLD | |
2484 | } | |
2485 | NEXT (vpc); | |
2486 | ||
2487 | CASE (sem, INSN_MOVT) : /* movt $src1, $dst */ | |
2488 | { | |
2489 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2490 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2491 | #define FLD(f) abuf->fields.fmt_movt.f | |
2492 | int UNUSED written = 0; | |
2493 | IADDR UNUSED pc = abuf->addr; | |
2494 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2495 | ||
7a292a7a | 2496 | { |
c906108c | 2497 | SI tmp_dregno; |
7a292a7a | 2498 | SI tmp_sregno; |
c906108c SS |
2499 | tmp_dregno = FLD (f_srcdst); |
2500 | tmp_sregno = FLD (f_src1); | |
2501 | { | |
2502 | SI opval = * FLD (i_src1); | |
2503 | * FLD (i_dst) = opval; | |
2504 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2505 | } | |
2506 | { | |
2507 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2508 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2509 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2510 | } |
2511 | { | |
2512 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2513 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2514 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 2515 | } |
7a292a7a | 2516 | } |
c906108c SS |
2517 | |
2518 | #undef FLD | |
2519 | } | |
2520 | NEXT (vpc); | |
2521 | ||
2522 | CASE (sem, INSN_MOVT1) : /* movt $lit1, $dst */ | |
2523 | { | |
2524 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2525 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2526 | #define FLD(f) abuf->fields.fmt_movt1.f | |
2527 | int UNUSED written = 0; | |
2528 | IADDR UNUSED pc = abuf->addr; | |
2529 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2530 | ||
7a292a7a | 2531 | { |
c906108c SS |
2532 | SI tmp_dregno; |
2533 | tmp_dregno = FLD (f_srcdst); | |
2534 | { | |
2535 | SI opval = FLD (f_src1); | |
2536 | * FLD (i_dst) = opval; | |
2537 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2538 | } | |
2539 | { | |
2540 | SI opval = 0; | |
2541 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2542 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2543 | } |
2544 | { | |
2545 | SI opval = 0; | |
2546 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2547 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 2548 | } |
7a292a7a | 2549 | } |
c906108c SS |
2550 | |
2551 | #undef FLD | |
2552 | } | |
2553 | NEXT (vpc); | |
2554 | ||
2555 | CASE (sem, INSN_MOVQ) : /* movq $src1, $dst */ | |
2556 | { | |
2557 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2558 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2559 | #define FLD(f) abuf->fields.fmt_movq.f | |
2560 | int UNUSED written = 0; | |
2561 | IADDR UNUSED pc = abuf->addr; | |
2562 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2563 | ||
7a292a7a | 2564 | { |
c906108c | 2565 | SI tmp_dregno; |
7a292a7a | 2566 | SI tmp_sregno; |
c906108c SS |
2567 | tmp_dregno = FLD (f_srcdst); |
2568 | tmp_sregno = FLD (f_src1); | |
2569 | { | |
2570 | SI opval = * FLD (i_src1); | |
2571 | * FLD (i_dst) = opval; | |
2572 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2573 | } | |
2574 | { | |
2575 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2576 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2577 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2578 | } |
2579 | { | |
2580 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2581 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2582 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
2583 | } |
2584 | { | |
2585 | SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]); | |
2586 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 2587 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 2588 | } |
7a292a7a | 2589 | } |
c906108c SS |
2590 | |
2591 | #undef FLD | |
2592 | } | |
2593 | NEXT (vpc); | |
2594 | ||
2595 | CASE (sem, INSN_MOVQ1) : /* movq $lit1, $dst */ | |
2596 | { | |
2597 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2598 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2599 | #define FLD(f) abuf->fields.fmt_movq1.f | |
2600 | int UNUSED written = 0; | |
2601 | IADDR UNUSED pc = abuf->addr; | |
2602 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2603 | ||
7a292a7a | 2604 | { |
c906108c SS |
2605 | SI tmp_dregno; |
2606 | tmp_dregno = FLD (f_srcdst); | |
2607 | { | |
2608 | SI opval = FLD (f_src1); | |
2609 | * FLD (i_dst) = opval; | |
2610 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2611 | } | |
2612 | { | |
2613 | SI opval = 0; | |
2614 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2615 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2616 | } |
2617 | { | |
2618 | SI opval = 0; | |
2619 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2620 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
2621 | } |
2622 | { | |
2623 | SI opval = 0; | |
2624 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 2625 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 2626 | } |
7a292a7a | 2627 | } |
c906108c SS |
2628 | |
2629 | #undef FLD | |
2630 | } | |
2631 | NEXT (vpc); | |
2632 | ||
2633 | CASE (sem, INSN_MODPC) : /* modpc $src1, $src2, $dst */ | |
2634 | { | |
2635 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2636 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2637 | #define FLD(f) abuf->fields.fmt_modpc.f | |
2638 | int UNUSED written = 0; | |
2639 | IADDR UNUSED pc = abuf->addr; | |
2640 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2641 | ||
2642 | { | |
2643 | SI opval = * FLD (i_src2); | |
2644 | * FLD (i_dst) = opval; | |
2645 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2646 | } | |
2647 | ||
2648 | #undef FLD | |
2649 | } | |
2650 | NEXT (vpc); | |
2651 | ||
2652 | CASE (sem, INSN_MODAC) : /* modac $src1, $src2, $dst */ | |
2653 | { | |
2654 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2655 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2656 | #define FLD(f) abuf->fields.fmt_modpc.f | |
2657 | int UNUSED written = 0; | |
2658 | IADDR UNUSED pc = abuf->addr; | |
2659 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2660 | ||
2661 | { | |
2662 | SI opval = * FLD (i_src2); | |
2663 | * FLD (i_dst) = opval; | |
2664 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2665 | } | |
2666 | ||
2667 | #undef FLD | |
2668 | } | |
2669 | NEXT (vpc); | |
2670 | ||
2671 | CASE (sem, INSN_LDA_OFFSET) : /* lda $offset, $dst */ | |
2672 | { | |
2673 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2674 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2675 | #define FLD(f) abuf->fields.fmt_lda_offset.f | |
2676 | int UNUSED written = 0; | |
2677 | IADDR UNUSED pc = abuf->addr; | |
2678 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2679 | ||
2680 | { | |
2681 | SI opval = FLD (f_offset); | |
2682 | * FLD (i_dst) = opval; | |
2683 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2684 | } | |
2685 | ||
2686 | #undef FLD | |
2687 | } | |
2688 | NEXT (vpc); | |
2689 | ||
2690 | CASE (sem, INSN_LDA_INDIRECT_OFFSET) : /* lda $offset($abase), $dst */ | |
2691 | { | |
2692 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2693 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2694 | #define FLD(f) abuf->fields.fmt_lda_indirect_offset.f | |
2695 | int UNUSED written = 0; | |
2696 | IADDR UNUSED pc = abuf->addr; | |
2697 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2698 | ||
2699 | { | |
2700 | SI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
2701 | * FLD (i_dst) = opval; | |
2702 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2703 | } | |
2704 | ||
2705 | #undef FLD | |
2706 | } | |
2707 | NEXT (vpc); | |
2708 | ||
2709 | CASE (sem, INSN_LDA_INDIRECT) : /* lda ($abase), $dst */ | |
2710 | { | |
2711 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2712 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2713 | #define FLD(f) abuf->fields.fmt_lda_indirect.f | |
2714 | int UNUSED written = 0; | |
2715 | IADDR UNUSED pc = abuf->addr; | |
2716 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2717 | ||
2718 | { | |
2719 | SI opval = * FLD (i_abase); | |
2720 | * FLD (i_dst) = opval; | |
2721 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2722 | } | |
2723 | ||
2724 | #undef FLD | |
2725 | } | |
2726 | NEXT (vpc); | |
2727 | ||
2728 | CASE (sem, INSN_LDA_INDIRECT_INDEX) : /* lda ($abase)[$index*S$scale], $dst */ | |
2729 | { | |
2730 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2731 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2732 | #define FLD(f) abuf->fields.fmt_lda_indirect_index.f | |
2733 | int UNUSED written = 0; | |
2734 | IADDR UNUSED pc = abuf->addr; | |
2735 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2736 | ||
2737 | { | |
2738 | SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2739 | * FLD (i_dst) = opval; | |
2740 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2741 | } | |
2742 | ||
2743 | #undef FLD | |
2744 | } | |
2745 | NEXT (vpc); | |
2746 | ||
2747 | CASE (sem, INSN_LDA_DISP) : /* lda $optdisp, $dst */ | |
2748 | { | |
2749 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2750 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2751 | #define FLD(f) abuf->fields.fmt_lda_disp.f | |
2752 | int UNUSED written = 0; | |
2753 | IADDR UNUSED pc = abuf->addr; | |
2754 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2755 | ||
2756 | { | |
2757 | SI opval = FLD (f_optdisp); | |
2758 | * FLD (i_dst) = opval; | |
2759 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2760 | } | |
2761 | ||
2762 | #undef FLD | |
2763 | } | |
2764 | NEXT (vpc); | |
2765 | ||
2766 | CASE (sem, INSN_LDA_INDIRECT_DISP) : /* lda $optdisp($abase), $dst */ | |
2767 | { | |
2768 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2769 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2770 | #define FLD(f) abuf->fields.fmt_lda_indirect_disp.f | |
2771 | int UNUSED written = 0; | |
2772 | IADDR UNUSED pc = abuf->addr; | |
2773 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2774 | ||
2775 | { | |
2776 | SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
2777 | * FLD (i_dst) = opval; | |
2778 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2779 | } | |
2780 | ||
2781 | #undef FLD | |
2782 | } | |
2783 | NEXT (vpc); | |
2784 | ||
2785 | CASE (sem, INSN_LDA_INDEX_DISP) : /* lda $optdisp[$index*S$scale], $dst */ | |
2786 | { | |
2787 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2788 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2789 | #define FLD(f) abuf->fields.fmt_lda_index_disp.f | |
2790 | int UNUSED written = 0; | |
2791 | IADDR UNUSED pc = abuf->addr; | |
2792 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2793 | ||
2794 | { | |
2795 | SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2796 | * FLD (i_dst) = opval; | |
2797 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2798 | } | |
2799 | ||
2800 | #undef FLD | |
2801 | } | |
2802 | NEXT (vpc); | |
2803 | ||
2804 | CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) : /* lda $optdisp($abase)[$index*S$scale], $dst */ | |
2805 | { | |
2806 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2807 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2808 | #define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f | |
2809 | int UNUSED written = 0; | |
2810 | IADDR UNUSED pc = abuf->addr; | |
2811 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2812 | ||
2813 | { | |
2814 | SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2815 | * FLD (i_dst) = opval; | |
2816 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2817 | } | |
2818 | ||
2819 | #undef FLD | |
2820 | } | |
2821 | NEXT (vpc); | |
2822 | ||
2823 | CASE (sem, INSN_LD_OFFSET) : /* ld $offset, $dst */ | |
2824 | { | |
2825 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2826 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2827 | #define FLD(f) abuf->fields.fmt_ld_offset.f | |
2828 | int UNUSED written = 0; | |
2829 | IADDR UNUSED pc = abuf->addr; | |
2830 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2831 | ||
2832 | { | |
2833 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset)); | |
2834 | * FLD (i_dst) = opval; | |
2835 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2836 | } | |
2837 | ||
2838 | #undef FLD | |
2839 | } | |
2840 | NEXT (vpc); | |
2841 | ||
2842 | CASE (sem, INSN_LD_INDIRECT_OFFSET) : /* ld $offset($abase), $dst */ | |
2843 | { | |
2844 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2845 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2846 | #define FLD(f) abuf->fields.fmt_ld_indirect_offset.f | |
2847 | int UNUSED written = 0; | |
2848 | IADDR UNUSED pc = abuf->addr; | |
2849 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2850 | ||
2851 | { | |
2852 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
2853 | * FLD (i_dst) = opval; | |
2854 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2855 | } | |
2856 | ||
2857 | #undef FLD | |
2858 | } | |
2859 | NEXT (vpc); | |
2860 | ||
2861 | CASE (sem, INSN_LD_INDIRECT) : /* ld ($abase), $dst */ | |
2862 | { | |
2863 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2864 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2865 | #define FLD(f) abuf->fields.fmt_ld_indirect.f | |
2866 | int UNUSED written = 0; | |
2867 | IADDR UNUSED pc = abuf->addr; | |
2868 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2869 | ||
2870 | { | |
2871 | SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase)); | |
2872 | * FLD (i_dst) = opval; | |
2873 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2874 | } | |
2875 | ||
2876 | #undef FLD | |
2877 | } | |
2878 | NEXT (vpc); | |
2879 | ||
2880 | CASE (sem, INSN_LD_INDIRECT_INDEX) : /* ld ($abase)[$index*S$scale], $dst */ | |
2881 | { | |
2882 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2883 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2884 | #define FLD(f) abuf->fields.fmt_ld_indirect_index.f | |
2885 | int UNUSED written = 0; | |
2886 | IADDR UNUSED pc = abuf->addr; | |
2887 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2888 | ||
2889 | { | |
2890 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2891 | * FLD (i_dst) = opval; | |
2892 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2893 | } | |
2894 | ||
2895 | #undef FLD | |
2896 | } | |
2897 | NEXT (vpc); | |
2898 | ||
2899 | CASE (sem, INSN_LD_DISP) : /* ld $optdisp, $dst */ | |
2900 | { | |
2901 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2902 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2903 | #define FLD(f) abuf->fields.fmt_ld_disp.f | |
2904 | int UNUSED written = 0; | |
2905 | IADDR UNUSED pc = abuf->addr; | |
2906 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2907 | ||
2908 | { | |
2909 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp)); | |
2910 | * FLD (i_dst) = opval; | |
2911 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2912 | } | |
2913 | ||
2914 | #undef FLD | |
2915 | } | |
2916 | NEXT (vpc); | |
2917 | ||
2918 | CASE (sem, INSN_LD_INDIRECT_DISP) : /* ld $optdisp($abase), $dst */ | |
2919 | { | |
2920 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2921 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2922 | #define FLD(f) abuf->fields.fmt_ld_indirect_disp.f | |
2923 | int UNUSED written = 0; | |
2924 | IADDR UNUSED pc = abuf->addr; | |
2925 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2926 | ||
2927 | { | |
2928 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
2929 | * FLD (i_dst) = opval; | |
2930 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2931 | } | |
2932 | ||
2933 | #undef FLD | |
2934 | } | |
2935 | NEXT (vpc); | |
2936 | ||
2937 | CASE (sem, INSN_LD_INDEX_DISP) : /* ld $optdisp[$index*S$scale], $dst */ | |
2938 | { | |
2939 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2940 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2941 | #define FLD(f) abuf->fields.fmt_ld_index_disp.f | |
2942 | int UNUSED written = 0; | |
2943 | IADDR UNUSED pc = abuf->addr; | |
2944 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2945 | ||
2946 | { | |
2947 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2948 | * FLD (i_dst) = opval; | |
2949 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2950 | } | |
2951 | ||
2952 | #undef FLD | |
2953 | } | |
2954 | NEXT (vpc); | |
2955 | ||
2956 | CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) : /* ld $optdisp($abase)[$index*S$scale], $dst */ | |
2957 | { | |
2958 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2959 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2960 | #define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f | |
2961 | int UNUSED written = 0; | |
2962 | IADDR UNUSED pc = abuf->addr; | |
2963 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2964 | ||
2965 | { | |
2966 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
2967 | * FLD (i_dst) = opval; | |
2968 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2969 | } | |
2970 | ||
2971 | #undef FLD | |
2972 | } | |
2973 | NEXT (vpc); | |
2974 | ||
2975 | CASE (sem, INSN_LDOB_OFFSET) : /* ldob $offset, $dst */ | |
2976 | { | |
2977 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2978 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2979 | #define FLD(f) abuf->fields.fmt_ldob_offset.f | |
2980 | int UNUSED written = 0; | |
2981 | IADDR UNUSED pc = abuf->addr; | |
2982 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2983 | ||
2984 | { | |
2985 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset)); | |
2986 | * FLD (i_dst) = opval; | |
2987 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2988 | } | |
2989 | ||
2990 | #undef FLD | |
2991 | } | |
2992 | NEXT (vpc); | |
2993 | ||
2994 | CASE (sem, INSN_LDOB_INDIRECT_OFFSET) : /* ldob $offset($abase), $dst */ | |
2995 | { | |
2996 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2997 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2998 | #define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f | |
2999 | int UNUSED written = 0; | |
3000 | IADDR UNUSED pc = abuf->addr; | |
3001 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3002 | ||
3003 | { | |
3004 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3005 | * FLD (i_dst) = opval; | |
3006 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3007 | } | |
3008 | ||
3009 | #undef FLD | |
3010 | } | |
3011 | NEXT (vpc); | |
3012 | ||
3013 | CASE (sem, INSN_LDOB_INDIRECT) : /* ldob ($abase), $dst */ | |
3014 | { | |
3015 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3016 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3017 | #define FLD(f) abuf->fields.fmt_ldob_indirect.f | |
3018 | int UNUSED written = 0; | |
3019 | IADDR UNUSED pc = abuf->addr; | |
3020 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3021 | ||
3022 | { | |
3023 | SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase)); | |
3024 | * FLD (i_dst) = opval; | |
3025 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3026 | } | |
3027 | ||
3028 | #undef FLD | |
3029 | } | |
3030 | NEXT (vpc); | |
3031 | ||
3032 | CASE (sem, INSN_LDOB_INDIRECT_INDEX) : /* ldob ($abase)[$index*S$scale], $dst */ | |
3033 | { | |
3034 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3035 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3036 | #define FLD(f) abuf->fields.fmt_ldob_indirect_index.f | |
3037 | int UNUSED written = 0; | |
3038 | IADDR UNUSED pc = abuf->addr; | |
3039 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3040 | ||
3041 | { | |
3042 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3043 | * FLD (i_dst) = opval; | |
3044 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3045 | } | |
3046 | ||
3047 | #undef FLD | |
3048 | } | |
3049 | NEXT (vpc); | |
3050 | ||
3051 | CASE (sem, INSN_LDOB_DISP) : /* ldob $optdisp, $dst */ | |
3052 | { | |
3053 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3054 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3055 | #define FLD(f) abuf->fields.fmt_ldob_disp.f | |
3056 | int UNUSED written = 0; | |
3057 | IADDR UNUSED pc = abuf->addr; | |
3058 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3059 | ||
3060 | { | |
3061 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp)); | |
3062 | * FLD (i_dst) = opval; | |
3063 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3064 | } | |
3065 | ||
3066 | #undef FLD | |
3067 | } | |
3068 | NEXT (vpc); | |
3069 | ||
3070 | CASE (sem, INSN_LDOB_INDIRECT_DISP) : /* ldob $optdisp($abase), $dst */ | |
3071 | { | |
3072 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3073 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3074 | #define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f | |
3075 | int UNUSED written = 0; | |
3076 | IADDR UNUSED pc = abuf->addr; | |
3077 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3078 | ||
3079 | { | |
3080 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3081 | * FLD (i_dst) = opval; | |
3082 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3083 | } | |
3084 | ||
3085 | #undef FLD | |
3086 | } | |
3087 | NEXT (vpc); | |
3088 | ||
3089 | CASE (sem, INSN_LDOB_INDEX_DISP) : /* ldob $optdisp[$index*S$scale], $dst */ | |
3090 | { | |
3091 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3092 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3093 | #define FLD(f) abuf->fields.fmt_ldob_index_disp.f | |
3094 | int UNUSED written = 0; | |
3095 | IADDR UNUSED pc = abuf->addr; | |
3096 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3097 | ||
3098 | { | |
3099 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3100 | * FLD (i_dst) = opval; | |
3101 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3102 | } | |
3103 | ||
3104 | #undef FLD | |
3105 | } | |
3106 | NEXT (vpc); | |
3107 | ||
3108 | CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) : /* ldob $optdisp($abase)[$index*S$scale], $dst */ | |
3109 | { | |
3110 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3111 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3112 | #define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f | |
3113 | int UNUSED written = 0; | |
3114 | IADDR UNUSED pc = abuf->addr; | |
3115 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3116 | ||
3117 | { | |
3118 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3119 | * FLD (i_dst) = opval; | |
3120 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3121 | } | |
3122 | ||
3123 | #undef FLD | |
3124 | } | |
3125 | NEXT (vpc); | |
3126 | ||
3127 | CASE (sem, INSN_LDOS_OFFSET) : /* ldos $offset, $dst */ | |
3128 | { | |
3129 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3130 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3131 | #define FLD(f) abuf->fields.fmt_ldos_offset.f | |
3132 | int UNUSED written = 0; | |
3133 | IADDR UNUSED pc = abuf->addr; | |
3134 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3135 | ||
3136 | { | |
3137 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset)); | |
3138 | * FLD (i_dst) = opval; | |
3139 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3140 | } | |
3141 | ||
3142 | #undef FLD | |
3143 | } | |
3144 | NEXT (vpc); | |
3145 | ||
3146 | CASE (sem, INSN_LDOS_INDIRECT_OFFSET) : /* ldos $offset($abase), $dst */ | |
3147 | { | |
3148 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3149 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3150 | #define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f | |
3151 | int UNUSED written = 0; | |
3152 | IADDR UNUSED pc = abuf->addr; | |
3153 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3154 | ||
3155 | { | |
3156 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3157 | * FLD (i_dst) = opval; | |
3158 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3159 | } | |
3160 | ||
3161 | #undef FLD | |
3162 | } | |
3163 | NEXT (vpc); | |
3164 | ||
3165 | CASE (sem, INSN_LDOS_INDIRECT) : /* ldos ($abase), $dst */ | |
3166 | { | |
3167 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3168 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3169 | #define FLD(f) abuf->fields.fmt_ldos_indirect.f | |
3170 | int UNUSED written = 0; | |
3171 | IADDR UNUSED pc = abuf->addr; | |
3172 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3173 | ||
3174 | { | |
3175 | SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase)); | |
3176 | * FLD (i_dst) = opval; | |
3177 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3178 | } | |
3179 | ||
3180 | #undef FLD | |
3181 | } | |
3182 | NEXT (vpc); | |
3183 | ||
3184 | CASE (sem, INSN_LDOS_INDIRECT_INDEX) : /* ldos ($abase)[$index*S$scale], $dst */ | |
3185 | { | |
3186 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3187 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3188 | #define FLD(f) abuf->fields.fmt_ldos_indirect_index.f | |
3189 | int UNUSED written = 0; | |
3190 | IADDR UNUSED pc = abuf->addr; | |
3191 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3192 | ||
3193 | { | |
3194 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3195 | * FLD (i_dst) = opval; | |
3196 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3197 | } | |
3198 | ||
3199 | #undef FLD | |
3200 | } | |
3201 | NEXT (vpc); | |
3202 | ||
3203 | CASE (sem, INSN_LDOS_DISP) : /* ldos $optdisp, $dst */ | |
3204 | { | |
3205 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3206 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3207 | #define FLD(f) abuf->fields.fmt_ldos_disp.f | |
3208 | int UNUSED written = 0; | |
3209 | IADDR UNUSED pc = abuf->addr; | |
3210 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3211 | ||
3212 | { | |
3213 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp)); | |
3214 | * FLD (i_dst) = opval; | |
3215 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3216 | } | |
3217 | ||
3218 | #undef FLD | |
3219 | } | |
3220 | NEXT (vpc); | |
3221 | ||
3222 | CASE (sem, INSN_LDOS_INDIRECT_DISP) : /* ldos $optdisp($abase), $dst */ | |
3223 | { | |
3224 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3225 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3226 | #define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f | |
3227 | int UNUSED written = 0; | |
3228 | IADDR UNUSED pc = abuf->addr; | |
3229 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3230 | ||
3231 | { | |
3232 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3233 | * FLD (i_dst) = opval; | |
3234 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3235 | } | |
3236 | ||
3237 | #undef FLD | |
3238 | } | |
3239 | NEXT (vpc); | |
3240 | ||
3241 | CASE (sem, INSN_LDOS_INDEX_DISP) : /* ldos $optdisp[$index*S$scale], $dst */ | |
3242 | { | |
3243 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3244 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3245 | #define FLD(f) abuf->fields.fmt_ldos_index_disp.f | |
3246 | int UNUSED written = 0; | |
3247 | IADDR UNUSED pc = abuf->addr; | |
3248 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3249 | ||
3250 | { | |
3251 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3252 | * FLD (i_dst) = opval; | |
3253 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3254 | } | |
3255 | ||
3256 | #undef FLD | |
3257 | } | |
3258 | NEXT (vpc); | |
3259 | ||
3260 | CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) : /* ldos $optdisp($abase)[$index*S$scale], $dst */ | |
3261 | { | |
3262 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3263 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3264 | #define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f | |
3265 | int UNUSED written = 0; | |
3266 | IADDR UNUSED pc = abuf->addr; | |
3267 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3268 | ||
3269 | { | |
3270 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3271 | * FLD (i_dst) = opval; | |
3272 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3273 | } | |
3274 | ||
3275 | #undef FLD | |
3276 | } | |
3277 | NEXT (vpc); | |
3278 | ||
3279 | CASE (sem, INSN_LDIB_OFFSET) : /* ldib $offset, $dst */ | |
3280 | { | |
3281 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3282 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3283 | #define FLD(f) abuf->fields.fmt_ldib_offset.f | |
3284 | int UNUSED written = 0; | |
3285 | IADDR UNUSED pc = abuf->addr; | |
3286 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3287 | ||
3288 | { | |
3289 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset)); | |
3290 | * FLD (i_dst) = opval; | |
3291 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3292 | } | |
3293 | ||
3294 | #undef FLD | |
3295 | } | |
3296 | NEXT (vpc); | |
3297 | ||
3298 | CASE (sem, INSN_LDIB_INDIRECT_OFFSET) : /* ldib $offset($abase), $dst */ | |
3299 | { | |
3300 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3301 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3302 | #define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f | |
3303 | int UNUSED written = 0; | |
3304 | IADDR UNUSED pc = abuf->addr; | |
3305 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3306 | ||
3307 | { | |
3308 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3309 | * FLD (i_dst) = opval; | |
3310 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3311 | } | |
3312 | ||
3313 | #undef FLD | |
3314 | } | |
3315 | NEXT (vpc); | |
3316 | ||
3317 | CASE (sem, INSN_LDIB_INDIRECT) : /* ldib ($abase), $dst */ | |
3318 | { | |
3319 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3320 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3321 | #define FLD(f) abuf->fields.fmt_ldib_indirect.f | |
3322 | int UNUSED written = 0; | |
3323 | IADDR UNUSED pc = abuf->addr; | |
3324 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3325 | ||
3326 | { | |
3327 | SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase)); | |
3328 | * FLD (i_dst) = opval; | |
3329 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3330 | } | |
3331 | ||
3332 | #undef FLD | |
3333 | } | |
3334 | NEXT (vpc); | |
3335 | ||
3336 | CASE (sem, INSN_LDIB_INDIRECT_INDEX) : /* ldib ($abase)[$index*S$scale], $dst */ | |
3337 | { | |
3338 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3339 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3340 | #define FLD(f) abuf->fields.fmt_ldib_indirect_index.f | |
3341 | int UNUSED written = 0; | |
3342 | IADDR UNUSED pc = abuf->addr; | |
3343 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3344 | ||
3345 | { | |
3346 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3347 | * FLD (i_dst) = opval; | |
3348 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3349 | } | |
3350 | ||
3351 | #undef FLD | |
3352 | } | |
3353 | NEXT (vpc); | |
3354 | ||
3355 | CASE (sem, INSN_LDIB_DISP) : /* ldib $optdisp, $dst */ | |
3356 | { | |
3357 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3358 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3359 | #define FLD(f) abuf->fields.fmt_ldib_disp.f | |
3360 | int UNUSED written = 0; | |
3361 | IADDR UNUSED pc = abuf->addr; | |
3362 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3363 | ||
3364 | { | |
3365 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp)); | |
3366 | * FLD (i_dst) = opval; | |
3367 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3368 | } | |
3369 | ||
3370 | #undef FLD | |
3371 | } | |
3372 | NEXT (vpc); | |
3373 | ||
3374 | CASE (sem, INSN_LDIB_INDIRECT_DISP) : /* ldib $optdisp($abase), $dst */ | |
3375 | { | |
3376 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3377 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3378 | #define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f | |
3379 | int UNUSED written = 0; | |
3380 | IADDR UNUSED pc = abuf->addr; | |
3381 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3382 | ||
3383 | { | |
3384 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3385 | * FLD (i_dst) = opval; | |
3386 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3387 | } | |
3388 | ||
3389 | #undef FLD | |
3390 | } | |
3391 | NEXT (vpc); | |
3392 | ||
3393 | CASE (sem, INSN_LDIB_INDEX_DISP) : /* ldib $optdisp[$index*S$scale], $dst */ | |
3394 | { | |
3395 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3396 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3397 | #define FLD(f) abuf->fields.fmt_ldib_index_disp.f | |
3398 | int UNUSED written = 0; | |
3399 | IADDR UNUSED pc = abuf->addr; | |
3400 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3401 | ||
3402 | { | |
3403 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3404 | * FLD (i_dst) = opval; | |
3405 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3406 | } | |
3407 | ||
3408 | #undef FLD | |
3409 | } | |
3410 | NEXT (vpc); | |
3411 | ||
3412 | CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) : /* ldib $optdisp($abase)[$index*S$scale], $dst */ | |
3413 | { | |
3414 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3415 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3416 | #define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f | |
3417 | int UNUSED written = 0; | |
3418 | IADDR UNUSED pc = abuf->addr; | |
3419 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3420 | ||
3421 | { | |
3422 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3423 | * FLD (i_dst) = opval; | |
3424 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3425 | } | |
3426 | ||
3427 | #undef FLD | |
3428 | } | |
3429 | NEXT (vpc); | |
3430 | ||
3431 | CASE (sem, INSN_LDIS_OFFSET) : /* ldis $offset, $dst */ | |
3432 | { | |
3433 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3434 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3435 | #define FLD(f) abuf->fields.fmt_ldis_offset.f | |
3436 | int UNUSED written = 0; | |
3437 | IADDR UNUSED pc = abuf->addr; | |
3438 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3439 | ||
3440 | { | |
3441 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset)); | |
3442 | * FLD (i_dst) = opval; | |
3443 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3444 | } | |
3445 | ||
3446 | #undef FLD | |
3447 | } | |
3448 | NEXT (vpc); | |
3449 | ||
3450 | CASE (sem, INSN_LDIS_INDIRECT_OFFSET) : /* ldis $offset($abase), $dst */ | |
3451 | { | |
3452 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3453 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3454 | #define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f | |
3455 | int UNUSED written = 0; | |
3456 | IADDR UNUSED pc = abuf->addr; | |
3457 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3458 | ||
3459 | { | |
3460 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3461 | * FLD (i_dst) = opval; | |
3462 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3463 | } | |
3464 | ||
3465 | #undef FLD | |
3466 | } | |
3467 | NEXT (vpc); | |
3468 | ||
3469 | CASE (sem, INSN_LDIS_INDIRECT) : /* ldis ($abase), $dst */ | |
3470 | { | |
3471 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3472 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3473 | #define FLD(f) abuf->fields.fmt_ldis_indirect.f | |
3474 | int UNUSED written = 0; | |
3475 | IADDR UNUSED pc = abuf->addr; | |
3476 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3477 | ||
3478 | { | |
3479 | SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase)); | |
3480 | * FLD (i_dst) = opval; | |
3481 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3482 | } | |
3483 | ||
3484 | #undef FLD | |
3485 | } | |
3486 | NEXT (vpc); | |
3487 | ||
3488 | CASE (sem, INSN_LDIS_INDIRECT_INDEX) : /* ldis ($abase)[$index*S$scale], $dst */ | |
3489 | { | |
3490 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3491 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3492 | #define FLD(f) abuf->fields.fmt_ldis_indirect_index.f | |
3493 | int UNUSED written = 0; | |
3494 | IADDR UNUSED pc = abuf->addr; | |
3495 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3496 | ||
3497 | { | |
3498 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3499 | * FLD (i_dst) = opval; | |
3500 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3501 | } | |
3502 | ||
3503 | #undef FLD | |
3504 | } | |
3505 | NEXT (vpc); | |
3506 | ||
3507 | CASE (sem, INSN_LDIS_DISP) : /* ldis $optdisp, $dst */ | |
3508 | { | |
3509 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3510 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3511 | #define FLD(f) abuf->fields.fmt_ldis_disp.f | |
3512 | int UNUSED written = 0; | |
3513 | IADDR UNUSED pc = abuf->addr; | |
3514 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3515 | ||
3516 | { | |
3517 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp)); | |
3518 | * FLD (i_dst) = opval; | |
3519 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3520 | } | |
3521 | ||
3522 | #undef FLD | |
3523 | } | |
3524 | NEXT (vpc); | |
3525 | ||
3526 | CASE (sem, INSN_LDIS_INDIRECT_DISP) : /* ldis $optdisp($abase), $dst */ | |
3527 | { | |
3528 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3529 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3530 | #define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f | |
3531 | int UNUSED written = 0; | |
3532 | IADDR UNUSED pc = abuf->addr; | |
3533 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3534 | ||
3535 | { | |
3536 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3537 | * FLD (i_dst) = opval; | |
3538 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3539 | } | |
3540 | ||
3541 | #undef FLD | |
3542 | } | |
3543 | NEXT (vpc); | |
3544 | ||
3545 | CASE (sem, INSN_LDIS_INDEX_DISP) : /* ldis $optdisp[$index*S$scale], $dst */ | |
3546 | { | |
3547 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3548 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3549 | #define FLD(f) abuf->fields.fmt_ldis_index_disp.f | |
3550 | int UNUSED written = 0; | |
3551 | IADDR UNUSED pc = abuf->addr; | |
3552 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3553 | ||
3554 | { | |
3555 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3556 | * FLD (i_dst) = opval; | |
3557 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3558 | } | |
3559 | ||
3560 | #undef FLD | |
3561 | } | |
3562 | NEXT (vpc); | |
3563 | ||
3564 | CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) : /* ldis $optdisp($abase)[$index*S$scale], $dst */ | |
3565 | { | |
3566 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3567 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3568 | #define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f | |
3569 | int UNUSED written = 0; | |
3570 | IADDR UNUSED pc = abuf->addr; | |
3571 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3572 | ||
3573 | { | |
3574 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3575 | * FLD (i_dst) = opval; | |
3576 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3577 | } | |
3578 | ||
3579 | #undef FLD | |
3580 | } | |
3581 | NEXT (vpc); | |
3582 | ||
3583 | CASE (sem, INSN_LDL_OFFSET) : /* ldl $offset, $dst */ | |
3584 | { | |
3585 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3586 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3587 | #define FLD(f) abuf->fields.fmt_ldl_offset.f | |
3588 | int UNUSED written = 0; | |
3589 | IADDR UNUSED pc = abuf->addr; | |
3590 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3591 | ||
7a292a7a | 3592 | { |
c906108c | 3593 | SI tmp_temp; |
7a292a7a | 3594 | SI tmp_dregno; |
c906108c SS |
3595 | tmp_dregno = FLD (f_srcdst); |
3596 | tmp_temp = FLD (f_offset); | |
3597 | { | |
3598 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3599 | * FLD (i_dst) = opval; | |
3600 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3601 | } | |
3602 | { | |
3603 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3604 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3605 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3606 | } |
7a292a7a | 3607 | } |
c906108c SS |
3608 | |
3609 | #undef FLD | |
3610 | } | |
3611 | NEXT (vpc); | |
3612 | ||
3613 | CASE (sem, INSN_LDL_INDIRECT_OFFSET) : /* ldl $offset($abase), $dst */ | |
3614 | { | |
3615 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3616 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3617 | #define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f | |
3618 | int UNUSED written = 0; | |
3619 | IADDR UNUSED pc = abuf->addr; | |
3620 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3621 | ||
7a292a7a | 3622 | { |
c906108c | 3623 | SI tmp_temp; |
7a292a7a | 3624 | SI tmp_dregno; |
c906108c SS |
3625 | tmp_dregno = FLD (f_srcdst); |
3626 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3627 | { | |
3628 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3629 | * FLD (i_dst) = opval; | |
3630 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3631 | } | |
3632 | { | |
3633 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3634 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3635 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3636 | } |
7a292a7a | 3637 | } |
c906108c SS |
3638 | |
3639 | #undef FLD | |
3640 | } | |
3641 | NEXT (vpc); | |
3642 | ||
3643 | CASE (sem, INSN_LDL_INDIRECT) : /* ldl ($abase), $dst */ | |
3644 | { | |
3645 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3646 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3647 | #define FLD(f) abuf->fields.fmt_ldl_indirect.f | |
3648 | int UNUSED written = 0; | |
3649 | IADDR UNUSED pc = abuf->addr; | |
3650 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3651 | ||
7a292a7a | 3652 | { |
c906108c | 3653 | SI tmp_temp; |
7a292a7a | 3654 | SI tmp_dregno; |
c906108c SS |
3655 | tmp_dregno = FLD (f_srcdst); |
3656 | tmp_temp = * FLD (i_abase); | |
3657 | { | |
3658 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3659 | * FLD (i_dst) = opval; | |
3660 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3661 | } | |
3662 | { | |
3663 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3664 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3665 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3666 | } |
7a292a7a | 3667 | } |
c906108c SS |
3668 | |
3669 | #undef FLD | |
3670 | } | |
3671 | NEXT (vpc); | |
3672 | ||
3673 | CASE (sem, INSN_LDL_INDIRECT_INDEX) : /* ldl ($abase)[$index*S$scale], $dst */ | |
3674 | { | |
3675 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3676 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3677 | #define FLD(f) abuf->fields.fmt_ldl_indirect_index.f | |
3678 | int UNUSED written = 0; | |
3679 | IADDR UNUSED pc = abuf->addr; | |
3680 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3681 | ||
7a292a7a | 3682 | { |
c906108c | 3683 | SI tmp_temp; |
7a292a7a | 3684 | SI tmp_dregno; |
c906108c SS |
3685 | tmp_dregno = FLD (f_srcdst); |
3686 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3687 | { | |
3688 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3689 | * FLD (i_dst) = opval; | |
3690 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3691 | } | |
3692 | { | |
3693 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3694 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3695 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3696 | } |
7a292a7a | 3697 | } |
c906108c SS |
3698 | |
3699 | #undef FLD | |
3700 | } | |
3701 | NEXT (vpc); | |
3702 | ||
3703 | CASE (sem, INSN_LDL_DISP) : /* ldl $optdisp, $dst */ | |
3704 | { | |
3705 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3706 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3707 | #define FLD(f) abuf->fields.fmt_ldl_disp.f | |
3708 | int UNUSED written = 0; | |
3709 | IADDR UNUSED pc = abuf->addr; | |
3710 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3711 | ||
7a292a7a | 3712 | { |
c906108c | 3713 | SI tmp_temp; |
7a292a7a | 3714 | SI tmp_dregno; |
c906108c SS |
3715 | tmp_dregno = FLD (f_srcdst); |
3716 | tmp_temp = FLD (f_optdisp); | |
3717 | { | |
3718 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3719 | * FLD (i_dst) = opval; | |
3720 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3721 | } | |
3722 | { | |
3723 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3724 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3725 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3726 | } |
7a292a7a | 3727 | } |
c906108c SS |
3728 | |
3729 | #undef FLD | |
3730 | } | |
3731 | NEXT (vpc); | |
3732 | ||
3733 | CASE (sem, INSN_LDL_INDIRECT_DISP) : /* ldl $optdisp($abase), $dst */ | |
3734 | { | |
3735 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3736 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3737 | #define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f | |
3738 | int UNUSED written = 0; | |
3739 | IADDR UNUSED pc = abuf->addr; | |
3740 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3741 | ||
7a292a7a | 3742 | { |
c906108c | 3743 | SI tmp_temp; |
7a292a7a | 3744 | SI tmp_dregno; |
c906108c SS |
3745 | tmp_dregno = FLD (f_srcdst); |
3746 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
3747 | { | |
3748 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3749 | * FLD (i_dst) = opval; | |
3750 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3751 | } | |
3752 | { | |
3753 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3754 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3755 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3756 | } |
7a292a7a | 3757 | } |
c906108c SS |
3758 | |
3759 | #undef FLD | |
3760 | } | |
3761 | NEXT (vpc); | |
3762 | ||
3763 | CASE (sem, INSN_LDL_INDEX_DISP) : /* ldl $optdisp[$index*S$scale], $dst */ | |
3764 | { | |
3765 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3766 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3767 | #define FLD(f) abuf->fields.fmt_ldl_index_disp.f | |
3768 | int UNUSED written = 0; | |
3769 | IADDR UNUSED pc = abuf->addr; | |
3770 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3771 | ||
7a292a7a | 3772 | { |
c906108c | 3773 | SI tmp_temp; |
7a292a7a | 3774 | SI tmp_dregno; |
c906108c SS |
3775 | tmp_dregno = FLD (f_srcdst); |
3776 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3777 | { | |
3778 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3779 | * FLD (i_dst) = opval; | |
3780 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3781 | } | |
3782 | { | |
3783 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3784 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3785 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3786 | } |
7a292a7a | 3787 | } |
c906108c SS |
3788 | |
3789 | #undef FLD | |
3790 | } | |
3791 | NEXT (vpc); | |
3792 | ||
3793 | CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) : /* ldl $optdisp($abase)[$index*S$scale], $dst */ | |
3794 | { | |
3795 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3796 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3797 | #define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f | |
3798 | int UNUSED written = 0; | |
3799 | IADDR UNUSED pc = abuf->addr; | |
3800 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3801 | ||
7a292a7a | 3802 | { |
c906108c | 3803 | SI tmp_temp; |
7a292a7a | 3804 | SI tmp_dregno; |
c906108c SS |
3805 | tmp_dregno = FLD (f_srcdst); |
3806 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3807 | { | |
3808 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3809 | * FLD (i_dst) = opval; | |
3810 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3811 | } | |
3812 | { | |
3813 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3814 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3815 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3816 | } |
7a292a7a | 3817 | } |
c906108c SS |
3818 | |
3819 | #undef FLD | |
3820 | } | |
3821 | NEXT (vpc); | |
3822 | ||
3823 | CASE (sem, INSN_LDT_OFFSET) : /* ldt $offset, $dst */ | |
3824 | { | |
3825 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3826 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3827 | #define FLD(f) abuf->fields.fmt_ldt_offset.f | |
3828 | int UNUSED written = 0; | |
3829 | IADDR UNUSED pc = abuf->addr; | |
3830 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3831 | ||
7a292a7a | 3832 | { |
c906108c | 3833 | SI tmp_temp; |
7a292a7a | 3834 | SI tmp_dregno; |
c906108c SS |
3835 | tmp_dregno = FLD (f_srcdst); |
3836 | tmp_temp = FLD (f_offset); | |
3837 | { | |
3838 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3839 | * FLD (i_dst) = opval; | |
3840 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3841 | } | |
3842 | { | |
3843 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3844 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3845 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3846 | } |
3847 | { | |
3848 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3849 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3850 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3851 | } |
7a292a7a | 3852 | } |
c906108c SS |
3853 | |
3854 | #undef FLD | |
3855 | } | |
3856 | NEXT (vpc); | |
3857 | ||
3858 | CASE (sem, INSN_LDT_INDIRECT_OFFSET) : /* ldt $offset($abase), $dst */ | |
3859 | { | |
3860 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3861 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3862 | #define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f | |
3863 | int UNUSED written = 0; | |
3864 | IADDR UNUSED pc = abuf->addr; | |
3865 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3866 | ||
7a292a7a | 3867 | { |
c906108c | 3868 | SI tmp_temp; |
7a292a7a | 3869 | SI tmp_dregno; |
c906108c SS |
3870 | tmp_dregno = FLD (f_srcdst); |
3871 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3872 | { | |
3873 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3874 | * FLD (i_dst) = opval; | |
3875 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3876 | } | |
3877 | { | |
3878 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3879 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3880 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3881 | } |
3882 | { | |
3883 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3884 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3885 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3886 | } |
7a292a7a | 3887 | } |
c906108c SS |
3888 | |
3889 | #undef FLD | |
3890 | } | |
3891 | NEXT (vpc); | |
3892 | ||
3893 | CASE (sem, INSN_LDT_INDIRECT) : /* ldt ($abase), $dst */ | |
3894 | { | |
3895 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3896 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3897 | #define FLD(f) abuf->fields.fmt_ldt_indirect.f | |
3898 | int UNUSED written = 0; | |
3899 | IADDR UNUSED pc = abuf->addr; | |
3900 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3901 | ||
7a292a7a | 3902 | { |
c906108c | 3903 | SI tmp_temp; |
7a292a7a | 3904 | SI tmp_dregno; |
c906108c SS |
3905 | tmp_dregno = FLD (f_srcdst); |
3906 | tmp_temp = * FLD (i_abase); | |
3907 | { | |
3908 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3909 | * FLD (i_dst) = opval; | |
3910 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3911 | } | |
3912 | { | |
3913 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3914 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3915 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3916 | } |
3917 | { | |
3918 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3919 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3920 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3921 | } |
7a292a7a | 3922 | } |
c906108c SS |
3923 | |
3924 | #undef FLD | |
3925 | } | |
3926 | NEXT (vpc); | |
3927 | ||
3928 | CASE (sem, INSN_LDT_INDIRECT_INDEX) : /* ldt ($abase)[$index*S$scale], $dst */ | |
3929 | { | |
3930 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3931 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3932 | #define FLD(f) abuf->fields.fmt_ldt_indirect_index.f | |
3933 | int UNUSED written = 0; | |
3934 | IADDR UNUSED pc = abuf->addr; | |
3935 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3936 | ||
7a292a7a | 3937 | { |
c906108c | 3938 | SI tmp_temp; |
7a292a7a | 3939 | SI tmp_dregno; |
c906108c SS |
3940 | tmp_dregno = FLD (f_srcdst); |
3941 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3942 | { | |
3943 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3944 | * FLD (i_dst) = opval; | |
3945 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3946 | } | |
3947 | { | |
3948 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3949 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3950 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3951 | } |
3952 | { | |
3953 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3954 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3955 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3956 | } |
7a292a7a | 3957 | } |
c906108c SS |
3958 | |
3959 | #undef FLD | |
3960 | } | |
3961 | NEXT (vpc); | |
3962 | ||
3963 | CASE (sem, INSN_LDT_DISP) : /* ldt $optdisp, $dst */ | |
3964 | { | |
3965 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3966 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3967 | #define FLD(f) abuf->fields.fmt_ldt_disp.f | |
3968 | int UNUSED written = 0; | |
3969 | IADDR UNUSED pc = abuf->addr; | |
3970 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3971 | ||
7a292a7a | 3972 | { |
c906108c | 3973 | SI tmp_temp; |
7a292a7a | 3974 | SI tmp_dregno; |
c906108c SS |
3975 | tmp_dregno = FLD (f_srcdst); |
3976 | tmp_temp = FLD (f_optdisp); | |
3977 | { | |
3978 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3979 | * FLD (i_dst) = opval; | |
3980 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3981 | } | |
3982 | { | |
3983 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3984 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3985 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3986 | } |
3987 | { | |
3988 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3989 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3990 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3991 | } |
7a292a7a | 3992 | } |
c906108c SS |
3993 | |
3994 | #undef FLD | |
3995 | } | |
3996 | NEXT (vpc); | |
3997 | ||
3998 | CASE (sem, INSN_LDT_INDIRECT_DISP) : /* ldt $optdisp($abase), $dst */ | |
3999 | { | |
4000 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4001 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4002 | #define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f | |
4003 | int UNUSED written = 0; | |
4004 | IADDR UNUSED pc = abuf->addr; | |
4005 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4006 | ||
7a292a7a | 4007 | { |
c906108c | 4008 | SI tmp_temp; |
7a292a7a | 4009 | SI tmp_dregno; |
c906108c SS |
4010 | tmp_dregno = FLD (f_srcdst); |
4011 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4012 | { | |
4013 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4014 | * FLD (i_dst) = opval; | |
4015 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4016 | } | |
4017 | { | |
4018 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4019 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4020 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4021 | } |
4022 | { | |
4023 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4024 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4025 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4026 | } |
7a292a7a | 4027 | } |
c906108c SS |
4028 | |
4029 | #undef FLD | |
4030 | } | |
4031 | NEXT (vpc); | |
4032 | ||
4033 | CASE (sem, INSN_LDT_INDEX_DISP) : /* ldt $optdisp[$index*S$scale], $dst */ | |
4034 | { | |
4035 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4036 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4037 | #define FLD(f) abuf->fields.fmt_ldt_index_disp.f | |
4038 | int UNUSED written = 0; | |
4039 | IADDR UNUSED pc = abuf->addr; | |
4040 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4041 | ||
7a292a7a | 4042 | { |
c906108c | 4043 | SI tmp_temp; |
7a292a7a | 4044 | SI tmp_dregno; |
c906108c SS |
4045 | tmp_dregno = FLD (f_srcdst); |
4046 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4047 | { | |
4048 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4049 | * FLD (i_dst) = opval; | |
4050 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4051 | } | |
4052 | { | |
4053 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4054 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4055 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4056 | } |
4057 | { | |
4058 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4059 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4060 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4061 | } |
7a292a7a | 4062 | } |
c906108c SS |
4063 | |
4064 | #undef FLD | |
4065 | } | |
4066 | NEXT (vpc); | |
4067 | ||
4068 | CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) : /* ldt $optdisp($abase)[$index*S$scale], $dst */ | |
4069 | { | |
4070 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4071 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4072 | #define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f | |
4073 | int UNUSED written = 0; | |
4074 | IADDR UNUSED pc = abuf->addr; | |
4075 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4076 | ||
7a292a7a | 4077 | { |
c906108c | 4078 | SI tmp_temp; |
7a292a7a | 4079 | SI tmp_dregno; |
c906108c SS |
4080 | tmp_dregno = FLD (f_srcdst); |
4081 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4082 | { | |
4083 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4084 | * FLD (i_dst) = opval; | |
4085 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4086 | } | |
4087 | { | |
4088 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4089 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4090 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4091 | } |
4092 | { | |
4093 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4094 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4095 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4096 | } |
7a292a7a | 4097 | } |
c906108c SS |
4098 | |
4099 | #undef FLD | |
4100 | } | |
4101 | NEXT (vpc); | |
4102 | ||
4103 | CASE (sem, INSN_LDQ_OFFSET) : /* ldq $offset, $dst */ | |
4104 | { | |
4105 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4106 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4107 | #define FLD(f) abuf->fields.fmt_ldq_offset.f | |
4108 | int UNUSED written = 0; | |
4109 | IADDR UNUSED pc = abuf->addr; | |
4110 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4111 | ||
7a292a7a | 4112 | { |
c906108c | 4113 | SI tmp_temp; |
7a292a7a | 4114 | SI tmp_dregno; |
c906108c SS |
4115 | tmp_dregno = FLD (f_srcdst); |
4116 | tmp_temp = FLD (f_offset); | |
4117 | { | |
4118 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4119 | * FLD (i_dst) = opval; | |
4120 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4121 | } | |
4122 | { | |
4123 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4124 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4125 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4126 | } |
4127 | { | |
4128 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4129 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4130 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4131 | } |
4132 | { | |
4133 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4134 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4135 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4136 | } |
7a292a7a | 4137 | } |
c906108c SS |
4138 | |
4139 | #undef FLD | |
4140 | } | |
4141 | NEXT (vpc); | |
4142 | ||
4143 | CASE (sem, INSN_LDQ_INDIRECT_OFFSET) : /* ldq $offset($abase), $dst */ | |
4144 | { | |
4145 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4146 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4147 | #define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f | |
4148 | int UNUSED written = 0; | |
4149 | IADDR UNUSED pc = abuf->addr; | |
4150 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4151 | ||
7a292a7a | 4152 | { |
c906108c | 4153 | SI tmp_temp; |
7a292a7a | 4154 | SI tmp_dregno; |
c906108c SS |
4155 | tmp_dregno = FLD (f_srcdst); |
4156 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
4157 | { | |
4158 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4159 | * FLD (i_dst) = opval; | |
4160 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4161 | } | |
4162 | { | |
4163 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4164 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4165 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4166 | } |
4167 | { | |
4168 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4169 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4170 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4171 | } |
4172 | { | |
4173 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4174 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4175 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4176 | } |
7a292a7a | 4177 | } |
c906108c SS |
4178 | |
4179 | #undef FLD | |
4180 | } | |
4181 | NEXT (vpc); | |
4182 | ||
4183 | CASE (sem, INSN_LDQ_INDIRECT) : /* ldq ($abase), $dst */ | |
4184 | { | |
4185 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4186 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4187 | #define FLD(f) abuf->fields.fmt_ldq_indirect.f | |
4188 | int UNUSED written = 0; | |
4189 | IADDR UNUSED pc = abuf->addr; | |
4190 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4191 | ||
7a292a7a | 4192 | { |
c906108c | 4193 | SI tmp_temp; |
7a292a7a | 4194 | SI tmp_dregno; |
c906108c SS |
4195 | tmp_dregno = FLD (f_srcdst); |
4196 | tmp_temp = * FLD (i_abase); | |
4197 | { | |
4198 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4199 | * FLD (i_dst) = opval; | |
4200 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4201 | } | |
4202 | { | |
4203 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4204 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4205 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4206 | } |
4207 | { | |
4208 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4209 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4210 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4211 | } |
4212 | { | |
4213 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4214 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4215 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4216 | } |
7a292a7a | 4217 | } |
c906108c SS |
4218 | |
4219 | #undef FLD | |
4220 | } | |
4221 | NEXT (vpc); | |
4222 | ||
4223 | CASE (sem, INSN_LDQ_INDIRECT_INDEX) : /* ldq ($abase)[$index*S$scale], $dst */ | |
4224 | { | |
4225 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4226 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4227 | #define FLD(f) abuf->fields.fmt_ldq_indirect_index.f | |
4228 | int UNUSED written = 0; | |
4229 | IADDR UNUSED pc = abuf->addr; | |
4230 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4231 | ||
7a292a7a | 4232 | { |
c906108c | 4233 | SI tmp_temp; |
7a292a7a | 4234 | SI tmp_dregno; |
c906108c SS |
4235 | tmp_dregno = FLD (f_srcdst); |
4236 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4237 | { | |
4238 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4239 | * FLD (i_dst) = opval; | |
4240 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4241 | } | |
4242 | { | |
4243 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4244 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4245 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4246 | } |
4247 | { | |
4248 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4249 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4250 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4251 | } |
4252 | { | |
4253 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4254 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4255 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4256 | } |
7a292a7a | 4257 | } |
c906108c SS |
4258 | |
4259 | #undef FLD | |
4260 | } | |
4261 | NEXT (vpc); | |
4262 | ||
4263 | CASE (sem, INSN_LDQ_DISP) : /* ldq $optdisp, $dst */ | |
4264 | { | |
4265 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4266 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4267 | #define FLD(f) abuf->fields.fmt_ldq_disp.f | |
4268 | int UNUSED written = 0; | |
4269 | IADDR UNUSED pc = abuf->addr; | |
4270 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4271 | ||
7a292a7a | 4272 | { |
c906108c | 4273 | SI tmp_temp; |
7a292a7a | 4274 | SI tmp_dregno; |
c906108c SS |
4275 | tmp_dregno = FLD (f_srcdst); |
4276 | tmp_temp = FLD (f_optdisp); | |
4277 | { | |
4278 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4279 | * FLD (i_dst) = opval; | |
4280 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4281 | } | |
4282 | { | |
4283 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4284 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4285 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4286 | } |
4287 | { | |
4288 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4289 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4290 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4291 | } |
4292 | { | |
4293 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4294 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4295 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4296 | } |
7a292a7a | 4297 | } |
c906108c SS |
4298 | |
4299 | #undef FLD | |
4300 | } | |
4301 | NEXT (vpc); | |
4302 | ||
4303 | CASE (sem, INSN_LDQ_INDIRECT_DISP) : /* ldq $optdisp($abase), $dst */ | |
4304 | { | |
4305 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4307 | #define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f | |
4308 | int UNUSED written = 0; | |
4309 | IADDR UNUSED pc = abuf->addr; | |
4310 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4311 | ||
7a292a7a | 4312 | { |
c906108c | 4313 | SI tmp_temp; |
7a292a7a | 4314 | SI tmp_dregno; |
c906108c SS |
4315 | tmp_dregno = FLD (f_srcdst); |
4316 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4317 | { | |
4318 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4319 | * FLD (i_dst) = opval; | |
4320 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4321 | } | |
4322 | { | |
4323 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4324 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4325 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4326 | } |
4327 | { | |
4328 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4329 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4330 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4331 | } |
4332 | { | |
4333 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4334 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4335 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4336 | } |
7a292a7a | 4337 | } |
c906108c SS |
4338 | |
4339 | #undef FLD | |
4340 | } | |
4341 | NEXT (vpc); | |
4342 | ||
4343 | CASE (sem, INSN_LDQ_INDEX_DISP) : /* ldq $optdisp[$index*S$scale], $dst */ | |
4344 | { | |
4345 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4346 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4347 | #define FLD(f) abuf->fields.fmt_ldq_index_disp.f | |
4348 | int UNUSED written = 0; | |
4349 | IADDR UNUSED pc = abuf->addr; | |
4350 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4351 | ||
7a292a7a | 4352 | { |
c906108c | 4353 | SI tmp_temp; |
7a292a7a | 4354 | SI tmp_dregno; |
c906108c SS |
4355 | tmp_dregno = FLD (f_srcdst); |
4356 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4357 | { | |
4358 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4359 | * FLD (i_dst) = opval; | |
4360 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4361 | } | |
4362 | { | |
4363 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4364 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4365 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4366 | } |
4367 | { | |
4368 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4369 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4370 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4371 | } |
4372 | { | |
4373 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4374 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4375 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4376 | } |
7a292a7a | 4377 | } |
c906108c SS |
4378 | |
4379 | #undef FLD | |
4380 | } | |
4381 | NEXT (vpc); | |
4382 | ||
4383 | CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) : /* ldq $optdisp($abase)[$index*S$scale], $dst */ | |
4384 | { | |
4385 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4386 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4387 | #define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f | |
4388 | int UNUSED written = 0; | |
4389 | IADDR UNUSED pc = abuf->addr; | |
4390 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4391 | ||
7a292a7a | 4392 | { |
c906108c | 4393 | SI tmp_temp; |
7a292a7a | 4394 | SI tmp_dregno; |
c906108c SS |
4395 | tmp_dregno = FLD (f_srcdst); |
4396 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4397 | { | |
4398 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4399 | * FLD (i_dst) = opval; | |
4400 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4401 | } | |
4402 | { | |
4403 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4404 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4405 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4406 | } |
4407 | { | |
4408 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4409 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4410 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4411 | } |
4412 | { | |
4413 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4414 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4415 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4416 | } |
7a292a7a | 4417 | } |
c906108c SS |
4418 | |
4419 | #undef FLD | |
4420 | } | |
4421 | NEXT (vpc); | |
4422 | ||
4423 | CASE (sem, INSN_ST_OFFSET) : /* st $st_src, $offset */ | |
4424 | { | |
4425 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4426 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4427 | #define FLD(f) abuf->fields.fmt_st_offset.f | |
4428 | int UNUSED written = 0; | |
4429 | IADDR UNUSED pc = abuf->addr; | |
4430 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4431 | ||
4432 | { | |
4433 | SI opval = * FLD (i_st_src); | |
4434 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4435 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4436 | } | |
4437 | ||
4438 | #undef FLD | |
4439 | } | |
4440 | NEXT (vpc); | |
4441 | ||
4442 | CASE (sem, INSN_ST_INDIRECT_OFFSET) : /* st $st_src, $offset($abase) */ | |
4443 | { | |
4444 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4446 | #define FLD(f) abuf->fields.fmt_st_indirect_offset.f | |
4447 | int UNUSED written = 0; | |
4448 | IADDR UNUSED pc = abuf->addr; | |
4449 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4450 | ||
4451 | { | |
4452 | SI opval = * FLD (i_st_src); | |
4453 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4454 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4455 | } | |
4456 | ||
4457 | #undef FLD | |
4458 | } | |
4459 | NEXT (vpc); | |
4460 | ||
4461 | CASE (sem, INSN_ST_INDIRECT) : /* st $st_src, ($abase) */ | |
4462 | { | |
4463 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4464 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4465 | #define FLD(f) abuf->fields.fmt_st_indirect.f | |
4466 | int UNUSED written = 0; | |
4467 | IADDR UNUSED pc = abuf->addr; | |
4468 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4469 | ||
4470 | { | |
4471 | SI opval = * FLD (i_st_src); | |
4472 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4473 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4474 | } | |
4475 | ||
4476 | #undef FLD | |
4477 | } | |
4478 | NEXT (vpc); | |
4479 | ||
4480 | CASE (sem, INSN_ST_INDIRECT_INDEX) : /* st $st_src, ($abase)[$index*S$scale] */ | |
4481 | { | |
4482 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4483 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4484 | #define FLD(f) abuf->fields.fmt_st_indirect_index.f | |
4485 | int UNUSED written = 0; | |
4486 | IADDR UNUSED pc = abuf->addr; | |
4487 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4488 | ||
4489 | { | |
4490 | SI opval = * FLD (i_st_src); | |
4491 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4492 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4493 | } | |
4494 | ||
4495 | #undef FLD | |
4496 | } | |
4497 | NEXT (vpc); | |
4498 | ||
4499 | CASE (sem, INSN_ST_DISP) : /* st $st_src, $optdisp */ | |
4500 | { | |
4501 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4502 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4503 | #define FLD(f) abuf->fields.fmt_st_disp.f | |
4504 | int UNUSED written = 0; | |
4505 | IADDR UNUSED pc = abuf->addr; | |
4506 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4507 | ||
4508 | { | |
4509 | SI opval = * FLD (i_st_src); | |
4510 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
4511 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4512 | } | |
4513 | ||
4514 | #undef FLD | |
4515 | } | |
4516 | NEXT (vpc); | |
4517 | ||
4518 | CASE (sem, INSN_ST_INDIRECT_DISP) : /* st $st_src, $optdisp($abase) */ | |
4519 | { | |
4520 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4521 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4522 | #define FLD(f) abuf->fields.fmt_st_indirect_disp.f | |
4523 | int UNUSED written = 0; | |
4524 | IADDR UNUSED pc = abuf->addr; | |
4525 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4526 | ||
4527 | { | |
4528 | SI opval = * FLD (i_st_src); | |
4529 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4530 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4531 | } | |
4532 | ||
4533 | #undef FLD | |
4534 | } | |
4535 | NEXT (vpc); | |
4536 | ||
4537 | CASE (sem, INSN_ST_INDEX_DISP) : /* st $st_src, $optdisp[$index*S$scale */ | |
4538 | { | |
4539 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4540 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4541 | #define FLD(f) abuf->fields.fmt_st_index_disp.f | |
4542 | int UNUSED written = 0; | |
4543 | IADDR UNUSED pc = abuf->addr; | |
4544 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4545 | ||
4546 | { | |
4547 | SI opval = * FLD (i_st_src); | |
4548 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4549 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4550 | } | |
4551 | ||
4552 | #undef FLD | |
4553 | } | |
4554 | NEXT (vpc); | |
4555 | ||
4556 | CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) : /* st $st_src, $optdisp($abase)[$index*S$scale] */ | |
4557 | { | |
4558 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4559 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4560 | #define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f | |
4561 | int UNUSED written = 0; | |
4562 | IADDR UNUSED pc = abuf->addr; | |
4563 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4564 | ||
4565 | { | |
4566 | SI opval = * FLD (i_st_src); | |
4567 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4568 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4569 | } | |
4570 | ||
4571 | #undef FLD | |
4572 | } | |
4573 | NEXT (vpc); | |
4574 | ||
4575 | CASE (sem, INSN_STOB_OFFSET) : /* stob $st_src, $offset */ | |
4576 | { | |
4577 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4578 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4579 | #define FLD(f) abuf->fields.fmt_stob_offset.f | |
4580 | int UNUSED written = 0; | |
4581 | IADDR UNUSED pc = abuf->addr; | |
4582 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4583 | ||
4584 | { | |
4585 | QI opval = * FLD (i_st_src); | |
4586 | SETMEMQI (current_cpu, pc, FLD (f_offset), opval); | |
4587 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4588 | } | |
4589 | ||
4590 | #undef FLD | |
4591 | } | |
4592 | NEXT (vpc); | |
4593 | ||
4594 | CASE (sem, INSN_STOB_INDIRECT_OFFSET) : /* stob $st_src, $offset($abase) */ | |
4595 | { | |
4596 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4597 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4598 | #define FLD(f) abuf->fields.fmt_stob_indirect_offset.f | |
4599 | int UNUSED written = 0; | |
4600 | IADDR UNUSED pc = abuf->addr; | |
4601 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4602 | ||
4603 | { | |
4604 | QI opval = * FLD (i_st_src); | |
4605 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4606 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4607 | } | |
4608 | ||
4609 | #undef FLD | |
4610 | } | |
4611 | NEXT (vpc); | |
4612 | ||
4613 | CASE (sem, INSN_STOB_INDIRECT) : /* stob $st_src, ($abase) */ | |
4614 | { | |
4615 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4616 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4617 | #define FLD(f) abuf->fields.fmt_stob_indirect.f | |
4618 | int UNUSED written = 0; | |
4619 | IADDR UNUSED pc = abuf->addr; | |
4620 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4621 | ||
4622 | { | |
4623 | QI opval = * FLD (i_st_src); | |
4624 | SETMEMQI (current_cpu, pc, * FLD (i_abase), opval); | |
4625 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4626 | } | |
4627 | ||
4628 | #undef FLD | |
4629 | } | |
4630 | NEXT (vpc); | |
4631 | ||
4632 | CASE (sem, INSN_STOB_INDIRECT_INDEX) : /* stob $st_src, ($abase)[$index*S$scale] */ | |
4633 | { | |
4634 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4635 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4636 | #define FLD(f) abuf->fields.fmt_stob_indirect_index.f | |
4637 | int UNUSED written = 0; | |
4638 | IADDR UNUSED pc = abuf->addr; | |
4639 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4640 | ||
4641 | { | |
4642 | QI opval = * FLD (i_st_src); | |
4643 | SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4644 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4645 | } | |
4646 | ||
4647 | #undef FLD | |
4648 | } | |
4649 | NEXT (vpc); | |
4650 | ||
4651 | CASE (sem, INSN_STOB_DISP) : /* stob $st_src, $optdisp */ | |
4652 | { | |
4653 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4654 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4655 | #define FLD(f) abuf->fields.fmt_stob_disp.f | |
4656 | int UNUSED written = 0; | |
4657 | IADDR UNUSED pc = abuf->addr; | |
4658 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4659 | ||
4660 | { | |
4661 | QI opval = * FLD (i_st_src); | |
4662 | SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval); | |
4663 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4664 | } | |
4665 | ||
4666 | #undef FLD | |
4667 | } | |
4668 | NEXT (vpc); | |
4669 | ||
4670 | CASE (sem, INSN_STOB_INDIRECT_DISP) : /* stob $st_src, $optdisp($abase) */ | |
4671 | { | |
4672 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4673 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4674 | #define FLD(f) abuf->fields.fmt_stob_indirect_disp.f | |
4675 | int UNUSED written = 0; | |
4676 | IADDR UNUSED pc = abuf->addr; | |
4677 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4678 | ||
4679 | { | |
4680 | QI opval = * FLD (i_st_src); | |
4681 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4682 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4683 | } | |
4684 | ||
4685 | #undef FLD | |
4686 | } | |
4687 | NEXT (vpc); | |
4688 | ||
4689 | CASE (sem, INSN_STOB_INDEX_DISP) : /* stob $st_src, $optdisp[$index*S$scale */ | |
4690 | { | |
4691 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4692 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4693 | #define FLD(f) abuf->fields.fmt_stob_index_disp.f | |
4694 | int UNUSED written = 0; | |
4695 | IADDR UNUSED pc = abuf->addr; | |
4696 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4697 | ||
4698 | { | |
4699 | QI opval = * FLD (i_st_src); | |
4700 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4701 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4702 | } | |
4703 | ||
4704 | #undef FLD | |
4705 | } | |
4706 | NEXT (vpc); | |
4707 | ||
4708 | CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) : /* stob $st_src, $optdisp($abase)[$index*S$scale] */ | |
4709 | { | |
4710 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4711 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4712 | #define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f | |
4713 | int UNUSED written = 0; | |
4714 | IADDR UNUSED pc = abuf->addr; | |
4715 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4716 | ||
4717 | { | |
4718 | QI opval = * FLD (i_st_src); | |
4719 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4720 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4721 | } | |
4722 | ||
4723 | #undef FLD | |
4724 | } | |
4725 | NEXT (vpc); | |
4726 | ||
4727 | CASE (sem, INSN_STOS_OFFSET) : /* stos $st_src, $offset */ | |
4728 | { | |
4729 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4730 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4731 | #define FLD(f) abuf->fields.fmt_stos_offset.f | |
4732 | int UNUSED written = 0; | |
4733 | IADDR UNUSED pc = abuf->addr; | |
4734 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4735 | ||
4736 | { | |
4737 | HI opval = * FLD (i_st_src); | |
4738 | SETMEMHI (current_cpu, pc, FLD (f_offset), opval); | |
4739 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4740 | } | |
4741 | ||
4742 | #undef FLD | |
4743 | } | |
4744 | NEXT (vpc); | |
4745 | ||
4746 | CASE (sem, INSN_STOS_INDIRECT_OFFSET) : /* stos $st_src, $offset($abase) */ | |
4747 | { | |
4748 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4749 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4750 | #define FLD(f) abuf->fields.fmt_stos_indirect_offset.f | |
4751 | int UNUSED written = 0; | |
4752 | IADDR UNUSED pc = abuf->addr; | |
4753 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4754 | ||
4755 | { | |
4756 | HI opval = * FLD (i_st_src); | |
4757 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4758 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4759 | } | |
4760 | ||
4761 | #undef FLD | |
4762 | } | |
4763 | NEXT (vpc); | |
4764 | ||
4765 | CASE (sem, INSN_STOS_INDIRECT) : /* stos $st_src, ($abase) */ | |
4766 | { | |
4767 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4768 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4769 | #define FLD(f) abuf->fields.fmt_stos_indirect.f | |
4770 | int UNUSED written = 0; | |
4771 | IADDR UNUSED pc = abuf->addr; | |
4772 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4773 | ||
4774 | { | |
4775 | HI opval = * FLD (i_st_src); | |
4776 | SETMEMHI (current_cpu, pc, * FLD (i_abase), opval); | |
4777 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4778 | } | |
4779 | ||
4780 | #undef FLD | |
4781 | } | |
4782 | NEXT (vpc); | |
4783 | ||
4784 | CASE (sem, INSN_STOS_INDIRECT_INDEX) : /* stos $st_src, ($abase)[$index*S$scale] */ | |
4785 | { | |
4786 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4787 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4788 | #define FLD(f) abuf->fields.fmt_stos_indirect_index.f | |
4789 | int UNUSED written = 0; | |
4790 | IADDR UNUSED pc = abuf->addr; | |
4791 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4792 | ||
4793 | { | |
4794 | HI opval = * FLD (i_st_src); | |
4795 | SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4796 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4797 | } | |
4798 | ||
4799 | #undef FLD | |
4800 | } | |
4801 | NEXT (vpc); | |
4802 | ||
4803 | CASE (sem, INSN_STOS_DISP) : /* stos $st_src, $optdisp */ | |
4804 | { | |
4805 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4806 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4807 | #define FLD(f) abuf->fields.fmt_stos_disp.f | |
4808 | int UNUSED written = 0; | |
4809 | IADDR UNUSED pc = abuf->addr; | |
4810 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4811 | ||
4812 | { | |
4813 | HI opval = * FLD (i_st_src); | |
4814 | SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval); | |
4815 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4816 | } | |
4817 | ||
4818 | #undef FLD | |
4819 | } | |
4820 | NEXT (vpc); | |
4821 | ||
4822 | CASE (sem, INSN_STOS_INDIRECT_DISP) : /* stos $st_src, $optdisp($abase) */ | |
4823 | { | |
4824 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4825 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4826 | #define FLD(f) abuf->fields.fmt_stos_indirect_disp.f | |
4827 | int UNUSED written = 0; | |
4828 | IADDR UNUSED pc = abuf->addr; | |
4829 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4830 | ||
4831 | { | |
4832 | HI opval = * FLD (i_st_src); | |
4833 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4834 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4835 | } | |
4836 | ||
4837 | #undef FLD | |
4838 | } | |
4839 | NEXT (vpc); | |
4840 | ||
4841 | CASE (sem, INSN_STOS_INDEX_DISP) : /* stos $st_src, $optdisp[$index*S$scale */ | |
4842 | { | |
4843 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4844 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4845 | #define FLD(f) abuf->fields.fmt_stos_index_disp.f | |
4846 | int UNUSED written = 0; | |
4847 | IADDR UNUSED pc = abuf->addr; | |
4848 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4849 | ||
4850 | { | |
4851 | HI opval = * FLD (i_st_src); | |
4852 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4853 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4854 | } | |
4855 | ||
4856 | #undef FLD | |
4857 | } | |
4858 | NEXT (vpc); | |
4859 | ||
4860 | CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) : /* stos $st_src, $optdisp($abase)[$index*S$scale] */ | |
4861 | { | |
4862 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4863 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4864 | #define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f | |
4865 | int UNUSED written = 0; | |
4866 | IADDR UNUSED pc = abuf->addr; | |
4867 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4868 | ||
4869 | { | |
4870 | HI opval = * FLD (i_st_src); | |
4871 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4872 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4873 | } | |
4874 | ||
4875 | #undef FLD | |
4876 | } | |
4877 | NEXT (vpc); | |
4878 | ||
4879 | CASE (sem, INSN_STL_OFFSET) : /* stl $st_src, $offset */ | |
4880 | { | |
4881 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4882 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4883 | #define FLD(f) abuf->fields.fmt_stl_offset.f | |
4884 | int UNUSED written = 0; | |
4885 | IADDR UNUSED pc = abuf->addr; | |
4886 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4887 | ||
7a292a7a | 4888 | { |
c906108c SS |
4889 | SI tmp_sregno; |
4890 | tmp_sregno = FLD (f_srcdst); | |
4891 | { | |
4892 | SI opval = * FLD (i_st_src); | |
4893 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4894 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4895 | } | |
4896 | { | |
4897 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4898 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
4899 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4900 | } | |
7a292a7a | 4901 | } |
c906108c SS |
4902 | |
4903 | #undef FLD | |
4904 | } | |
4905 | NEXT (vpc); | |
4906 | ||
4907 | CASE (sem, INSN_STL_INDIRECT_OFFSET) : /* stl $st_src, $offset($abase) */ | |
4908 | { | |
4909 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4910 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4911 | #define FLD(f) abuf->fields.fmt_stl_indirect_offset.f | |
4912 | int UNUSED written = 0; | |
4913 | IADDR UNUSED pc = abuf->addr; | |
4914 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4915 | ||
7a292a7a | 4916 | { |
c906108c SS |
4917 | SI tmp_sregno; |
4918 | tmp_sregno = FLD (f_srcdst); | |
4919 | { | |
4920 | SI opval = * FLD (i_st_src); | |
4921 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4922 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4923 | } | |
4924 | { | |
4925 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4926 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
4927 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4928 | } | |
7a292a7a | 4929 | } |
c906108c SS |
4930 | |
4931 | #undef FLD | |
4932 | } | |
4933 | NEXT (vpc); | |
4934 | ||
4935 | CASE (sem, INSN_STL_INDIRECT) : /* stl $st_src, ($abase) */ | |
4936 | { | |
4937 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4938 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4939 | #define FLD(f) abuf->fields.fmt_stl_indirect.f | |
4940 | int UNUSED written = 0; | |
4941 | IADDR UNUSED pc = abuf->addr; | |
4942 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4943 | ||
7a292a7a | 4944 | { |
c906108c SS |
4945 | SI tmp_sregno; |
4946 | tmp_sregno = FLD (f_srcdst); | |
4947 | { | |
4948 | SI opval = * FLD (i_st_src); | |
4949 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4950 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4951 | } | |
4952 | { | |
4953 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4954 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
4955 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4956 | } | |
7a292a7a | 4957 | } |
c906108c SS |
4958 | |
4959 | #undef FLD | |
4960 | } | |
4961 | NEXT (vpc); | |
4962 | ||
4963 | CASE (sem, INSN_STL_INDIRECT_INDEX) : /* stl $st_src, ($abase)[$index*S$scale] */ | |
4964 | { | |
4965 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4966 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4967 | #define FLD(f) abuf->fields.fmt_stl_indirect_index.f | |
4968 | int UNUSED written = 0; | |
4969 | IADDR UNUSED pc = abuf->addr; | |
4970 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4971 | ||
7a292a7a | 4972 | { |
c906108c SS |
4973 | SI tmp_sregno; |
4974 | tmp_sregno = FLD (f_srcdst); | |
4975 | { | |
4976 | SI opval = * FLD (i_st_src); | |
4977 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4978 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4979 | } | |
4980 | { | |
4981 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4982 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
4983 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4984 | } | |
7a292a7a | 4985 | } |
c906108c SS |
4986 | |
4987 | #undef FLD | |
4988 | } | |
4989 | NEXT (vpc); | |
4990 | ||
4991 | CASE (sem, INSN_STL_DISP) : /* stl $st_src, $optdisp */ | |
4992 | { | |
4993 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4994 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
4995 | #define FLD(f) abuf->fields.fmt_stl_disp.f | |
4996 | int UNUSED written = 0; | |
4997 | IADDR UNUSED pc = abuf->addr; | |
4998 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4999 | ||
7a292a7a | 5000 | { |
c906108c SS |
5001 | SI tmp_sregno; |
5002 | tmp_sregno = FLD (f_srcdst); | |
5003 | { | |
5004 | SI opval = * FLD (i_st_src); | |
5005 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5006 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5007 | } | |
5008 | { | |
5009 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5010 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5011 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5012 | } | |
7a292a7a | 5013 | } |
c906108c SS |
5014 | |
5015 | #undef FLD | |
5016 | } | |
5017 | NEXT (vpc); | |
5018 | ||
5019 | CASE (sem, INSN_STL_INDIRECT_DISP) : /* stl $st_src, $optdisp($abase) */ | |
5020 | { | |
5021 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5022 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5023 | #define FLD(f) abuf->fields.fmt_stl_indirect_disp.f | |
5024 | int UNUSED written = 0; | |
5025 | IADDR UNUSED pc = abuf->addr; | |
5026 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5027 | ||
7a292a7a | 5028 | { |
c906108c SS |
5029 | SI tmp_sregno; |
5030 | tmp_sregno = FLD (f_srcdst); | |
5031 | { | |
5032 | SI opval = * FLD (i_st_src); | |
5033 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5034 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5035 | } | |
5036 | { | |
5037 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5038 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5039 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5040 | } | |
7a292a7a | 5041 | } |
c906108c SS |
5042 | |
5043 | #undef FLD | |
5044 | } | |
5045 | NEXT (vpc); | |
5046 | ||
5047 | CASE (sem, INSN_STL_INDEX_DISP) : /* stl $st_src, $optdisp[$index*S$scale */ | |
5048 | { | |
5049 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5050 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5051 | #define FLD(f) abuf->fields.fmt_stl_index_disp.f | |
5052 | int UNUSED written = 0; | |
5053 | IADDR UNUSED pc = abuf->addr; | |
5054 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5055 | ||
7a292a7a | 5056 | { |
c906108c SS |
5057 | SI tmp_sregno; |
5058 | tmp_sregno = FLD (f_srcdst); | |
5059 | { | |
5060 | SI opval = * FLD (i_st_src); | |
5061 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5062 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5063 | } | |
5064 | { | |
5065 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5066 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5067 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5068 | } | |
7a292a7a | 5069 | } |
c906108c SS |
5070 | |
5071 | #undef FLD | |
5072 | } | |
5073 | NEXT (vpc); | |
5074 | ||
5075 | CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) : /* stl $st_src, $optdisp($abase)[$index*S$scale] */ | |
5076 | { | |
5077 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5078 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5079 | #define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f | |
5080 | int UNUSED written = 0; | |
5081 | IADDR UNUSED pc = abuf->addr; | |
5082 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5083 | ||
7a292a7a | 5084 | { |
c906108c SS |
5085 | SI tmp_sregno; |
5086 | tmp_sregno = FLD (f_srcdst); | |
5087 | { | |
5088 | SI opval = * FLD (i_st_src); | |
5089 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5090 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5091 | } | |
5092 | { | |
5093 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5094 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5095 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5096 | } | |
7a292a7a | 5097 | } |
c906108c SS |
5098 | |
5099 | #undef FLD | |
5100 | } | |
5101 | NEXT (vpc); | |
5102 | ||
5103 | CASE (sem, INSN_STT_OFFSET) : /* stt $st_src, $offset */ | |
5104 | { | |
5105 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5106 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5107 | #define FLD(f) abuf->fields.fmt_stt_offset.f | |
5108 | int UNUSED written = 0; | |
5109 | IADDR UNUSED pc = abuf->addr; | |
5110 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5111 | ||
7a292a7a | 5112 | { |
c906108c SS |
5113 | SI tmp_sregno; |
5114 | tmp_sregno = FLD (f_srcdst); | |
5115 | { | |
5116 | SI opval = * FLD (i_st_src); | |
5117 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5118 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5119 | } | |
5120 | { | |
5121 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5122 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5123 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5124 | } | |
5125 | { | |
5126 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5127 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5128 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5129 | } | |
7a292a7a | 5130 | } |
c906108c SS |
5131 | |
5132 | #undef FLD | |
5133 | } | |
5134 | NEXT (vpc); | |
5135 | ||
5136 | CASE (sem, INSN_STT_INDIRECT_OFFSET) : /* stt $st_src, $offset($abase) */ | |
5137 | { | |
5138 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5139 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5140 | #define FLD(f) abuf->fields.fmt_stt_indirect_offset.f | |
5141 | int UNUSED written = 0; | |
5142 | IADDR UNUSED pc = abuf->addr; | |
5143 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5144 | ||
7a292a7a | 5145 | { |
c906108c SS |
5146 | SI tmp_sregno; |
5147 | tmp_sregno = FLD (f_srcdst); | |
5148 | { | |
5149 | SI opval = * FLD (i_st_src); | |
5150 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5151 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5152 | } | |
5153 | { | |
5154 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5155 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5156 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5157 | } | |
5158 | { | |
5159 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5160 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5161 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5162 | } | |
7a292a7a | 5163 | } |
c906108c SS |
5164 | |
5165 | #undef FLD | |
5166 | } | |
5167 | NEXT (vpc); | |
5168 | ||
5169 | CASE (sem, INSN_STT_INDIRECT) : /* stt $st_src, ($abase) */ | |
5170 | { | |
5171 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5172 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5173 | #define FLD(f) abuf->fields.fmt_stt_indirect.f | |
5174 | int UNUSED written = 0; | |
5175 | IADDR UNUSED pc = abuf->addr; | |
5176 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5177 | ||
7a292a7a | 5178 | { |
c906108c SS |
5179 | SI tmp_sregno; |
5180 | tmp_sregno = FLD (f_srcdst); | |
5181 | { | |
5182 | SI opval = * FLD (i_st_src); | |
5183 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5184 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5185 | } | |
5186 | { | |
5187 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5188 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5189 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5190 | } | |
5191 | { | |
5192 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5193 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5194 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5195 | } | |
7a292a7a | 5196 | } |
c906108c SS |
5197 | |
5198 | #undef FLD | |
5199 | } | |
5200 | NEXT (vpc); | |
5201 | ||
5202 | CASE (sem, INSN_STT_INDIRECT_INDEX) : /* stt $st_src, ($abase)[$index*S$scale] */ | |
5203 | { | |
5204 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5205 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5206 | #define FLD(f) abuf->fields.fmt_stt_indirect_index.f | |
5207 | int UNUSED written = 0; | |
5208 | IADDR UNUSED pc = abuf->addr; | |
5209 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5210 | ||
7a292a7a | 5211 | { |
c906108c SS |
5212 | SI tmp_sregno; |
5213 | tmp_sregno = FLD (f_srcdst); | |
5214 | { | |
5215 | SI opval = * FLD (i_st_src); | |
5216 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5217 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5218 | } | |
5219 | { | |
5220 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5221 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5222 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5223 | } | |
5224 | { | |
5225 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5226 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5227 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5228 | } | |
7a292a7a | 5229 | } |
c906108c SS |
5230 | |
5231 | #undef FLD | |
5232 | } | |
5233 | NEXT (vpc); | |
5234 | ||
5235 | CASE (sem, INSN_STT_DISP) : /* stt $st_src, $optdisp */ | |
5236 | { | |
5237 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5238 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5239 | #define FLD(f) abuf->fields.fmt_stt_disp.f | |
5240 | int UNUSED written = 0; | |
5241 | IADDR UNUSED pc = abuf->addr; | |
5242 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5243 | ||
7a292a7a | 5244 | { |
c906108c SS |
5245 | SI tmp_sregno; |
5246 | tmp_sregno = FLD (f_srcdst); | |
5247 | { | |
5248 | SI opval = * FLD (i_st_src); | |
5249 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5250 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5251 | } | |
5252 | { | |
5253 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5254 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5255 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5256 | } | |
5257 | { | |
5258 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5259 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5260 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5261 | } | |
7a292a7a | 5262 | } |
c906108c SS |
5263 | |
5264 | #undef FLD | |
5265 | } | |
5266 | NEXT (vpc); | |
5267 | ||
5268 | CASE (sem, INSN_STT_INDIRECT_DISP) : /* stt $st_src, $optdisp($abase) */ | |
5269 | { | |
5270 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5271 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5272 | #define FLD(f) abuf->fields.fmt_stt_indirect_disp.f | |
5273 | int UNUSED written = 0; | |
5274 | IADDR UNUSED pc = abuf->addr; | |
5275 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5276 | ||
7a292a7a | 5277 | { |
c906108c SS |
5278 | SI tmp_sregno; |
5279 | tmp_sregno = FLD (f_srcdst); | |
5280 | { | |
5281 | SI opval = * FLD (i_st_src); | |
5282 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5283 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5284 | } | |
5285 | { | |
5286 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5287 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5288 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5289 | } | |
5290 | { | |
5291 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5292 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5293 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5294 | } | |
7a292a7a | 5295 | } |
c906108c SS |
5296 | |
5297 | #undef FLD | |
5298 | } | |
5299 | NEXT (vpc); | |
5300 | ||
5301 | CASE (sem, INSN_STT_INDEX_DISP) : /* stt $st_src, $optdisp[$index*S$scale */ | |
5302 | { | |
5303 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5304 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5305 | #define FLD(f) abuf->fields.fmt_stt_index_disp.f | |
5306 | int UNUSED written = 0; | |
5307 | IADDR UNUSED pc = abuf->addr; | |
5308 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5309 | ||
7a292a7a | 5310 | { |
c906108c SS |
5311 | SI tmp_sregno; |
5312 | tmp_sregno = FLD (f_srcdst); | |
5313 | { | |
5314 | SI opval = * FLD (i_st_src); | |
5315 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5316 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5317 | } | |
5318 | { | |
5319 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5320 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5321 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5322 | } | |
5323 | { | |
5324 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5325 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5326 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5327 | } | |
7a292a7a | 5328 | } |
c906108c SS |
5329 | |
5330 | #undef FLD | |
5331 | } | |
5332 | NEXT (vpc); | |
5333 | ||
5334 | CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) : /* stt $st_src, $optdisp($abase)[$index*S$scale] */ | |
5335 | { | |
5336 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5337 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5338 | #define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f | |
5339 | int UNUSED written = 0; | |
5340 | IADDR UNUSED pc = abuf->addr; | |
5341 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5342 | ||
7a292a7a | 5343 | { |
c906108c SS |
5344 | SI tmp_sregno; |
5345 | tmp_sregno = FLD (f_srcdst); | |
5346 | { | |
5347 | SI opval = * FLD (i_st_src); | |
5348 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5349 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5350 | } | |
5351 | { | |
5352 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5353 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5354 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5355 | } | |
5356 | { | |
5357 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5358 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5359 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5360 | } | |
7a292a7a | 5361 | } |
c906108c SS |
5362 | |
5363 | #undef FLD | |
5364 | } | |
5365 | NEXT (vpc); | |
5366 | ||
5367 | CASE (sem, INSN_STQ_OFFSET) : /* stq $st_src, $offset */ | |
5368 | { | |
5369 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5370 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5371 | #define FLD(f) abuf->fields.fmt_stq_offset.f | |
5372 | int UNUSED written = 0; | |
5373 | IADDR UNUSED pc = abuf->addr; | |
5374 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5375 | ||
7a292a7a | 5376 | { |
c906108c SS |
5377 | SI tmp_sregno; |
5378 | tmp_sregno = FLD (f_srcdst); | |
5379 | { | |
5380 | SI opval = * FLD (i_st_src); | |
5381 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5382 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5383 | } | |
5384 | { | |
5385 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5386 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5387 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5388 | } | |
5389 | { | |
5390 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5391 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5392 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5393 | } | |
5394 | { | |
5395 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5396 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval); | |
5397 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5398 | } | |
7a292a7a | 5399 | } |
c906108c SS |
5400 | |
5401 | #undef FLD | |
5402 | } | |
5403 | NEXT (vpc); | |
5404 | ||
5405 | CASE (sem, INSN_STQ_INDIRECT_OFFSET) : /* stq $st_src, $offset($abase) */ | |
5406 | { | |
5407 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5408 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5409 | #define FLD(f) abuf->fields.fmt_stq_indirect_offset.f | |
5410 | int UNUSED written = 0; | |
5411 | IADDR UNUSED pc = abuf->addr; | |
5412 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5413 | ||
7a292a7a | 5414 | { |
c906108c SS |
5415 | SI tmp_sregno; |
5416 | tmp_sregno = FLD (f_srcdst); | |
5417 | { | |
5418 | SI opval = * FLD (i_st_src); | |
5419 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5420 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5421 | } | |
5422 | { | |
5423 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5424 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5425 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5426 | } | |
5427 | { | |
5428 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5429 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5430 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5431 | } | |
5432 | { | |
5433 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5434 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval); | |
5435 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5436 | } | |
7a292a7a | 5437 | } |
c906108c SS |
5438 | |
5439 | #undef FLD | |
5440 | } | |
5441 | NEXT (vpc); | |
5442 | ||
5443 | CASE (sem, INSN_STQ_INDIRECT) : /* stq $st_src, ($abase) */ | |
5444 | { | |
5445 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5446 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5447 | #define FLD(f) abuf->fields.fmt_stq_indirect.f | |
5448 | int UNUSED written = 0; | |
5449 | IADDR UNUSED pc = abuf->addr; | |
5450 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5451 | ||
7a292a7a | 5452 | { |
c906108c SS |
5453 | SI tmp_sregno; |
5454 | tmp_sregno = FLD (f_srcdst); | |
5455 | { | |
5456 | SI opval = * FLD (i_st_src); | |
5457 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5458 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5459 | } | |
5460 | { | |
5461 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5462 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5463 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5464 | } | |
5465 | { | |
5466 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5467 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5468 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5469 | } | |
5470 | { | |
5471 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5472 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval); | |
5473 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5474 | } | |
7a292a7a | 5475 | } |
c906108c SS |
5476 | |
5477 | #undef FLD | |
5478 | } | |
5479 | NEXT (vpc); | |
5480 | ||
5481 | CASE (sem, INSN_STQ_INDIRECT_INDEX) : /* stq $st_src, ($abase)[$index*S$scale] */ | |
5482 | { | |
5483 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5484 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5485 | #define FLD(f) abuf->fields.fmt_stq_indirect_index.f | |
5486 | int UNUSED written = 0; | |
5487 | IADDR UNUSED pc = abuf->addr; | |
5488 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5489 | ||
7a292a7a | 5490 | { |
c906108c SS |
5491 | SI tmp_sregno; |
5492 | tmp_sregno = FLD (f_srcdst); | |
5493 | { | |
5494 | SI opval = * FLD (i_st_src); | |
5495 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5496 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5497 | } | |
5498 | { | |
5499 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5500 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5501 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5502 | } | |
5503 | { | |
5504 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5505 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5506 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5507 | } | |
5508 | { | |
5509 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5510 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5511 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5512 | } | |
7a292a7a | 5513 | } |
c906108c SS |
5514 | |
5515 | #undef FLD | |
5516 | } | |
5517 | NEXT (vpc); | |
5518 | ||
5519 | CASE (sem, INSN_STQ_DISP) : /* stq $st_src, $optdisp */ | |
5520 | { | |
5521 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5522 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5523 | #define FLD(f) abuf->fields.fmt_stq_disp.f | |
5524 | int UNUSED written = 0; | |
5525 | IADDR UNUSED pc = abuf->addr; | |
5526 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5527 | ||
7a292a7a | 5528 | { |
c906108c SS |
5529 | SI tmp_sregno; |
5530 | tmp_sregno = FLD (f_srcdst); | |
5531 | { | |
5532 | SI opval = * FLD (i_st_src); | |
5533 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5534 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5535 | } | |
5536 | { | |
5537 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5538 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5539 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5540 | } | |
5541 | { | |
5542 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5543 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5544 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5545 | } | |
5546 | { | |
5547 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5548 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval); | |
5549 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5550 | } | |
7a292a7a | 5551 | } |
c906108c SS |
5552 | |
5553 | #undef FLD | |
5554 | } | |
5555 | NEXT (vpc); | |
5556 | ||
5557 | CASE (sem, INSN_STQ_INDIRECT_DISP) : /* stq $st_src, $optdisp($abase) */ | |
5558 | { | |
5559 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5560 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5561 | #define FLD(f) abuf->fields.fmt_stq_indirect_disp.f | |
5562 | int UNUSED written = 0; | |
5563 | IADDR UNUSED pc = abuf->addr; | |
5564 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5565 | ||
7a292a7a | 5566 | { |
c906108c SS |
5567 | SI tmp_sregno; |
5568 | tmp_sregno = FLD (f_srcdst); | |
5569 | { | |
5570 | SI opval = * FLD (i_st_src); | |
5571 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5572 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5573 | } | |
5574 | { | |
5575 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5576 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5577 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5578 | } | |
5579 | { | |
5580 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5581 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5582 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5583 | } | |
5584 | { | |
5585 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5586 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval); | |
5587 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5588 | } | |
7a292a7a | 5589 | } |
c906108c SS |
5590 | |
5591 | #undef FLD | |
5592 | } | |
5593 | NEXT (vpc); | |
5594 | ||
5595 | CASE (sem, INSN_STQ_INDEX_DISP) : /* stq $st_src, $optdisp[$index*S$scale */ | |
5596 | { | |
5597 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5598 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5599 | #define FLD(f) abuf->fields.fmt_stq_index_disp.f | |
5600 | int UNUSED written = 0; | |
5601 | IADDR UNUSED pc = abuf->addr; | |
5602 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5603 | ||
7a292a7a | 5604 | { |
c906108c SS |
5605 | SI tmp_sregno; |
5606 | tmp_sregno = FLD (f_srcdst); | |
5607 | { | |
5608 | SI opval = * FLD (i_st_src); | |
5609 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5610 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5611 | } | |
5612 | { | |
5613 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5614 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5615 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5616 | } | |
5617 | { | |
5618 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5619 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5620 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5621 | } | |
5622 | { | |
5623 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5624 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5625 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5626 | } | |
7a292a7a | 5627 | } |
c906108c SS |
5628 | |
5629 | #undef FLD | |
5630 | } | |
5631 | NEXT (vpc); | |
5632 | ||
5633 | CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) : /* stq $st_src, $optdisp($abase)[$index*S$scale] */ | |
5634 | { | |
5635 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5636 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5637 | #define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f | |
5638 | int UNUSED written = 0; | |
5639 | IADDR UNUSED pc = abuf->addr; | |
5640 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5641 | ||
7a292a7a | 5642 | { |
c906108c SS |
5643 | SI tmp_sregno; |
5644 | tmp_sregno = FLD (f_srcdst); | |
5645 | { | |
5646 | SI opval = * FLD (i_st_src); | |
5647 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5648 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5649 | } | |
5650 | { | |
5651 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5652 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5653 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5654 | } | |
5655 | { | |
5656 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5657 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5658 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5659 | } | |
5660 | { | |
5661 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5662 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval); | |
5663 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5664 | } | |
7a292a7a | 5665 | } |
c906108c SS |
5666 | |
5667 | #undef FLD | |
5668 | } | |
5669 | NEXT (vpc); | |
5670 | ||
5671 | CASE (sem, INSN_CMPOBE_REG) : /* cmpobe $br_src1, $br_src2, $br_disp */ | |
5672 | { | |
5673 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5674 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5675 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
5676 | int UNUSED written = 0; | |
5677 | IADDR UNUSED pc = abuf->addr; | |
5678 | SEM_BRANCH_INIT | |
5679 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5680 | ||
5681 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5682 | { | |
5683 | USI opval = FLD (i_br_disp); | |
5684 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5685 | written |= (1 << 3); | |
5686 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5687 | } | |
5688 | } | |
5689 | ||
5690 | abuf->written = written; | |
5691 | SEM_BRANCH_FINI (vpc); | |
5692 | #undef FLD | |
5693 | } | |
5694 | NEXT (vpc); | |
5695 | ||
5696 | CASE (sem, INSN_CMPOBE_LIT) : /* cmpobe $br_lit1, $br_src2, $br_disp */ | |
5697 | { | |
5698 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5699 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5700 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
5701 | int UNUSED written = 0; | |
5702 | IADDR UNUSED pc = abuf->addr; | |
5703 | SEM_BRANCH_INIT | |
5704 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5705 | ||
5706 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5707 | { | |
5708 | USI opval = FLD (i_br_disp); | |
5709 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5710 | written |= (1 << 3); | |
5711 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5712 | } | |
5713 | } | |
5714 | ||
5715 | abuf->written = written; | |
5716 | SEM_BRANCH_FINI (vpc); | |
5717 | #undef FLD | |
5718 | } | |
5719 | NEXT (vpc); | |
5720 | ||
5721 | CASE (sem, INSN_CMPOBNE_REG) : /* cmpobne $br_src1, $br_src2, $br_disp */ | |
5722 | { | |
5723 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5724 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5725 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
5726 | int UNUSED written = 0; | |
5727 | IADDR UNUSED pc = abuf->addr; | |
5728 | SEM_BRANCH_INIT | |
5729 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5730 | ||
5731 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5732 | { | |
5733 | USI opval = FLD (i_br_disp); | |
5734 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5735 | written |= (1 << 3); | |
5736 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5737 | } | |
5738 | } | |
5739 | ||
5740 | abuf->written = written; | |
5741 | SEM_BRANCH_FINI (vpc); | |
5742 | #undef FLD | |
5743 | } | |
5744 | NEXT (vpc); | |
5745 | ||
5746 | CASE (sem, INSN_CMPOBNE_LIT) : /* cmpobne $br_lit1, $br_src2, $br_disp */ | |
5747 | { | |
5748 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5749 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5750 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
5751 | int UNUSED written = 0; | |
5752 | IADDR UNUSED pc = abuf->addr; | |
5753 | SEM_BRANCH_INIT | |
5754 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5755 | ||
5756 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5757 | { | |
5758 | USI opval = FLD (i_br_disp); | |
5759 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5760 | written |= (1 << 3); | |
5761 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5762 | } | |
5763 | } | |
5764 | ||
5765 | abuf->written = written; | |
5766 | SEM_BRANCH_FINI (vpc); | |
5767 | #undef FLD | |
5768 | } | |
5769 | NEXT (vpc); | |
5770 | ||
5771 | CASE (sem, INSN_CMPOBL_REG) : /* cmpobl $br_src1, $br_src2, $br_disp */ | |
5772 | { | |
5773 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5774 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5775 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f | |
5776 | int UNUSED written = 0; | |
5777 | IADDR UNUSED pc = abuf->addr; | |
5778 | SEM_BRANCH_INIT | |
5779 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5780 | ||
5781 | if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5782 | { | |
5783 | USI opval = FLD (i_br_disp); | |
5784 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5785 | written |= (1 << 3); | |
5786 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5787 | } | |
5788 | } | |
5789 | ||
5790 | abuf->written = written; | |
5791 | SEM_BRANCH_FINI (vpc); | |
5792 | #undef FLD | |
5793 | } | |
5794 | NEXT (vpc); | |
5795 | ||
5796 | CASE (sem, INSN_CMPOBL_LIT) : /* cmpobl $br_lit1, $br_src2, $br_disp */ | |
5797 | { | |
5798 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5799 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5800 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f | |
5801 | int UNUSED written = 0; | |
5802 | IADDR UNUSED pc = abuf->addr; | |
5803 | SEM_BRANCH_INIT | |
5804 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5805 | ||
5806 | if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5807 | { | |
5808 | USI opval = FLD (i_br_disp); | |
5809 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5810 | written |= (1 << 3); | |
5811 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5812 | } | |
5813 | } | |
5814 | ||
5815 | abuf->written = written; | |
5816 | SEM_BRANCH_FINI (vpc); | |
5817 | #undef FLD | |
5818 | } | |
5819 | NEXT (vpc); | |
5820 | ||
5821 | CASE (sem, INSN_CMPOBLE_REG) : /* cmpoble $br_src1, $br_src2, $br_disp */ | |
5822 | { | |
5823 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5824 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5825 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f | |
5826 | int UNUSED written = 0; | |
5827 | IADDR UNUSED pc = abuf->addr; | |
5828 | SEM_BRANCH_INIT | |
5829 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5830 | ||
5831 | if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5832 | { | |
5833 | USI opval = FLD (i_br_disp); | |
5834 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5835 | written |= (1 << 3); | |
5836 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5837 | } | |
5838 | } | |
5839 | ||
5840 | abuf->written = written; | |
5841 | SEM_BRANCH_FINI (vpc); | |
5842 | #undef FLD | |
5843 | } | |
5844 | NEXT (vpc); | |
5845 | ||
5846 | CASE (sem, INSN_CMPOBLE_LIT) : /* cmpoble $br_lit1, $br_src2, $br_disp */ | |
5847 | { | |
5848 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5849 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5850 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f | |
5851 | int UNUSED written = 0; | |
5852 | IADDR UNUSED pc = abuf->addr; | |
5853 | SEM_BRANCH_INIT | |
5854 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5855 | ||
5856 | if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5857 | { | |
5858 | USI opval = FLD (i_br_disp); | |
5859 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5860 | written |= (1 << 3); | |
5861 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5862 | } | |
5863 | } | |
5864 | ||
5865 | abuf->written = written; | |
5866 | SEM_BRANCH_FINI (vpc); | |
5867 | #undef FLD | |
5868 | } | |
5869 | NEXT (vpc); | |
5870 | ||
5871 | CASE (sem, INSN_CMPOBG_REG) : /* cmpobg $br_src1, $br_src2, $br_disp */ | |
5872 | { | |
5873 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5874 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5875 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f | |
5876 | int UNUSED written = 0; | |
5877 | IADDR UNUSED pc = abuf->addr; | |
5878 | SEM_BRANCH_INIT | |
5879 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5880 | ||
5881 | if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5882 | { | |
5883 | USI opval = FLD (i_br_disp); | |
5884 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5885 | written |= (1 << 3); | |
5886 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5887 | } | |
5888 | } | |
5889 | ||
5890 | abuf->written = written; | |
5891 | SEM_BRANCH_FINI (vpc); | |
5892 | #undef FLD | |
5893 | } | |
5894 | NEXT (vpc); | |
5895 | ||
5896 | CASE (sem, INSN_CMPOBG_LIT) : /* cmpobg $br_lit1, $br_src2, $br_disp */ | |
5897 | { | |
5898 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5899 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5900 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f | |
5901 | int UNUSED written = 0; | |
5902 | IADDR UNUSED pc = abuf->addr; | |
5903 | SEM_BRANCH_INIT | |
5904 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5905 | ||
5906 | if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5907 | { | |
5908 | USI opval = FLD (i_br_disp); | |
5909 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5910 | written |= (1 << 3); | |
5911 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5912 | } | |
5913 | } | |
5914 | ||
5915 | abuf->written = written; | |
5916 | SEM_BRANCH_FINI (vpc); | |
5917 | #undef FLD | |
5918 | } | |
5919 | NEXT (vpc); | |
5920 | ||
5921 | CASE (sem, INSN_CMPOBGE_REG) : /* cmpobge $br_src1, $br_src2, $br_disp */ | |
5922 | { | |
5923 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5924 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5925 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f | |
5926 | int UNUSED written = 0; | |
5927 | IADDR UNUSED pc = abuf->addr; | |
5928 | SEM_BRANCH_INIT | |
5929 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5930 | ||
5931 | if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5932 | { | |
5933 | USI opval = FLD (i_br_disp); | |
5934 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5935 | written |= (1 << 3); | |
5936 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5937 | } | |
5938 | } | |
5939 | ||
5940 | abuf->written = written; | |
5941 | SEM_BRANCH_FINI (vpc); | |
5942 | #undef FLD | |
5943 | } | |
5944 | NEXT (vpc); | |
5945 | ||
5946 | CASE (sem, INSN_CMPOBGE_LIT) : /* cmpobge $br_lit1, $br_src2, $br_disp */ | |
5947 | { | |
5948 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5949 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5950 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f | |
5951 | int UNUSED written = 0; | |
5952 | IADDR UNUSED pc = abuf->addr; | |
5953 | SEM_BRANCH_INIT | |
5954 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5955 | ||
5956 | if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5957 | { | |
5958 | USI opval = FLD (i_br_disp); | |
5959 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5960 | written |= (1 << 3); | |
5961 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5962 | } | |
5963 | } | |
5964 | ||
5965 | abuf->written = written; | |
5966 | SEM_BRANCH_FINI (vpc); | |
5967 | #undef FLD | |
5968 | } | |
5969 | NEXT (vpc); | |
5970 | ||
5971 | CASE (sem, INSN_CMPIBE_REG) : /* cmpibe $br_src1, $br_src2, $br_disp */ | |
5972 | { | |
5973 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5974 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
5975 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
5976 | int UNUSED written = 0; | |
5977 | IADDR UNUSED pc = abuf->addr; | |
5978 | SEM_BRANCH_INIT | |
5979 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5980 | ||
5981 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5982 | { | |
5983 | USI opval = FLD (i_br_disp); | |
5984 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
5985 | written |= (1 << 3); | |
5986 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5987 | } | |
5988 | } | |
5989 | ||
5990 | abuf->written = written; | |
5991 | SEM_BRANCH_FINI (vpc); | |
5992 | #undef FLD | |
5993 | } | |
5994 | NEXT (vpc); | |
5995 | ||
5996 | CASE (sem, INSN_CMPIBE_LIT) : /* cmpibe $br_lit1, $br_src2, $br_disp */ | |
5997 | { | |
5998 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5999 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6000 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6001 | int UNUSED written = 0; | |
6002 | IADDR UNUSED pc = abuf->addr; | |
6003 | SEM_BRANCH_INIT | |
6004 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6005 | ||
6006 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6007 | { | |
6008 | USI opval = FLD (i_br_disp); | |
6009 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6010 | written |= (1 << 3); | |
6011 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6012 | } | |
6013 | } | |
6014 | ||
6015 | abuf->written = written; | |
6016 | SEM_BRANCH_FINI (vpc); | |
6017 | #undef FLD | |
6018 | } | |
6019 | NEXT (vpc); | |
6020 | ||
6021 | CASE (sem, INSN_CMPIBNE_REG) : /* cmpibne $br_src1, $br_src2, $br_disp */ | |
6022 | { | |
6023 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6024 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6025 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
6026 | int UNUSED written = 0; | |
6027 | IADDR UNUSED pc = abuf->addr; | |
6028 | SEM_BRANCH_INIT | |
6029 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6030 | ||
6031 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6032 | { | |
6033 | USI opval = FLD (i_br_disp); | |
6034 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6035 | written |= (1 << 3); | |
6036 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6037 | } | |
6038 | } | |
6039 | ||
6040 | abuf->written = written; | |
6041 | SEM_BRANCH_FINI (vpc); | |
6042 | #undef FLD | |
6043 | } | |
6044 | NEXT (vpc); | |
6045 | ||
6046 | CASE (sem, INSN_CMPIBNE_LIT) : /* cmpibne $br_lit1, $br_src2, $br_disp */ | |
6047 | { | |
6048 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6049 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6050 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6051 | int UNUSED written = 0; | |
6052 | IADDR UNUSED pc = abuf->addr; | |
6053 | SEM_BRANCH_INIT | |
6054 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6055 | ||
6056 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6057 | { | |
6058 | USI opval = FLD (i_br_disp); | |
6059 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6060 | written |= (1 << 3); | |
6061 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6062 | } | |
6063 | } | |
6064 | ||
6065 | abuf->written = written; | |
6066 | SEM_BRANCH_FINI (vpc); | |
6067 | #undef FLD | |
6068 | } | |
6069 | NEXT (vpc); | |
6070 | ||
6071 | CASE (sem, INSN_CMPIBL_REG) : /* cmpibl $br_src1, $br_src2, $br_disp */ | |
6072 | { | |
6073 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6074 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6075 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
6076 | int UNUSED written = 0; | |
6077 | IADDR UNUSED pc = abuf->addr; | |
6078 | SEM_BRANCH_INIT | |
6079 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6080 | ||
6081 | if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6082 | { | |
6083 | USI opval = FLD (i_br_disp); | |
6084 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6085 | written |= (1 << 3); | |
6086 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6087 | } | |
6088 | } | |
6089 | ||
6090 | abuf->written = written; | |
6091 | SEM_BRANCH_FINI (vpc); | |
6092 | #undef FLD | |
6093 | } | |
6094 | NEXT (vpc); | |
6095 | ||
6096 | CASE (sem, INSN_CMPIBL_LIT) : /* cmpibl $br_lit1, $br_src2, $br_disp */ | |
6097 | { | |
6098 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6099 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6100 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6101 | int UNUSED written = 0; | |
6102 | IADDR UNUSED pc = abuf->addr; | |
6103 | SEM_BRANCH_INIT | |
6104 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6105 | ||
6106 | if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6107 | { | |
6108 | USI opval = FLD (i_br_disp); | |
6109 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6110 | written |= (1 << 3); | |
6111 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6112 | } | |
6113 | } | |
6114 | ||
6115 | abuf->written = written; | |
6116 | SEM_BRANCH_FINI (vpc); | |
6117 | #undef FLD | |
6118 | } | |
6119 | NEXT (vpc); | |
6120 | ||
6121 | CASE (sem, INSN_CMPIBLE_REG) : /* cmpible $br_src1, $br_src2, $br_disp */ | |
6122 | { | |
6123 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6124 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6125 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
6126 | int UNUSED written = 0; | |
6127 | IADDR UNUSED pc = abuf->addr; | |
6128 | SEM_BRANCH_INIT | |
6129 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6130 | ||
6131 | if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6132 | { | |
6133 | USI opval = FLD (i_br_disp); | |
6134 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6135 | written |= (1 << 3); | |
6136 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6137 | } | |
6138 | } | |
6139 | ||
6140 | abuf->written = written; | |
6141 | SEM_BRANCH_FINI (vpc); | |
6142 | #undef FLD | |
6143 | } | |
6144 | NEXT (vpc); | |
6145 | ||
6146 | CASE (sem, INSN_CMPIBLE_LIT) : /* cmpible $br_lit1, $br_src2, $br_disp */ | |
6147 | { | |
6148 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6149 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6150 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6151 | int UNUSED written = 0; | |
6152 | IADDR UNUSED pc = abuf->addr; | |
6153 | SEM_BRANCH_INIT | |
6154 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6155 | ||
6156 | if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6157 | { | |
6158 | USI opval = FLD (i_br_disp); | |
6159 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6160 | written |= (1 << 3); | |
6161 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6162 | } | |
6163 | } | |
6164 | ||
6165 | abuf->written = written; | |
6166 | SEM_BRANCH_FINI (vpc); | |
6167 | #undef FLD | |
6168 | } | |
6169 | NEXT (vpc); | |
6170 | ||
6171 | CASE (sem, INSN_CMPIBG_REG) : /* cmpibg $br_src1, $br_src2, $br_disp */ | |
6172 | { | |
6173 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6174 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6175 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
6176 | int UNUSED written = 0; | |
6177 | IADDR UNUSED pc = abuf->addr; | |
6178 | SEM_BRANCH_INIT | |
6179 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6180 | ||
6181 | if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6182 | { | |
6183 | USI opval = FLD (i_br_disp); | |
6184 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6185 | written |= (1 << 3); | |
6186 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6187 | } | |
6188 | } | |
6189 | ||
6190 | abuf->written = written; | |
6191 | SEM_BRANCH_FINI (vpc); | |
6192 | #undef FLD | |
6193 | } | |
6194 | NEXT (vpc); | |
6195 | ||
6196 | CASE (sem, INSN_CMPIBG_LIT) : /* cmpibg $br_lit1, $br_src2, $br_disp */ | |
6197 | { | |
6198 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6199 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6200 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6201 | int UNUSED written = 0; | |
6202 | IADDR UNUSED pc = abuf->addr; | |
6203 | SEM_BRANCH_INIT | |
6204 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6205 | ||
6206 | if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6207 | { | |
6208 | USI opval = FLD (i_br_disp); | |
6209 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6210 | written |= (1 << 3); | |
6211 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6212 | } | |
6213 | } | |
6214 | ||
6215 | abuf->written = written; | |
6216 | SEM_BRANCH_FINI (vpc); | |
6217 | #undef FLD | |
6218 | } | |
6219 | NEXT (vpc); | |
6220 | ||
6221 | CASE (sem, INSN_CMPIBGE_REG) : /* cmpibge $br_src1, $br_src2, $br_disp */ | |
6222 | { | |
6223 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6224 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6225 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
6226 | int UNUSED written = 0; | |
6227 | IADDR UNUSED pc = abuf->addr; | |
6228 | SEM_BRANCH_INIT | |
6229 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6230 | ||
6231 | if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6232 | { | |
6233 | USI opval = FLD (i_br_disp); | |
6234 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6235 | written |= (1 << 3); | |
6236 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6237 | } | |
6238 | } | |
6239 | ||
6240 | abuf->written = written; | |
6241 | SEM_BRANCH_FINI (vpc); | |
6242 | #undef FLD | |
6243 | } | |
6244 | NEXT (vpc); | |
6245 | ||
6246 | CASE (sem, INSN_CMPIBGE_LIT) : /* cmpibge $br_lit1, $br_src2, $br_disp */ | |
6247 | { | |
6248 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6249 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6250 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
6251 | int UNUSED written = 0; | |
6252 | IADDR UNUSED pc = abuf->addr; | |
6253 | SEM_BRANCH_INIT | |
6254 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6255 | ||
6256 | if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6257 | { | |
6258 | USI opval = FLD (i_br_disp); | |
6259 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6260 | written |= (1 << 3); | |
6261 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6262 | } | |
6263 | } | |
6264 | ||
6265 | abuf->written = written; | |
6266 | SEM_BRANCH_FINI (vpc); | |
6267 | #undef FLD | |
6268 | } | |
6269 | NEXT (vpc); | |
6270 | ||
6271 | CASE (sem, INSN_BBC_REG) : /* bbc $br_src1, $br_src2, $br_disp */ | |
6272 | { | |
6273 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6274 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6275 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f | |
6276 | int UNUSED written = 0; | |
6277 | IADDR UNUSED pc = abuf->addr; | |
6278 | SEM_BRANCH_INIT | |
6279 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6280 | ||
6281 | if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6282 | { | |
6283 | USI opval = FLD (i_br_disp); | |
6284 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6285 | written |= (1 << 3); | |
6286 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6287 | } | |
6288 | } | |
6289 | ||
6290 | abuf->written = written; | |
6291 | SEM_BRANCH_FINI (vpc); | |
6292 | #undef FLD | |
6293 | } | |
6294 | NEXT (vpc); | |
6295 | ||
6296 | CASE (sem, INSN_BBC_LIT) : /* bbc $br_lit1, $br_src2, $br_disp */ | |
6297 | { | |
6298 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6299 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6300 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f | |
6301 | int UNUSED written = 0; | |
6302 | IADDR UNUSED pc = abuf->addr; | |
6303 | SEM_BRANCH_INIT | |
6304 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6305 | ||
6306 | if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6307 | { | |
6308 | USI opval = FLD (i_br_disp); | |
6309 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6310 | written |= (1 << 3); | |
6311 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6312 | } | |
6313 | } | |
6314 | ||
6315 | abuf->written = written; | |
6316 | SEM_BRANCH_FINI (vpc); | |
6317 | #undef FLD | |
6318 | } | |
6319 | NEXT (vpc); | |
6320 | ||
6321 | CASE (sem, INSN_BBS_REG) : /* bbs $br_src1, $br_src2, $br_disp */ | |
6322 | { | |
6323 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6324 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6325 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f | |
6326 | int UNUSED written = 0; | |
6327 | IADDR UNUSED pc = abuf->addr; | |
6328 | SEM_BRANCH_INIT | |
6329 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6330 | ||
6331 | if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6332 | { | |
6333 | USI opval = FLD (i_br_disp); | |
6334 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6335 | written |= (1 << 3); | |
6336 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6337 | } | |
6338 | } | |
6339 | ||
6340 | abuf->written = written; | |
6341 | SEM_BRANCH_FINI (vpc); | |
6342 | #undef FLD | |
6343 | } | |
6344 | NEXT (vpc); | |
6345 | ||
6346 | CASE (sem, INSN_BBS_LIT) : /* bbs $br_lit1, $br_src2, $br_disp */ | |
6347 | { | |
6348 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6349 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6350 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f | |
6351 | int UNUSED written = 0; | |
6352 | IADDR UNUSED pc = abuf->addr; | |
6353 | SEM_BRANCH_INIT | |
6354 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6355 | ||
6356 | if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6357 | { | |
6358 | USI opval = FLD (i_br_disp); | |
6359 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6360 | written |= (1 << 3); | |
6361 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6362 | } | |
6363 | } | |
6364 | ||
6365 | abuf->written = written; | |
6366 | SEM_BRANCH_FINI (vpc); | |
6367 | #undef FLD | |
6368 | } | |
6369 | NEXT (vpc); | |
6370 | ||
6371 | CASE (sem, INSN_CMPI) : /* cmpi $src1, $src2 */ | |
6372 | { | |
6373 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6374 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6375 | #define FLD(f) abuf->fields.fmt_cmpi.f | |
6376 | int UNUSED written = 0; | |
6377 | IADDR UNUSED pc = abuf->addr; | |
6378 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6379 | ||
6380 | { | |
6381 | SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6382 | CPU (h_cc) = opval; | |
7a292a7a | 6383 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6384 | } |
6385 | ||
6386 | #undef FLD | |
6387 | } | |
6388 | NEXT (vpc); | |
6389 | ||
6390 | CASE (sem, INSN_CMPI1) : /* cmpi $lit1, $src2 */ | |
6391 | { | |
6392 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6393 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6394 | #define FLD(f) abuf->fields.fmt_cmpi1.f | |
6395 | int UNUSED written = 0; | |
6396 | IADDR UNUSED pc = abuf->addr; | |
6397 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6398 | ||
6399 | { | |
6400 | SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6401 | CPU (h_cc) = opval; | |
7a292a7a | 6402 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6403 | } |
6404 | ||
6405 | #undef FLD | |
6406 | } | |
6407 | NEXT (vpc); | |
6408 | ||
6409 | CASE (sem, INSN_CMPI2) : /* cmpi $src1, $lit2 */ | |
6410 | { | |
6411 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6412 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6413 | #define FLD(f) abuf->fields.fmt_cmpi2.f | |
6414 | int UNUSED written = 0; | |
6415 | IADDR UNUSED pc = abuf->addr; | |
6416 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6417 | ||
6418 | { | |
6419 | SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6420 | CPU (h_cc) = opval; | |
7a292a7a | 6421 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6422 | } |
6423 | ||
6424 | #undef FLD | |
6425 | } | |
6426 | NEXT (vpc); | |
6427 | ||
6428 | CASE (sem, INSN_CMPI3) : /* cmpi $lit1, $lit2 */ | |
6429 | { | |
6430 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6431 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6432 | #define FLD(f) abuf->fields.fmt_cmpi3.f | |
6433 | int UNUSED written = 0; | |
6434 | IADDR UNUSED pc = abuf->addr; | |
6435 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6436 | ||
6437 | { | |
6438 | SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6439 | CPU (h_cc) = opval; | |
7a292a7a | 6440 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6441 | } |
6442 | ||
6443 | #undef FLD | |
6444 | } | |
6445 | NEXT (vpc); | |
6446 | ||
6447 | CASE (sem, INSN_CMPO) : /* cmpo $src1, $src2 */ | |
6448 | { | |
6449 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6450 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6451 | #define FLD(f) abuf->fields.fmt_cmpo.f | |
6452 | int UNUSED written = 0; | |
6453 | IADDR UNUSED pc = abuf->addr; | |
6454 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6455 | ||
6456 | { | |
6457 | SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6458 | CPU (h_cc) = opval; | |
7a292a7a | 6459 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6460 | } |
6461 | ||
6462 | #undef FLD | |
6463 | } | |
6464 | NEXT (vpc); | |
6465 | ||
6466 | CASE (sem, INSN_CMPO1) : /* cmpo $lit1, $src2 */ | |
6467 | { | |
6468 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6469 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6470 | #define FLD(f) abuf->fields.fmt_cmpo1.f | |
6471 | int UNUSED written = 0; | |
6472 | IADDR UNUSED pc = abuf->addr; | |
6473 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6474 | ||
6475 | { | |
6476 | SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6477 | CPU (h_cc) = opval; | |
7a292a7a | 6478 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6479 | } |
6480 | ||
6481 | #undef FLD | |
6482 | } | |
6483 | NEXT (vpc); | |
6484 | ||
6485 | CASE (sem, INSN_CMPO2) : /* cmpo $src1, $lit2 */ | |
6486 | { | |
6487 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6488 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6489 | #define FLD(f) abuf->fields.fmt_cmpo2.f | |
6490 | int UNUSED written = 0; | |
6491 | IADDR UNUSED pc = abuf->addr; | |
6492 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6493 | ||
6494 | { | |
6495 | SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6496 | CPU (h_cc) = opval; | |
7a292a7a | 6497 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6498 | } |
6499 | ||
6500 | #undef FLD | |
6501 | } | |
6502 | NEXT (vpc); | |
6503 | ||
6504 | CASE (sem, INSN_CMPO3) : /* cmpo $lit1, $lit2 */ | |
6505 | { | |
6506 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6507 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6508 | #define FLD(f) abuf->fields.fmt_cmpo3.f | |
6509 | int UNUSED written = 0; | |
6510 | IADDR UNUSED pc = abuf->addr; | |
6511 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6512 | ||
6513 | { | |
6514 | SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6515 | CPU (h_cc) = opval; | |
7a292a7a | 6516 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6517 | } |
6518 | ||
6519 | #undef FLD | |
6520 | } | |
6521 | NEXT (vpc); | |
6522 | ||
6523 | CASE (sem, INSN_TESTNO_REG) : /* testno $br_src1 */ | |
6524 | { | |
6525 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6526 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6527 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6528 | int UNUSED written = 0; | |
6529 | IADDR UNUSED pc = abuf->addr; | |
6530 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6531 | ||
6532 | { | |
6533 | SI opval = EQSI (CPU (h_cc), 0); | |
6534 | * FLD (i_br_src1) = opval; | |
6535 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6536 | } | |
6537 | ||
6538 | #undef FLD | |
6539 | } | |
6540 | NEXT (vpc); | |
6541 | ||
6542 | CASE (sem, INSN_TESTG_REG) : /* testg $br_src1 */ | |
6543 | { | |
6544 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6545 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6546 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6547 | int UNUSED written = 0; | |
6548 | IADDR UNUSED pc = abuf->addr; | |
6549 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6550 | ||
6551 | { | |
6552 | SI opval = NESI (ANDSI (CPU (h_cc), 1), 0); | |
6553 | * FLD (i_br_src1) = opval; | |
6554 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6555 | } | |
6556 | ||
6557 | #undef FLD | |
6558 | } | |
6559 | NEXT (vpc); | |
6560 | ||
6561 | CASE (sem, INSN_TESTE_REG) : /* teste $br_src1 */ | |
6562 | { | |
6563 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6564 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6565 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6566 | int UNUSED written = 0; | |
6567 | IADDR UNUSED pc = abuf->addr; | |
6568 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6569 | ||
6570 | { | |
6571 | SI opval = NESI (ANDSI (CPU (h_cc), 2), 0); | |
6572 | * FLD (i_br_src1) = opval; | |
6573 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6574 | } | |
6575 | ||
6576 | #undef FLD | |
6577 | } | |
6578 | NEXT (vpc); | |
6579 | ||
6580 | CASE (sem, INSN_TESTGE_REG) : /* testge $br_src1 */ | |
6581 | { | |
6582 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6583 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6584 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6585 | int UNUSED written = 0; | |
6586 | IADDR UNUSED pc = abuf->addr; | |
6587 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6588 | ||
6589 | { | |
6590 | SI opval = NESI (ANDSI (CPU (h_cc), 3), 0); | |
6591 | * FLD (i_br_src1) = opval; | |
6592 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6593 | } | |
6594 | ||
6595 | #undef FLD | |
6596 | } | |
6597 | NEXT (vpc); | |
6598 | ||
6599 | CASE (sem, INSN_TESTL_REG) : /* testl $br_src1 */ | |
6600 | { | |
6601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6603 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6604 | int UNUSED written = 0; | |
6605 | IADDR UNUSED pc = abuf->addr; | |
6606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6607 | ||
6608 | { | |
6609 | SI opval = NESI (ANDSI (CPU (h_cc), 4), 0); | |
6610 | * FLD (i_br_src1) = opval; | |
6611 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6612 | } | |
6613 | ||
6614 | #undef FLD | |
6615 | } | |
6616 | NEXT (vpc); | |
6617 | ||
6618 | CASE (sem, INSN_TESTNE_REG) : /* testne $br_src1 */ | |
6619 | { | |
6620 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6621 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6622 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6623 | int UNUSED written = 0; | |
6624 | IADDR UNUSED pc = abuf->addr; | |
6625 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6626 | ||
6627 | { | |
6628 | SI opval = NESI (ANDSI (CPU (h_cc), 5), 0); | |
6629 | * FLD (i_br_src1) = opval; | |
6630 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6631 | } | |
6632 | ||
6633 | #undef FLD | |
6634 | } | |
6635 | NEXT (vpc); | |
6636 | ||
6637 | CASE (sem, INSN_TESTLE_REG) : /* testle $br_src1 */ | |
6638 | { | |
6639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6641 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6642 | int UNUSED written = 0; | |
6643 | IADDR UNUSED pc = abuf->addr; | |
6644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6645 | ||
6646 | { | |
6647 | SI opval = NESI (ANDSI (CPU (h_cc), 6), 0); | |
6648 | * FLD (i_br_src1) = opval; | |
6649 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6650 | } | |
6651 | ||
6652 | #undef FLD | |
6653 | } | |
6654 | NEXT (vpc); | |
6655 | ||
6656 | CASE (sem, INSN_TESTO_REG) : /* testo $br_src1 */ | |
6657 | { | |
6658 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6659 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6660 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
6661 | int UNUSED written = 0; | |
6662 | IADDR UNUSED pc = abuf->addr; | |
6663 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6664 | ||
6665 | { | |
6666 | SI opval = NESI (ANDSI (CPU (h_cc), 7), 0); | |
6667 | * FLD (i_br_src1) = opval; | |
6668 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6669 | } | |
6670 | ||
6671 | #undef FLD | |
6672 | } | |
6673 | NEXT (vpc); | |
6674 | ||
6675 | CASE (sem, INSN_BNO) : /* bno $ctrl_disp */ | |
6676 | { | |
6677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6679 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6680 | int UNUSED written = 0; | |
6681 | IADDR UNUSED pc = abuf->addr; | |
6682 | SEM_BRANCH_INIT | |
6683 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6684 | ||
6685 | if (EQSI (CPU (h_cc), 0)) { | |
6686 | { | |
6687 | USI opval = FLD (i_ctrl_disp); | |
6688 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6689 | written |= (1 << 2); | |
6690 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6691 | } | |
6692 | } | |
6693 | ||
6694 | abuf->written = written; | |
6695 | SEM_BRANCH_FINI (vpc); | |
6696 | #undef FLD | |
6697 | } | |
6698 | NEXT (vpc); | |
6699 | ||
6700 | CASE (sem, INSN_BG) : /* bg $ctrl_disp */ | |
6701 | { | |
6702 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6703 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6704 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6705 | int UNUSED written = 0; | |
6706 | IADDR UNUSED pc = abuf->addr; | |
6707 | SEM_BRANCH_INIT | |
6708 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6709 | ||
6710 | if (NESI (ANDSI (CPU (h_cc), 1), 0)) { | |
6711 | { | |
6712 | USI opval = FLD (i_ctrl_disp); | |
6713 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6714 | written |= (1 << 2); | |
6715 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6716 | } | |
6717 | } | |
6718 | ||
6719 | abuf->written = written; | |
6720 | SEM_BRANCH_FINI (vpc); | |
6721 | #undef FLD | |
6722 | } | |
6723 | NEXT (vpc); | |
6724 | ||
6725 | CASE (sem, INSN_BE) : /* be $ctrl_disp */ | |
6726 | { | |
6727 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6728 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6729 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6730 | int UNUSED written = 0; | |
6731 | IADDR UNUSED pc = abuf->addr; | |
6732 | SEM_BRANCH_INIT | |
6733 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6734 | ||
6735 | if (NESI (ANDSI (CPU (h_cc), 2), 0)) { | |
6736 | { | |
6737 | USI opval = FLD (i_ctrl_disp); | |
6738 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6739 | written |= (1 << 2); | |
6740 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6741 | } | |
6742 | } | |
6743 | ||
6744 | abuf->written = written; | |
6745 | SEM_BRANCH_FINI (vpc); | |
6746 | #undef FLD | |
6747 | } | |
6748 | NEXT (vpc); | |
6749 | ||
6750 | CASE (sem, INSN_BGE) : /* bge $ctrl_disp */ | |
6751 | { | |
6752 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6753 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6754 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6755 | int UNUSED written = 0; | |
6756 | IADDR UNUSED pc = abuf->addr; | |
6757 | SEM_BRANCH_INIT | |
6758 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6759 | ||
6760 | if (NESI (ANDSI (CPU (h_cc), 3), 0)) { | |
6761 | { | |
6762 | USI opval = FLD (i_ctrl_disp); | |
6763 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6764 | written |= (1 << 2); | |
6765 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6766 | } | |
6767 | } | |
6768 | ||
6769 | abuf->written = written; | |
6770 | SEM_BRANCH_FINI (vpc); | |
6771 | #undef FLD | |
6772 | } | |
6773 | NEXT (vpc); | |
6774 | ||
6775 | CASE (sem, INSN_BL) : /* bl $ctrl_disp */ | |
6776 | { | |
6777 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6778 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6779 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6780 | int UNUSED written = 0; | |
6781 | IADDR UNUSED pc = abuf->addr; | |
6782 | SEM_BRANCH_INIT | |
6783 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6784 | ||
6785 | if (NESI (ANDSI (CPU (h_cc), 4), 0)) { | |
6786 | { | |
6787 | USI opval = FLD (i_ctrl_disp); | |
6788 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6789 | written |= (1 << 2); | |
6790 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6791 | } | |
6792 | } | |
6793 | ||
6794 | abuf->written = written; | |
6795 | SEM_BRANCH_FINI (vpc); | |
6796 | #undef FLD | |
6797 | } | |
6798 | NEXT (vpc); | |
6799 | ||
6800 | CASE (sem, INSN_BNE) : /* bne $ctrl_disp */ | |
6801 | { | |
6802 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6803 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6804 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6805 | int UNUSED written = 0; | |
6806 | IADDR UNUSED pc = abuf->addr; | |
6807 | SEM_BRANCH_INIT | |
6808 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6809 | ||
6810 | if (NESI (ANDSI (CPU (h_cc), 5), 0)) { | |
6811 | { | |
6812 | USI opval = FLD (i_ctrl_disp); | |
6813 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6814 | written |= (1 << 2); | |
6815 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6816 | } | |
6817 | } | |
6818 | ||
6819 | abuf->written = written; | |
6820 | SEM_BRANCH_FINI (vpc); | |
6821 | #undef FLD | |
6822 | } | |
6823 | NEXT (vpc); | |
6824 | ||
6825 | CASE (sem, INSN_BLE) : /* ble $ctrl_disp */ | |
6826 | { | |
6827 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6828 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6829 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6830 | int UNUSED written = 0; | |
6831 | IADDR UNUSED pc = abuf->addr; | |
6832 | SEM_BRANCH_INIT | |
6833 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6834 | ||
6835 | if (NESI (ANDSI (CPU (h_cc), 6), 0)) { | |
6836 | { | |
6837 | USI opval = FLD (i_ctrl_disp); | |
6838 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6839 | written |= (1 << 2); | |
6840 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6841 | } | |
6842 | } | |
6843 | ||
6844 | abuf->written = written; | |
6845 | SEM_BRANCH_FINI (vpc); | |
6846 | #undef FLD | |
6847 | } | |
6848 | NEXT (vpc); | |
6849 | ||
6850 | CASE (sem, INSN_BO) : /* bo $ctrl_disp */ | |
6851 | { | |
6852 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6853 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6854 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
6855 | int UNUSED written = 0; | |
6856 | IADDR UNUSED pc = abuf->addr; | |
6857 | SEM_BRANCH_INIT | |
6858 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6859 | ||
6860 | if (NESI (ANDSI (CPU (h_cc), 7), 0)) { | |
6861 | { | |
6862 | USI opval = FLD (i_ctrl_disp); | |
6863 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6864 | written |= (1 << 2); | |
6865 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6866 | } | |
6867 | } | |
6868 | ||
6869 | abuf->written = written; | |
6870 | SEM_BRANCH_FINI (vpc); | |
6871 | #undef FLD | |
6872 | } | |
6873 | NEXT (vpc); | |
6874 | ||
6875 | CASE (sem, INSN_B) : /* b $ctrl_disp */ | |
6876 | { | |
6877 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6878 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6879 | #define FLD(f) abuf->fields.cti.fields.fmt_b.f | |
6880 | int UNUSED written = 0; | |
6881 | IADDR UNUSED pc = abuf->addr; | |
6882 | SEM_BRANCH_INIT | |
6883 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6884 | ||
6885 | { | |
6886 | USI opval = FLD (i_ctrl_disp); | |
6887 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6888 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6889 | } | |
6890 | ||
6891 | SEM_BRANCH_FINI (vpc); | |
6892 | #undef FLD | |
6893 | } | |
6894 | NEXT (vpc); | |
6895 | ||
6896 | CASE (sem, INSN_BX_INDIRECT_OFFSET) : /* bx $offset($abase) */ | |
6897 | { | |
6898 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6899 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6900 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f | |
6901 | int UNUSED written = 0; | |
6902 | IADDR UNUSED pc = abuf->addr; | |
6903 | SEM_BRANCH_INIT | |
6904 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6905 | ||
6906 | { | |
6907 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
6908 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6909 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6910 | } | |
6911 | ||
6912 | SEM_BRANCH_FINI (vpc); | |
6913 | #undef FLD | |
6914 | } | |
6915 | NEXT (vpc); | |
6916 | ||
6917 | CASE (sem, INSN_BX_INDIRECT) : /* bx ($abase) */ | |
6918 | { | |
6919 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6920 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6921 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f | |
6922 | int UNUSED written = 0; | |
6923 | IADDR UNUSED pc = abuf->addr; | |
6924 | SEM_BRANCH_INIT | |
6925 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6926 | ||
6927 | { | |
6928 | USI opval = * FLD (i_abase); | |
6929 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6930 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6931 | } | |
6932 | ||
6933 | SEM_BRANCH_FINI (vpc); | |
6934 | #undef FLD | |
6935 | } | |
6936 | NEXT (vpc); | |
6937 | ||
6938 | CASE (sem, INSN_BX_INDIRECT_INDEX) : /* bx ($abase)[$index*S$scale] */ | |
6939 | { | |
6940 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6941 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6942 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f | |
6943 | int UNUSED written = 0; | |
6944 | IADDR UNUSED pc = abuf->addr; | |
6945 | SEM_BRANCH_INIT | |
6946 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6947 | ||
6948 | { | |
6949 | USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
6950 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6951 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6952 | } | |
6953 | ||
6954 | SEM_BRANCH_FINI (vpc); | |
6955 | #undef FLD | |
6956 | } | |
6957 | NEXT (vpc); | |
6958 | ||
6959 | CASE (sem, INSN_BX_DISP) : /* bx $optdisp */ | |
6960 | { | |
6961 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6962 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6963 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f | |
6964 | int UNUSED written = 0; | |
6965 | IADDR UNUSED pc = abuf->addr; | |
6966 | SEM_BRANCH_INIT | |
6967 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6968 | ||
6969 | { | |
6970 | USI opval = FLD (f_optdisp); | |
6971 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
6972 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6973 | } | |
6974 | ||
6975 | SEM_BRANCH_FINI (vpc); | |
6976 | #undef FLD | |
6977 | } | |
6978 | NEXT (vpc); | |
6979 | ||
6980 | CASE (sem, INSN_BX_INDIRECT_DISP) : /* bx $optdisp($abase) */ | |
6981 | { | |
6982 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6983 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
6984 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f | |
6985 | int UNUSED written = 0; | |
6986 | IADDR UNUSED pc = abuf->addr; | |
6987 | SEM_BRANCH_INIT | |
6988 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6989 | ||
6990 | { | |
6991 | USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
6992 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6993 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6994 | } | |
6995 | ||
6996 | SEM_BRANCH_FINI (vpc); | |
6997 | #undef FLD | |
6998 | } | |
6999 | NEXT (vpc); | |
7000 | ||
7001 | CASE (sem, INSN_CALLX_DISP) : /* callx $optdisp */ | |
7002 | { | |
7003 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7004 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7005 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f | |
7006 | int UNUSED written = 0; | |
7007 | IADDR UNUSED pc = abuf->addr; | |
7008 | SEM_BRANCH_INIT | |
7009 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
7010 | ||
7a292a7a | 7011 | { |
c906108c SS |
7012 | SI tmp_temp; |
7013 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7014 | { | |
7015 | SI opval = ADDSI (pc, 8); | |
7016 | CPU (h_gr[((UINT) 2)]) = opval; | |
7017 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7018 | } | |
7019 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7020 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7021 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7022 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7023 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7024 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7025 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7026 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7027 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7028 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7029 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7030 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7031 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7032 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7033 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7034 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7035 | { | |
7036 | USI opval = FLD (f_optdisp); | |
7037 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg)); | |
7038 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7039 | } | |
7040 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7041 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7042 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7043 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7044 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7045 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7046 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7047 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7048 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7049 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7050 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7051 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7052 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7053 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7054 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7055 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7056 | { | |
7057 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7058 | CPU (h_gr[((UINT) 0)]) = opval; | |
7059 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7060 | } | |
7061 | { | |
7062 | SI opval = tmp_temp; | |
7063 | CPU (h_gr[((UINT) 31)]) = opval; | |
7064 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7065 | } | |
7066 | { | |
7067 | SI opval = ADDSI (tmp_temp, 64); | |
7068 | CPU (h_gr[((UINT) 1)]) = opval; | |
7069 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7070 | } | |
7a292a7a | 7071 | } |
c906108c SS |
7072 | |
7073 | SEM_BRANCH_FINI (vpc); | |
7074 | #undef FLD | |
7075 | } | |
7076 | NEXT (vpc); | |
7077 | ||
7078 | CASE (sem, INSN_CALLX_INDIRECT) : /* callx ($abase) */ | |
7079 | { | |
7080 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7081 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7082 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f | |
7083 | int UNUSED written = 0; | |
7084 | IADDR UNUSED pc = abuf->addr; | |
7085 | SEM_BRANCH_INIT | |
7086 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7087 | ||
7a292a7a | 7088 | { |
c906108c SS |
7089 | SI tmp_temp; |
7090 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7091 | { | |
7092 | SI opval = ADDSI (pc, 4); | |
7093 | CPU (h_gr[((UINT) 2)]) = opval; | |
7094 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7095 | } | |
7096 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7097 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7098 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7099 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7100 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7101 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7102 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7103 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7104 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7105 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7106 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7107 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7108 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7109 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7110 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7111 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7112 | { | |
7113 | USI opval = * FLD (i_abase); | |
7114 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7115 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7116 | } | |
7117 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7118 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7119 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7120 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7121 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7122 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7123 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7124 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7125 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7126 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7127 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7128 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7129 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7130 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7131 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7132 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7133 | { | |
7134 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7135 | CPU (h_gr[((UINT) 0)]) = opval; | |
7136 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7137 | } | |
7138 | { | |
7139 | SI opval = tmp_temp; | |
7140 | CPU (h_gr[((UINT) 31)]) = opval; | |
7141 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7142 | } | |
7143 | { | |
7144 | SI opval = ADDSI (tmp_temp, 64); | |
7145 | CPU (h_gr[((UINT) 1)]) = opval; | |
7146 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7147 | } | |
7a292a7a | 7148 | } |
c906108c SS |
7149 | |
7150 | SEM_BRANCH_FINI (vpc); | |
7151 | #undef FLD | |
7152 | } | |
7153 | NEXT (vpc); | |
7154 | ||
7155 | CASE (sem, INSN_CALLX_INDIRECT_OFFSET) : /* callx $offset($abase) */ | |
7156 | { | |
7157 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7158 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7159 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f | |
7160 | int UNUSED written = 0; | |
7161 | IADDR UNUSED pc = abuf->addr; | |
7162 | SEM_BRANCH_INIT | |
7163 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7164 | ||
7a292a7a | 7165 | { |
c906108c SS |
7166 | SI tmp_temp; |
7167 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7168 | { | |
7169 | SI opval = ADDSI (pc, 4); | |
7170 | CPU (h_gr[((UINT) 2)]) = opval; | |
7171 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7172 | } | |
7173 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7174 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7175 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7176 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7177 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7178 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7179 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7180 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7181 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7182 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7183 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7184 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7185 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7186 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7187 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7188 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7189 | { | |
7190 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
7191 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7192 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7193 | } | |
7194 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7195 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7196 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7197 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7198 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7199 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7200 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7201 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7202 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7203 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7204 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7205 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7206 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7207 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7208 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7209 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7210 | { | |
7211 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7212 | CPU (h_gr[((UINT) 0)]) = opval; | |
7213 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7214 | } | |
7215 | { | |
7216 | SI opval = tmp_temp; | |
7217 | CPU (h_gr[((UINT) 31)]) = opval; | |
7218 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7219 | } | |
7220 | { | |
7221 | SI opval = ADDSI (tmp_temp, 64); | |
7222 | CPU (h_gr[((UINT) 1)]) = opval; | |
7223 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7224 | } | |
7a292a7a | 7225 | } |
c906108c SS |
7226 | |
7227 | SEM_BRANCH_FINI (vpc); | |
7228 | #undef FLD | |
7229 | } | |
7230 | NEXT (vpc); | |
7231 | ||
7232 | CASE (sem, INSN_RET) : /* ret */ | |
7233 | { | |
7234 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7235 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7236 | #define FLD(f) abuf->fields.cti.fields.fmt_ret.f | |
7237 | int UNUSED written = 0; | |
7238 | IADDR UNUSED pc = abuf->addr; | |
7239 | SEM_BRANCH_INIT | |
7240 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7241 | ||
7a292a7a | 7242 | { |
c906108c SS |
7243 | { |
7244 | SI opval = CPU (h_gr[((UINT) 0)]); | |
7245 | CPU (h_gr[((UINT) 31)]) = opval; | |
7246 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7247 | } | |
7248 | CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0)); | |
7249 | CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4)); | |
7250 | CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8)); | |
7251 | CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12)); | |
7252 | CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16)); | |
7253 | CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20)); | |
7254 | CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24)); | |
7255 | CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28)); | |
7256 | CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32)); | |
7257 | CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36)); | |
7258 | CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40)); | |
7259 | CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44)); | |
7260 | CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48)); | |
7261 | CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52)); | |
7262 | CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56)); | |
7263 | CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60)); | |
7264 | { | |
7265 | USI opval = CPU (h_gr[((UINT) 2)]); | |
7266 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7267 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7268 | } | |
7a292a7a | 7269 | } |
c906108c SS |
7270 | |
7271 | SEM_BRANCH_FINI (vpc); | |
7272 | #undef FLD | |
7273 | } | |
7274 | NEXT (vpc); | |
7275 | ||
7276 | CASE (sem, INSN_CALLS) : /* calls $src1 */ | |
7277 | { | |
7278 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7279 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7280 | #define FLD(f) abuf->fields.cti.fields.fmt_calls.f | |
7281 | int UNUSED written = 0; | |
7282 | IADDR UNUSED pc = abuf->addr; | |
7283 | SEM_BRANCH_INIT | |
7284 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7285 | ||
7286 | { | |
7287 | SI opval = i960_trap (current_cpu, pc, * FLD (i_src1)); | |
7288 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7289 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7290 | } | |
7291 | ||
7292 | SEM_BRANCH_FINI (vpc); | |
7293 | #undef FLD | |
7294 | } | |
7295 | NEXT (vpc); | |
7296 | ||
7297 | CASE (sem, INSN_FMARK) : /* fmark */ | |
7298 | { | |
7299 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7300 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7301 | #define FLD(f) abuf->fields.cti.fields.fmt_fmark.f | |
7302 | int UNUSED written = 0; | |
7303 | IADDR UNUSED pc = abuf->addr; | |
7304 | SEM_BRANCH_INIT | |
7305 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7306 | ||
7307 | { | |
7308 | SI opval = i960_breakpoint (current_cpu, pc); | |
7309 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7310 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7311 | } | |
7312 | ||
7313 | SEM_BRANCH_FINI (vpc); | |
7314 | #undef FLD | |
7315 | } | |
7316 | NEXT (vpc); | |
7317 | ||
7318 | CASE (sem, INSN_FLUSHREG) : /* flushreg */ | |
7319 | { | |
7320 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7321 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
7322 | #define FLD(f) abuf->fields.fmt_flushreg.f | |
7323 | int UNUSED written = 0; | |
7324 | IADDR UNUSED pc = abuf->addr; | |
7325 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7326 | ||
7327 | do { } while (0); /*nop*/ | |
7328 | ||
7329 | #undef FLD | |
7330 | } | |
7331 | NEXT (vpc); | |
7332 | ||
7333 | ||
7334 | } | |
7335 | ENDSWITCH (sem) /* End of semantic switch. */ | |
7336 | ||
7337 | /* At this point `vpc' contains the next insn to execute. */ | |
7338 | } | |
7339 | ||
7340 | #undef DEFINE_SWITCH | |
7341 | #endif /* DEFINE_SWITCH */ |