]>
Commit | Line | Data |
---|---|---|
48ad8298 HPN |
1 | 2005-12-06 Hans-Peter Nilsson <[email protected]> |
2 | ||
3 | * cris.cpu (simplecris-common-writable-specregs) | |
4 | (simplecris-common-readable-specregs): Split from | |
5 | simplecris-common-specregs. All users changed. | |
6 | (cris-implemented-writable-specregs-v0) | |
7 | (cris-implemented-readable-specregs-v0): Similar from | |
8 | cris-implemented-specregs-v0. | |
9 | (cris-implemented-writable-specregs-v3) | |
10 | (cris-implemented-readable-specregs-v3) | |
11 | (cris-implemented-writable-specregs-v8) | |
12 | (cris-implemented-readable-specregs-v8) | |
13 | (cris-implemented-writable-specregs-v10) | |
14 | (cris-implemented-readable-specregs-v10) | |
15 | (cris-implemented-writable-specregs-v32) | |
16 | (cris-implemented-readable-specregs-v32): Similar. | |
17 | (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New | |
18 | insns and specializations. | |
19 | ||
6f84a2a6 NS |
20 | 2005-11-08 Nathan Sidwell <[email protected]> |
21 | ||
22 | Add ms2 | |
23 | * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and | |
24 | model. | |
25 | (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, | |
26 | f-cb2incr, f-rc3): New fields. | |
27 | (LOOP): New instruction. | |
28 | (JAL-HAZARD): New hazard. | |
29 | (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): | |
30 | New operands. | |
31 | (mul, muli, dbnz, iflush): Enable for ms2 | |
32 | (jal, reti): Has JAL-HAZARD. | |
33 | (ldctxt, ldfb, stfb): Only ms1. | |
34 | (fbcb): Only ms1,ms1-003. | |
35 | (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, | |
36 | fbcbincrs, mfbcbincrs): Enable for ms2. | |
37 | (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. | |
38 | * ms1.opc (parse_loopsize): New. | |
39 | (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. | |
40 | (print_pcrel): New. | |
41 | ||
95b96521 DB |
42 | 2005-10-28 Dave Brolley <[email protected]> |
43 | ||
44 | Contribute the following change: | |
45 | 2003-09-24 Dave Brolley <[email protected]> | |
46 | ||
47 | * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of | |
48 | CGEN_ATTR_VALUE_TYPE. | |
49 | * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. | |
50 | Use cgen_bitset_intersect_p. | |
51 | ||
c6552317 DD |
52 | 2005-10-27 DJ Delorie <[email protected]> |
53 | ||
54 | * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. | |
55 | (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, | |
56 | arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which | |
57 | imm operand is needed. | |
58 | (adjnz, sbjnz): Pass the right operands. | |
59 | (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, | |
60 | unary-insn): Add -g variants for opcodes that need to support :G. | |
61 | (not.BW:G, push.BW:G): Call it. | |
62 | (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, | |
63 | stzx16-imm8-imm8-abs16): Fix operand typos. | |
64 | * m32c.opc (m32c_asm_hash): Support bnCND. | |
65 | (parse_signed4n, print_signed4n): New. | |
66 | ||
f75eb1c0 DD |
67 | 2005-10-26 DJ Delorie <[email protected]> |
68 | ||
69 | * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. | |
70 | (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, | |
71 | mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): | |
72 | dsp8[sp] is signed. | |
73 | (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). | |
74 | (mov.BW:S r0,r1): Fix typo r1l->r1. | |
75 | (tst): Allow :G suffix. | |
76 | * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. | |
77 | ||
e277c00b AM |
78 | 2005-10-26 Kazuhiro Inaoka <[email protected]> |
79 | ||
80 | * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. | |
81 | ||
92e0a941 DD |
82 | 2005-10-25 DJ Delorie <[email protected]> |
83 | ||
84 | * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by | |
85 | making one a macro of the other. | |
86 | ||
a1a280bb DD |
87 | 2005-10-21 DJ Delorie <[email protected]> |
88 | ||
89 | * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. | |
90 | (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, | |
91 | indexld, indexls): .w variants have `1' bit. | |
92 | (rot32.b): QI, not SI. | |
93 | (rot32.w): HI, not SI. | |
94 | (xchg16): HI for .w variant. | |
95 | ||
e74eb924 NC |
96 | 2005-10-19 Nick Clifton <[email protected]> |
97 | ||
98 | * m32r.opc (parse_slo16): Fix bad application of previous patch. | |
99 | ||
5e03663f NC |
100 | 2005-10-18 Andreas Schwab <[email protected]> |
101 | ||
102 | * m32r.opc (parse_slo16): Better version of previous patch. | |
103 | ||
ab7c9a26 NC |
104 | 2005-10-14 Kazuhiro Inaoka <[email protected]> |
105 | ||
106 | * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word | |
107 | size. | |
108 | ||
fd54057a DD |
109 | 2005-07-25 DJ Delorie <[email protected]> |
110 | ||
111 | * m32c.opc (parse_unsigned8): Add %dsp8(). | |
112 | (parse_signed8): Add %hi8(). | |
113 | (parse_unsigned16): Add %dsp16(). | |
114 | (parse_signed16): Add %lo16() and %hi16(). | |
115 | (parse_lab_5_3): Make valuep a bfd_vma *. | |
116 | ||
85da3a56 NC |
117 | 2005-07-18 Nick Clifton <[email protected]> |
118 | ||
119 | * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode | |
120 | components. | |
121 | (f-lab32-jmp-s): Fix insertion sequence. | |
122 | (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. | |
123 | (Dsp-40-s8): Make parameter be signed. | |
124 | (Dsp-40-s16): Likewise. | |
125 | (Dsp-48-s8): Likewise. | |
126 | (Dsp-48-s16): Likewise. | |
127 | (Imm-13-u3): Likewise. (Despite its name!) | |
128 | (BitBase16-16-s8): Make the parameter be unsigned. | |
129 | (BitBase16-8-u11-S): Likewise. | |
130 | (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, | |
131 | jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow | |
132 | relaxation. | |
133 | ||
134 | * m32c.opc: Fix formatting. | |
135 | Use safe-ctype.h instead of ctype.h | |
136 | Move duplicated code sequences into a macro. | |
137 | Fix compile time warnings about signedness mismatches. | |
138 | Remove dead code. | |
139 | (parse_lab_5_3): New parser function. | |
140 | ||
aa260854 JB |
141 | 2005-07-16 Jim Blandy <[email protected]> |
142 | ||
143 | * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, | |
144 | to represent isa sets. | |
145 | ||
0a665bfd JB |
146 | 2005-07-15 Jim Blandy <[email protected]> |
147 | ||
148 | * m32c.cpu, m32c.opc: Fix copyright. | |
149 | ||
49f58d10 JB |
150 | 2005-07-14 Jim Blandy <[email protected]> |
151 | ||
152 | * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. | |
153 | ||
0e6b69be AM |
154 | 2005-07-14 Alan Modra <[email protected]> |
155 | ||
156 | * ms1.opc (print_dollarhex): Correct format string. | |
157 | ||
f9210e37 AM |
158 | 2005-07-06 Alan Modra <[email protected]> |
159 | ||
160 | * iq2000.cpu: Include from binutils cpu dir. | |
161 | ||
3ec2b351 NC |
162 | 2005-07-05 Nick Clifton <[email protected]> |
163 | ||
164 | * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter | |
165 | unsigned in order to avoid compile time warnings about sign | |
166 | conflicts. | |
167 | ||
168 | * ms1.opc (parse_*): Likewise. | |
169 | (parse_imm16): Use a "void *" as it is passed both signed and | |
170 | unsigned arguments. | |
171 | ||
47b0e7ad NC |
172 | 2005-07-01 Nick Clifton <[email protected]> |
173 | ||
174 | * frv.opc: Update to ISO C90 function declaration style. | |
175 | * iq2000.opc: Likewise. | |
176 | * m32r.opc: Likewise. | |
177 | * sh.opc: Likewise. | |
178 | ||
b081650b DB |
179 | 2005-06-15 Dave Brolley <[email protected]> |
180 | ||
181 | Contributed by Red Hat. | |
182 | * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. | |
183 | * ms1.opc: New file. Written by Stan Cox. | |
184 | ||
e172dbf8 NC |
185 | 2005-05-10 Nick Clifton <[email protected]> |
186 | ||
187 | * Update the address and phone number of the FSF organization in | |
188 | the GPL notices in the following files: | |
189 | cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, | |
190 | m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, | |
191 | sh64-media.cpu, simplify.inc | |
192 | ||
b2d52a48 AM |
193 | 2005-02-24 Alan Modra <[email protected]> |
194 | ||
195 | * frv.opc (parse_A): Warning fix. | |
196 | ||
33b71eeb NC |
197 | 2005-02-23 Nick Clifton <[email protected]> |
198 | ||
199 | * frv.opc: Fixed compile time warnings about differing signed'ness | |
200 | of pointers passed to functions. | |
201 | * m32r.opc: Likewise. | |
202 | ||
bc18c937 NC |
203 | 2005-02-11 Nick Clifton <[email protected]> |
204 | ||
205 | * iq2000.opc (parse_jtargq10): Change type of valuep argument to | |
206 | 'bfd_vma *' in order avoid compile time warning message. | |
207 | ||
46da9a19 HPN |
208 | 2005-01-28 Hans-Peter Nilsson <[email protected]> |
209 | ||
210 | * cris.cpu (mstep): Add missing insn. | |
211 | ||
90219bd0 AO |
212 | 2005-01-25 Alexandre Oliva <[email protected]> |
213 | ||
214 | 2004-11-10 Alexandre Oliva <[email protected]> | |
215 | * frv.cpu: Add support for TLS annotations in loads and calll. | |
216 | * frv.opc (parse_symbolic_address): New. | |
217 | (parse_ldd_annotation): New. | |
218 | (parse_call_annotation): New. | |
219 | (parse_ld_annotation): New. | |
220 | (parse_ulo16, parse_uslo16): Use parse_symbolic_address. | |
221 | Introduce TLS relocations. | |
222 | (parse_d12, parse_s12, parse_u12): Likewise. | |
223 | (parse_uhi16): Likewise. Fix constant checking on 64-bit host. | |
224 | (parse_call_label, print_at): New. | |
225 | ||
c3d75c30 HPN |
226 | 2004-12-21 Mikael Starvik <[email protected]> |
227 | ||
228 | * cris.cpu (cris-set-mem): Correct integral write semantics. | |
229 | ||
68800d83 HPN |
230 | 2004-11-29 Hans-Peter Nilsson <[email protected]> |
231 | ||
232 | * cris.cpu: New file. | |
233 | ||
4bd1d37b NC |
234 | 2004-11-15 Michael K. Lechner <[email protected]> |
235 | ||
236 | * iq2000.cpu: Added quotes around macro arguments so that they | |
237 | will work with newer versions of guile. | |
238 | ||
4030fa5a NC |
239 | 2004-10-27 Nick Clifton <[email protected]> |
240 | ||
241 | * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, | |
242 | wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index | |
243 | operand. | |
244 | * iq2000.cpu (dnop index): Rename to _index to avoid complications | |
245 | with guile. | |
246 | ||
ac28a1cb RS |
247 | 2004-08-27 Richard Sandiford <[email protected]> |
248 | ||
249 | * frv.cpu (cfmovs): Change UNIT attribute to FMALL. | |
250 | ||
dc4c54bb NC |
251 | 2004-05-15 Nick Clifton <[email protected]> |
252 | ||
253 | * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. | |
254 | ||
f4453dfa NC |
255 | 2004-03-30 Kazuhiro Inaoka <[email protected]> |
256 | ||
257 | * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. | |
258 | ||
676a64f4 RS |
259 | 2004-03-01 Richard Sandiford <[email protected]> |
260 | ||
261 | * frv.cpu (define-arch frv): Add fr450 mach. | |
262 | (define-mach fr450): New. | |
263 | (define-model fr450): New. Add profile units to every fr450 insn. | |
264 | (define-attr UNIT): Add MDCUTSSI. | |
265 | (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. | |
266 | (define-attr AUDIO): New boolean. | |
267 | (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) | |
268 | (f-LRA-null, f-TLBPR-null): New fields. | |
269 | (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) | |
270 | (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. | |
271 | (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. | |
272 | (LRA-null, TLBPR-null): New macros. | |
273 | (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. | |
274 | (load-real-address): New macro. | |
275 | (lrai, lrad, tlbpr): New instructions. | |
276 | (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. | |
277 | (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. | |
278 | (mdcutssi): Change UNIT attribute to MDCUTSSI. | |
279 | (media-low-clear-semantics, media-scope-limit-semantics) | |
280 | (media-quad-limit, media-quad-shift): New macros. | |
281 | (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. | |
282 | * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) | |
283 | (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) | |
284 | (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. | |
285 | (fr450_unit_mapping): New array. | |
286 | (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry | |
287 | for new MDCUTSSI unit. | |
288 | (fr450_check_insn_major_constraints): New function. | |
289 | (check_insn_major_constraints): Use it. | |
290 | ||
c7a48b9a RS |
291 | 2004-03-01 Richard Sandiford <[email protected]> |
292 | ||
293 | * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. | |
294 | (scutss): Change unit to I0. | |
295 | (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. | |
296 | (mqsaths): Fix FR400-MAJOR categorization. | |
297 | (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) | |
298 | (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. | |
299 | * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) | |
300 | combinations. | |
301 | ||
8ae0baa2 RS |
302 | 2004-03-01 Richard Sandiford <[email protected]> |
303 | ||
304 | * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. | |
305 | (rstb, rsth, rst, rstd, rstq): Delete. | |
306 | (rstbf, rsthf, rstf, rstdf, rstqf): Delete. | |
307 | ||
8ee9a8b2 NC |
308 | 2004-02-23 Nick Clifton <[email protected]> |
309 | ||
310 | * Apply these patches from Renesas: | |
311 | ||
312 | 2004-02-10 Kazuhiro Inaoka <[email protected]> | |
313 | ||
314 | * cpu/m32r.opc (my_print_insn): Fixed incorrect output when | |
315 | disassembling codes for 0x*2 addresses. | |
316 | ||
317 | 2003-12-15 Kazuhiro Inaoka <[email protected]> | |
318 | ||
319 | * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. | |
320 | ||
321 | 2003-12-03 Kazuhiro Inaoka <[email protected]> | |
322 | ||
323 | * cpu/m32r.cpu : Add new model m32r2. | |
324 | Add new instructions. | |
325 | Replace occurrances of 'Mitsubishi' with 'Renesas'. | |
326 | Changed PIPE attr of push from O to OS. | |
327 | Care for Little-endian of M32R. | |
328 | * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): | |
329 | Care for Little-endian of M32R. | |
330 | (parse_slo16): signed extension for value. | |
331 | ||
299d901c AC |
332 | 2004-02-20 Andrew Cagney <[email protected]> |
333 | ||
e866a257 AC |
334 | * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick |
335 | Clifton, Ben Elliston, Matthew Green, and Andrew Haley. | |
336 | ||
299d901c AC |
337 | * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all |
338 | written by Ben Elliston. | |
339 | ||
cb10e79a RS |
340 | 2004-01-14 Richard Sandiford <[email protected]> |
341 | ||
342 | * frv.cpu (UNIT): Add IACC. | |
343 | (iacc-multiply-r-r): Use it. | |
344 | * frv.opc (fr400_unit_mapping): Add entry for IACC. | |
345 | (fr500_unit_mapping, fr550_unit_mapping): Likewise. | |
346 | ||
d4e4dc14 AO |
347 | 2004-01-06 Alexandre Oliva <[email protected]> |
348 | ||
349 | 2003-12-19 Alexandre Oliva <[email protected]> | |
350 | * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some | |
351 | cut&paste errors in shifting/truncating numerical operands. | |
352 | 2003-08-08 Alexandre Oliva <[email protected]> | |
353 | * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. | |
354 | (parse_uslo16): Likewise. | |
355 | (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. | |
356 | (parse_d12): Parse gotoff12 and gotofffuncdesc12. | |
357 | (parse_s12): Likewise. | |
358 | 2003-08-04 Alexandre Oliva <[email protected]> | |
359 | * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. | |
360 | (parse_uslo16): Likewise. | |
361 | (parse_uhi16): Parse gothi and gotfuncdeschi. | |
362 | (parse_d12): Parse got12 and gotfuncdesc12. | |
363 | (parse_s12): Likewise. | |
364 | ||
1340b9a9 DB |
365 | 2003-10-10 Dave Brolley <[email protected]> |
366 | ||
367 | * frv.cpu (dnpmop): New p-macro. | |
368 | (GRdoublek): Use dnpmop. | |
369 | (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. | |
370 | (store-double-r-r): Use (.sym regtype doublek). | |
371 | (r-store-double): Ditto. | |
372 | (store-double-r-r-u): Ditto. | |
373 | (conditional-store-double): Ditto. | |
374 | (conditional-store-double-u): Ditto. | |
375 | (store-double-r-simm): Ditto. | |
376 | (fmovs): Assign to UNIT FMALL. | |
377 | ||
ac7c07ac DB |
378 | 2003-10-06 Dave Brolley <[email protected]> |
379 | ||
380 | * frv.cpu, frv.opc: Add support for fr550. | |
381 | ||
d0312406 DB |
382 | 2003-09-24 Dave Brolley <[email protected]> |
383 | ||
384 | * frv.cpu (u-commit): New modelling unit for fr500. | |
385 | (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. | |
386 | (commit-r): Use u-commit model for fr500. | |
387 | (commit): Ditto. | |
388 | (conditional-float-binary-op): Take profiling data as an argument. | |
389 | Update callers. | |
390 | (ne-float-binary-op): Ditto. | |
391 | ||
c6945302 MS |
392 | 2003-09-19 Michael Snyder <[email protected]> |
393 | ||
394 | * frv.cpu (nldqi): Delete unimplemented instruction. | |
395 | ||
23600bb3 DB |
396 | 2003-09-12 Dave Brolley <[email protected]> |
397 | ||
398 | * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. | |
399 | (clear-ne-flag-r): Pass insn profiling in as an argument. Call | |
400 | frv_ref_SI to get input register referenced for profiling. | |
401 | (clear-ne-flag-all): Pass insn profiling in as an argument. | |
402 | (clrgr,clrfr,clrga,clrfa): Add profiling information. | |
403 | ||
6f18ad70 MS |
404 | 2003-09-11 Michael Snyder <[email protected]> |
405 | ||
406 | * frv.cpu: Typographical corrections. | |
407 | ||
96486995 DB |
408 | 2003-09-09 Dave Brolley <[email protected]> |
409 | ||
410 | * frv.cpu (media-dual-complex): Change UNIT to FMALL. | |
411 | (conditional-media-dual-complex, media-quad-complex): Likewise. | |
412 | ||
0457efce DB |
413 | 2003-09-04 Dave Brolley <[email protected]> |
414 | ||
415 | * frv.cpu (register-transfer): Pass in all attributes in on argument. | |
416 | Update all callers. | |
417 | (conditional-register-transfer): Ditto. | |
418 | (cache-preload): Ditto. | |
419 | (floating-point-conversion): Ditto. | |
420 | (floating-point-neg): Ditto. | |
421 | (float-abs): Ditto. | |
422 | (float-binary-op-s): Ditto. | |
423 | (conditional-float-binary-op): Ditto. | |
424 | (ne-float-binary-op): Ditto. | |
425 | (float-dual-arith): Ditto. | |
426 | (ne-float-dual-arith): Ditto. | |
427 | ||
8caa9169 DB |
428 | 2003-09-03 Dave Brolley <[email protected]> |
429 | ||
430 | * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. | |
431 | * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, | |
432 | MCLRACC-1. | |
433 | (A): Removed operand. | |
434 | (A0,A1): New operands replace operand A. | |
435 | (mnop): Now a real insn | |
436 | (mclracc): Removed insn. | |
437 | (mclracc-0, mclracc-1): New insns replace mclracc. | |
438 | (all insns): Use new UNIT attributes. | |
439 | ||
6d9ab561 NC |
440 | 2003-08-21 Nick Clifton <[email protected]> |
441 | ||
442 | * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand | |
443 | and u-media-dual-btoh with output parameter. | |
444 | (cmbtoh): Add profiling hack. | |
445 | ||
741a7751 NC |
446 | 2003-08-19 Michael Snyder <[email protected]> |
447 | ||
448 | * frv.cpu: Fix typo, Frintkeven -> FRintkeven | |
449 | ||
5b5b78da DE |
450 | 2003-06-10 Doug Evans <[email protected]> |
451 | ||
452 | * frv.cpu: Add IDOC attribute. | |
453 | ||
539ee71a AC |
454 | 2003-06-06 Andrew Cagney <[email protected]> |
455 | ||
456 | Contributed by Red Hat. | |
457 | * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, | |
458 | Stan Cox, and Frank Ch. Eigler. | |
459 | * iq2000.opc: New file. Written by Ben Elliston, Frank | |
460 | Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. | |
461 | * iq2000m.cpu: New file. Written by Jeff Johnston. | |
462 | * iq10.cpu: New file. Written by Jeff Johnston. | |
463 | ||
36c3ae24 NC |
464 | 2003-06-05 Nick Clifton <[email protected]> |
465 | ||
466 | * frv.cpu (FRintieven): New operand. An even-numbered only | |
467 | version of the FRinti operand. | |
468 | (FRintjeven): Likewise for FRintj. | |
469 | (FRintkeven): Likewise for FRintk. | |
470 | (mdcutssi, media-dual-word-rotate-r-r, mqsaths, | |
471 | media-quad-arith-sat-semantics, media-quad-arith-sat, | |
472 | conditional-media-quad-arith-sat, mdunpackh, | |
473 | media-quad-multiply-semantics, media-quad-multiply, | |
474 | conditional-media-quad-multiply, media-quad-complex-i, | |
475 | media-quad-multiply-acc-semantics, media-quad-multiply-acc, | |
476 | conditional-media-quad-multiply-acc, munpackh, | |
477 | media-quad-multiply-cross-acc-semantics, mdpackh, | |
478 | media-quad-multiply-cross-acc, mbtoh-semantics, | |
479 | media-quad-cross-multiply-cross-acc-semantics, | |
480 | media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, | |
481 | media-quad-cross-multiply-acc-semantics, cmbtoh, | |
482 | media-quad-cross-multiply-acc, media-quad-complex, mhtob, | |
483 | media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, | |
484 | cmhtob): Use new operands. | |
485 | * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. | |
0e6b69be | 486 | (parse_even_register): New function. |
36c3ae24 | 487 | |
75798298 NC |
488 | 2003-06-03 Nick Clifton <[email protected]> |
489 | ||
490 | * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit | |
491 | immediate value not unsigned. | |
492 | ||
9aab5aa3 AC |
493 | 2003-06-03 Andrew Cagney <[email protected]> |
494 | ||
495 | Contributed by Red Hat. | |
496 | * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, | |
497 | and Eric Christopher. | |
498 | * frv.opc: New file. Written by Catherine Moore, and Dave | |
499 | Brolley. | |
500 | * simplify.inc: New file. Written by Doug Evans. | |
501 | ||
2739f79a AC |
502 | 2003-05-02 Andrew Cagney <[email protected]> |
503 | ||
504 | * New file. | |
505 | ||
506 | \f | |
507 | Local Variables: | |
508 | mode: change-log | |
509 | left-margin: 8 | |
510 | fill-column: 74 | |
511 | version-control: never | |
512 | End: |