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rx: Fix p_vaddr reconstruction logic.
[binutils.git] / bfd / elf32-rl78.c
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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2011-2015 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
22#include "bfd_stdint.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rl78.h"
26#include "libiberty.h"
27
28#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30#define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
6ff71e76
NC		 34static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
35 asection *, bfd *, char **);
36
37/* FIXME: We could omit the SHIFT parameter, it is always zero. */
38#define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
39 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
40 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
41
99c513f6
DD		 42/* Note that the relocations around 0x7f are internal to this file;
43 feel free to move them as needed to avoid conflicts with published
44 relocation numbers. */
45
46static reloc_howto_type rl78_elf_howto_table [] =
47{
6346d5ca 48 RL78REL (NONE, 3, 0, 0, dont, FALSE),
99c513f6
DD		 49 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
50 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
51 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
52 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
53 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
54 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
55 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
56 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
57 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
58 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
59 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
60 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
61 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
62 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
63 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
64 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
65 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
66 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
67
68 EMPTY_HOWTO (0x13),
69 EMPTY_HOWTO (0x14),
70 EMPTY_HOWTO (0x15),
71 EMPTY_HOWTO (0x16),
72 EMPTY_HOWTO (0x17),
73 EMPTY_HOWTO (0x18),
74 EMPTY_HOWTO (0x19),
75 EMPTY_HOWTO (0x1a),
76 EMPTY_HOWTO (0x1b),
77 EMPTY_HOWTO (0x1c),
78 EMPTY_HOWTO (0x1d),
79 EMPTY_HOWTO (0x1e),
80 EMPTY_HOWTO (0x1f),
81
82 EMPTY_HOWTO (0x20),
83 EMPTY_HOWTO (0x21),
84 EMPTY_HOWTO (0x22),
85 EMPTY_HOWTO (0x23),
86 EMPTY_HOWTO (0x24),
87 EMPTY_HOWTO (0x25),
88 EMPTY_HOWTO (0x26),
89 EMPTY_HOWTO (0x27),
90 EMPTY_HOWTO (0x28),
91 EMPTY_HOWTO (0x29),
92 EMPTY_HOWTO (0x2a),
93 EMPTY_HOWTO (0x2b),
94 EMPTY_HOWTO (0x2c),
9cea966c 95 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 96
97 EMPTY_HOWTO (0x2e),
54f66250 98 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
99c513f6
DD		 99 EMPTY_HOWTO (0x30),
100 EMPTY_HOWTO (0x31),
101 EMPTY_HOWTO (0x32),
102 EMPTY_HOWTO (0x33),
103 EMPTY_HOWTO (0x34),
104 EMPTY_HOWTO (0x35),
105 EMPTY_HOWTO (0x36),
106 EMPTY_HOWTO (0x37),
107 EMPTY_HOWTO (0x38),
108 EMPTY_HOWTO (0x39),
109 EMPTY_HOWTO (0x3a),
110 EMPTY_HOWTO (0x3b),
111 EMPTY_HOWTO (0x3c),
112 EMPTY_HOWTO (0x3d),
113 EMPTY_HOWTO (0x3e),
114 EMPTY_HOWTO (0x3f),
115 EMPTY_HOWTO (0x40),
116
6ff71e76
NC		 117 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
118 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
119 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
120 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
121 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
122 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
123 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
124 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
125 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
126 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
127 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
128 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
129 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
130 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
131 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
132 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
133 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
99c513f6
DD		 134
135#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
136
137 EMPTY_HOWTO (0x52),
138 EMPTY_HOWTO (0x53),
139 EMPTY_HOWTO (0x54),
140 EMPTY_HOWTO (0x55),
141 EMPTY_HOWTO (0x56),
142 EMPTY_HOWTO (0x57),
143 EMPTY_HOWTO (0x58),
144 EMPTY_HOWTO (0x59),
145 EMPTY_HOWTO (0x5a),
146 EMPTY_HOWTO (0x5b),
147 EMPTY_HOWTO (0x5c),
148 EMPTY_HOWTO (0x5d),
149 EMPTY_HOWTO (0x5e),
150 EMPTY_HOWTO (0x5f),
151 EMPTY_HOWTO (0x60),
152 EMPTY_HOWTO (0x61),
153 EMPTY_HOWTO (0x62),
154 EMPTY_HOWTO (0x63),
155 EMPTY_HOWTO (0x64),
156 EMPTY_HOWTO (0x65),
157 EMPTY_HOWTO (0x66),
158 EMPTY_HOWTO (0x67),
159 EMPTY_HOWTO (0x68),
160 EMPTY_HOWTO (0x69),
161 EMPTY_HOWTO (0x6a),
162 EMPTY_HOWTO (0x6b),
163 EMPTY_HOWTO (0x6c),
164 EMPTY_HOWTO (0x6d),
165 EMPTY_HOWTO (0x6e),
166 EMPTY_HOWTO (0x6f),
167 EMPTY_HOWTO (0x70),
168 EMPTY_HOWTO (0x71),
169 EMPTY_HOWTO (0x72),
170 EMPTY_HOWTO (0x73),
171 EMPTY_HOWTO (0x74),
172 EMPTY_HOWTO (0x75),
173 EMPTY_HOWTO (0x76),
174 EMPTY_HOWTO (0x77),
175
176 EMPTY_HOWTO (0x78),
177 EMPTY_HOWTO (0x79),
178 EMPTY_HOWTO (0x7a),
179 EMPTY_HOWTO (0x7b),
180 EMPTY_HOWTO (0x7c),
181 EMPTY_HOWTO (0x7d),
182 EMPTY_HOWTO (0x7e),
183 EMPTY_HOWTO (0x7f),
184
6ff71e76
NC		 185 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
186 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
187 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
188 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
189 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
190 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
191 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
192 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
193 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
99c513f6
DD		 194 EMPTY_HOWTO (0x89),
195 EMPTY_HOWTO (0x8a),
196 EMPTY_HOWTO (0x8b),
197 EMPTY_HOWTO (0x8c),
6ff71e76 198 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
99c513f6
DD		 199 EMPTY_HOWTO (0x8e),
200 EMPTY_HOWTO (0x8f),
6ff71e76
NC		 201 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
202 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
203 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
204 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
205 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
206 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
207 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
99c513f6
DD		 208};
209\f
210/* Map BFD reloc types to RL78 ELF reloc types. */
211
212struct rl78_reloc_map
213{
214 bfd_reloc_code_real_type bfd_reloc_val;
215 unsigned int rl78_reloc_val;
216};
217
218static const struct rl78_reloc_map rl78_reloc_map [] =
219{
220 { BFD_RELOC_NONE, R_RL78_NONE },
221 { BFD_RELOC_8, R_RL78_DIR8S },
222 { BFD_RELOC_16, R_RL78_DIR16S },
223 { BFD_RELOC_24, R_RL78_DIR24S },
224 { BFD_RELOC_32, R_RL78_DIR32 },
225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
232 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c 244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
54f66250 245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
9cea966c 246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 247};
248
249static reloc_howto_type *
250rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
251 bfd_reloc_code_real_type code)
252{
253 unsigned int i;
254
255 if (code == BFD_RELOC_RL78_32_OP)
256 return rl78_elf_howto_table + R_RL78_DIR32;
257
0ba38529 258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
99c513f6
DD		 259 if (rl78_reloc_map [i].bfd_reloc_val == code)
260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
261
262 return NULL;
263}
264
265static reloc_howto_type *
266rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
267{
268 unsigned int i;
269
270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
271 if (rl78_elf_howto_table[i].name != NULL
272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
273 return rl78_elf_howto_table + i;
274
275 return NULL;
276}
277
278/* Set the howto pointer for an RL78 ELF reloc. */
279
280static void
281rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
282 arelent * cache_ptr,
283 Elf_Internal_Rela * dst)
284{
285 unsigned int r_type;
286
287 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 288 if (r_type >= (unsigned int) R_RL78_max)
289 {
64d29018 290 _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
5860e3f8
NC		 291 r_type = 0;
292 }
99c513f6
DD		 293 cache_ptr->howto = rl78_elf_howto_table + r_type;
294}
295\f
296static bfd_vma
297get_symbol_value (const char * name,
298 bfd_reloc_status_type * status,
299 struct bfd_link_info * info,
300 bfd * input_bfd,
301 asection * input_section,
302 int offset)
303{
99c513f6
DD		 304 struct bfd_link_hash_entry * h;
305
6ff71e76
NC		 306 if (info == NULL)
307 return 0;
308
99c513f6
DD		 309 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
310
311 if (h == NULL
312 || (h->type != bfd_link_hash_defined
313 && h->type != bfd_link_hash_defweak))
6ff71e76
NC		 314 {
315 bfd_reloc_status_type res;
316
317 res = info->callbacks->undefined_symbol
318 (info, name, input_bfd, input_section, offset, TRUE);
319 if (status)
320 * status = res;
321 return 0;
322 }
99c513f6 323
6ff71e76
NC		 324 return (h->u.def.value
325 + h->u.def.section->output_section->vma
326 + h->u.def.section->output_offset);
99c513f6
DD		 327}
328
329static bfd_vma
330get_romstart (bfd_reloc_status_type * status,
331 struct bfd_link_info * info,
332 bfd * abfd,
333 asection * sec,
334 int offset)
335{
336 static bfd_boolean cached = FALSE;
337 static bfd_vma cached_value = 0;
6ff71e76 338 static bfd_reloc_status_type cached_status;
99c513f6
DD		 339
340 if (!cached)
341 {
6ff71e76 342 cached_value = get_symbol_value ("_start", & cached_status, info, abfd, sec, offset);
99c513f6
DD		 343 cached = TRUE;
344 }
6ff71e76
NC		 345 if (status)
346 * status = cached_status;
99c513f6
DD		 347 return cached_value;
348}
349
350static bfd_vma
351get_ramstart (bfd_reloc_status_type * status,
352 struct bfd_link_info * info,
353 bfd * abfd,
354 asection * sec,
355 int offset)
356{
357 static bfd_boolean cached = FALSE;
358 static bfd_vma cached_value = 0;
6ff71e76 359 static bfd_reloc_status_type cached_status;
99c513f6
DD		 360
361 if (!cached)
362 {
6ff71e76 363 cached_value = get_symbol_value ("__datastart", & cached_status, info, abfd, sec, offset);
99c513f6
DD		 364 cached = TRUE;
365 }
6ff71e76
NC		 366 if (status)
367 * status = cached_status;
99c513f6
DD		 368 return cached_value;
369}
370
371#define NUM_STACK_ENTRIES 16
372static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
373static unsigned int rl78_stack_top;
374
375#define RL78_STACK_PUSH(val) \
376 do \
377 { \
378 if (rl78_stack_top < NUM_STACK_ENTRIES) \
379 rl78_stack [rl78_stack_top ++] = (val); \
380 else \
6ff71e76 381 _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
99c513f6
DD		 382 } \
383 while (0)
384
385#define RL78_STACK_POP(dest) \
386 do \
387 { \
388 if (rl78_stack_top > 0) \
6ff71e76 389 (dest) = rl78_stack [-- rl78_stack_top];\
99c513f6 390 else \
6ff71e76
NC		 391 { \
392 _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
393 (dest) = 0; \
394 } \
99c513f6
DD		 395 } \
396 while (0)
397
6ff71e76
NC		 398/* Special handling for RL78 complex relocs. Returns the
399 value of the reloc, or 0 for relocs which do not generate
400 a result. SYMVAL is the value of the symbol for relocs
401 which use a symbolic argument. */
402
403static bfd_vma
404rl78_compute_complex_reloc (unsigned long r_type,
405 bfd_vma symval,
406 asection * input_section)
407{
408 int32_t tmp1, tmp2;
409 bfd_vma relocation;
410
411 switch (r_type)
412 {
413 default:
414 return 0;
415
416 case R_RL78_ABS24S_PCREL:
417 case R_RL78_ABS16S_PCREL:
418 case R_RL78_ABS8S_PCREL:
419 RL78_STACK_POP (relocation);
420 relocation -= input_section->output_section->vma + input_section->output_offset;
421 return relocation;
422
423 case R_RL78_ABS32:
424 case R_RL78_ABS32_REV:
425 case R_RL78_ABS16:
426 case R_RL78_ABS16_REV:
427 case R_RL78_ABS16S:
428 case R_RL78_ABS16U:
429 case R_RL78_ABS8:
430 case R_RL78_ABS8U:
431 case R_RL78_ABS8S:
432 RL78_STACK_POP (relocation);
433 return relocation;
434
435 case R_RL78_ABS16UL:
436 case R_RL78_ABS8UL:
437 RL78_STACK_POP (relocation);
438 return relocation >> 2;
439
440 case R_RL78_ABS16UW:
441 case R_RL78_ABS8UW:
442 RL78_STACK_POP (relocation);
443 return relocation >> 1;
444
445 /* The rest of the relocs compute values and then push them onto the stack. */
446 case R_RL78_OPramtop:
447 case R_RL78_OPromtop:
448 case R_RL78_SYM:
449 RL78_STACK_PUSH (symval);
450 return 0;
1b786873 451
6ff71e76
NC		 452 case R_RL78_OPneg:
453 RL78_STACK_POP (tmp1);
454 tmp1 = - tmp1;
455 RL78_STACK_PUSH (tmp1);
456 return 0;
457
458 case R_RL78_OPadd:
459 RL78_STACK_POP (tmp2);
460 RL78_STACK_POP (tmp1);
461 tmp1 += tmp2;
462 RL78_STACK_PUSH (tmp1);
463 return 0;
464
465 case R_RL78_OPsub:
466 /* For the expression "A - B", the assembler pushes A,
467 then B, then OPSUB. So the first op we pop is B, not A. */
468 RL78_STACK_POP (tmp2); /* B */
469 RL78_STACK_POP (tmp1); /* A */
470 tmp1 -= tmp2; /* A - B */
471 RL78_STACK_PUSH (tmp1);
472 return 0;
473
474 case R_RL78_OPmul:
475 RL78_STACK_POP (tmp2);
476 RL78_STACK_POP (tmp1);
477 tmp1 *= tmp2;
478 RL78_STACK_PUSH (tmp1);
479 return 0;
480
481 case R_RL78_OPdiv:
482 RL78_STACK_POP (tmp2);
483 RL78_STACK_POP (tmp1);
484 tmp1 /= tmp2;
485 RL78_STACK_PUSH (tmp1);
486 return 0;
487
488 case R_RL78_OPshla:
489 RL78_STACK_POP (tmp2);
490 RL78_STACK_POP (tmp1);
491 tmp1 <<= tmp2;
492 RL78_STACK_PUSH (tmp1);
493 return 0;
494
495 case R_RL78_OPshra:
496 RL78_STACK_POP (tmp2);
497 RL78_STACK_POP (tmp1);
498 tmp1 >>= tmp2;
499 RL78_STACK_PUSH (tmp1);
500 return 0;
501
502 case R_RL78_OPsctsize:
503 RL78_STACK_PUSH (input_section->size);
504 return 0;
505
506 case R_RL78_OPscttop:
507 RL78_STACK_PUSH (input_section->output_section->vma);
508 return 0;
509
510 case R_RL78_OPand:
511 RL78_STACK_POP (tmp2);
512 RL78_STACK_POP (tmp1);
513 tmp1 &= tmp2;
514 RL78_STACK_PUSH (tmp1);
515 return 0;
516
517 case R_RL78_OPor:
518 RL78_STACK_POP (tmp2);
519 RL78_STACK_POP (tmp1);
520 tmp1 |= tmp2;
521 RL78_STACK_PUSH (tmp1);
522 return 0;
523
524 case R_RL78_OPxor:
525 RL78_STACK_POP (tmp2);
526 RL78_STACK_POP (tmp1);
527 tmp1 ^= tmp2;
528 RL78_STACK_PUSH (tmp1);
529 return 0;
530
531 case R_RL78_OPnot:
532 RL78_STACK_POP (tmp1);
533 tmp1 = ~ tmp1;
534 RL78_STACK_PUSH (tmp1);
535 return 0;
536
537 case R_RL78_OPmod:
538 RL78_STACK_POP (tmp2);
539 RL78_STACK_POP (tmp1);
540 tmp1 %= tmp2;
541 RL78_STACK_PUSH (tmp1);
542 return 0;
543 }
544}
545
546#undef RL78_STACK_PUSH
547#undef RL78_STACK_POP
548
549#define OP(i) (contents[reloc->address + (i)])
550
551static bfd_reloc_status_type
552rl78_special_reloc (bfd * input_bfd,
553 arelent * reloc,
554 asymbol * symbol,
555 void * data,
556 asection * input_section,
557 bfd * output_bfd ATTRIBUTE_UNUSED,
558 char ** error_message ATTRIBUTE_UNUSED)
559{
560 bfd_reloc_status_type r = bfd_reloc_ok;
561 bfd_vma relocation = 0;
562 unsigned long r_type = reloc->howto->type;
563 bfd_byte * contents = data;
564
565 /* If necessary, compute the symbolic value of the relocation. */
566 switch (r_type)
567 {
568 case R_RL78_SYM:
569 relocation = (symbol->value
570 + symbol->section->output_section->vma
571 + symbol->section->output_offset
572 + reloc->addend);
573 break;
574
575 case R_RL78_OPromtop:
576 relocation = get_romstart (&r, NULL, input_bfd, input_section,
577 reloc->address);
578 break;
579
580 case R_RL78_OPramtop:
581 relocation = get_ramstart (&r, NULL, input_bfd, input_section,
582 reloc->address);
583 break;
584 }
585
586 /* Get the value of the relocation. */
587 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
588
589 /* If the relocation alters the contents of the section then apply it now.
590 Note - since this function is called from
591 bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
592 and not from the linker, we do not perform any range checking. The
593 clients who are calling us are only interested in some relocated section
594 contents, and not any linkage problems that might occur later. */
595 switch (r_type)
596 {
597 case R_RL78_ABS32:
598 OP (0) = relocation;
599 OP (1) = relocation >> 8;
600 OP (2) = relocation >> 16;
601 OP (3) = relocation >> 24;
602 break;
603
604 case R_RL78_ABS32_REV:
605 OP (3) = relocation;
606 OP (2) = relocation >> 8;
607 OP (1) = relocation >> 16;
608 OP (0) = relocation >> 24;
609 break;
610
611 case R_RL78_ABS24S_PCREL:
612 case R_RL78_ABS24S:
613 OP (0) = relocation;
614 OP (1) = relocation >> 8;
615 OP (2) = relocation >> 16;
616 break;
617
618 case R_RL78_ABS16_REV:
619 OP (1) = relocation;
620 OP (0) = relocation >> 8;
621 break;
622
623 case R_RL78_ABS16S_PCREL:
624 case R_RL78_ABS16:
625 case R_RL78_ABS16S:
626 case R_RL78_ABS16U:
627 case R_RL78_ABS16UL:
628 case R_RL78_ABS16UW:
629 OP (0) = relocation;
630 OP (1) = relocation >> 8;
631 break;
632
633 case R_RL78_ABS8S_PCREL:
634 case R_RL78_ABS8:
635 case R_RL78_ABS8U:
636 case R_RL78_ABS8UL:
637 case R_RL78_ABS8UW:
638 case R_RL78_ABS8S:
639 OP (0) = relocation;
640 break;
641
642 default:
643 break;
644 }
645
646 return r;
647}
648
649#undef OP
650#define OP(i) (contents[rel->r_offset + (i)])
651
99c513f6
DD		 652/* Relocate an RL78 ELF section.
653 There is some attempt to make this function usable for many architectures,
654 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
655 if only to serve as a learning tool.
656
657 The RELOCATE_SECTION function is called by the new ELF backend linker
658 to handle the relocations for a section.
659
660 The relocs are always passed as Rela structures; if the section
661 actually uses Rel structures, the r_addend field will always be
662 zero.
663
664 This function is responsible for adjusting the section contents as
665 necessary, and (if using Rela relocs and generating a relocatable
666 output file) adjusting the reloc addend as necessary.
667
668 This function does not have to worry about setting the reloc
669 address or the reloc symbol index.
670
671 LOCAL_SYMS is a pointer to the swapped in local symbols.
672
673 LOCAL_SECTIONS is an array giving the section in the input file
674 corresponding to the st_shndx field of each local symbol.
675
676 The global hash table entry for the global symbols can be found
677 via elf_sym_hashes (input_bfd).
678
679 When generating relocatable output, this function must handle
680 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
681 going to be the section symbol corresponding to the output
682 section, which means that the addend must be adjusted
683 accordingly. */
684
685static bfd_boolean
686rl78_elf_relocate_section
687 (bfd * output_bfd,
688 struct bfd_link_info * info,
689 bfd * input_bfd,
690 asection * input_section,
691 bfd_byte * contents,
692 Elf_Internal_Rela * relocs,
693 Elf_Internal_Sym * local_syms,
694 asection ** local_sections)
695{
696 Elf_Internal_Shdr * symtab_hdr;
697 struct elf_link_hash_entry ** sym_hashes;
698 Elf_Internal_Rela * rel;
699 Elf_Internal_Rela * relend;
700 bfd *dynobj;
701 asection *splt;
702
703 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
704 sym_hashes = elf_sym_hashes (input_bfd);
705 relend = relocs + input_section->reloc_count;
706
707 dynobj = elf_hash_table (info)->dynobj;
708 splt = NULL;
709 if (dynobj != NULL)
3d4d4302 710 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 711
712 for (rel = relocs; rel < relend; rel ++)
713 {
714 reloc_howto_type * howto;
715 unsigned long r_symndx;
716 Elf_Internal_Sym * sym;
717 asection * sec;
718 struct elf_link_hash_entry * h;
719 bfd_vma relocation;
720 bfd_reloc_status_type r;
721 const char * name = NULL;
722 bfd_boolean unresolved_reloc = TRUE;
723 int r_type;
724
725 r_type = ELF32_R_TYPE (rel->r_info);
726 r_symndx = ELF32_R_SYM (rel->r_info);
727
728 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
729 h = NULL;
730 sym = NULL;
731 sec = NULL;
732 relocation = 0;
733
734 if (r_symndx < symtab_hdr->sh_info)
735 {
736 sym = local_syms + r_symndx;
737 sec = local_sections [r_symndx];
738 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
739
740 name = bfd_elf_string_from_elf_section
741 (input_bfd, symtab_hdr->sh_link, sym->st_name);
742 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
743 }
744 else
745 {
62d887d4
L		 746 bfd_boolean warned ATTRIBUTE_UNUSED;
747 bfd_boolean ignored ATTRIBUTE_UNUSED;
99c513f6
DD		 748
749 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
750 r_symndx, symtab_hdr, sym_hashes, h,
751 sec, relocation, unresolved_reloc,
62d887d4 752 warned, ignored);
99c513f6
DD		 753
754 name = h->root.root.string;
755 }
756
95b57ade 757 if (sec != NULL && discarded_section (sec))
99c513f6 758 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 759 rel, 1, relend, howto, 0, contents);
99c513f6 760
0e1862bb 761 if (bfd_link_relocatable (info))
99c513f6
DD		 762 {
763 /* This is a relocatable link. We don't have to change
764 anything, unless the reloc is against a section symbol,
765 in which case we have to adjust according to where the
766 section symbol winds up in the output section. */
767 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
768 rel->r_addend += sec->output_offset;
769 continue;
770 }
771
772 switch (ELF32_R_TYPE (rel->r_info))
773 {
774 case R_RL78_DIR16S:
775 {
776 bfd_vma *plt_offset;
777
778 if (h != NULL)
779 plt_offset = &h->plt.offset;
780 else
781 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
782
9cea966c 783 if (! valid_16bit_address (relocation))
99c513f6 784 {
99c513f6
DD		 785 /* If this is the first time we've processed this symbol,
786 fill in the plt entry with the correct symbol address. */
787 if ((*plt_offset & 1) == 0)
788 {
789 unsigned int x;
790
791 x = 0x000000ec; /* br !!abs24 */
792 x |= (relocation << 8) & 0xffffff00;
793 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
794 *plt_offset |= 1;
795 }
796
797 relocation = (splt->output_section->vma
798 + splt->output_offset
799 + (*plt_offset & -2));
800 if (name)
801 {
802 char *newname = bfd_malloc (strlen(name)+5);
803 strcpy (newname, name);
804 strcat(newname, ".plt");
805 _bfd_generic_link_add_one_symbol (info,
806 input_bfd,
807 newname,
808 BSF_FUNCTION | BSF_WEAK,
809 splt,
810 (*plt_offset & -2),
811 0,
812 1,
813 0,
814 0);
815 }
816 }
817 }
818 break;
819 }
820
821 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
822 /* If the symbol is undefined and weak
823 then the relocation resolves to zero. */
824 relocation = 0;
825 else
826 {
827 if (howto->pc_relative)
828 {
829 relocation -= (input_section->output_section->vma
830 + input_section->output_offset
831 + rel->r_offset);
832 relocation -= bfd_get_reloc_size (howto);
833 }
834
835 relocation += rel->r_addend;
836 }
837
838 r = bfd_reloc_ok;
839
840#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
99c513f6
DD		 841
842 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
843 switch (r_type)
844 {
845 case R_RL78_NONE:
846 break;
847
9cea966c
DD		 848 case R_RL78_RH_RELAX:
849 break;
850
99c513f6
DD		 851 case R_RL78_DIR8S_PCREL:
852 RANGE (-128, 127);
853 OP (0) = relocation;
854 break;
855
856 case R_RL78_DIR8S:
857 RANGE (-128, 255);
858 OP (0) = relocation;
859 break;
860
861 case R_RL78_DIR8U:
862 RANGE (0, 255);
863 OP (0) = relocation;
864 break;
865
866 case R_RL78_DIR16S_PCREL:
867 RANGE (-32768, 32767);
868 OP (0) = relocation;
869 OP (1) = relocation >> 8;
870 break;
871
872 case R_RL78_DIR16S:
873 if ((relocation & 0xf0000) == 0xf0000)
874 relocation &= 0xffff;
875 RANGE (-32768, 65535);
876 OP (0) = relocation;
877 OP (1) = relocation >> 8;
878 break;
879
880 case R_RL78_DIR16U:
881 RANGE (0, 65536);
882 OP (0) = relocation;
883 OP (1) = relocation >> 8;
884 break;
885
886 case R_RL78_DIR16:
887 RANGE (-32768, 65536);
888 OP (0) = relocation;
889 OP (1) = relocation >> 8;
890 break;
891
892 case R_RL78_DIR16_REV:
893 RANGE (-32768, 65536);
894 OP (1) = relocation;
895 OP (0) = relocation >> 8;
896 break;
897
898 case R_RL78_DIR3U_PCREL:
899 RANGE (3, 10);
900 OP (0) &= 0xf8;
901 OP (0) |= relocation & 0x07;
902 break;
903
904 case R_RL78_DIR24S_PCREL:
905 RANGE (-0x800000, 0x7fffff);
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 break;
910
911 case R_RL78_DIR24S:
912 RANGE (-0x800000, 0x7fffff);
913 OP (0) = relocation;
914 OP (1) = relocation >> 8;
915 OP (2) = relocation >> 16;
916 break;
917
918 case R_RL78_DIR32:
919 OP (0) = relocation;
920 OP (1) = relocation >> 8;
921 OP (2) = relocation >> 16;
922 OP (3) = relocation >> 24;
923 break;
924
925 case R_RL78_DIR32_REV:
926 OP (3) = relocation;
927 OP (2) = relocation >> 8;
928 OP (1) = relocation >> 16;
929 OP (0) = relocation >> 24;
930 break;
931
9cea966c 932 case R_RL78_RH_SFR:
9cea966c
DD		 933 RANGE (0xfff00, 0xfffff);
934 OP (0) = relocation & 0xff;
935 break;
936
937 case R_RL78_RH_SADDR:
9cea966c
DD		 938 RANGE (0xffe20, 0xfff1f);
939 OP (0) = relocation & 0xff;
9cea966c
DD		 940 break;
941
99c513f6 942 /* Complex reloc handling: */
99c513f6 943 case R_RL78_ABS32:
99c513f6 944 case R_RL78_ABS32_REV:
99c513f6
DD		 945 case R_RL78_ABS24S_PCREL:
946 case R_RL78_ABS24S:
99c513f6 947 case R_RL78_ABS16:
99c513f6 948 case R_RL78_ABS16_REV:
99c513f6
DD		 949 case R_RL78_ABS16S_PCREL:
950 case R_RL78_ABS16S:
99c513f6 951 case R_RL78_ABS16U:
99c513f6 952 case R_RL78_ABS16UL:
99c513f6 953 case R_RL78_ABS16UW:
99c513f6 954 case R_RL78_ABS8:
99c513f6 955 case R_RL78_ABS8U:
99c513f6 956 case R_RL78_ABS8UL:
99c513f6 957 case R_RL78_ABS8UW:
99c513f6
DD		 958 case R_RL78_ABS8S_PCREL:
959 case R_RL78_ABS8S:
99c513f6 960 case R_RL78_OPneg:
99c513f6 961 case R_RL78_OPadd:
99c513f6 962 case R_RL78_OPsub:
99c513f6 963 case R_RL78_OPmul:
99c513f6 964 case R_RL78_OPdiv:
99c513f6 965 case R_RL78_OPshla:
99c513f6 966 case R_RL78_OPshra:
99c513f6 967 case R_RL78_OPsctsize:
99c513f6 968 case R_RL78_OPscttop:
99c513f6 969 case R_RL78_OPand:
6ff71e76
NC		 970 case R_RL78_OPor:
971 case R_RL78_OPxor:
972 case R_RL78_OPnot:
973 case R_RL78_OPmod:
974 relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
99c513f6 975
6ff71e76
NC		 976 switch (r_type)
977 {
978 case R_RL78_ABS32:
979 OP (0) = relocation;
980 OP (1) = relocation >> 8;
981 OP (2) = relocation >> 16;
982 OP (3) = relocation >> 24;
983 break;
99c513f6 984
6ff71e76
NC		 985 case R_RL78_ABS32_REV:
986 OP (3) = relocation;
987 OP (2) = relocation >> 8;
988 OP (1) = relocation >> 16;
989 OP (0) = relocation >> 24;
990 break;
99c513f6 991
6ff71e76
NC		 992 case R_RL78_ABS24S_PCREL:
993 case R_RL78_ABS24S:
994 RANGE (-0x800000, 0x7fffff);
995 OP (0) = relocation;
996 OP (1) = relocation >> 8;
997 OP (2) = relocation >> 16;
998 break;
99c513f6 999
6ff71e76
NC		 1000 case R_RL78_ABS16:
1001 RANGE (-32768, 65535);
1002 OP (0) = relocation;
1003 OP (1) = relocation >> 8;
1004 break;
99c513f6 1005
6ff71e76
NC		 1006 case R_RL78_ABS16_REV:
1007 RANGE (-32768, 65535);
1008 OP (1) = relocation;
1009 OP (0) = relocation >> 8;
1010 break;
99c513f6 1011
6ff71e76
NC		 1012 case R_RL78_ABS16S_PCREL:
1013 case R_RL78_ABS16S:
1014 RANGE (-32768, 32767);
1015 OP (0) = relocation;
1016 OP (1) = relocation >> 8;
1017 break;
99c513f6 1018
6ff71e76
NC		 1019 case R_RL78_ABS16U:
1020 case R_RL78_ABS16UL:
1021 case R_RL78_ABS16UW:
1022 RANGE (0, 65536);
1023 OP (0) = relocation;
1024 OP (1) = relocation >> 8;
1025 break;
99c513f6 1026
6ff71e76
NC		 1027 case R_RL78_ABS8:
1028 RANGE (-128, 255);
1029 OP (0) = relocation;
1030 break;
99c513f6 1031
6ff71e76
NC		 1032 case R_RL78_ABS8U:
1033 case R_RL78_ABS8UL:
1034 case R_RL78_ABS8UW:
1035 RANGE (0, 255);
1036 OP (0) = relocation;
1037 break;
1038
1039 case R_RL78_ABS8S_PCREL:
1040 case R_RL78_ABS8S:
1041 RANGE (-128, 127);
1042 OP (0) = relocation;
1043 break;
1044
1045 default:
1046 break;
1047 }
1048 break;
1b786873 1049
6ff71e76
NC		 1050 case R_RL78_SYM:
1051 if (r_symndx < symtab_hdr->sh_info)
1052 relocation = sec->output_section->vma + sec->output_offset
1053 + sym->st_value + rel->r_addend;
1054 else if (h != NULL
1055 && (h->root.type == bfd_link_hash_defined
1056 || h->root.type == bfd_link_hash_defweak))
1057 relocation = h->root.u.def.value
1058 + sec->output_section->vma
1059 + sec->output_offset
1060 + rel->r_addend;
1061 else
1062 {
1063 relocation = 0;
1064 if (h->root.type != bfd_link_hash_undefweak)
1065 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
1066 }
1067 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
99c513f6
DD		 1068 break;
1069
1070 case R_RL78_OPromtop:
6ff71e76
NC		 1071 relocation = get_romstart (&r, info, input_bfd, input_section, rel->r_offset);
1072 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
99c513f6
DD		 1073 break;
1074
1075 case R_RL78_OPramtop:
6ff71e76
NC		 1076 relocation = get_ramstart (&r, info, input_bfd, input_section, rel->r_offset);
1077 (void) rl78_compute_complex_reloc (r_type, relocation, input_section);
99c513f6
DD		 1078 break;
1079
1080 default:
1081 r = bfd_reloc_notsupported;
1082 break;
1083 }
1084
1085 if (r != bfd_reloc_ok)
1086 {
1087 const char * msg = NULL;
1088
1089 switch (r)
1090 {
1091 case bfd_reloc_overflow:
1092 /* Catch the case of a missing function declaration
1093 and emit a more helpful error message. */
1094 if (r_type == R_RL78_DIR24S_PCREL)
1095 msg = _("%B(%A): error: call to undefined function '%s'");
1096 else
1097 r = info->callbacks->reloc_overflow
1098 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1099 input_bfd, input_section, rel->r_offset);
1100 break;
1101
1102 case bfd_reloc_undefined:
1103 r = info->callbacks->undefined_symbol
1104 (info, name, input_bfd, input_section, rel->r_offset,
1105 TRUE);
1106 break;
1107
1108 case bfd_reloc_other:
1109 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1110 break;
1111
1112 case bfd_reloc_outofrange:
1113 msg = _("%B(%A): internal error: out of range error");
1114 break;
1115
1116 case bfd_reloc_notsupported:
1117 msg = _("%B(%A): internal error: unsupported relocation error");
1118 break;
1119
1120 case bfd_reloc_dangerous:
1121 msg = _("%B(%A): internal error: dangerous relocation");
1122 break;
1123
1124 default:
1125 msg = _("%B(%A): internal error: unknown error");
1126 break;
1127 }
1128
1129 if (msg)
1130 _bfd_error_handler (msg, input_bfd, input_section, name);
1131
1132 if (! r)
1133 return FALSE;
1134 }
1135 }
1136
1137 return TRUE;
1138}
1139\f
1140/* Function to set the ELF flag bits. */
1141
1142static bfd_boolean
1143rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1144{
1145 elf_elfheader (abfd)->e_flags = flags;
1146 elf_flags_init (abfd) = TRUE;
1147 return TRUE;
1148}
1149
1150static bfd_boolean no_warn_mismatch = FALSE;
1151
1152void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1153
1154void
1155bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1156{
1157 no_warn_mismatch = user_no_warn_mismatch;
1158}
1159
1740ba0c
NC		 1160static const char *
1161rl78_cpu_name (flagword flags)
1162{
1163 switch (flags & E_FLAG_RL78_CPU_MASK)
1164 {
1165 default: return "";
1166 case E_FLAG_RL78_G10: return "G10";
1167 case E_FLAG_RL78_G13: return "G13";
1168 case E_FLAG_RL78_G14: return "G14";
1169 }
1170}
1171
99c513f6
DD		 1172/* Merge backend specific data from an object file to the output
1173 object file when linking. */
1174
1175static bfd_boolean
1176rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1177{
99c513f6 1178 flagword new_flags;
4046d87a 1179 flagword old_flags;
99c513f6
DD		 1180 bfd_boolean error = FALSE;
1181
1182 new_flags = elf_elfheader (ibfd)->e_flags;
4046d87a 1183 old_flags = elf_elfheader (obfd)->e_flags;
99c513f6
DD		 1184
1185 if (!elf_flags_init (obfd))
1186 {
1187 /* First call, no flags set. */
1188 elf_flags_init (obfd) = TRUE;
1189 elf_elfheader (obfd)->e_flags = new_flags;
1190 }
4046d87a
NC		 1191 else if (old_flags != new_flags)
1192 {
1193 flagword changed_flags = old_flags ^ new_flags;
1194
1740ba0c 1195 if (changed_flags & E_FLAG_RL78_CPU_MASK)
4046d87a 1196 {
1740ba0c
NC		 1197 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
1198 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
4046d87a 1199
1740ba0c
NC		 1200 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
1201 /* It does not matter what new_cpu may have. */;
1202 else if (out_cpu == E_FLAG_RL78_ANY_CPU)
1203 {
1204 if (in_cpu == E_FLAG_RL78_G10)
1205 {
1206 /* G10 files can only be linked with other G10 files.
1207 If the output is set to "any" this means that it is
1208 a G14 file that does not use hardware multiply/divide,
1209 but that is still incompatible with the G10 ABI. */
1210 error = TRUE;
1211
1212 (*_bfd_error_handler)
1213 (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
1214 bfd_get_filename (ibfd),
1215 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1216 }
1217 else
1218 {
1219 old_flags &= ~ E_FLAG_RL78_CPU_MASK;
1220 old_flags |= in_cpu;
1221 elf_elfheader (obfd)->e_flags = old_flags;
1222 }
1223 }
4046d87a 1224 else
1740ba0c
NC		 1225 {
1226 error = TRUE;
1227
1228 (*_bfd_error_handler)
1229 (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
1230 rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
1231 rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
1232 }
4046d87a 1233 }
856ea05c
KP		 1234
1235 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1236 {
1237 (*_bfd_error_handler)
1238 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1239
1240 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1241 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1242 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1243 else
1244 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1245 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1740ba0c 1246 error = TRUE;
1b786873 1247 }
4046d87a 1248 }
99c513f6
DD		 1249
1250 return !error;
1251}
1252\f
1253static bfd_boolean
1254rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1255{
1256 FILE * file = (FILE *) ptr;
1257 flagword flags;
1258
1259 BFD_ASSERT (abfd != NULL && ptr != NULL);
1260
1261 /* Print normal ELF private data. */
1262 _bfd_elf_print_private_bfd_data (abfd, ptr);
1263
1264 flags = elf_elfheader (abfd)->e_flags;
1265 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1266
1740ba0c
NC		 1267 if (flags & E_FLAG_RL78_CPU_MASK)
1268 fprintf (file, " [%s]", rl78_cpu_name (flags));
4046d87a 1269
856ea05c
KP		 1270 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1271 fprintf (file, _(" [64-bit doubles]"));
1272
99c513f6
DD		 1273 fputc ('\n', file);
1274 return TRUE;
1275}
1276
1277/* Return the MACH for an e_flags value. */
1278
1279static int
1740ba0c 1280elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
99c513f6 1281{
1740ba0c 1282 return bfd_mach_rl78;
99c513f6
DD		 1283}
1284
1285static bfd_boolean
1286rl78_elf_object_p (bfd * abfd)
1287{
1288 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1289 elf32_rl78_machine (abfd));
1290 return TRUE;
1291}
99c513f6
DD		 1292\f
1293/* support PLT for 16-bit references to 24-bit functions. */
1294
1295/* We support 16-bit pointers to code above 64k by generating a thunk
1296 below 64k containing a JMP instruction to the final address. */
68ffbac6 1297
99c513f6
DD		 1298static bfd_boolean
1299rl78_elf_check_relocs
1300 (bfd * abfd,
1301 struct bfd_link_info * info,
1302 asection * sec,
1303 const Elf_Internal_Rela * relocs)
1304{
1305 Elf_Internal_Shdr * symtab_hdr;
1306 struct elf_link_hash_entry ** sym_hashes;
1307 const Elf_Internal_Rela * rel;
1308 const Elf_Internal_Rela * rel_end;
1309 bfd_vma *local_plt_offsets;
1310 asection *splt;
1311 bfd *dynobj;
1312
0e1862bb 1313 if (bfd_link_relocatable (info))
99c513f6 1314 return TRUE;
68ffbac6 1315
99c513f6
DD		 1316 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1317 sym_hashes = elf_sym_hashes (abfd);
1318 local_plt_offsets = elf_local_got_offsets (abfd);
1319 splt = NULL;
1320 dynobj = elf_hash_table(info)->dynobj;
1321
1322 rel_end = relocs + sec->reloc_count;
1323 for (rel = relocs; rel < rel_end; rel++)
1324 {
1325 struct elf_link_hash_entry *h;
1326 unsigned long r_symndx;
1327 bfd_vma *offset;
68ffbac6 1328
99c513f6
DD		 1329 r_symndx = ELF32_R_SYM (rel->r_info);
1330 if (r_symndx < symtab_hdr->sh_info)
1331 h = NULL;
1332 else
1333 {
1334 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1335 while (h->root.type == bfd_link_hash_indirect
1336 || h->root.type == bfd_link_hash_warning)
1337 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1338
1339 /* PR15323, ref flags aren't set for references in the same
1340 object. */
1341 h->root.non_ir_ref = 1;
99c513f6 1342 }
68ffbac6 1343
99c513f6
DD		 1344 switch (ELF32_R_TYPE (rel->r_info))
1345 {
1346 /* This relocation describes a 16-bit pointer to a function.
1347 We may need to allocate a thunk in low memory; reserve memory
1348 for it now. */
1349 case R_RL78_DIR16S:
1350 if (dynobj == NULL)
1351 elf_hash_table (info)->dynobj = dynobj = abfd;
1352 if (splt == NULL)
1353 {
3d4d4302 1354 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1355 if (splt == NULL)
1356 {
1357 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1358 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1359 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1360 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1361 flags);
99c513f6
DD		 1362 if (splt == NULL
1363 || ! bfd_set_section_alignment (dynobj, splt, 1))
1364 return FALSE;
1365 }
1366 }
1367
1368 if (h != NULL)
1369 offset = &h->plt.offset;
1370 else
1371 {
1372 if (local_plt_offsets == NULL)
1373 {
1374 size_t size;
1375 unsigned int i;
1376
1377 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1378 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1379 if (local_plt_offsets == NULL)
1380 return FALSE;
1381 elf_local_got_offsets (abfd) = local_plt_offsets;
1382
1383 for (i = 0; i < symtab_hdr->sh_info; i++)
1384 local_plt_offsets[i] = (bfd_vma) -1;
1385 }
1386 offset = &local_plt_offsets[r_symndx];
1387 }
1388
1389 if (*offset == (bfd_vma) -1)
1390 {
1391 *offset = splt->size;
1392 splt->size += 4;
1393 }
1394 break;
1395 }
1396 }
68ffbac6 1397
99c513f6
DD		 1398 return TRUE;
1399}
1400
1401/* This must exist if dynobj is ever set. */
1402
1403static bfd_boolean
1404rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1405 struct bfd_link_info *info)
1406{
1407 bfd *dynobj;
1408 asection *splt;
1409
47fc0f1f
NC		 1410 if (!elf_hash_table (info)->dynamic_sections_created)
1411 return TRUE;
1412
9cea966c
DD		 1413 /* As an extra sanity check, verify that all plt entries have been
1414 filled in. However, relaxing might have changed the relocs so
1415 that some plt entries don't get filled in, so we have to skip
1416 this check if we're relaxing. Unfortunately, check_relocs is
1417 called before relaxation. */
99c513f6 1418
1740ba0c 1419 if (info->relax_trip > 0)
47fc0f1f
NC		 1420 return TRUE;
1421
1422 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1423 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1424 {
47fc0f1f
NC		 1425 bfd_byte *contents = splt->contents;
1426 unsigned int i, size = splt->size;
1427
1428 for (i = 0; i < size; i += 4)
99c513f6 1429 {
47fc0f1f
NC		 1430 unsigned int x = bfd_get_32 (dynobj, contents + i);
1431 BFD_ASSERT (x != 0);
99c513f6
DD		 1432 }
1433 }
1434
1435 return TRUE;
1436}
1437
1438static bfd_boolean
1439rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1440 struct bfd_link_info *info)
1441{
1442 bfd *dynobj;
1443 asection *splt;
1444
0e1862bb 1445 if (bfd_link_relocatable (info))
99c513f6
DD		 1446 return TRUE;
1447
1448 dynobj = elf_hash_table (info)->dynobj;
1449 if (dynobj == NULL)
1450 return TRUE;
1451
3d4d4302 1452 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1453 BFD_ASSERT (splt != NULL);
1454
1455 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1456 if (splt->contents == NULL)
1457 return FALSE;
1458
1459 return TRUE;
1460}
1461
1462\f
1463
1464/* Handle relaxing. */
1465
1466/* A subroutine of rl78_elf_relax_section. If the global symbol H
1467 is within the low 64k, remove any entry for it in the plt. */
1468
1469struct relax_plt_data
1470{
1471 asection *splt;
1472 bfd_boolean *again;
1473};
1474
1475static bfd_boolean
2c3fc389 1476rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1477{
1478 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1479
1480 if (h->plt.offset != (bfd_vma) -1)
1481 {
1482 bfd_vma address;
1483
1484 if (h->root.type == bfd_link_hash_undefined
1485 || h->root.type == bfd_link_hash_undefweak)
1486 address = 0;
1487 else
1488 address = (h->root.u.def.section->output_section->vma
1489 + h->root.u.def.section->output_offset
1490 + h->root.u.def.value);
1491
1492 if (valid_16bit_address (address))
1493 {
1494 h->plt.offset = -1;
1495 data->splt->size -= 4;
1496 *data->again = TRUE;
1497 }
1498 }
1499
1500 return TRUE;
1501}
1502
1503/* A subroutine of rl78_elf_relax_section. If the global symbol H
1504 previously had a plt entry, give it a new entry offset. */
1505
1506static bfd_boolean
2c3fc389 1507rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1508{
1509 bfd_vma *entry = (bfd_vma *) xdata;
1510
1511 if (h->plt.offset != (bfd_vma) -1)
1512 {
1513 h->plt.offset = *entry;
1514 *entry += 4;
1515 }
1516
1517 return TRUE;
1518}
1519
1520static bfd_boolean
1521rl78_elf_relax_plt_section (bfd *dynobj,
1522 asection *splt,
1523 struct bfd_link_info *info,
1524 bfd_boolean *again)
1525{
1526 struct relax_plt_data relax_plt_data;
1527 bfd *ibfd;
1528
1529 /* Assume nothing changes. */
1530 *again = FALSE;
1531
0e1862bb 1532 if (bfd_link_relocatable (info))
99c513f6
DD		 1533 return TRUE;
1534
1535 /* We only relax the .plt section at the moment. */
1536 if (dynobj != elf_hash_table (info)->dynobj
1537 || strcmp (splt->name, ".plt") != 0)
1538 return TRUE;
1539
1540 /* Quick check for an empty plt. */
1541 if (splt->size == 0)
1542 return TRUE;
1543
1544 /* Map across all global symbols; see which ones happen to
1545 fall in the low 64k. */
1546 relax_plt_data.splt = splt;
1547 relax_plt_data.again = again;
1548 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1549 &relax_plt_data);
1550
1551 /* Likewise for local symbols, though that's somewhat less convenient
1552 as we have to walk the list of input bfds and swap in symbol data. */
c72f2fb2 1553 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1554 {
1555 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1556 Elf_Internal_Shdr *symtab_hdr;
1557 Elf_Internal_Sym *isymbuf = NULL;
1558 unsigned int idx;
1559
1560 if (! local_plt_offsets)
1561 continue;
1562
1563 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1564 if (symtab_hdr->sh_info != 0)
1565 {
1566 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1567 if (isymbuf == NULL)
1568 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1569 symtab_hdr->sh_info, 0,
1570 NULL, NULL, NULL);
1571 if (isymbuf == NULL)
1572 return FALSE;
1573 }
1574
1575 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1576 {
1577 Elf_Internal_Sym *isym;
1578 asection *tsec;
1579 bfd_vma address;
1580
1581 if (local_plt_offsets[idx] == (bfd_vma) -1)
1582 continue;
1583
1584 isym = &isymbuf[idx];
1585 if (isym->st_shndx == SHN_UNDEF)
1586 continue;
1587 else if (isym->st_shndx == SHN_ABS)
1588 tsec = bfd_abs_section_ptr;
1589 else if (isym->st_shndx == SHN_COMMON)
1590 tsec = bfd_com_section_ptr;
1591 else
1592 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1593
1594 address = (tsec->output_section->vma
1595 + tsec->output_offset
1596 + isym->st_value);
1597 if (valid_16bit_address (address))
1598 {
1599 local_plt_offsets[idx] = -1;
1600 splt->size -= 4;
1601 *again = TRUE;
1602 }
1603 }
1604
1605 if (isymbuf != NULL
1606 && symtab_hdr->contents != (unsigned char *) isymbuf)
1607 {
1608 if (! info->keep_memory)
1609 free (isymbuf);
1610 else
1611 {
1612 /* Cache the symbols for elf_link_input_bfd. */
1613 symtab_hdr->contents = (unsigned char *) isymbuf;
1614 }
1615 }
1616 }
1617
1618 /* If we changed anything, walk the symbols again to reallocate
1619 .plt entry addresses. */
1620 if (*again && splt->size > 0)
1621 {
1622 bfd_vma entry = 0;
1623
1624 elf_link_hash_traverse (elf_hash_table (info),
1625 rl78_relax_plt_realloc, &entry);
1626
c72f2fb2 1627 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1628 {
1629 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1630 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1631 unsigned int idx;
1632
1633 if (! local_plt_offsets)
1634 continue;
1635
1636 for (idx = 0; idx < nlocals; ++idx)
1637 if (local_plt_offsets[idx] != (bfd_vma) -1)
1638 {
1639 local_plt_offsets[idx] = entry;
1640 entry += 4;
1641 }
1642 }
1643 }
1644
1645 return TRUE;
1646}
1647
9cea966c
DD		 1648/* Delete some bytes from a section while relaxing. */
1649
1650static bfd_boolean
1651elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1740ba0c 1652 Elf_Internal_Rela *alignment_rel, int force_snip)
9cea966c
DD		 1653{
1654 Elf_Internal_Shdr * symtab_hdr;
1655 unsigned int sec_shndx;
1656 bfd_byte * contents;
1657 Elf_Internal_Rela * irel;
1658 Elf_Internal_Rela * irelend;
1659 Elf_Internal_Sym * isym;
1660 Elf_Internal_Sym * isymend;
1661 bfd_vma toaddr;
1662 unsigned int symcount;
1663 struct elf_link_hash_entry ** sym_hashes;
1664 struct elf_link_hash_entry ** end_hashes;
1665
1666 if (!alignment_rel)
1667 force_snip = 1;
1668
1669 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1670
1671 contents = elf_section_data (sec)->this_hdr.contents;
1672
1673 /* The deletion must stop at the next alignment boundary, if
1674 ALIGNMENT_REL is non-NULL. */
1675 toaddr = sec->size;
1676 if (alignment_rel)
1677 toaddr = alignment_rel->r_offset;
1678
1679 irel = elf_section_data (sec)->relocs;
2bc56d66
DD		 1680 if (irel == NULL)
1681 {
1682 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1683 irel = elf_section_data (sec)->relocs;
1684 }
1685
9cea966c
DD		 1686 irelend = irel + sec->reloc_count;
1687
1688 /* Actually delete the bytes. */
1689 memmove (contents + addr, contents + addr + count,
1690 (size_t) (toaddr - addr - count));
1691
1692 /* If we don't have an alignment marker to worry about, we can just
1693 shrink the section. Otherwise, we have to fill in the newly
1694 created gap with NOP insns (0x03). */
1695 if (force_snip)
1696 sec->size -= count;
1697 else
1698 memset (contents + toaddr - count, 0x03, count);
1699
1700 /* Adjust all the relocs. */
2bc56d66 1701 for (; irel && irel < irelend; irel++)
9cea966c
DD		 1702 {
1703 /* Get the new reloc address. */
1704 if (irel->r_offset > addr
1705 && (irel->r_offset < toaddr
1706 || (force_snip && irel->r_offset == toaddr)))
1707 irel->r_offset -= count;
1708
1709 /* If we see an ALIGN marker at the end of the gap, we move it
1710 to the beginning of the gap, since marking these gaps is what
1711 they're for. */
1712 if (irel->r_offset == toaddr
1713 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1714 && irel->r_addend & RL78_RELAXA_ALIGN)
1715 irel->r_offset -= count;
1716 }
1717
1718 /* Adjust the local symbols defined in this section. */
1719 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1720 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1721 isymend = isym + symtab_hdr->sh_info;
1722
1723 for (; isym < isymend; isym++)
1724 {
1725 /* If the symbol is in the range of memory we just moved, we
1726 have to adjust its value. */
1727 if (isym->st_shndx == sec_shndx
1728 && isym->st_value > addr
1729 && isym->st_value < toaddr)
1730 isym->st_value -= count;
1731
1732 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1733 *end* is in the moved bytes but it's *start* isn't), then we
1734 must adjust its size. */
1735 if (isym->st_shndx == sec_shndx
1736 && isym->st_value < addr
1737 && isym->st_value + isym->st_size > addr
1738 && isym->st_value + isym->st_size < toaddr)
1739 isym->st_size -= count;
1740 }
1741
1742 /* Now adjust the global symbols defined in this section. */
1743 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1744 - symtab_hdr->sh_info);
1745 sym_hashes = elf_sym_hashes (abfd);
1746 end_hashes = sym_hashes + symcount;
1747
1748 for (; sym_hashes < end_hashes; sym_hashes++)
1749 {
1750 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1751
1752 if ((sym_hash->root.type == bfd_link_hash_defined
1753 || sym_hash->root.type == bfd_link_hash_defweak)
1754 && sym_hash->root.u.def.section == sec)
1755 {
1756 /* As above, adjust the value if needed. */
1757 if (sym_hash->root.u.def.value > addr
1758 && sym_hash->root.u.def.value < toaddr)
1759 sym_hash->root.u.def.value -= count;
1760
1761 /* As above, adjust the size if needed. */
1762 if (sym_hash->root.u.def.value < addr
1763 && sym_hash->root.u.def.value + sym_hash->size > addr
1764 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1765 sym_hash->size -= count;
1766 }
1767 }
1768
1769 return TRUE;
1770}
1771
1772/* Used to sort relocs by address. If relocs have the same address,
1773 we maintain their relative order, except that R_RL78_RH_RELAX
1774 alignment relocs must be the first reloc for any given address. */
1775
1776static void
1777reloc_bubblesort (Elf_Internal_Rela * r, int count)
1778{
1779 int i;
1780 bfd_boolean again;
1781 bfd_boolean swappit;
1782
1783 /* This is almost a classic bubblesort. It's the slowest sort, but
1784 we're taking advantage of the fact that the relocations are
1785 mostly in order already (the assembler emits them that way) and
1786 we need relocs with the same address to remain in the same
1787 relative order. */
1788 again = TRUE;
1789 while (again)
1790 {
1791 again = FALSE;
1792 for (i = 0; i < count - 1; i ++)
1793 {
1794 if (r[i].r_offset > r[i + 1].r_offset)
1795 swappit = TRUE;
1796 else if (r[i].r_offset < r[i + 1].r_offset)
1797 swappit = FALSE;
1798 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1799 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1800 swappit = TRUE;
1801 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1802 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1803 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1804 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1805 swappit = TRUE;
1806 else
1807 swappit = FALSE;
1808
1809 if (swappit)
1810 {
1811 Elf_Internal_Rela tmp;
1812
1813 tmp = r[i];
1814 r[i] = r[i + 1];
1815 r[i + 1] = tmp;
1816 /* If we do move a reloc back, re-scan to see if it
1817 needs to be moved even further back. This avoids
1818 most of the O(n^2) behavior for our cases. */
1819 if (i > 0)
1820 i -= 2;
1821 again = TRUE;
1822 }
1823 }
1824 }
1825}
1826
1827
1828#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1829 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
6ff71e76 1830 lrel, abfd, sec, link_info, scale)
9cea966c
DD		 1831
1832static bfd_vma
1833rl78_offset_for_reloc (bfd * abfd,
6ff71e76
NC		 1834 Elf_Internal_Rela * rel,
1835 Elf_Internal_Shdr * symtab_hdr,
1836 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1837 Elf_Internal_Sym * intsyms,
1838 Elf_Internal_Rela ** lrel,
1839 bfd * input_bfd,
1840 asection * input_section,
1841 struct bfd_link_info * info,
1842 int * scale)
9cea966c
DD		 1843{
1844 bfd_vma symval;
9cea966c
DD		 1845
1846 *scale = 1;
1847
1848 /* REL is the first of 1..N relocations. We compute the symbol
1849 value for each relocation, then combine them if needed. LREL
1850 gets a pointer to the last relocation used. */
1851 while (1)
1852 {
6ff71e76 1853 unsigned long r_type;
9cea966c
DD		 1854
1855 /* Get the value of the symbol referred to by the reloc. */
1856 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1857 {
1858 /* A local symbol. */
1859 Elf_Internal_Sym *isym;
1860 asection *ssec;
1861
1862 isym = intsyms + ELF32_R_SYM (rel->r_info);
1863
1864 if (isym->st_shndx == SHN_UNDEF)
1865 ssec = bfd_und_section_ptr;
1866 else if (isym->st_shndx == SHN_ABS)
1867 ssec = bfd_abs_section_ptr;
1868 else if (isym->st_shndx == SHN_COMMON)
1869 ssec = bfd_com_section_ptr;
1870 else
1871 ssec = bfd_section_from_elf_index (abfd,
1872 isym->st_shndx);
1873
1874 /* Initial symbol value. */
1875 symval = isym->st_value;
1876
1877 /* GAS may have made this symbol relative to a section, in
1878 which case, we have to add the addend to find the
1879 symbol. */
1880 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1881 symval += rel->r_addend;
1882
1883 if (ssec)
1884 {
1885 if ((ssec->flags & SEC_MERGE)
dbaa2011 1886 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1887 symval = _bfd_merged_section_offset (abfd, & ssec,
1888 elf_section_data (ssec)->sec_info,
1889 symval);
1890 }
1891
1892 /* Now make the offset relative to where the linker is putting it. */
1893 if (ssec)
1894 symval +=
1895 ssec->output_section->vma + ssec->output_offset;
1896
1897 symval += rel->r_addend;
1898 }
1899 else
1900 {
1901 unsigned long indx;
1902 struct elf_link_hash_entry * h;
1903
1904 /* An external symbol. */
1905 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1906 h = elf_sym_hashes (abfd)[indx];
1907 BFD_ASSERT (h != NULL);
1908
1909 if (h->root.type != bfd_link_hash_defined
1910 && h->root.type != bfd_link_hash_defweak)
1911 {
1912 /* This appears to be a reference to an undefined
1913 symbol. Just ignore it--it will be caught by the
1914 regular reloc processing. */
1915 if (lrel)
1916 *lrel = rel;
1917 return 0;
1918 }
1919
1920 symval = (h->root.u.def.value
1921 + h->root.u.def.section->output_section->vma
1922 + h->root.u.def.section->output_offset);
1923
1924 symval += rel->r_addend;
1925 }
1926
6ff71e76
NC		 1927 r_type = ELF32_R_TYPE (rel->r_info);
1928 switch (r_type)
9cea966c
DD		 1929 {
1930 case R_RL78_SYM:
6ff71e76 1931 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
9cea966c
DD		 1932 break;
1933
6ff71e76
NC		 1934 case R_RL78_OPromtop:
1935 symval = get_romstart (NULL, info, input_bfd, input_section, rel->r_offset);
1936 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
9cea966c
DD		 1937 break;
1938
6ff71e76
NC		 1939 case R_RL78_OPramtop:
1940 symval = get_ramstart (NULL, info, input_bfd, input_section, rel->r_offset);
1941 (void) rl78_compute_complex_reloc (r_type, symval, input_section);
9cea966c
DD		 1942 break;
1943
6ff71e76
NC		 1944 case R_RL78_OPneg:
1945 case R_RL78_OPadd:
9cea966c 1946 case R_RL78_OPsub:
9cea966c 1947 case R_RL78_OPmul:
9cea966c 1948 case R_RL78_OPdiv:
9cea966c 1949 case R_RL78_OPshla:
9cea966c 1950 case R_RL78_OPshra:
9cea966c 1951 case R_RL78_OPsctsize:
9cea966c 1952 case R_RL78_OPscttop:
9cea966c 1953 case R_RL78_OPand:
9cea966c 1954 case R_RL78_OPor:
9cea966c 1955 case R_RL78_OPxor:
9cea966c 1956 case R_RL78_OPnot:
9cea966c 1957 case R_RL78_OPmod:
6ff71e76 1958 (void) rl78_compute_complex_reloc (r_type, 0, input_section);
9cea966c
DD		 1959 break;
1960
1961 case R_RL78_DIR16UL:
1962 case R_RL78_DIR8UL:
1963 case R_RL78_ABS16UL:
1964 case R_RL78_ABS8UL:
9cea966c 1965 *scale = 4;
6ff71e76 1966 goto reloc_computes_value;
9cea966c
DD		 1967
1968 case R_RL78_DIR16UW:
1969 case R_RL78_DIR8UW:
1970 case R_RL78_ABS16UW:
1971 case R_RL78_ABS8UW:
9cea966c 1972 *scale = 2;
6ff71e76 1973 goto reloc_computes_value;
1b786873 1974
9cea966c 1975 default:
6ff71e76
NC		 1976 reloc_computes_value:
1977 symval = rl78_compute_complex_reloc (r_type, 0, input_section);
9cea966c
DD		 1978 if (lrel)
1979 *lrel = rel;
1980 return symval;
1981 }
1982
1983 rel ++;
1984 }
1985}
1986
1987struct {
1988 int prefix; /* or -1 for "no prefix" */
1989 int insn; /* or -1 for "end of list" */
1990 int insn_for_saddr; /* or -1 for "no alternative" */
1991 int insn_for_sfr; /* or -1 for "no alternative" */
1992} relax_addr16[] = {
1993 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1994 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1995 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1996 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1997
1998 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1999 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
2000 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
2001 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
2002 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
2003 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
2004 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
2005 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
2006
2007 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
2008 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
2009 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
2010 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
2011 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
2012
2013 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
2014 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
2015 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
2016 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
2017
2018 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
2019 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
2020 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
2021
2022 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
2023 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
2024 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
2025 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
2026 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
2027 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
2028
2029 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
2030
2031 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
2032 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
2033 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
2034 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
2035 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
2036 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
2037 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
2038 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
2039
2040 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
2041 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
2042 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
2043 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
2044 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
2045 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
2046 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
2047 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 2048
9cea966c
DD		 2049 { -1, -1, -1, -1 }
2050};
2051
2052/* Relax one section. */
2053
99c513f6
DD		 2054static bfd_boolean
2055rl78_elf_relax_section
2056 (bfd * abfd,
2057 asection * sec,
2058 struct bfd_link_info * link_info,
2059 bfd_boolean * again)
2060{
9cea966c
DD		 2061 Elf_Internal_Shdr * symtab_hdr;
2062 Elf_Internal_Shdr * shndx_hdr;
2063 Elf_Internal_Rela * internal_relocs;
2064 Elf_Internal_Rela * free_relocs = NULL;
2065 Elf_Internal_Rela * irel;
2066 Elf_Internal_Rela * srel;
2067 Elf_Internal_Rela * irelend;
2068 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 2069 bfd_byte * contents = NULL;
2070 bfd_byte * free_contents = NULL;
2071 Elf_Internal_Sym * intsyms = NULL;
2072 Elf_Internal_Sym * free_intsyms = NULL;
2073 Elf_External_Sym_Shndx * shndx_buf = NULL;
2074 bfd_vma pc;
9cea966c
DD		 2075 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2076 int pcrel ATTRIBUTE_UNUSED = 0;
2077 int code ATTRIBUTE_UNUSED = 0;
2078 int section_alignment_glue;
2079 int scale;
2080
99c513f6
DD		 2081 if (abfd == elf_hash_table (link_info)->dynobj
2082 && strcmp (sec->name, ".plt") == 0)
2083 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2084
2085 /* Assume nothing changes. */
2086 *again = FALSE;
9cea966c
DD		 2087
2088 /* We don't have to do anything for a relocatable link, if
2089 this section does not have relocs, or if this is not a
2090 code section. */
0e1862bb 2091 if (bfd_link_relocatable (link_info)
9cea966c
DD		 2092 || (sec->flags & SEC_RELOC) == 0
2093 || sec->reloc_count == 0
2094 || (sec->flags & SEC_CODE) == 0)
2095 return TRUE;
2096
6a40cf0c
NC		 2097 symtab_hdr = & elf_symtab_hdr (abfd);
2098 if (elf_symtab_shndx_list (abfd))
2099 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2100 else
2101 shndx_hdr = NULL;
9cea966c 2102
9cea966c
DD		 2103 /* Get the section contents. */
2104 if (elf_section_data (sec)->this_hdr.contents != NULL)
2105 contents = elf_section_data (sec)->this_hdr.contents;
2106 /* Go get them off disk. */
2107 else
2108 {
2109 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2110 goto error_return;
2111 elf_section_data (sec)->this_hdr.contents = contents;
2112 }
2113
2114 /* Read this BFD's symbols. */
2115 /* Get cached copy if it exists. */
2116 if (symtab_hdr->contents != NULL)
2117 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2118 else
2119 {
2120 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2121 symtab_hdr->contents = (bfd_byte *) intsyms;
2122 }
2123
6a40cf0c 2124 if (shndx_hdr && shndx_hdr->sh_size != 0)
9cea966c
DD		 2125 {
2126 bfd_size_type amt;
2127
2128 amt = symtab_hdr->sh_info;
2129 amt *= sizeof (Elf_External_Sym_Shndx);
2130 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2131 if (shndx_buf == NULL)
2132 goto error_return;
2133 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2134 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2135 goto error_return;
2136 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2137 }
2138
2139 /* Get a copy of the native relocations. */
2140 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2141 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2142 link_info->keep_memory));
2143 if (internal_relocs == NULL)
2144 goto error_return;
2145 if (! link_info->keep_memory)
2146 free_relocs = internal_relocs;
2147
2148 /* The RL_ relocs must be just before the operand relocs they go
2149 with, so we must sort them to guarantee this. We use bubblesort
2150 instead of qsort so we can guarantee that relocs with the same
2151 address remain in the same relative order. */
2152 reloc_bubblesort (internal_relocs, sec->reloc_count);
2153
2154 /* Walk through them looking for relaxing opportunities. */
2155 irelend = internal_relocs + sec->reloc_count;
2156
2157
2158 /* This will either be NULL or a pointer to the next alignment
2159 relocation. */
2160 next_alignment = internal_relocs;
9cea966c
DD		 2161
2162 /* We calculate worst case shrinkage caused by alignment directives.
2163 No fool-proof, but better than either ignoring the problem or
2164 doing heavy duty analysis of all the alignment markers in all
2165 input sections. */
2166 section_alignment_glue = 0;
2167 for (irel = internal_relocs; irel < irelend; irel++)
2168 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2169 && irel->r_addend & RL78_RELAXA_ALIGN)
2170 {
2171 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2172
2173 if (section_alignment_glue < this_glue)
2174 section_alignment_glue = this_glue;
2175 }
2176 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2177 shrinkage. */
2178 section_alignment_glue *= 2;
2179
2180 for (irel = internal_relocs; irel < irelend; irel++)
2181 {
2182 unsigned char *insn;
2183 int nrelocs;
2184
2185 /* The insns we care about are all marked with one of these. */
2186 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2187 continue;
2188
2189 if (irel->r_addend & RL78_RELAXA_ALIGN
2190 || next_alignment == internal_relocs)
2191 {
2192 /* When we delete bytes, we need to maintain all the alignments
2193 indicated. In addition, we need to be careful about relaxing
2194 jumps across alignment boundaries - these displacements
2195 *grow* when we delete bytes. For now, don't shrink
2196 displacements across an alignment boundary, just in case.
2197 Note that this only affects relocations to the same
2198 section. */
9cea966c
DD		 2199 next_alignment += 2;
2200 while (next_alignment < irelend
2201 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2202 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2203 next_alignment ++;
2204 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2205 next_alignment = NULL;
2206 }
2207
2208 /* When we hit alignment markers, see if we've shrunk enough
2209 before them to reduce the gap without violating the alignment
2210 requirements. */
2211 if (irel->r_addend & RL78_RELAXA_ALIGN)
2212 {
2213 /* At this point, the next relocation *should* be the ELIGN
2214 end marker. */
2215 Elf_Internal_Rela *erel = irel + 1;
2216 unsigned int alignment, nbytes;
2217
2218 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2219 continue;
2220 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2221 continue;
2222
2223 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2224
2225 if (erel->r_offset - irel->r_offset < alignment)
2226 continue;
2227
2228 nbytes = erel->r_offset - irel->r_offset;
2229 nbytes /= alignment;
2230 nbytes *= alignment;
2231
1740ba0c
NC		 2232 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
2233 next_alignment, erel->r_offset == sec->size);
9cea966c
DD		 2234 *again = TRUE;
2235
2236 continue;
2237 }
2238
2239 if (irel->r_addend & RL78_RELAXA_ELIGN)
2240 continue;
2241
2242 insn = contents + irel->r_offset;
2243
2244 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2245
2246 /* At this point, we have an insn that is a candidate for linker
2247 relaxation. There are NRELOCS relocs following that may be
2248 relaxed, although each reloc may be made of more than one
2249 reloc entry (such as gp-rel symbols). */
2250
2251 /* Get the value of the symbol referred to by the reloc. Just
2252 in case this is the last reloc in the list, use the RL's
2253 addend to choose between this reloc (no addend) or the next
2254 (yes addend, which means at least one following reloc). */
2255
2256 /* srel points to the "current" reloction for this insn -
2257 actually the last reloc for a given operand, which is the one
2258 we need to update. We check the relaxations in the same
2259 order that the relocations happen, so we'll just push it
2260 along as we go. */
2261 srel = irel;
2262
2263 pc = sec->output_section->vma + sec->output_offset
2264 + srel->r_offset;
2265
1740ba0c
NC		 2266#define GET_RELOC \
2267 BFD_ASSERT (nrelocs > 0); \
2268 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2269 pcrel = symval - pc + srel->r_addend; \
9cea966c
DD		 2270 nrelocs --;
2271
2272#define SNIPNR(offset, nbytes) \
2273 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
1740ba0c
NC		 2274
2275#define SNIP(offset, nbytes, newtype) \
2276 SNIPNR (offset, nbytes); \
9cea966c
DD		 2277 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2278
2279 /* The order of these bit tests must match the order that the
2280 relocs appear in. Since we sorted those by offset, we can
2281 predict them. */
2282
2283 /*----------------------------------------------------------------------*/
2284 /* EF ad BR $rel8 pcrel
2285 ED al ah BR !abs16 abs
2286 EE al ah BR $!rel16 pcrel
2287 EC al ah as BR !!abs20 abs
2288
2289 FD al ah CALL !abs16 abs
2290 FE al ah CALL $!rel16 pcrel
2291 FC al ah as CALL !!abs20 abs
2292
2293 DC ad BC $rel8
2294 DE ad BNC $rel8
2295 DD ad BZ $rel8
2296 DF ad BNZ $rel8
2297 61 C3 ad BH $rel8
2298 61 D3 ad BNH $rel8
2299 61 C8 EF ad SKC ; BR $rel8
2300 61 D8 EF ad SKNC ; BR $rel8
2301 61 E8 EF ad SKZ ; BR $rel8
2302 61 F8 EF ad SKNZ ; BR $rel8
2303 61 E3 EF ad SKH ; BR $rel8
2304 61 F3 EF ad SKNH ; BR $rel8
2305 */
2306
32e79d39 2307 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
9cea966c 2308 {
1122dc88
DD		 2309 /* SKIP opcodes that skip non-branches will have a relax tag
2310 but no corresponding symbol to relax against; we just
2311 skip those. */
2312 if (irel->r_addend & RL78_RELAXA_RNUM)
2313 {
2314 GET_RELOC;
2315 }
9cea966c
DD		 2316
2317 switch (insn[0])
2318 {
2319 case 0xec: /* BR !!abs20 */
2320
2321 if (pcrel < 127
2322 && pcrel > -127)
2323 {
2324 insn[0] = 0xef;
2325 insn[1] = pcrel;
2326 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2327 *again = TRUE;
2328 }
2329 else if (symval < 65536)
2330 {
2331 insn[0] = 0xed;
2332 insn[1] = symval & 0xff;
2333 insn[2] = symval >> 8;
2334 SNIP (2, 1, R_RL78_DIR16S);
2335 *again = TRUE;
2336 }
2337 else if (pcrel < 32767
2338 && pcrel > -32767)
2339 {
2340 insn[0] = 0xee;
2341 insn[1] = pcrel & 0xff;
2342 insn[2] = pcrel >> 8;
2343 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2344 *again = TRUE;
2345 }
2346 break;
2347
2348 case 0xee: /* BR $!pcrel16 */
2349 case 0xed: /* BR $!abs16 */
2350 if (pcrel < 127
2351 && pcrel > -127)
2352 {
2353 insn[0] = 0xef;
2354 insn[1] = pcrel;
2355 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2356 *again = TRUE;
2357 }
2358 break;
2359
2360 case 0xfc: /* CALL !!abs20 */
2361 if (symval < 65536)
2362 {
2363 insn[0] = 0xfd;
2364 insn[1] = symval & 0xff;
2365 insn[2] = symval >> 8;
2366 SNIP (2, 1, R_RL78_DIR16S);
2367 *again = TRUE;
2368 }
2369 else if (pcrel < 32767
2370 && pcrel > -32767)
2371 {
2372 insn[0] = 0xfe;
2373 insn[1] = pcrel & 0xff;
2374 insn[2] = pcrel >> 8;
2375 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2376 *again = TRUE;
2377 }
2378 break;
2379
2380 case 0x61: /* PREFIX */
2381 /* For SKIP/BR, we change the BR opcode and delete the
2382 SKIP. That way, we don't have to find and change the
2383 relocation for the BR. */
1122dc88
DD		 2384 /* Note that, for the case where we're skipping some
2385 other insn, we have no "other" reloc but that's safe
2386 here anyway. */
9cea966c
DD		 2387 switch (insn[1])
2388 {
2389 case 0xc8: /* SKC */
2390 if (insn[2] == 0xef)
2391 {
2392 insn[2] = 0xde; /* BNC */
2393 SNIPNR (0, 2);
2394 }
2395 break;
2396
2397 case 0xd8: /* SKNC */
2398 if (insn[2] == 0xef)
2399 {
2400 insn[2] = 0xdc; /* BC */
2401 SNIPNR (0, 2);
2402 }
2403 break;
2404
2405 case 0xe8: /* SKZ */
2406 if (insn[2] == 0xef)
2407 {
2408 insn[2] = 0xdf; /* BNZ */
2409 SNIPNR (0, 2);
2410 }
2411 break;
2412
2413 case 0xf8: /* SKNZ */
2414 if (insn[2] == 0xef)
2415 {
2416 insn[2] = 0xdd; /* BZ */
2417 SNIPNR (0, 2);
2418 }
2419 break;
2420
2421 case 0xe3: /* SKH */
2422 if (insn[2] == 0xef)
2423 {
2424 insn[2] = 0xd3; /* BNH */
2425 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2426 }
2427 break;
2428
2429 case 0xf3: /* SKNH */
2430 if (insn[2] == 0xef)
2431 {
2432 insn[2] = 0xc3; /* BH */
2433 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2434 }
2435 break;
2436 }
2437 break;
2438 }
9cea966c
DD		 2439 }
2440
71eef2bd
DD		 2441 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
2442 && nrelocs > 0)
9cea966c
DD		 2443 {
2444 /*----------------------------------------------------------------------*/
2445 /* Some insns have both a 16-bit address operand and an 8-bit
2446 variant if the address is within a special range:
2447
2448 Address 16-bit operand SADDR range SFR range
2449 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2450 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2451
2452 The RELAX_ADDR16[] array has the insn encodings for the
2453 16-bit operand version, as well as the SFR and SADDR
2454 variants. We only need to replace the encodings and
2455 adjust the operand.
2456
2457 Note: we intentionally do not attempt to decode and skip
2458 any ES: prefix, as adding ES: means the addr16 (likely)
2459 no longer points to saddr/sfr space.
2460 */
2461
2462 int is_sfr;
2463 int is_saddr;
2464 int idx;
2465 int poff;
2466
2467 GET_RELOC;
2468
9cea966c
DD		 2469 if (0xffe20 <= symval && symval <= 0xfffff)
2470 {
2471
2472 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2473 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2474
2475 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2476 {
2477 if (relax_addr16[idx].prefix != -1
2478 && insn[0] == relax_addr16[idx].prefix
2479 && insn[1] == relax_addr16[idx].insn)
2480 {
2481 poff = 1;
2482 }
2483 else if (relax_addr16[idx].prefix == -1
2484 && insn[0] == relax_addr16[idx].insn)
2485 {
2486 poff = 0;
2487 }
2488 else
2489 continue;
2490
2491 /* We have a matched insn, and poff is 0 or 1 depending
2492 on the base pattern size. */
2493
2494 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2495 {
2496 insn[poff] = relax_addr16[idx].insn_for_sfr;
2497 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2498 }
2499
2500 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2501 {
2502 insn[poff] = relax_addr16[idx].insn_for_saddr;
2503 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2504 }
9cea966c
DD		 2505 }
2506 }
2507 }
9cea966c 2508 /*----------------------------------------------------------------------*/
9cea966c
DD		 2509 }
2510
2511 return TRUE;
2512
2513 error_return:
2514 if (free_relocs != NULL)
2515 free (free_relocs);
2516
2517 if (free_contents != NULL)
2518 free (free_contents);
2519
2520 if (shndx_buf != NULL)
2521 {
2522 shndx_hdr->contents = NULL;
2523 free (shndx_buf);
2524 }
2525
2526 if (free_intsyms != NULL)
2527 free (free_intsyms);
2528
99c513f6
DD		 2529 return TRUE;
2530}
2531
2532\f
2533
2534#define ELF_ARCH bfd_arch_rl78
2535#define ELF_MACHINE_CODE EM_RL78
2536#define ELF_MAXPAGESIZE 0x1000
2537
6d00b590 2538#define TARGET_LITTLE_SYM rl78_elf32_vec
99c513f6
DD		 2539#define TARGET_LITTLE_NAME "elf32-rl78"
2540
2541#define elf_info_to_howto_rel NULL
2542#define elf_info_to_howto rl78_info_to_howto_rela
2543#define elf_backend_object_p rl78_elf_object_p
2544#define elf_backend_relocate_section rl78_elf_relocate_section
2545#define elf_symbol_leading_char ('_')
2546#define elf_backend_can_gc_sections 1
2547
2548#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2549#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2550#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2551#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2552#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2553
2554#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2555#define elf_backend_check_relocs rl78_elf_check_relocs
2556#define elf_backend_always_size_sections \
2557 rl78_elf_always_size_sections
2558#define elf_backend_finish_dynamic_sections \
2559 rl78_elf_finish_dynamic_sections
2560
2561#include "elf32-target.h"
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